drivers/mtd/nand/sharpsl.c

   1 /*
   2  * drivers/mtd/nand/sharpsl.c
   3  *
   4  *  Copyright (C) 2004 Richard Purdie
   5  *
   6  *  Based on Sharp's NAND driver sharp_sl.c
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  */
  13
  14 #include <linux/genhd.h>
  15 #include <linux/slab.h>
  16 #include <linux/module.h>
  17 #include <linux/delay.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/nand_ecc.h>
  21 #include <linux/mtd/partitions.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/platform_device.h>
  24
  25 #include <asm/io.h>
  26 #include <mach/hardware.h>
  27 #include <asm/mach-types.h>
  28
  29 struct sharpsl_nand {
  30         struct mtd_info         mtd;
  31         struct nand_chip        chip;
  32 };
  33
  34 static void __iomem *sharpsl_io_base;
  35
  36 /* register offset */
  37 #define ECCLPLB         sharpsl_io_base+0x00    /* line parity 7 - 0 bit */
  38 #define ECCLPUB         sharpsl_io_base+0x04    /* line parity 15 - 8 bit */
  39 #define ECCCP           sharpsl_io_base+0x08    /* column parity 5 - 0 bit */
  40 #define ECCCNTR         sharpsl_io_base+0x0C    /* ECC byte counter */
  41 #define ECCCLRR         sharpsl_io_base+0x10    /* cleare ECC */
  42 #define FLASHIO         sharpsl_io_base+0x14    /* Flash I/O */
  43 #define FLASHCTL        sharpsl_io_base+0x18    /* Flash Control */
  44
  45 /* Flash control bit */
  46 #define FLRYBY          (1 << 5)
  47 #define FLCE1           (1 << 4)
  48 #define FLWP            (1 << 3)
  49 #define FLALE           (1 << 2)
  50 #define FLCLE           (1 << 1)
  51 #define FLCE0           (1 << 0)
  52
  53 /*
  54  * Define partitions for flash device
  55  */
  56 #define DEFAULT_NUM_PARTITIONS 3
  57
  58 static int nr_partitions;
  59 static struct mtd_partition sharpsl_nand_default_partition_info[] = {
  60         {
  61          .name = "System Area",
  62          .offset = 0,
  63          .size = 7 * 1024 * 1024,
  64          },
  65         {
  66          .name = "Root Filesystem",
  67          .offset = 7 * 1024 * 1024,
  68          .size = 30 * 1024 * 1024,
  69          },
  70         {
  71          .name = "Home Filesystem",
  72          .offset = MTDPART_OFS_APPEND,
  73          .size = MTDPART_SIZ_FULL,
  74          },
  75 };
  76
  77 /*
  78  *      hardware specific access to control-lines
  79  *      ctrl:
  80  *      NAND_CNE: bit 0 -> ! bit 0 & 4
  81  *      NAND_CLE: bit 1 -> bit 1
  82  *      NAND_ALE: bit 2 -> bit 2
  83  *
  84  */
  85 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
  86                                    unsigned int ctrl)
  87 {
  88         struct nand_chip *chip = mtd->priv;
  89
  90         if (ctrl & NAND_CTRL_CHANGE) {
  91                 unsigned char bits = ctrl & 0x07;
  92
  93                 bits |= (ctrl & 0x01) << 4;
  94
  95                 bits ^= 0x11;
  96
  97                 writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL);
  98         }
  99
 100         if (cmd != NAND_CMD_NONE)
 101                 writeb(cmd, chip->IO_ADDR_W);
 102 }
 103
 104 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
 105
 106 static struct nand_bbt_descr sharpsl_bbt = {
 107         .options = 0,
 108         .offs = 4,
 109         .len = 2,
 110         .pattern = scan_ff_pattern
 111 };
 112
 113 static struct nand_bbt_descr sharpsl_akita_bbt = {
 114         .options = 0,
 115         .offs = 4,
 116         .len = 1,
 117         .pattern = scan_ff_pattern
 118 };
 119
 120 static struct nand_ecclayout akita_oobinfo = {
 121         .eccbytes = 24,
 122         .eccpos = {
 123                    0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
 124                    0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
 125                    0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
 126         .oobfree = {{0x08, 0x09}}
 127 };
 128
 129 static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
 130 {
 131         return !((readb(FLASHCTL) & FLRYBY) == 0);
 132 }
 133
 134 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 135 {
 136         writeb(0, ECCCLRR);
 137 }
 138
 139 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
 140 {
 141         ecc_code[0] = ~readb(ECCLPUB);
 142         ecc_code[1] = ~readb(ECCLPLB);
 143         ecc_code[2] = (~readb(ECCCP) << 2) | 0x03;
 144         return readb(ECCCNTR) != 0;
 145 }
 146
 147 #ifdef CONFIG_MTD_PARTITIONS
 148 const char *part_probes[] = { "cmdlinepart", NULL };
 149 #endif
 150
 151 /*
 152  * Main initialization routine
 153  */
 154 static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
 155 {
 156         struct nand_chip *this;
 157         struct mtd_partition *sharpsl_partition_info;
 158         struct resource *r;
 159         int err = 0;
 160         struct sharpsl_nand *sharpsl;
 161
 162         /* Allocate memory for MTD device structure and private data */
 163         sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
 164         if (!sharpsl) {
 165                 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
 166                 return -ENOMEM;
 167         }
 168
 169         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 170         if (!r) {
 171                 dev_err(&pdev->dev, "no io memory resource defined!\n");
 172                 err = -ENODEV;
 173                 goto err_get_res;
 174         }
 175
 176         /* map physical address */
 177         sharpsl_io_base = ioremap(r->start, resource_size(r));
 178         if (!sharpsl_io_base) {
 179                 printk("ioremap to access Sharp SL NAND chip failed\n");
 180                 err = -EIO;
 181                 goto err_ioremap;
 182         }
 183
 184         /* Get pointer to private data */
 185         this = (struct nand_chip *)(&sharpsl->chip);
 186
 187         /* Link the private data with the MTD structure */
 188         sharpsl->mtd.priv = this;
 189         sharpsl->mtd.owner = THIS_MODULE;
 190
 191         platform_set_drvdata(pdev, sharpsl);
 192
 193         /*
 194          * PXA initialize
 195          */
 196         writeb(readb(FLASHCTL) | FLWP, FLASHCTL);
 197
 198         /* Set address of NAND IO lines */
 199         this->IO_ADDR_R = FLASHIO;
 200         this->IO_ADDR_W = FLASHIO;
 201         /* Set address of hardware control function */
 202         this->cmd_ctrl = sharpsl_nand_hwcontrol;
 203         this->dev_ready = sharpsl_nand_dev_ready;
 204         /* 15 us command delay time */
 205         this->chip_delay = 15;
 206         /* set eccmode using hardware ECC */
 207         this->ecc.mode = NAND_ECC_HW;
 208         this->ecc.size = 256;
 209         this->ecc.bytes = 3;
 210         this->badblock_pattern = &sharpsl_bbt;
 211         if (machine_is_akita() || machine_is_borzoi()) {
 212                 this->badblock_pattern = &sharpsl_akita_bbt;
 213                 this->ecc.layout = &akita_oobinfo;
 214         }
 215         this->ecc.hwctl = sharpsl_nand_enable_hwecc;
 216         this->ecc.calculate = sharpsl_nand_calculate_ecc;
 217         this->ecc.correct = nand_correct_data;
 218
 219         /* Scan to find existence of the device */
 220         err = nand_scan(&sharpsl->mtd, 1);
 221         if (err) {
 222                 platform_set_drvdata(pdev, NULL);
 223                 iounmap(sharpsl_io_base);
 224                 kfree(sharpsl);
 225                 return err;
 226         }
 227
 228         /* Register the partitions */
 229         sharpsl->mtd.name = "sharpsl-nand";
 230         nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0);
 231
 232         if (nr_partitions <= 0) {
 233                 nr_partitions = DEFAULT_NUM_PARTITIONS;
 234                 sharpsl_partition_info = sharpsl_nand_default_partition_info;
 235                 if (machine_is_poodle()) {
 236                         sharpsl_partition_info[1].size = 22 * 1024 * 1024;
 237                 } else if (machine_is_corgi() || machine_is_shepherd()) {
 238                         sharpsl_partition_info[1].size = 25 * 1024 * 1024;
 239                 } else if (machine_is_husky()) {
 240                         sharpsl_partition_info[1].size = 53 * 1024 * 1024;
 241                 } else if (machine_is_spitz()) {
 242                         sharpsl_partition_info[1].size = 5 * 1024 * 1024;
 243                 } else if (machine_is_akita()) {
 244                         sharpsl_partition_info[1].size = 58 * 1024 * 1024;
 245                 } else if (machine_is_borzoi()) {
 246                         sharpsl_partition_info[1].size = 32 * 1024 * 1024;
 247                 }
 248         }
 249
 250         add_mtd_partitions(&sharpsl->mtd, sharpsl_partition_info, nr_partitions);
 251
 252         /* Return happy */
 253         return 0;
 254
 255 err_ioremap:
 256 err_get_res:
 257         kfree(sharpsl);
 258         return err;
 259 }
 260
 261 /*
 262  * Clean up routine
 263  */
 264 static int __devexit sharpsl_nand_remove(struct platform_device *pdev)
 265 {
 266         struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
 267
 268         /* Release resources, unregister device */
 269         nand_release(&sharpsl->mtd);
 270
 271         platform_set_drvdata(pdev, NULL);
 272
 273         iounmap(sharpsl_io_base);
 274
 275         /* Free the MTD device structure */
 276         kfree(sharpsl);
 277
 278         return 0;
 279 }
 280
 281 static struct platform_driver sharpsl_nand_driver = {
 282         .driver = {
 283                 .name   = "sharpsl-nand",
 284                 .owner  = THIS_MODULE,
 285         },
 286         .probe          = sharpsl_nand_probe,
 287         .remove         = __devexit_p(sharpsl_nand_remove),
 288 };
 289
 290 static struct resource sharpsl_nand_resources[] = {
 291         {
 292                 .start  = 0x0C000000,
 293                 .end    = 0x0C000FFF,
 294                 .flags  = IORESOURCE_MEM,
 295         },
 296 };
 297
 298 static struct platform_device sharpsl_nand_device = {
 299         .name           = "sharpsl-nand",
 300         .id             = -1,
 301         .resource       = sharpsl_nand_resources,
 302         .num_resources  = ARRAY_SIZE(sharpsl_nand_resources),
 303 };
 304
 305 static int __init sharpsl_nand_init(void)
 306 {
 307         platform_device_register(&sharpsl_nand_device);
 308         return platform_driver_register(&sharpsl_nand_driver);
 309 }
 310 module_init(sharpsl_nand_init);
 311
 312 static void __exit sharpsl_nand_exit(void)
 313 {
 314         platform_driver_unregister(&sharpsl_nand_driver);
 315         platform_device_unregister(&sharpsl_nand_device);
 316 }
 317 module_exit(sharpsl_nand_exit);
 318
 319 MODULE_LICENSE("GPL");
 320 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
 321 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");