1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
5 * Author: Egor Martovetsky <egor@pasemi.com>
6 * Maintained by: Olof Johansson <olof@lixom.net>
8 * Driver for the PWRficient onchip NAND flash interface
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/rawnand.h>
17 #include <linux/mtd/nand_ecc.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/pci.h>
26 #define LBICTRL_LPCCTL_NR 0x00004000
27 #define CLE_PIN_CTL 15
28 #define ALE_PIN_CTL 14
30 static unsigned int lpcctl;
31 static struct mtd_info *pasemi_nand_mtd;
32 static const char driver_name[] = "pasemi-nand";
34 static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
37 memcpy_fromio(buf, chip->legacy.IO_ADDR_R, 0x800);
41 memcpy_fromio(buf, chip->legacy.IO_ADDR_R, len);
44 static void pasemi_write_buf(struct nand_chip *chip, const u_char *buf,
48 memcpy_toio(chip->legacy.IO_ADDR_R, buf, 0x800);
52 memcpy_toio(chip->legacy.IO_ADDR_R, buf, len);
55 static void pasemi_hwcontrol(struct nand_chip *chip, int cmd,
58 if (cmd == NAND_CMD_NONE)
62 out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
64 out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
66 /* Push out posted writes */
71 static int pasemi_device_ready(struct nand_chip *chip)
73 return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
76 static int pasemi_nand_probe(struct platform_device *ofdev)
78 struct device *dev = &ofdev->dev;
80 struct device_node *np = dev->of_node;
82 struct nand_chip *chip;
85 err = of_address_to_resource(np, 0, &res);
90 /* We only support one device at the moment */
94 dev_dbg(dev, "pasemi_nand at %pR\n", &res);
96 /* Allocate memory for MTD device structure and private data */
97 chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
103 pasemi_nand_mtd = nand_to_mtd(chip);
105 /* Link the private data with the MTD structure */
106 pasemi_nand_mtd->dev.parent = dev;
108 chip->legacy.IO_ADDR_R = of_iomap(np, 0);
109 chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
111 if (!chip->legacy.IO_ADDR_R) {
116 pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
122 lpcctl = pci_resource_start(pdev, 0);
125 if (!request_region(lpcctl, 4, driver_name)) {
130 chip->legacy.cmd_ctrl = pasemi_hwcontrol;
131 chip->legacy.dev_ready = pasemi_device_ready;
132 chip->legacy.read_buf = pasemi_read_buf;
133 chip->legacy.write_buf = pasemi_write_buf;
134 chip->legacy.chip_delay = 0;
135 chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
136 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
138 /* Enable the following for a flash based bad block table */
139 chip->bbt_options = NAND_BBT_USE_FLASH;
141 /* Scan to find existence of the device */
142 err = nand_scan(chip, 1);
146 if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
147 dev_err(dev, "Unable to register MTD device\n");
149 goto out_cleanup_nand;
152 dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
160 release_region(lpcctl, 4);
162 iounmap(chip->legacy.IO_ADDR_R);
169 static int pasemi_nand_remove(struct platform_device *ofdev)
171 struct nand_chip *chip;
174 if (!pasemi_nand_mtd)
177 chip = mtd_to_nand(pasemi_nand_mtd);
179 /* Release resources, unregister device */
180 ret = mtd_device_unregister(pasemi_nand_mtd);
184 release_region(lpcctl, 4);
186 iounmap(chip->legacy.IO_ADDR_R);
188 /* Free the MTD device structure */
191 pasemi_nand_mtd = NULL;
196 static const struct of_device_id pasemi_nand_match[] =
199 .compatible = "pasemi,localbus-nand",
204 MODULE_DEVICE_TABLE(of, pasemi_nand_match);
206 static struct platform_driver pasemi_nand_driver =
210 .of_match_table = pasemi_nand_match,
212 .probe = pasemi_nand_probe,
213 .remove = pasemi_nand_remove,
216 module_platform_driver(pasemi_nand_driver);
218 MODULE_LICENSE("GPL");
219 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
220 MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");