drivers/leds/rgb/leds-qcom-lpg.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2017-2022 Linaro Ltd
   4  * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
   5  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
   6  */
   7 #include <linux/bits.h>
   8 #include <linux/bitfield.h>
   9 #include <linux/led-class-multicolor.h>
  10 #include <linux/module.h>
  11 #include <linux/of.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/pwm.h>
  14 #include <linux/regmap.h>
  15 #include <linux/slab.h>
  16
  17 #define LPG_SUBTYPE_REG         0x05
  18 #define  LPG_SUBTYPE_LPG        0x2
  19 #define  LPG_SUBTYPE_PWM        0xb
  20 #define  LPG_SUBTYPE_HI_RES_PWM 0xc
  21 #define  LPG_SUBTYPE_LPG_LITE   0x11
  22 #define LPG_PATTERN_CONFIG_REG  0x40
  23 #define LPG_SIZE_CLK_REG        0x41
  24 #define  PWM_CLK_SELECT_MASK    GENMASK(1, 0)
  25 #define  PWM_CLK_SELECT_HI_RES_MASK     GENMASK(2, 0)
  26 #define  PWM_SIZE_HI_RES_MASK   GENMASK(6, 4)
  27 #define LPG_PREDIV_CLK_REG      0x42
  28 #define  PWM_FREQ_PRE_DIV_MASK  GENMASK(6, 5)
  29 #define  PWM_FREQ_EXP_MASK      GENMASK(2, 0)
  30 #define PWM_TYPE_CONFIG_REG     0x43
  31 #define PWM_VALUE_REG           0x44
  32 #define PWM_ENABLE_CONTROL_REG  0x46
  33 #define PWM_SYNC_REG            0x47
  34 #define LPG_RAMP_DURATION_REG   0x50
  35 #define LPG_HI_PAUSE_REG        0x52
  36 #define LPG_LO_PAUSE_REG        0x54
  37 #define LPG_HI_IDX_REG          0x56
  38 #define LPG_LO_IDX_REG          0x57
  39 #define PWM_SEC_ACCESS_REG      0xd0
  40 #define PWM_DTEST_REG(x)        (0xe2 + (x) - 1)
  41
  42 #define TRI_LED_SRC_SEL         0x45
  43 #define TRI_LED_EN_CTL          0x46
  44 #define TRI_LED_ATC_CTL         0x47
  45
  46 #define LPG_LUT_REG(x)          (0x40 + (x) * 2)
  47 #define RAMP_CONTROL_REG        0xc8
  48
  49 #define LPG_RESOLUTION_9BIT     BIT(9)
  50 #define LPG_RESOLUTION_15BIT    BIT(15)
  51 #define LPG_MAX_M               7
  52 #define LPG_MAX_PREDIV          6
  53
  54 struct lpg_channel;
  55 struct lpg_data;
  56
  57 /**
  58  * struct lpg - LPG device context
  59  * @dev:        pointer to LPG device
  60  * @map:        regmap for register access
  61  * @lock:       used to synchronize LED and pwm callback requests
  62  * @pwm:        PWM-chip object, if operating in PWM mode
  63  * @data:       reference to version specific data
  64  * @lut_base:   base address of the LUT block (optional)
  65  * @lut_size:   number of entries in the LUT block
  66  * @lut_bitmap: allocation bitmap for LUT entries
  67  * @triled_base: base address of the TRILED block (optional)
  68  * @triled_src: power-source for the TRILED
  69  * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
  70  * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
  71  * @channels:   list of PWM channels
  72  * @num_channels: number of @channels
  73  */
  74 struct lpg {
  75         struct device *dev;
  76         struct regmap *map;
  77
  78         struct mutex lock;
  79
  80         struct pwm_chip pwm;
  81
  82         const struct lpg_data *data;
  83
  84         u32 lut_base;
  85         u32 lut_size;
  86         unsigned long *lut_bitmap;
  87
  88         u32 triled_base;
  89         u32 triled_src;
  90         bool triled_has_atc_ctl;
  91         bool triled_has_src_sel;
  92
  93         struct lpg_channel *channels;
  94         unsigned int num_channels;
  95 };
  96
  97 /**
  98  * struct lpg_channel - per channel data
  99  * @lpg:        reference to parent lpg
 100  * @base:       base address of the PWM channel
 101  * @triled_mask: mask in TRILED to enable this channel
 102  * @lut_mask:   mask in LUT to start pattern generator for this channel
 103  * @subtype:    PMIC hardware block subtype
 104  * @in_use:     channel is exposed to LED framework
 105  * @color:      color of the LED attached to this channel
 106  * @dtest_line: DTEST line for output, or 0 if disabled
 107  * @dtest_value: DTEST line configuration
 108  * @pwm_value:  duty (in microseconds) of the generated pulses, overridden by LUT
 109  * @enabled:    output enabled?
 110  * @period:     period (in nanoseconds) of the generated pulses
 111  * @clk_sel:    reference clock frequency selector
 112  * @pre_div_sel: divider selector of the reference clock
 113  * @pre_div_exp: exponential divider of the reference clock
 114  * @pwm_resolution_sel: pwm resolution selector
 115  * @ramp_enabled: duty cycle is driven by iterating over lookup table
 116  * @ramp_ping_pong: reverse through pattern, rather than wrapping to start
 117  * @ramp_oneshot: perform only a single pass over the pattern
 118  * @ramp_reverse: iterate over pattern backwards
 119  * @ramp_tick_ms: length (in milliseconds) of one step in the pattern
 120  * @ramp_lo_pause_ms: pause (in milliseconds) before iterating over pattern
 121  * @ramp_hi_pause_ms: pause (in milliseconds) after iterating over pattern
 122  * @pattern_lo_idx: start index of associated pattern
 123  * @pattern_hi_idx: last index of associated pattern
 124  */
 125 struct lpg_channel {
 126         struct lpg *lpg;
 127
 128         u32 base;
 129         unsigned int triled_mask;
 130         unsigned int lut_mask;
 131         unsigned int subtype;
 132
 133         bool in_use;
 134
 135         int color;
 136
 137         u32 dtest_line;
 138         u32 dtest_value;
 139
 140         u16 pwm_value;
 141         bool enabled;
 142
 143         u64 period;
 144         unsigned int clk_sel;
 145         unsigned int pre_div_sel;
 146         unsigned int pre_div_exp;
 147         unsigned int pwm_resolution_sel;
 148
 149         bool ramp_enabled;
 150         bool ramp_ping_pong;
 151         bool ramp_oneshot;
 152         bool ramp_reverse;
 153         unsigned short ramp_tick_ms;
 154         unsigned long ramp_lo_pause_ms;
 155         unsigned long ramp_hi_pause_ms;
 156
 157         unsigned int pattern_lo_idx;
 158         unsigned int pattern_hi_idx;
 159 };
 160
 161 /**
 162  * struct lpg_led - logical LED object
 163  * @lpg:                lpg context reference
 164  * @cdev:               LED class device
 165  * @mcdev:              Multicolor LED class device
 166  * @num_channels:       number of @channels
 167  * @channels:           list of channels associated with the LED
 168  */
 169 struct lpg_led {
 170         struct lpg *lpg;
 171
 172         struct led_classdev cdev;
 173         struct led_classdev_mc mcdev;
 174
 175         unsigned int num_channels;
 176         struct lpg_channel *channels[] __counted_by(num_channels);
 177 };
 178
 179 /**
 180  * struct lpg_channel_data - per channel initialization data
 181  * @base:               base address for PWM channel registers
 182  * @triled_mask:        bitmask for controlling this channel in TRILED
 183  */
 184 struct lpg_channel_data {
 185         unsigned int base;
 186         u8 triled_mask;
 187 };
 188
 189 /**
 190  * struct lpg_data - initialization data
 191  * @lut_base:           base address of LUT block
 192  * @lut_size:           number of entries in LUT
 193  * @triled_base:        base address of TRILED
 194  * @triled_has_atc_ctl: true if there is TRI_LED_ATC_CTL register
 195  * @triled_has_src_sel: true if there is TRI_LED_SRC_SEL register
 196  * @num_channels:       number of channels in LPG
 197  * @channels:           list of channel initialization data
 198  */
 199 struct lpg_data {
 200         unsigned int lut_base;
 201         unsigned int lut_size;
 202         unsigned int triled_base;
 203         bool triled_has_atc_ctl;
 204         bool triled_has_src_sel;
 205         int num_channels;
 206         const struct lpg_channel_data *channels;
 207 };
 208
 209 static int triled_set(struct lpg *lpg, unsigned int mask, unsigned int enable)
 210 {
 211         /* Skip if we don't have a triled block */
 212         if (!lpg->triled_base)
 213                 return 0;
 214
 215         return regmap_update_bits(lpg->map, lpg->triled_base + TRI_LED_EN_CTL,
 216                                   mask, enable);
 217 }
 218
 219 static int lpg_lut_store(struct lpg *lpg, struct led_pattern *pattern,
 220                          size_t len, unsigned int *lo_idx, unsigned int *hi_idx)
 221 {
 222         unsigned int idx;
 223         u16 val;
 224         int i;
 225
 226         idx = bitmap_find_next_zero_area(lpg->lut_bitmap, lpg->lut_size,
 227                                          0, len, 0);
 228         if (idx >= lpg->lut_size)
 229                 return -ENOMEM;
 230
 231         for (i = 0; i < len; i++) {
 232                 val = pattern[i].brightness;
 233
 234                 regmap_bulk_write(lpg->map, lpg->lut_base + LPG_LUT_REG(idx + i),
 235                                   &val, sizeof(val));
 236         }
 237
 238         bitmap_set(lpg->lut_bitmap, idx, len);
 239
 240         *lo_idx = idx;
 241         *hi_idx = idx + len - 1;
 242
 243         return 0;
 244 }
 245
 246 static void lpg_lut_free(struct lpg *lpg, unsigned int lo_idx, unsigned int hi_idx)
 247 {
 248         int len;
 249
 250         len = hi_idx - lo_idx + 1;
 251         if (len == 1)
 252                 return;
 253
 254         bitmap_clear(lpg->lut_bitmap, lo_idx, len);
 255 }
 256
 257 static int lpg_lut_sync(struct lpg *lpg, unsigned int mask)
 258 {
 259         return regmap_write(lpg->map, lpg->lut_base + RAMP_CONTROL_REG, mask);
 260 }
 261
 262 static const unsigned int lpg_clk_rates[] = {0, 1024, 32768, 19200000};
 263 static const unsigned int lpg_clk_rates_hi_res[] = {0, 1024, 32768, 19200000, 76800000};
 264 static const unsigned int lpg_pre_divs[] = {1, 3, 5, 6};
 265 static const unsigned int lpg_pwm_resolution[] =  {9};
 266 static const unsigned int lpg_pwm_resolution_hi_res[] =  {8, 9, 10, 11, 12, 13, 14, 15};
 267
 268 static int lpg_calc_freq(struct lpg_channel *chan, uint64_t period)
 269 {
 270         unsigned int i, pwm_resolution_count, best_pwm_resolution_sel = 0;
 271         const unsigned int *clk_rate_arr, *pwm_resolution_arr;
 272         unsigned int clk_sel, clk_len, best_clk = 0;
 273         unsigned int div, best_div = 0;
 274         unsigned int m, best_m = 0;
 275         unsigned int resolution;
 276         unsigned int error;
 277         unsigned int best_err = UINT_MAX;
 278         u64 max_period, min_period;
 279         u64 best_period = 0;
 280         u64 max_res;
 281
 282         /*
 283          * The PWM period is determined by:
 284          *
 285          *          resolution * pre_div * 2^M
 286          * period = --------------------------
 287          *                   refclk
 288          *
 289          * Resolution = 2^9 bits for PWM or
 290          *              2^{8, 9, 10, 11, 12, 13, 14, 15} bits for high resolution PWM
 291          * pre_div = {1, 3, 5, 6} and
 292          * M = [0..7].
 293          *
 294          * This allows for periods between 27uS and 384s for PWM channels and periods between
 295          * 3uS and 24576s for high resolution PWMs.
 296          * The PWM framework wants a period of equal or lower length than requested,
 297          * reject anything below minimum period.
 298          */
 299
 300         if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) {
 301                 clk_rate_arr = lpg_clk_rates_hi_res;
 302                 clk_len = ARRAY_SIZE(lpg_clk_rates_hi_res);
 303                 pwm_resolution_arr = lpg_pwm_resolution_hi_res;
 304                 pwm_resolution_count = ARRAY_SIZE(lpg_pwm_resolution_hi_res);
 305                 max_res = LPG_RESOLUTION_15BIT;
 306         } else {
 307                 clk_rate_arr = lpg_clk_rates;
 308                 clk_len = ARRAY_SIZE(lpg_clk_rates);
 309                 pwm_resolution_arr = lpg_pwm_resolution;
 310                 pwm_resolution_count = ARRAY_SIZE(lpg_pwm_resolution);
 311                 max_res = LPG_RESOLUTION_9BIT;
 312         }
 313
 314         min_period = div64_u64((u64)NSEC_PER_SEC * (1 << pwm_resolution_arr[0]),
 315                                clk_rate_arr[clk_len - 1]);
 316         if (period <= min_period)
 317                 return -EINVAL;
 318
 319         /* Limit period to largest possible value, to avoid overflows */
 320         max_period = div64_u64((u64)NSEC_PER_SEC * max_res * LPG_MAX_PREDIV * (1 << LPG_MAX_M),
 321                                1024);
 322         if (period > max_period)
 323                 period = max_period;
 324
 325         /*
 326          * Search for the pre_div, refclk, resolution and M by solving the rewritten formula
 327          * for each refclk, resolution and pre_div value:
 328          *
 329          *                     period * refclk
 330          * M = log2 -------------------------------------
 331          *           NSEC_PER_SEC * pre_div * resolution
 332          */
 333
 334         for (i = 0; i < pwm_resolution_count; i++) {
 335                 resolution = 1 << pwm_resolution_arr[i];
 336                 for (clk_sel = 1; clk_sel < clk_len; clk_sel++) {
 337                         u64 numerator = period * clk_rate_arr[clk_sel];
 338
 339                         for (div = 0; div < ARRAY_SIZE(lpg_pre_divs); div++) {
 340                                 u64 denominator = (u64)NSEC_PER_SEC * lpg_pre_divs[div] *
 341                                                   resolution;
 342                                 u64 actual;
 343                                 u64 ratio;
 344
 345                                 if (numerator < denominator)
 346                                         continue;
 347
 348                                 ratio = div64_u64(numerator, denominator);
 349                                 m = ilog2(ratio);
 350                                 if (m > LPG_MAX_M)
 351                                         m = LPG_MAX_M;
 352
 353                                 actual = DIV_ROUND_UP_ULL(denominator * (1 << m),
 354                                                           clk_rate_arr[clk_sel]);
 355                                 error = period - actual;
 356                                 if (error < best_err) {
 357                                         best_err = error;
 358                                         best_div = div;
 359                                         best_m = m;
 360                                         best_clk = clk_sel;
 361                                         best_period = actual;
 362                                         best_pwm_resolution_sel = i;
 363                                 }
 364                         }
 365                 }
 366         }
 367         chan->clk_sel = best_clk;
 368         chan->pre_div_sel = best_div;
 369         chan->pre_div_exp = best_m;
 370         chan->period = best_period;
 371         chan->pwm_resolution_sel = best_pwm_resolution_sel;
 372         return 0;
 373 }
 374
 375 static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty)
 376 {
 377         unsigned int max;
 378         unsigned int val;
 379         unsigned int clk_rate;
 380
 381         if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) {
 382                 max = LPG_RESOLUTION_15BIT - 1;
 383                 clk_rate = lpg_clk_rates_hi_res[chan->clk_sel];
 384         } else {
 385                 max = LPG_RESOLUTION_9BIT - 1;
 386                 clk_rate = lpg_clk_rates[chan->clk_sel];
 387         }
 388
 389         val = div64_u64(duty * clk_rate,
 390                         (u64)NSEC_PER_SEC * lpg_pre_divs[chan->pre_div_sel] * (1 << chan->pre_div_exp));
 391
 392         chan->pwm_value = min(val, max);
 393 }
 394
 395 static void lpg_apply_freq(struct lpg_channel *chan)
 396 {
 397         unsigned long val;
 398         struct lpg *lpg = chan->lpg;
 399
 400         if (!chan->enabled)
 401                 return;
 402
 403         val = chan->clk_sel;
 404
 405         /* Specify resolution, based on the subtype of the channel */
 406         switch (chan->subtype) {
 407         case LPG_SUBTYPE_LPG:
 408                 val |= GENMASK(5, 4);
 409                 break;
 410         case LPG_SUBTYPE_PWM:
 411                 val |= BIT(2);
 412                 break;
 413         case LPG_SUBTYPE_HI_RES_PWM:
 414                 val |= FIELD_PREP(PWM_SIZE_HI_RES_MASK, chan->pwm_resolution_sel);
 415                 break;
 416         case LPG_SUBTYPE_LPG_LITE:
 417         default:
 418                 val |= BIT(4);
 419                 break;
 420         }
 421
 422         regmap_write(lpg->map, chan->base + LPG_SIZE_CLK_REG, val);
 423
 424         val = FIELD_PREP(PWM_FREQ_PRE_DIV_MASK, chan->pre_div_sel) |
 425               FIELD_PREP(PWM_FREQ_EXP_MASK, chan->pre_div_exp);
 426         regmap_write(lpg->map, chan->base + LPG_PREDIV_CLK_REG, val);
 427 }
 428
 429 #define LPG_ENABLE_GLITCH_REMOVAL       BIT(5)
 430
 431 static void lpg_enable_glitch(struct lpg_channel *chan)
 432 {
 433         struct lpg *lpg = chan->lpg;
 434
 435         regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
 436                            LPG_ENABLE_GLITCH_REMOVAL, 0);
 437 }
 438
 439 static void lpg_disable_glitch(struct lpg_channel *chan)
 440 {
 441         struct lpg *lpg = chan->lpg;
 442
 443         regmap_update_bits(lpg->map, chan->base + PWM_TYPE_CONFIG_REG,
 444                            LPG_ENABLE_GLITCH_REMOVAL,
 445                            LPG_ENABLE_GLITCH_REMOVAL);
 446 }
 447
 448 static void lpg_apply_pwm_value(struct lpg_channel *chan)
 449 {
 450         struct lpg *lpg = chan->lpg;
 451         u16 val = chan->pwm_value;
 452
 453         if (!chan->enabled)
 454                 return;
 455
 456         regmap_bulk_write(lpg->map, chan->base + PWM_VALUE_REG, &val, sizeof(val));
 457 }
 458
 459 #define LPG_PATTERN_CONFIG_LO_TO_HI     BIT(4)
 460 #define LPG_PATTERN_CONFIG_REPEAT       BIT(3)
 461 #define LPG_PATTERN_CONFIG_TOGGLE       BIT(2)
 462 #define LPG_PATTERN_CONFIG_PAUSE_HI     BIT(1)
 463 #define LPG_PATTERN_CONFIG_PAUSE_LO     BIT(0)
 464
 465 static void lpg_apply_lut_control(struct lpg_channel *chan)
 466 {
 467         struct lpg *lpg = chan->lpg;
 468         unsigned int hi_pause;
 469         unsigned int lo_pause;
 470         unsigned int conf = 0;
 471         unsigned int lo_idx = chan->pattern_lo_idx;
 472         unsigned int hi_idx = chan->pattern_hi_idx;
 473         u16 step = chan->ramp_tick_ms;
 474
 475         if (!chan->ramp_enabled || chan->pattern_lo_idx == chan->pattern_hi_idx)
 476                 return;
 477
 478         hi_pause = DIV_ROUND_UP(chan->ramp_hi_pause_ms, step);
 479         lo_pause = DIV_ROUND_UP(chan->ramp_lo_pause_ms, step);
 480
 481         if (!chan->ramp_reverse)
 482                 conf |= LPG_PATTERN_CONFIG_LO_TO_HI;
 483         if (!chan->ramp_oneshot)
 484                 conf |= LPG_PATTERN_CONFIG_REPEAT;
 485         if (chan->ramp_ping_pong)
 486                 conf |= LPG_PATTERN_CONFIG_TOGGLE;
 487         if (chan->ramp_hi_pause_ms)
 488                 conf |= LPG_PATTERN_CONFIG_PAUSE_HI;
 489         if (chan->ramp_lo_pause_ms)
 490                 conf |= LPG_PATTERN_CONFIG_PAUSE_LO;
 491
 492         regmap_write(lpg->map, chan->base + LPG_PATTERN_CONFIG_REG, conf);
 493         regmap_write(lpg->map, chan->base + LPG_HI_IDX_REG, hi_idx);
 494         regmap_write(lpg->map, chan->base + LPG_LO_IDX_REG, lo_idx);
 495
 496         regmap_bulk_write(lpg->map, chan->base + LPG_RAMP_DURATION_REG, &step, sizeof(step));
 497         regmap_write(lpg->map, chan->base + LPG_HI_PAUSE_REG, hi_pause);
 498         regmap_write(lpg->map, chan->base + LPG_LO_PAUSE_REG, lo_pause);
 499 }
 500
 501 #define LPG_ENABLE_CONTROL_OUTPUT               BIT(7)
 502 #define LPG_ENABLE_CONTROL_BUFFER_TRISTATE      BIT(5)
 503 #define LPG_ENABLE_CONTROL_SRC_PWM              BIT(2)
 504 #define LPG_ENABLE_CONTROL_RAMP_GEN             BIT(1)
 505
 506 static void lpg_apply_control(struct lpg_channel *chan)
 507 {
 508         unsigned int ctrl;
 509         struct lpg *lpg = chan->lpg;
 510
 511         ctrl = LPG_ENABLE_CONTROL_BUFFER_TRISTATE;
 512
 513         if (chan->enabled)
 514                 ctrl |= LPG_ENABLE_CONTROL_OUTPUT;
 515
 516         if (chan->pattern_lo_idx != chan->pattern_hi_idx)
 517                 ctrl |= LPG_ENABLE_CONTROL_RAMP_GEN;
 518         else
 519                 ctrl |= LPG_ENABLE_CONTROL_SRC_PWM;
 520
 521         regmap_write(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, ctrl);
 522
 523         /*
 524          * Due to LPG hardware bug, in the PWM mode, having enabled PWM,
 525          * We have to write PWM values one more time.
 526          */
 527         if (chan->enabled)
 528                 lpg_apply_pwm_value(chan);
 529 }
 530
 531 #define LPG_SYNC_PWM    BIT(0)
 532
 533 static void lpg_apply_sync(struct lpg_channel *chan)
 534 {
 535         struct lpg *lpg = chan->lpg;
 536
 537         regmap_write(lpg->map, chan->base + PWM_SYNC_REG, LPG_SYNC_PWM);
 538 }
 539
 540 static int lpg_parse_dtest(struct lpg *lpg)
 541 {
 542         struct lpg_channel *chan;
 543         struct device_node *np = lpg->dev->of_node;
 544         int count;
 545         int ret;
 546         int i;
 547
 548         count = of_property_count_u32_elems(np, "qcom,dtest");
 549         if (count == -EINVAL) {
 550                 return 0;
 551         } else if (count < 0) {
 552                 ret = count;
 553                 goto err_malformed;
 554         } else if (count != lpg->data->num_channels * 2) {
 555                 return dev_err_probe(lpg->dev, -EINVAL,
 556                                      "qcom,dtest needs to be %d items\n",
 557                                      lpg->data->num_channels * 2);
 558         }
 559
 560         for (i = 0; i < lpg->data->num_channels; i++) {
 561                 chan = &lpg->channels[i];
 562
 563                 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2,
 564                                                  &chan->dtest_line);
 565                 if (ret)
 566                         goto err_malformed;
 567
 568                 ret = of_property_read_u32_index(np, "qcom,dtest", i * 2 + 1,
 569                                                  &chan->dtest_value);
 570                 if (ret)
 571                         goto err_malformed;
 572         }
 573
 574         return 0;
 575
 576 err_malformed:
 577         return dev_err_probe(lpg->dev, ret, "malformed qcom,dtest\n");
 578 }
 579
 580 static void lpg_apply_dtest(struct lpg_channel *chan)
 581 {
 582         struct lpg *lpg = chan->lpg;
 583
 584         if (!chan->dtest_line)
 585                 return;
 586
 587         regmap_write(lpg->map, chan->base + PWM_SEC_ACCESS_REG, 0xa5);
 588         regmap_write(lpg->map, chan->base + PWM_DTEST_REG(chan->dtest_line),
 589                      chan->dtest_value);
 590 }
 591
 592 static void lpg_apply(struct lpg_channel *chan)
 593 {
 594         lpg_disable_glitch(chan);
 595         lpg_apply_freq(chan);
 596         lpg_apply_pwm_value(chan);
 597         lpg_apply_control(chan);
 598         lpg_apply_sync(chan);
 599         lpg_apply_lut_control(chan);
 600         lpg_enable_glitch(chan);
 601 }
 602
 603 static void lpg_brightness_set(struct lpg_led *led, struct led_classdev *cdev,
 604                                struct mc_subled *subleds)
 605 {
 606         enum led_brightness brightness;
 607         struct lpg_channel *chan;
 608         unsigned int triled_enabled = 0;
 609         unsigned int triled_mask = 0;
 610         unsigned int lut_mask = 0;
 611         unsigned int duty;
 612         struct lpg *lpg = led->lpg;
 613         int i;
 614
 615         for (i = 0; i < led->num_channels; i++) {
 616                 chan = led->channels[i];
 617                 brightness = subleds[i].brightness;
 618
 619                 if (brightness == LED_OFF) {
 620                         chan->enabled = false;
 621                         chan->ramp_enabled = false;
 622                 } else if (chan->pattern_lo_idx != chan->pattern_hi_idx) {
 623                         lpg_calc_freq(chan, NSEC_PER_MSEC);
 624
 625                         chan->enabled = true;
 626                         chan->ramp_enabled = true;
 627
 628                         lut_mask |= chan->lut_mask;
 629                         triled_enabled |= chan->triled_mask;
 630                 } else {
 631                         lpg_calc_freq(chan, NSEC_PER_MSEC);
 632
 633                         duty = div_u64(brightness * chan->period, cdev->max_brightness);
 634                         lpg_calc_duty(chan, duty);
 635                         chan->enabled = true;
 636                         chan->ramp_enabled = false;
 637
 638                         triled_enabled |= chan->triled_mask;
 639                 }
 640
 641                 triled_mask |= chan->triled_mask;
 642
 643                 lpg_apply(chan);
 644         }
 645
 646         /* Toggle triled lines */
 647         if (triled_mask)
 648                 triled_set(lpg, triled_mask, triled_enabled);
 649
 650         /* Trigger start of ramp generator(s) */
 651         if (lut_mask)
 652                 lpg_lut_sync(lpg, lut_mask);
 653 }
 654
 655 static int lpg_brightness_single_set(struct led_classdev *cdev,
 656                                      enum led_brightness value)
 657 {
 658         struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
 659         struct mc_subled info;
 660
 661         mutex_lock(&led->lpg->lock);
 662
 663         info.brightness = value;
 664         lpg_brightness_set(led, cdev, &info);
 665
 666         mutex_unlock(&led->lpg->lock);
 667
 668         return 0;
 669 }
 670
 671 static int lpg_brightness_mc_set(struct led_classdev *cdev,
 672                                  enum led_brightness value)
 673 {
 674         struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
 675         struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
 676
 677         mutex_lock(&led->lpg->lock);
 678
 679         led_mc_calc_color_components(mc, value);
 680         lpg_brightness_set(led, cdev, mc->subled_info);
 681
 682         mutex_unlock(&led->lpg->lock);
 683
 684         return 0;
 685 }
 686
 687 static int lpg_blink_set(struct lpg_led *led,
 688                          unsigned long *delay_on, unsigned long *delay_off)
 689 {
 690         struct lpg_channel *chan;
 691         unsigned int period;
 692         unsigned int triled_mask = 0;
 693         struct lpg *lpg = led->lpg;
 694         u64 duty;
 695         int i;
 696
 697         if (!*delay_on && !*delay_off) {
 698                 *delay_on = 500;
 699                 *delay_off = 500;
 700         }
 701
 702         duty = *delay_on * NSEC_PER_MSEC;
 703         period = (*delay_on + *delay_off) * NSEC_PER_MSEC;
 704
 705         for (i = 0; i < led->num_channels; i++) {
 706                 chan = led->channels[i];
 707
 708                 lpg_calc_freq(chan, period);
 709                 lpg_calc_duty(chan, duty);
 710
 711                 chan->enabled = true;
 712                 chan->ramp_enabled = false;
 713
 714                 triled_mask |= chan->triled_mask;
 715
 716                 lpg_apply(chan);
 717         }
 718
 719         /* Enable triled lines */
 720         triled_set(lpg, triled_mask, triled_mask);
 721
 722         chan = led->channels[0];
 723         duty = div_u64(chan->pwm_value * chan->period, LPG_RESOLUTION_9BIT);
 724         *delay_on = div_u64(duty, NSEC_PER_MSEC);
 725         *delay_off = div_u64(chan->period - duty, NSEC_PER_MSEC);
 726
 727         return 0;
 728 }
 729
 730 static int lpg_blink_single_set(struct led_classdev *cdev,
 731                                 unsigned long *delay_on, unsigned long *delay_off)
 732 {
 733         struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
 734         int ret;
 735
 736         mutex_lock(&led->lpg->lock);
 737
 738         ret = lpg_blink_set(led, delay_on, delay_off);
 739
 740         mutex_unlock(&led->lpg->lock);
 741
 742         return ret;
 743 }
 744
 745 static int lpg_blink_mc_set(struct led_classdev *cdev,
 746                             unsigned long *delay_on, unsigned long *delay_off)
 747 {
 748         struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
 749         struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
 750         int ret;
 751
 752         mutex_lock(&led->lpg->lock);
 753
 754         ret = lpg_blink_set(led, delay_on, delay_off);
 755
 756         mutex_unlock(&led->lpg->lock);
 757
 758         return ret;
 759 }
 760
 761 static int lpg_pattern_set(struct lpg_led *led, struct led_pattern *led_pattern,
 762                            u32 len, int repeat)
 763 {
 764         struct lpg_channel *chan;
 765         struct lpg *lpg = led->lpg;
 766         struct led_pattern *pattern;
 767         unsigned int brightness_a;
 768         unsigned int brightness_b;
 769         unsigned int actual_len;
 770         unsigned int hi_pause;
 771         unsigned int lo_pause;
 772         unsigned int delta_t;
 773         unsigned int lo_idx;
 774         unsigned int hi_idx;
 775         unsigned int i;
 776         bool ping_pong = true;
 777         int ret = -EINVAL;
 778
 779         /* Hardware only support oneshot or indefinite loops */
 780         if (repeat != -1 && repeat != 1)
 781                 return -EINVAL;
 782
 783         /*
 784          * The standardized leds-trigger-pattern format defines that the
 785          * brightness of the LED follows a linear transition from one entry
 786          * in the pattern to the next, over the given delta_t time. It
 787          * describes that the way to perform instant transitions a zero-length
 788          * entry should be added following a pattern entry.
 789          *
 790          * The LPG hardware is only able to perform the latter (no linear
 791          * transitions), so require each entry in the pattern to be followed by
 792          * a zero-length transition.
 793          */
 794         if (len % 2)
 795                 return -EINVAL;
 796
 797         pattern = kcalloc(len / 2, sizeof(*pattern), GFP_KERNEL);
 798         if (!pattern)
 799                 return -ENOMEM;
 800
 801         for (i = 0; i < len; i += 2) {
 802                 if (led_pattern[i].brightness != led_pattern[i + 1].brightness)
 803                         goto out_free_pattern;
 804                 if (led_pattern[i + 1].delta_t != 0)
 805                         goto out_free_pattern;
 806
 807                 pattern[i / 2].brightness = led_pattern[i].brightness;
 808                 pattern[i / 2].delta_t = led_pattern[i].delta_t;
 809         }
 810
 811         len /= 2;
 812
 813         /*
 814          * Specifying a pattern of length 1 causes the hardware to iterate
 815          * through the entire LUT, so prohibit this.
 816          */
 817         if (len < 2)
 818                 goto out_free_pattern;
 819
 820         /*
 821          * The LPG plays patterns with at a fixed pace, a "low pause" can be
 822          * used to stretch the first delay of the pattern and a "high pause"
 823          * the last one.
 824          *
 825          * In order to save space the pattern can be played in "ping pong"
 826          * mode, in which the pattern is first played forward, then "high
 827          * pause" is applied, then the pattern is played backwards and finally
 828          * the "low pause" is applied.
 829          *
 830          * The middle elements of the pattern are used to determine delta_t and
 831          * the "low pause" and "high pause" multipliers are derrived from this.
 832          *
 833          * The first element in the pattern is used to determine "low pause".
 834          *
 835          * If the specified pattern is a palindrome the ping pong mode is
 836          * enabled. In this scenario the delta_t of the middle entry (i.e. the
 837          * last in the programmed pattern) determines the "high pause".
 838          */
 839
 840         /* Detect palindromes and use "ping pong" to reduce LUT usage */
 841         for (i = 0; i < len / 2; i++) {
 842                 brightness_a = pattern[i].brightness;
 843                 brightness_b = pattern[len - i - 1].brightness;
 844
 845                 if (brightness_a != brightness_b) {
 846                         ping_pong = false;
 847                         break;
 848                 }
 849         }
 850
 851         /* The pattern length to be written to the LUT */
 852         if (ping_pong)
 853                 actual_len = (len + 1) / 2;
 854         else
 855                 actual_len = len;
 856
 857         /*
 858          * Validate that all delta_t in the pattern are the same, with the
 859          * exception of the middle element in case of ping_pong.
 860          */
 861         delta_t = pattern[1].delta_t;
 862         for (i = 2; i < len; i++) {
 863                 if (pattern[i].delta_t != delta_t) {
 864                         /*
 865                          * Allow last entry in the full or shortened pattern to
 866                          * specify hi pause. Reject other variations.
 867                          */
 868                         if (i != actual_len - 1)
 869                                 goto out_free_pattern;
 870                 }
 871         }
 872
 873         /* LPG_RAMP_DURATION_REG is a 9bit */
 874         if (delta_t >= BIT(9))
 875                 goto out_free_pattern;
 876
 877         /* Find "low pause" and "high pause" in the pattern */
 878         lo_pause = pattern[0].delta_t;
 879         hi_pause = pattern[actual_len - 1].delta_t;
 880
 881         mutex_lock(&lpg->lock);
 882         ret = lpg_lut_store(lpg, pattern, actual_len, &lo_idx, &hi_idx);
 883         if (ret < 0)
 884                 goto out_unlock;
 885
 886         for (i = 0; i < led->num_channels; i++) {
 887                 chan = led->channels[i];
 888
 889                 chan->ramp_tick_ms = delta_t;
 890                 chan->ramp_ping_pong = ping_pong;
 891                 chan->ramp_oneshot = repeat != -1;
 892
 893                 chan->ramp_lo_pause_ms = lo_pause;
 894                 chan->ramp_hi_pause_ms = hi_pause;
 895
 896                 chan->pattern_lo_idx = lo_idx;
 897                 chan->pattern_hi_idx = hi_idx;
 898         }
 899
 900 out_unlock:
 901         mutex_unlock(&lpg->lock);
 902 out_free_pattern:
 903         kfree(pattern);
 904
 905         return ret;
 906 }
 907
 908 static int lpg_pattern_single_set(struct led_classdev *cdev,
 909                                   struct led_pattern *pattern, u32 len,
 910                                   int repeat)
 911 {
 912         struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
 913         int ret;
 914
 915         ret = lpg_pattern_set(led, pattern, len, repeat);
 916         if (ret < 0)
 917                 return ret;
 918
 919         lpg_brightness_single_set(cdev, LED_FULL);
 920
 921         return 0;
 922 }
 923
 924 static int lpg_pattern_mc_set(struct led_classdev *cdev,
 925                               struct led_pattern *pattern, u32 len,
 926                               int repeat)
 927 {
 928         struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
 929         struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
 930         int ret;
 931
 932         ret = lpg_pattern_set(led, pattern, len, repeat);
 933         if (ret < 0)
 934                 return ret;
 935
 936         led_mc_calc_color_components(mc, LED_FULL);
 937         lpg_brightness_set(led, cdev, mc->subled_info);
 938
 939         return 0;
 940 }
 941
 942 static int lpg_pattern_clear(struct lpg_led *led)
 943 {
 944         struct lpg_channel *chan;
 945         struct lpg *lpg = led->lpg;
 946         int i;
 947
 948         mutex_lock(&lpg->lock);
 949
 950         chan = led->channels[0];
 951         lpg_lut_free(lpg, chan->pattern_lo_idx, chan->pattern_hi_idx);
 952
 953         for (i = 0; i < led->num_channels; i++) {
 954                 chan = led->channels[i];
 955                 chan->pattern_lo_idx = 0;
 956                 chan->pattern_hi_idx = 0;
 957         }
 958
 959         mutex_unlock(&lpg->lock);
 960
 961         return 0;
 962 }
 963
 964 static int lpg_pattern_single_clear(struct led_classdev *cdev)
 965 {
 966         struct lpg_led *led = container_of(cdev, struct lpg_led, cdev);
 967
 968         return lpg_pattern_clear(led);
 969 }
 970
 971 static int lpg_pattern_mc_clear(struct led_classdev *cdev)
 972 {
 973         struct led_classdev_mc *mc = lcdev_to_mccdev(cdev);
 974         struct lpg_led *led = container_of(mc, struct lpg_led, mcdev);
 975
 976         return lpg_pattern_clear(led);
 977 }
 978
 979 static inline struct lpg *lpg_pwm_from_chip(struct pwm_chip *chip)
 980 {
 981         return container_of(chip, struct lpg, pwm);
 982 }
 983
 984 static int lpg_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
 985 {
 986         struct lpg *lpg = lpg_pwm_from_chip(chip);
 987         struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
 988
 989         return chan->in_use ? -EBUSY : 0;
 990 }
 991
 992 /*
 993  * Limitations:
 994  * - Updating both duty and period is not done atomically, so the output signal
 995  *   will momentarily be a mix of the settings.
 996  * - Changed parameters takes effect immediately.
 997  * - A disabled channel outputs a logical 0.
 998  */
 999 static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
1000                          const struct pwm_state *state)
1001 {
1002         struct lpg *lpg = lpg_pwm_from_chip(chip);
1003         struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
1004         int ret = 0;
1005
1006         if (state->polarity != PWM_POLARITY_NORMAL)
1007                 return -EINVAL;
1008
1009         mutex_lock(&lpg->lock);
1010
1011         if (state->enabled) {
1012                 ret = lpg_calc_freq(chan, state->period);
1013                 if (ret < 0)
1014                         goto out_unlock;
1015
1016                 lpg_calc_duty(chan, state->duty_cycle);
1017         }
1018         chan->enabled = state->enabled;
1019
1020         lpg_apply(chan);
1021
1022         triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0);
1023
1024 out_unlock:
1025         mutex_unlock(&lpg->lock);
1026
1027         return ret;
1028 }
1029
1030 static int lpg_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
1031                              struct pwm_state *state)
1032 {
1033         struct lpg *lpg = lpg_pwm_from_chip(chip);
1034         struct lpg_channel *chan = &lpg->channels[pwm->hwpwm];
1035         unsigned int resolution;
1036         unsigned int pre_div;
1037         unsigned int refclk;
1038         unsigned int val;
1039         unsigned int m;
1040         u16 pwm_value;
1041         int ret;
1042
1043         ret = regmap_read(lpg->map, chan->base + LPG_SIZE_CLK_REG, &val);
1044         if (ret)
1045                 return ret;
1046
1047         if (chan->subtype == LPG_SUBTYPE_HI_RES_PWM) {
1048                 refclk = lpg_clk_rates_hi_res[FIELD_GET(PWM_CLK_SELECT_HI_RES_MASK, val)];
1049                 resolution = lpg_pwm_resolution_hi_res[FIELD_GET(PWM_SIZE_HI_RES_MASK, val)];
1050         } else {
1051                 refclk = lpg_clk_rates[FIELD_GET(PWM_CLK_SELECT_MASK, val)];
1052                 resolution = 9;
1053         }
1054
1055         if (refclk) {
1056                 ret = regmap_read(lpg->map, chan->base + LPG_PREDIV_CLK_REG, &val);
1057                 if (ret)
1058                         return ret;
1059
1060                 pre_div = lpg_pre_divs[FIELD_GET(PWM_FREQ_PRE_DIV_MASK, val)];
1061                 m = FIELD_GET(PWM_FREQ_EXP_MASK, val);
1062
1063                 ret = regmap_bulk_read(lpg->map, chan->base + PWM_VALUE_REG, &pwm_value, sizeof(pwm_value));
1064                 if (ret)
1065                         return ret;
1066
1067                 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * (1 << resolution) *
1068                                                  pre_div * (1 << m), refclk);
1069                 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pwm_value * pre_div * (1 << m), refclk);
1070         } else {
1071                 state->period = 0;
1072                 state->duty_cycle = 0;
1073         }
1074
1075         ret = regmap_read(lpg->map, chan->base + PWM_ENABLE_CONTROL_REG, &val);
1076         if (ret)
1077                 return ret;
1078
1079         state->enabled = FIELD_GET(LPG_ENABLE_CONTROL_OUTPUT, val);
1080         state->polarity = PWM_POLARITY_NORMAL;
1081
1082         if (state->duty_cycle > state->period)
1083                 state->duty_cycle = state->period;
1084
1085         return 0;
1086 }
1087
1088 static const struct pwm_ops lpg_pwm_ops = {
1089         .request = lpg_pwm_request,
1090         .apply = lpg_pwm_apply,
1091         .get_state = lpg_pwm_get_state,
1092 };
1093
1094 static int lpg_add_pwm(struct lpg *lpg)
1095 {
1096         int ret;
1097
1098         lpg->pwm.dev = lpg->dev;
1099         lpg->pwm.npwm = lpg->num_channels;
1100         lpg->pwm.ops = &lpg_pwm_ops;
1101
1102         ret = devm_pwmchip_add(lpg->dev, &lpg->pwm);
1103         if (ret)
1104                 dev_err_probe(lpg->dev, ret, "failed to add PWM chip\n");
1105
1106         return ret;
1107 }
1108
1109 static int lpg_parse_channel(struct lpg *lpg, struct device_node *np,
1110                              struct lpg_channel **channel)
1111 {
1112         struct lpg_channel *chan;
1113         u32 color = LED_COLOR_ID_GREEN;
1114         u32 reg;
1115         int ret;
1116
1117         ret = of_property_read_u32(np, "reg", &reg);
1118         if (ret || !reg || reg > lpg->num_channels)
1119                 return dev_err_probe(lpg->dev, -EINVAL, "invalid \"reg\" of %pOFn\n", np);
1120
1121         chan = &lpg->channels[reg - 1];
1122         chan->in_use = true;
1123
1124         ret = of_property_read_u32(np, "color", &color);
1125         if (ret < 0 && ret != -EINVAL)
1126                 return dev_err_probe(lpg->dev, ret,
1127                                      "failed to parse \"color\" of %pOF\n", np);
1128
1129         chan->color = color;
1130
1131         *channel = chan;
1132
1133         return 0;
1134 }
1135
1136 static int lpg_add_led(struct lpg *lpg, struct device_node *np)
1137 {
1138         struct led_init_data init_data = {};
1139         struct led_classdev *cdev;
1140         struct device_node *child;
1141         struct mc_subled *info;
1142         struct lpg_led *led;
1143         const char *state;
1144         int num_channels;
1145         u32 color = 0;
1146         int ret;
1147         int i;
1148
1149         ret = of_property_read_u32(np, "color", &color);
1150         if (ret < 0 && ret != -EINVAL)
1151                 return dev_err_probe(lpg->dev, ret,
1152                               "failed to parse \"color\" of %pOF\n", np);
1153
1154         if (color == LED_COLOR_ID_RGB)
1155                 num_channels = of_get_available_child_count(np);
1156         else
1157                 num_channels = 1;
1158
1159         led = devm_kzalloc(lpg->dev, struct_size(led, channels, num_channels), GFP_KERNEL);
1160         if (!led)
1161                 return -ENOMEM;
1162
1163         led->lpg = lpg;
1164         led->num_channels = num_channels;
1165
1166         if (color == LED_COLOR_ID_RGB) {
1167                 info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL);
1168                 if (!info)
1169                         return -ENOMEM;
1170                 i = 0;
1171                 for_each_available_child_of_node(np, child) {
1172                         ret = lpg_parse_channel(lpg, child, &led->channels[i]);
1173                         if (ret < 0) {
1174                                 of_node_put(child);
1175                                 return ret;
1176                         }
1177
1178                         info[i].color_index = led->channels[i]->color;
1179                         info[i].intensity = 0;
1180                         i++;
1181                 }
1182
1183                 led->mcdev.subled_info = info;
1184                 led->mcdev.num_colors = num_channels;
1185
1186                 cdev = &led->mcdev.led_cdev;
1187                 cdev->brightness_set_blocking = lpg_brightness_mc_set;
1188                 cdev->blink_set = lpg_blink_mc_set;
1189
1190                 /* Register pattern accessors only if we have a LUT block */
1191                 if (lpg->lut_base) {
1192                         cdev->pattern_set = lpg_pattern_mc_set;
1193                         cdev->pattern_clear = lpg_pattern_mc_clear;
1194                 }
1195         } else {
1196                 ret = lpg_parse_channel(lpg, np, &led->channels[0]);
1197                 if (ret < 0)
1198                         return ret;
1199
1200                 cdev = &led->cdev;
1201                 cdev->brightness_set_blocking = lpg_brightness_single_set;
1202                 cdev->blink_set = lpg_blink_single_set;
1203
1204                 /* Register pattern accessors only if we have a LUT block */
1205                 if (lpg->lut_base) {
1206                         cdev->pattern_set = lpg_pattern_single_set;
1207                         cdev->pattern_clear = lpg_pattern_single_clear;
1208                 }
1209         }
1210
1211         cdev->default_trigger = of_get_property(np, "linux,default-trigger", NULL);
1212         cdev->max_brightness = LPG_RESOLUTION_9BIT - 1;
1213
1214         if (!of_property_read_string(np, "default-state", &state) &&
1215             !strcmp(state, "on"))
1216                 cdev->brightness = cdev->max_brightness;
1217         else
1218                 cdev->brightness = LED_OFF;
1219
1220         cdev->brightness_set_blocking(cdev, cdev->brightness);
1221
1222         init_data.fwnode = of_fwnode_handle(np);
1223
1224         if (color == LED_COLOR_ID_RGB)
1225                 ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data);
1226         else
1227                 ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data);
1228         if (ret)
1229                 dev_err_probe(lpg->dev, ret, "unable to register %s\n", cdev->name);
1230
1231         return ret;
1232 }
1233
1234 static int lpg_init_channels(struct lpg *lpg)
1235 {
1236         const struct lpg_data *data = lpg->data;
1237         struct lpg_channel *chan;
1238         int i;
1239
1240         lpg->num_channels = data->num_channels;
1241         lpg->channels = devm_kcalloc(lpg->dev, data->num_channels,
1242                                      sizeof(struct lpg_channel), GFP_KERNEL);
1243         if (!lpg->channels)
1244                 return -ENOMEM;
1245
1246         for (i = 0; i < data->num_channels; i++) {
1247                 chan = &lpg->channels[i];
1248
1249                 chan->lpg = lpg;
1250                 chan->base = data->channels[i].base;
1251                 chan->triled_mask = data->channels[i].triled_mask;
1252                 chan->lut_mask = BIT(i);
1253
1254                 regmap_read(lpg->map, chan->base + LPG_SUBTYPE_REG, &chan->subtype);
1255         }
1256
1257         return 0;
1258 }
1259
1260 static int lpg_init_triled(struct lpg *lpg)
1261 {
1262         struct device_node *np = lpg->dev->of_node;
1263         int ret;
1264
1265         /* Skip initialization if we don't have a triled block */
1266         if (!lpg->data->triled_base)
1267                 return 0;
1268
1269         lpg->triled_base = lpg->data->triled_base;
1270         lpg->triled_has_atc_ctl = lpg->data->triled_has_atc_ctl;
1271         lpg->triled_has_src_sel = lpg->data->triled_has_src_sel;
1272
1273         if (lpg->triled_has_src_sel) {
1274                 ret = of_property_read_u32(np, "qcom,power-source", &lpg->triled_src);
1275                 if (ret || lpg->triled_src == 2 || lpg->triled_src > 3)
1276                         return dev_err_probe(lpg->dev, -EINVAL,
1277                                              "invalid power source\n");
1278         }
1279
1280         /* Disable automatic trickle charge LED */
1281         if (lpg->triled_has_atc_ctl)
1282                 regmap_write(lpg->map, lpg->triled_base + TRI_LED_ATC_CTL, 0);
1283
1284         /* Configure power source */
1285         if (lpg->triled_has_src_sel)
1286                 regmap_write(lpg->map, lpg->triled_base + TRI_LED_SRC_SEL, lpg->triled_src);
1287
1288         /* Default all outputs to off */
1289         regmap_write(lpg->map, lpg->triled_base + TRI_LED_EN_CTL, 0);
1290
1291         return 0;
1292 }
1293
1294 static int lpg_init_lut(struct lpg *lpg)
1295 {
1296         const struct lpg_data *data = lpg->data;
1297
1298         if (!data->lut_base)
1299                 return 0;
1300
1301         lpg->lut_base = data->lut_base;
1302         lpg->lut_size = data->lut_size;
1303
1304         lpg->lut_bitmap = devm_bitmap_zalloc(lpg->dev, lpg->lut_size, GFP_KERNEL);
1305         if (!lpg->lut_bitmap)
1306                 return -ENOMEM;
1307
1308         return 0;
1309 }
1310
1311 static int lpg_probe(struct platform_device *pdev)
1312 {
1313         struct device_node *np;
1314         struct lpg *lpg;
1315         int ret;
1316         int i;
1317
1318         lpg = devm_kzalloc(&pdev->dev, sizeof(*lpg), GFP_KERNEL);
1319         if (!lpg)
1320                 return -ENOMEM;
1321
1322         lpg->data = of_device_get_match_data(&pdev->dev);
1323         if (!lpg->data)
1324                 return -EINVAL;
1325
1326         lpg->dev = &pdev->dev;
1327         mutex_init(&lpg->lock);
1328
1329         lpg->map = dev_get_regmap(pdev->dev.parent, NULL);
1330         if (!lpg->map)
1331                 return dev_err_probe(&pdev->dev, -ENXIO, "parent regmap unavailable\n");
1332
1333         ret = lpg_init_channels(lpg);
1334         if (ret < 0)
1335                 return ret;
1336
1337         ret = lpg_parse_dtest(lpg);
1338         if (ret < 0)
1339                 return ret;
1340
1341         ret = lpg_init_triled(lpg);
1342         if (ret < 0)
1343                 return ret;
1344
1345         ret = lpg_init_lut(lpg);
1346         if (ret < 0)
1347                 return ret;
1348
1349         for_each_available_child_of_node(pdev->dev.of_node, np) {
1350                 ret = lpg_add_led(lpg, np);
1351                 if (ret) {
1352                         of_node_put(np);
1353                         return ret;
1354                 }
1355         }
1356
1357         for (i = 0; i < lpg->num_channels; i++)
1358                 lpg_apply_dtest(&lpg->channels[i]);
1359
1360         return lpg_add_pwm(lpg);
1361 }
1362
1363 static const struct lpg_data pm8916_pwm_data = {
1364         .num_channels = 1,
1365         .channels = (const struct lpg_channel_data[]) {
1366                 { .base = 0xbc00 },
1367         },
1368 };
1369
1370 static const struct lpg_data pm8941_lpg_data = {
1371         .lut_base = 0xb000,
1372         .lut_size = 64,
1373
1374         .triled_base = 0xd000,
1375         .triled_has_atc_ctl = true,
1376         .triled_has_src_sel = true,
1377
1378         .num_channels = 8,
1379         .channels = (const struct lpg_channel_data[]) {
1380                 { .base = 0xb100 },
1381                 { .base = 0xb200 },
1382                 { .base = 0xb300 },
1383                 { .base = 0xb400 },
1384                 { .base = 0xb500, .triled_mask = BIT(5) },
1385                 { .base = 0xb600, .triled_mask = BIT(6) },
1386                 { .base = 0xb700, .triled_mask = BIT(7) },
1387                 { .base = 0xb800 },
1388         },
1389 };
1390
1391 static const struct lpg_data pm8994_lpg_data = {
1392         .lut_base = 0xb000,
1393         .lut_size = 64,
1394
1395         .num_channels = 6,
1396         .channels = (const struct lpg_channel_data[]) {
1397                 { .base = 0xb100 },
1398                 { .base = 0xb200 },
1399                 { .base = 0xb300 },
1400                 { .base = 0xb400 },
1401                 { .base = 0xb500 },
1402                 { .base = 0xb600 },
1403         },
1404 };
1405
1406 /* PMI632 uses SDAM instead of LUT for pattern */
1407 static const struct lpg_data pmi632_lpg_data = {
1408         .triled_base = 0xd000,
1409
1410         .num_channels = 5,
1411         .channels = (const struct lpg_channel_data[]) {
1412                 { .base = 0xb300, .triled_mask = BIT(7) },
1413                 { .base = 0xb400, .triled_mask = BIT(6) },
1414                 { .base = 0xb500, .triled_mask = BIT(5) },
1415                 { .base = 0xb600 },
1416                 { .base = 0xb700 },
1417         },
1418 };
1419
1420 static const struct lpg_data pmi8994_lpg_data = {
1421         .lut_base = 0xb000,
1422         .lut_size = 24,
1423
1424         .triled_base = 0xd000,
1425         .triled_has_atc_ctl = true,
1426         .triled_has_src_sel = true,
1427
1428         .num_channels = 4,
1429         .channels = (const struct lpg_channel_data[]) {
1430                 { .base = 0xb100, .triled_mask = BIT(5) },
1431                 { .base = 0xb200, .triled_mask = BIT(6) },
1432                 { .base = 0xb300, .triled_mask = BIT(7) },
1433                 { .base = 0xb400 },
1434         },
1435 };
1436
1437 static const struct lpg_data pmi8998_lpg_data = {
1438         .lut_base = 0xb000,
1439         .lut_size = 49,
1440
1441         .triled_base = 0xd000,
1442
1443         .num_channels = 6,
1444         .channels = (const struct lpg_channel_data[]) {
1445                 { .base = 0xb100 },
1446                 { .base = 0xb200 },
1447                 { .base = 0xb300, .triled_mask = BIT(5) },
1448                 { .base = 0xb400, .triled_mask = BIT(6) },
1449                 { .base = 0xb500, .triled_mask = BIT(7) },
1450                 { .base = 0xb600 },
1451         },
1452 };
1453
1454 static const struct lpg_data pm8150b_lpg_data = {
1455         .lut_base = 0xb000,
1456         .lut_size = 24,
1457
1458         .triled_base = 0xd000,
1459
1460         .num_channels = 2,
1461         .channels = (const struct lpg_channel_data[]) {
1462                 { .base = 0xb100, .triled_mask = BIT(7) },
1463                 { .base = 0xb200, .triled_mask = BIT(6) },
1464         },
1465 };
1466
1467 static const struct lpg_data pm8150l_lpg_data = {
1468         .lut_base = 0xb000,
1469         .lut_size = 48,
1470
1471         .triled_base = 0xd000,
1472
1473         .num_channels = 5,
1474         .channels = (const struct lpg_channel_data[]) {
1475                 { .base = 0xb100, .triled_mask = BIT(7) },
1476                 { .base = 0xb200, .triled_mask = BIT(6) },
1477                 { .base = 0xb300, .triled_mask = BIT(5) },
1478                 { .base = 0xbc00 },
1479                 { .base = 0xbd00 },
1480
1481         },
1482 };
1483
1484 static const struct lpg_data pm8350c_pwm_data = {
1485         .triled_base = 0xef00,
1486
1487         .num_channels = 4,
1488         .channels = (const struct lpg_channel_data[]) {
1489                 { .base = 0xe800, .triled_mask = BIT(7) },
1490                 { .base = 0xe900, .triled_mask = BIT(6) },
1491                 { .base = 0xea00, .triled_mask = BIT(5) },
1492                 { .base = 0xeb00 },
1493         },
1494 };
1495
1496 static const struct lpg_data pmk8550_pwm_data = {
1497         .num_channels = 2,
1498         .channels = (const struct lpg_channel_data[]) {
1499                 { .base = 0xe800 },
1500                 { .base = 0xe900 },
1501         },
1502 };
1503
1504 static const struct of_device_id lpg_of_table[] = {
1505         { .compatible = "qcom,pm8150b-lpg", .data = &pm8150b_lpg_data },
1506         { .compatible = "qcom,pm8150l-lpg", .data = &pm8150l_lpg_data },
1507         { .compatible = "qcom,pm8350c-pwm", .data = &pm8350c_pwm_data },
1508         { .compatible = "qcom,pm8916-pwm", .data = &pm8916_pwm_data },
1509         { .compatible = "qcom,pm8941-lpg", .data = &pm8941_lpg_data },
1510         { .compatible = "qcom,pm8994-lpg", .data = &pm8994_lpg_data },
1511         { .compatible = "qcom,pmi632-lpg", .data = &pmi632_lpg_data },
1512         { .compatible = "qcom,pmi8994-lpg", .data = &pmi8994_lpg_data },
1513         { .compatible = "qcom,pmi8998-lpg", .data = &pmi8998_lpg_data },
1514         { .compatible = "qcom,pmc8180c-lpg", .data = &pm8150l_lpg_data },
1515         { .compatible = "qcom,pmk8550-pwm", .data = &pmk8550_pwm_data },
1516         {}
1517 };
1518 MODULE_DEVICE_TABLE(of, lpg_of_table);
1519
1520 static struct platform_driver lpg_driver = {
1521         .probe = lpg_probe,
1522         .driver = {
1523                 .name = "qcom-spmi-lpg",
1524                 .of_match_table = lpg_of_table,
1525         },
1526 };
1527 module_platform_driver(lpg_driver);
1528
1529 MODULE_DESCRIPTION("Qualcomm LPG LED driver");
1530 MODULE_LICENSE("GPL v2");