drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46 #include "ehca_classes.h"
  47 #include "ehca_tools.h"
  48 #include "ehca_qes.h"
  49 #include "ehca_iverbs.h"
  50 #include "hcp_if.h"
  51 #include "hipz_fns.h"
  52
  53 static struct kmem_cache *qp_cache;
  54
  55 /*
  56  * attributes not supported by query qp
  57  */
  58 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  59                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  60                                      IB_QP_ACCESS_FLAGS       | \
  61                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  62
  63 /*
  64  * ehca (internal) qp state values
  65  */
  66 enum ehca_qp_state {
  67         EHCA_QPS_RESET = 1,
  68         EHCA_QPS_INIT = 2,
  69         EHCA_QPS_RTR = 3,
  70         EHCA_QPS_RTS = 5,
  71         EHCA_QPS_SQD = 6,
  72         EHCA_QPS_SQE = 8,
  73         EHCA_QPS_ERR = 128
  74 };
  75
  76 /*
  77  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  78  */
  79 enum ib_qp_statetrans {
  80         IB_QPST_ANY2RESET,
  81         IB_QPST_ANY2ERR,
  82         IB_QPST_RESET2INIT,
  83         IB_QPST_INIT2RTR,
  84         IB_QPST_INIT2INIT,
  85         IB_QPST_RTR2RTS,
  86         IB_QPST_RTS2SQD,
  87         IB_QPST_RTS2RTS,
  88         IB_QPST_SQD2RTS,
  89         IB_QPST_SQE2RTS,
  90         IB_QPST_SQD2SQD,
  91         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  92 };
  93
  94 /*
  95  * ib2ehca_qp_state maps IB to ehca qp_state
  96  * returns ehca qp state corresponding to given ib qp state
  97  */
  98 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
  99 {
 100         switch (ib_qp_state) {
 101         case IB_QPS_RESET:
 102                 return EHCA_QPS_RESET;
 103         case IB_QPS_INIT:
 104                 return EHCA_QPS_INIT;
 105         case IB_QPS_RTR:
 106                 return EHCA_QPS_RTR;
 107         case IB_QPS_RTS:
 108                 return EHCA_QPS_RTS;
 109         case IB_QPS_SQD:
 110                 return EHCA_QPS_SQD;
 111         case IB_QPS_SQE:
 112                 return EHCA_QPS_SQE;
 113         case IB_QPS_ERR:
 114                 return EHCA_QPS_ERR;
 115         default:
 116                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 117                 return -EINVAL;
 118         }
 119 }
 120
 121 /*
 122  * ehca2ib_qp_state maps ehca to IB qp_state
 123  * returns ib qp state corresponding to given ehca qp state
 124  */
 125 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 126                                                 ehca_qp_state)
 127 {
 128         switch (ehca_qp_state) {
 129         case EHCA_QPS_RESET:
 130                 return IB_QPS_RESET;
 131         case EHCA_QPS_INIT:
 132                 return IB_QPS_INIT;
 133         case EHCA_QPS_RTR:
 134                 return IB_QPS_RTR;
 135         case EHCA_QPS_RTS:
 136                 return IB_QPS_RTS;
 137         case EHCA_QPS_SQD:
 138                 return IB_QPS_SQD;
 139         case EHCA_QPS_SQE:
 140                 return IB_QPS_SQE;
 141         case EHCA_QPS_ERR:
 142                 return IB_QPS_ERR;
 143         default:
 144                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 145                 return -EINVAL;
 146         }
 147 }
 148
 149 /*
 150  * ehca_qp_type used as index for req_attr and opt_attr of
 151  * struct ehca_modqp_statetrans
 152  */
 153 enum ehca_qp_type {
 154         QPT_RC = 0,
 155         QPT_UC = 1,
 156         QPT_UD = 2,
 157         QPT_SQP = 3,
 158         QPT_MAX
 159 };
 160
 161 /*
 162  * ib2ehcaqptype maps Ib to ehca qp_type
 163  * returns ehca qp type corresponding to ib qp type
 164  */
 165 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 166 {
 167         switch (ibqptype) {
 168         case IB_QPT_SMI:
 169         case IB_QPT_GSI:
 170                 return QPT_SQP;
 171         case IB_QPT_RC:
 172                 return QPT_RC;
 173         case IB_QPT_UC:
 174                 return QPT_UC;
 175         case IB_QPT_UD:
 176                 return QPT_UD;
 177         default:
 178                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 179                 return -EINVAL;
 180         }
 181 }
 182
 183 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 184                                                          int ib_tostate)
 185 {
 186         int index = -EINVAL;
 187         switch (ib_tostate) {
 188         case IB_QPS_RESET:
 189                 index = IB_QPST_ANY2RESET;
 190                 break;
 191         case IB_QPS_INIT:
 192                 switch (ib_fromstate) {
 193                 case IB_QPS_RESET:
 194                         index = IB_QPST_RESET2INIT;
 195                         break;
 196                 case IB_QPS_INIT:
 197                         index = IB_QPST_INIT2INIT;
 198                         break;
 199                 }
 200                 break;
 201         case IB_QPS_RTR:
 202                 if (ib_fromstate == IB_QPS_INIT)
 203                         index = IB_QPST_INIT2RTR;
 204                 break;
 205         case IB_QPS_RTS:
 206                 switch (ib_fromstate) {
 207                 case IB_QPS_RTR:
 208                         index = IB_QPST_RTR2RTS;
 209                         break;
 210                 case IB_QPS_RTS:
 211                         index = IB_QPST_RTS2RTS;
 212                         break;
 213                 case IB_QPS_SQD:
 214                         index = IB_QPST_SQD2RTS;
 215                         break;
 216                 case IB_QPS_SQE:
 217                         index = IB_QPST_SQE2RTS;
 218                         break;
 219                 }
 220                 break;
 221         case IB_QPS_SQD:
 222                 if (ib_fromstate == IB_QPS_RTS)
 223                         index = IB_QPST_RTS2SQD;
 224                 break;
 225         case IB_QPS_SQE:
 226                 break;
 227         case IB_QPS_ERR:
 228                 index = IB_QPST_ANY2ERR;
 229                 break;
 230         default:
 231                 break;
 232         }
 233         return index;
 234 }
 235
 236 /*
 237  * ibqptype2servicetype returns hcp service type corresponding to given
 238  * ib qp type used by create_qp()
 239  */
 240 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 241 {
 242         switch (ibqptype) {
 243         case IB_QPT_SMI:
 244         case IB_QPT_GSI:
 245                 return ST_UD;
 246         case IB_QPT_RC:
 247                 return ST_RC;
 248         case IB_QPT_UC:
 249                 return ST_UC;
 250         case IB_QPT_UD:
 251                 return ST_UD;
 252         case IB_QPT_RAW_IPV6:
 253                 return -EINVAL;
 254         case IB_QPT_RAW_ETY:
 255                 return -EINVAL;
 256         default:
 257                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 258                 return -EINVAL;
 259         }
 260 }
 261
 262 /*
 263  * init userspace queue info from ipz_queue data
 264  */
 265 static inline void queue2resp(struct ipzu_queue_resp *resp,
 266                               struct ipz_queue *queue)
 267 {
 268         resp->qe_size = queue->qe_size;
 269         resp->act_nr_of_sg = queue->act_nr_of_sg;
 270         resp->queue_length = queue->queue_length;
 271         resp->pagesize = queue->pagesize;
 272         resp->toggle_state = queue->toggle_state;
 273         resp->offset = queue->offset;
 274 }
 275
 276 /*
 277  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 278  */
 279 static inline int init_qp_queue(struct ehca_shca *shca,
 280                                 struct ehca_pd *pd,
 281                                 struct ehca_qp *my_qp,
 282                                 struct ipz_queue *queue,
 283                                 int q_type,
 284                                 u64 expected_hret,
 285                                 struct ehca_alloc_queue_parms *parms,
 286                                 int wqe_size)
 287 {
 288         int ret, cnt, ipz_rc, nr_q_pages;
 289         void *vpage;
 290         u64 rpage, h_ret;
 291         struct ib_device *ib_dev = &shca->ib_device;
 292         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 293
 294         if (!parms->queue_size)
 295                 return 0;
 296
 297         if (parms->is_small) {
 298                 nr_q_pages = 1;
 299                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 300                                         128 << parms->page_size,
 301                                         wqe_size, parms->act_nr_sges, 1);
 302         } else {
 303                 nr_q_pages = parms->queue_size;
 304                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 305                                         EHCA_PAGESIZE, wqe_size,
 306                                         parms->act_nr_sges, 0);
 307         }
 308
 309         if (!ipz_rc) {
 310                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
 311                          ipz_rc);
 312                 return -EBUSY;
 313         }
 314
 315         /* register queue pages */
 316         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 317                 vpage = ipz_qpageit_get_inc(queue);
 318                 if (!vpage) {
 319                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 320                                  "failed p_vpage= %p", vpage);
 321                         ret = -EINVAL;
 322                         goto init_qp_queue1;
 323                 }
 324                 rpage = virt_to_abs(vpage);
 325
 326                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 327                                                  my_qp->ipz_qp_handle,
 328                                                  NULL, 0, q_type,
 329                                                  rpage, parms->is_small ? 0 : 1,
 330                                                  my_qp->galpas.kernel);
 331                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 332                         if (h_ret != expected_hret) {
 333                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 334                                          "h_ret=%li", h_ret);
 335                                 ret = ehca2ib_return_code(h_ret);
 336                                 goto init_qp_queue1;
 337                         }
 338                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 339                         if (vpage) {
 340                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 341                                          "should not succeed vpage=%p", vpage);
 342                                 ret = -EINVAL;
 343                                 goto init_qp_queue1;
 344                         }
 345                 } else {
 346                         if (h_ret != H_PAGE_REGISTERED) {
 347                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 348                                          "h_ret=%li", h_ret);
 349                                 ret = ehca2ib_return_code(h_ret);
 350                                 goto init_qp_queue1;
 351                         }
 352                 }
 353         }
 354
 355         ipz_qeit_reset(queue);
 356
 357         return 0;
 358
 359 init_qp_queue1:
 360         ipz_queue_dtor(pd, queue);
 361         return ret;
 362 }
 363
 364 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
 365 {
 366         if (is_llqp)
 367                 return 128 << act_nr_sge;
 368         else
 369                 return offsetof(struct ehca_wqe,
 370                                 u.nud.sg_list[act_nr_sge]);
 371 }
 372
 373 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
 374                                        int req_nr_sge, int is_llqp)
 375 {
 376         u32 wqe_size, q_size;
 377         int act_nr_sge = req_nr_sge;
 378
 379         if (!is_llqp)
 380                 /* round up #SGEs so WQE size is a power of 2 */
 381                 for (act_nr_sge = 4; act_nr_sge <= 252;
 382                      act_nr_sge = 4 + 2 * act_nr_sge)
 383                         if (act_nr_sge >= req_nr_sge)
 384                                 break;
 385
 386         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
 387         q_size = wqe_size * (queue->max_wr + 1);
 388
 389         if (q_size <= 512)
 390                 queue->page_size = 2;
 391         else if (q_size <= 1024)
 392                 queue->page_size = 3;
 393         else
 394                 queue->page_size = 0;
 395
 396         queue->is_small = (queue->page_size != 0);
 397 }
 398
 399 /*
 400  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 401  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 402  * fields, the field out of init_attr is used.
 403  */
 404 static struct ehca_qp *internal_create_qp(
 405         struct ib_pd *pd,
 406         struct ib_qp_init_attr *init_attr,
 407         struct ib_srq_init_attr *srq_init_attr,
 408         struct ib_udata *udata, int is_srq)
 409 {
 410         struct ehca_qp *my_qp;
 411         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 412         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 413                                               ib_device);
 414         struct ib_ucontext *context = NULL;
 415         u64 h_ret;
 416         int is_llqp = 0, has_srq = 0;
 417         int qp_type, max_send_sge, max_recv_sge, ret;
 418
 419         /* h_call's out parameters */
 420         struct ehca_alloc_qp_parms parms;
 421         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 422         unsigned long flags;
 423
 424         if (!atomic_add_unless(&shca->num_qps, 1, ehca_max_qp)) {
 425                 ehca_err(pd->device, "Unable to create QP, max number of %i "
 426                          "QPs reached.", ehca_max_qp);
 427                 ehca_err(pd->device, "To increase the maximum number of QPs "
 428                          "use the number_of_qps module parameter.\n");
 429                 return ERR_PTR(-ENOSPC);
 430         }
 431
 432         if (init_attr->create_flags) {
 433                 atomic_dec(&shca->num_qps);
 434                 return ERR_PTR(-EINVAL);
 435         }
 436
 437         memset(&parms, 0, sizeof(parms));
 438         qp_type = init_attr->qp_type;
 439
 440         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 441                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 442                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 443                          init_attr->sq_sig_type);
 444                 atomic_dec(&shca->num_qps);
 445                 return ERR_PTR(-EINVAL);
 446         }
 447
 448         /* save LLQP info */
 449         if (qp_type & 0x80) {
 450                 is_llqp = 1;
 451                 parms.ext_type = EQPT_LLQP;
 452                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 453         }
 454         qp_type &= 0x1F;
 455         init_attr->qp_type &= 0x1F;
 456
 457         /* handle SRQ base QPs */
 458         if (init_attr->srq) {
 459                 struct ehca_qp *my_srq =
 460                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 461
 462                 has_srq = 1;
 463                 parms.ext_type = EQPT_SRQBASE;
 464                 parms.srq_qpn = my_srq->real_qp_num;
 465         }
 466
 467         if (is_llqp && has_srq) {
 468                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 469                 atomic_dec(&shca->num_qps);
 470                 return ERR_PTR(-EINVAL);
 471         }
 472
 473         /* handle SRQs */
 474         if (is_srq) {
 475                 parms.ext_type = EQPT_SRQ;
 476                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 477                 if (init_attr->cap.max_recv_sge > 3) {
 478                         ehca_err(pd->device, "no more than three SGEs "
 479                                  "supported for SRQ  pd=%p  max_sge=%x",
 480                                  pd, init_attr->cap.max_recv_sge);
 481                         atomic_dec(&shca->num_qps);
 482                         return ERR_PTR(-EINVAL);
 483                 }
 484         }
 485
 486         /* check QP type */
 487         if (qp_type != IB_QPT_UD &&
 488             qp_type != IB_QPT_UC &&
 489             qp_type != IB_QPT_RC &&
 490             qp_type != IB_QPT_SMI &&
 491             qp_type != IB_QPT_GSI) {
 492                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 493                 atomic_dec(&shca->num_qps);
 494                 return ERR_PTR(-EINVAL);
 495         }
 496
 497         if (is_llqp) {
 498                 switch (qp_type) {
 499                 case IB_QPT_RC:
 500                         if ((init_attr->cap.max_send_wr > 255) ||
 501                             (init_attr->cap.max_recv_wr > 255)) {
 502                                 ehca_err(pd->device,
 503                                          "Invalid Number of max_sq_wr=%x "
 504                                          "or max_rq_wr=%x for RC LLQP",
 505                                          init_attr->cap.max_send_wr,
 506                                          init_attr->cap.max_recv_wr);
 507                                 atomic_dec(&shca->num_qps);
 508                                 return ERR_PTR(-EINVAL);
 509                         }
 510                         break;
 511                 case IB_QPT_UD:
 512                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 513                                 ehca_err(pd->device, "UD LLQP not supported "
 514                                          "by this adapter");
 515                                 atomic_dec(&shca->num_qps);
 516                                 return ERR_PTR(-ENOSYS);
 517                         }
 518                         if (!(init_attr->cap.max_send_sge <= 5
 519                             && init_attr->cap.max_send_sge >= 1
 520                             && init_attr->cap.max_recv_sge <= 5
 521                             && init_attr->cap.max_recv_sge >= 1)) {
 522                                 ehca_err(pd->device,
 523                                          "Invalid Number of max_send_sge=%x "
 524                                          "or max_recv_sge=%x for UD LLQP",
 525                                          init_attr->cap.max_send_sge,
 526                                          init_attr->cap.max_recv_sge);
 527                                 atomic_dec(&shca->num_qps);
 528                                 return ERR_PTR(-EINVAL);
 529                         } else if (init_attr->cap.max_send_wr > 255) {
 530                                 ehca_err(pd->device,
 531                                          "Invalid Number of "
 532                                          "max_send_wr=%x for UD QP_TYPE=%x",
 533                                          init_attr->cap.max_send_wr, qp_type);
 534                                 atomic_dec(&shca->num_qps);
 535                                 return ERR_PTR(-EINVAL);
 536                         }
 537                         break;
 538                 default:
 539                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 540                                  qp_type);
 541                         atomic_dec(&shca->num_qps);
 542                         return ERR_PTR(-EINVAL);
 543                 }
 544         } else {
 545                 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
 546                                || qp_type == IB_QPT_GSI) ? 250 : 252;
 547
 548                 if (init_attr->cap.max_send_sge > max_sge
 549                     || init_attr->cap.max_recv_sge > max_sge) {
 550                         ehca_err(pd->device, "Invalid number of SGEs requested "
 551                                  "send_sge=%x recv_sge=%x max_sge=%x",
 552                                  init_attr->cap.max_send_sge,
 553                                  init_attr->cap.max_recv_sge, max_sge);
 554                         atomic_dec(&shca->num_qps);
 555                         return ERR_PTR(-EINVAL);
 556                 }
 557         }
 558
 559         if (pd->uobject && udata)
 560                 context = pd->uobject->context;
 561
 562         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 563         if (!my_qp) {
 564                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 565                 atomic_dec(&shca->num_qps);
 566                 return ERR_PTR(-ENOMEM);
 567         }
 568
 569         spin_lock_init(&my_qp->spinlock_s);
 570         spin_lock_init(&my_qp->spinlock_r);
 571         my_qp->qp_type = qp_type;
 572         my_qp->ext_type = parms.ext_type;
 573         my_qp->state = IB_QPS_RESET;
 574
 575         if (init_attr->recv_cq)
 576                 my_qp->recv_cq =
 577                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 578         if (init_attr->send_cq)
 579                 my_qp->send_cq =
 580                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 581
 582         do {
 583                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 584                         ret = -ENOMEM;
 585                         ehca_err(pd->device, "Can't reserve idr resources.");
 586                         goto create_qp_exit0;
 587                 }
 588
 589                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 590                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 591                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 592         } while (ret == -EAGAIN);
 593
 594         if (ret) {
 595                 ret = -ENOMEM;
 596                 ehca_err(pd->device, "Can't allocate new idr entry.");
 597                 goto create_qp_exit0;
 598         }
 599
 600         if (my_qp->token > 0x1FFFFFF) {
 601                 ret = -EINVAL;
 602                 ehca_err(pd->device, "Invalid number of qp");
 603                 goto create_qp_exit1;
 604         }
 605
 606         if (has_srq)
 607                 parms.srq_token = my_qp->token;
 608
 609         parms.servicetype = ibqptype2servicetype(qp_type);
 610         if (parms.servicetype < 0) {
 611                 ret = -EINVAL;
 612                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 613                 goto create_qp_exit1;
 614         }
 615
 616         /* Always signal by WQE so we can hide circ. WQEs */
 617         parms.sigtype = HCALL_SIGT_BY_WQE;
 618
 619         /* UD_AV CIRCUMVENTION */
 620         max_send_sge = init_attr->cap.max_send_sge;
 621         max_recv_sge = init_attr->cap.max_recv_sge;
 622         if (parms.servicetype == ST_UD && !is_llqp) {
 623                 max_send_sge += 2;
 624                 max_recv_sge += 2;
 625         }
 626
 627         parms.token = my_qp->token;
 628         parms.eq_handle = shca->eq.ipz_eq_handle;
 629         parms.pd = my_pd->fw_pd;
 630         if (my_qp->send_cq)
 631                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 632         if (my_qp->recv_cq)
 633                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 634
 635         parms.squeue.max_wr = init_attr->cap.max_send_wr;
 636         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
 637         parms.squeue.max_sge = max_send_sge;
 638         parms.rqueue.max_sge = max_recv_sge;
 639
 640         /* RC QPs need one more SWQE for unsolicited ack circumvention */
 641         if (qp_type == IB_QPT_RC)
 642                 parms.squeue.max_wr++;
 643
 644         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
 645                 if (HAS_SQ(my_qp))
 646                         ehca_determine_small_queue(
 647                                 &parms.squeue, max_send_sge, is_llqp);
 648                 if (HAS_RQ(my_qp))
 649                         ehca_determine_small_queue(
 650                                 &parms.rqueue, max_recv_sge, is_llqp);
 651                 parms.qp_storage =
 652                         (parms.squeue.is_small || parms.rqueue.is_small);
 653         }
 654
 655         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 656         if (h_ret != H_SUCCESS) {
 657                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
 658                          h_ret);
 659                 ret = ehca2ib_return_code(h_ret);
 660                 goto create_qp_exit1;
 661         }
 662
 663         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 664         my_qp->ipz_qp_handle = parms.qp_handle;
 665         my_qp->galpas = parms.galpas;
 666
 667         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
 668         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
 669
 670         switch (qp_type) {
 671         case IB_QPT_RC:
 672                 if (is_llqp) {
 673                         parms.squeue.act_nr_sges = 1;
 674                         parms.rqueue.act_nr_sges = 1;
 675                 }
 676                 /* hide the extra WQE */
 677                 parms.squeue.act_nr_wqes--;
 678                 break;
 679         case IB_QPT_UD:
 680         case IB_QPT_GSI:
 681         case IB_QPT_SMI:
 682                 /* UD circumvention */
 683                 if (is_llqp) {
 684                         parms.squeue.act_nr_sges = 1;
 685                         parms.rqueue.act_nr_sges = 1;
 686                 } else {
 687                         parms.squeue.act_nr_sges -= 2;
 688                         parms.rqueue.act_nr_sges -= 2;
 689                 }
 690
 691                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 692                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
 693                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
 694                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
 695                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
 696                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 697                 }
 698
 699                 break;
 700
 701         default:
 702                 break;
 703         }
 704
 705         /* initialize r/squeue and register queue pages */
 706         if (HAS_SQ(my_qp)) {
 707                 ret = init_qp_queue(
 708                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
 709                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 710                         &parms.squeue, swqe_size);
 711                 if (ret) {
 712                         ehca_err(pd->device, "Couldn't initialize squeue "
 713                                  "and pages ret=%i", ret);
 714                         goto create_qp_exit2;
 715                 }
 716         }
 717
 718         if (HAS_RQ(my_qp)) {
 719                 ret = init_qp_queue(
 720                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
 721                         H_SUCCESS, &parms.rqueue, rwqe_size);
 722                 if (ret) {
 723                         ehca_err(pd->device, "Couldn't initialize rqueue "
 724                                  "and pages ret=%i", ret);
 725                         goto create_qp_exit3;
 726                 }
 727         }
 728
 729         if (is_srq) {
 730                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 731                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 732
 733                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 734                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 735         } else {
 736                 my_qp->ib_qp.qp_num = ib_qp_num;
 737                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 738                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 739
 740                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 741                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 742
 743                 my_qp->ib_qp.qp_type = qp_type;
 744                 my_qp->ib_qp.srq = init_attr->srq;
 745
 746                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 747                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 748         }
 749
 750         init_attr->cap.max_inline_data = 0; /* not supported yet */
 751         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
 752         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
 753         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
 754         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
 755         my_qp->init_attr = *init_attr;
 756
 757         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
 758                 shca->sport[init_attr->port_num - 1].ibqp_sqp[qp_type] =
 759                         &my_qp->ib_qp;
 760                 if (ehca_nr_ports < 0) {
 761                         /* alloc array to cache subsequent modify qp parms
 762                          * for autodetect mode
 763                          */
 764                         my_qp->mod_qp_parm =
 765                                 kzalloc(EHCA_MOD_QP_PARM_MAX *
 766                                         sizeof(*my_qp->mod_qp_parm),
 767                                         GFP_KERNEL);
 768                         if (!my_qp->mod_qp_parm) {
 769                                 ehca_err(pd->device,
 770                                          "Could not alloc mod_qp_parm");
 771                                 goto create_qp_exit4;
 772                         }
 773                 }
 774         }
 775
 776         /* NOTE: define_apq0() not supported yet */
 777         if (qp_type == IB_QPT_GSI) {
 778                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 779                 if (h_ret != H_SUCCESS) {
 780                         ret = ehca2ib_return_code(h_ret);
 781                         goto create_qp_exit5;
 782                 }
 783         }
 784
 785         if (my_qp->send_cq) {
 786                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 787                 if (ret) {
 788                         ehca_err(pd->device,
 789                                  "Couldn't assign qp to send_cq ret=%i", ret);
 790                         goto create_qp_exit5;
 791                 }
 792         }
 793
 794         /* copy queues, galpa data to user space */
 795         if (context && udata) {
 796                 struct ehca_create_qp_resp resp;
 797                 memset(&resp, 0, sizeof(resp));
 798
 799                 resp.qp_num = my_qp->real_qp_num;
 800                 resp.token = my_qp->token;
 801                 resp.qp_type = my_qp->qp_type;
 802                 resp.ext_type = my_qp->ext_type;
 803                 resp.qkey = my_qp->qkey;
 804                 resp.real_qp_num = my_qp->real_qp_num;
 805
 806                 if (HAS_SQ(my_qp))
 807                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 808                 if (HAS_RQ(my_qp))
 809                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 810                 resp.fw_handle_ofs = (u32)
 811                         (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
 812
 813                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 814                         ehca_err(pd->device, "Copy to udata failed");
 815                         ret = -EINVAL;
 816                         goto create_qp_exit6;
 817                 }
 818         }
 819
 820         return my_qp;
 821
 822 create_qp_exit6:
 823         ehca_cq_unassign_qp(my_qp->send_cq, my_qp->real_qp_num);
 824
 825 create_qp_exit5:
 826         kfree(my_qp->mod_qp_parm);
 827
 828 create_qp_exit4:
 829         if (HAS_RQ(my_qp))
 830                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 831
 832 create_qp_exit3:
 833         if (HAS_SQ(my_qp))
 834                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
 835
 836 create_qp_exit2:
 837         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 838
 839 create_qp_exit1:
 840         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 841         idr_remove(&ehca_qp_idr, my_qp->token);
 842         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 843
 844 create_qp_exit0:
 845         kmem_cache_free(qp_cache, my_qp);
 846         atomic_dec(&shca->num_qps);
 847         return ERR_PTR(ret);
 848 }
 849
 850 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 851                              struct ib_qp_init_attr *qp_init_attr,
 852                              struct ib_udata *udata)
 853 {
 854         struct ehca_qp *ret;
 855
 856         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 857         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 858 }
 859
 860 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 861                                struct ib_uobject *uobject);
 862
 863 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 864                                struct ib_srq_init_attr *srq_init_attr,
 865                                struct ib_udata *udata)
 866 {
 867         struct ib_qp_init_attr qp_init_attr;
 868         struct ehca_qp *my_qp;
 869         struct ib_srq *ret;
 870         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 871                                               ib_device);
 872         struct hcp_modify_qp_control_block *mqpcb;
 873         u64 hret, update_mask;
 874
 875         /* For common attributes, internal_create_qp() takes its info
 876          * out of qp_init_attr, so copy all common attrs there.
 877          */
 878         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 879         qp_init_attr.event_handler = srq_init_attr->event_handler;
 880         qp_init_attr.qp_context = srq_init_attr->srq_context;
 881         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 882         qp_init_attr.qp_type = IB_QPT_RC;
 883         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 884         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 885
 886         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 887         if (IS_ERR(my_qp))
 888                 return (struct ib_srq *)my_qp;
 889
 890         /* copy back return values */
 891         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 892         srq_init_attr->attr.max_sge = 3;
 893
 894         /* drive SRQ into RTR state */
 895         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 896         if (!mqpcb) {
 897                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 898                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 899                 ret = ERR_PTR(-ENOMEM);
 900                 goto create_srq1;
 901         }
 902
 903         mqpcb->qp_state = EHCA_QPS_INIT;
 904         mqpcb->prim_phys_port = 1;
 905         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 906         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 907                                 my_qp->ipz_qp_handle,
 908                                 &my_qp->pf,
 909                                 update_mask,
 910                                 mqpcb, my_qp->galpas.kernel);
 911         if (hret != H_SUCCESS) {
 912                 ehca_err(pd->device, "Could not modify SRQ to INIT "
 913                          "ehca_qp=%p qp_num=%x h_ret=%li",
 914                          my_qp, my_qp->real_qp_num, hret);
 915                 goto create_srq2;
 916         }
 917
 918         mqpcb->qp_enable = 1;
 919         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 920         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 921                                 my_qp->ipz_qp_handle,
 922                                 &my_qp->pf,
 923                                 update_mask,
 924                                 mqpcb, my_qp->galpas.kernel);
 925         if (hret != H_SUCCESS) {
 926                 ehca_err(pd->device, "Could not enable SRQ "
 927                          "ehca_qp=%p qp_num=%x h_ret=%li",
 928                          my_qp, my_qp->real_qp_num, hret);
 929                 goto create_srq2;
 930         }
 931
 932         mqpcb->qp_state  = EHCA_QPS_RTR;
 933         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 934         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 935                                 my_qp->ipz_qp_handle,
 936                                 &my_qp->pf,
 937                                 update_mask,
 938                                 mqpcb, my_qp->galpas.kernel);
 939         if (hret != H_SUCCESS) {
 940                 ehca_err(pd->device, "Could not modify SRQ to RTR "
 941                          "ehca_qp=%p qp_num=%x h_ret=%li",
 942                          my_qp, my_qp->real_qp_num, hret);
 943                 goto create_srq2;
 944         }
 945
 946         ehca_free_fw_ctrlblock(mqpcb);
 947
 948         return &my_qp->ib_srq;
 949
 950 create_srq2:
 951         ret = ERR_PTR(ehca2ib_return_code(hret));
 952         ehca_free_fw_ctrlblock(mqpcb);
 953
 954 create_srq1:
 955         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 956
 957         return ret;
 958 }
 959
 960 /*
 961  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 962  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 963  * returns total number of bad wqes in bad_wqe_cnt
 964  */
 965 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 966                            int *bad_wqe_cnt)
 967 {
 968         u64 h_ret;
 969         struct ipz_queue *squeue;
 970         void *bad_send_wqe_p, *bad_send_wqe_v;
 971         u64 q_ofs;
 972         struct ehca_wqe *wqe;
 973         int qp_num = my_qp->ib_qp.qp_num;
 974
 975         /* get send wqe pointer */
 976         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 977                                            my_qp->ipz_qp_handle, &my_qp->pf,
 978                                            &bad_send_wqe_p, NULL, 2);
 979         if (h_ret != H_SUCCESS) {
 980                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 981                          " ehca_qp=%p qp_num=%x h_ret=%li",
 982                          my_qp, qp_num, h_ret);
 983                 return ehca2ib_return_code(h_ret);
 984         }
 985         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 986         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 987                  qp_num, bad_send_wqe_p);
 988         /* convert wqe pointer to vadr */
 989         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 990         if (ehca_debug_level >= 2)
 991                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 992         squeue = &my_qp->ipz_squeue;
 993         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 994                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 995                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 996                 return -EFAULT;
 997         }
 998
 999         /* loop sets wqe's purge bit */
1000         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
1001         *bad_wqe_cnt = 0;
1002         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
1003                 if (ehca_debug_level >= 2)
1004                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
1005                 wqe->nr_of_data_seg = 0; /* suppress data access */
1006                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
1007                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
1008                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
1009                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
1010         }
1011         /*
1012          * bad wqe will be reprocessed and ignored when pol_cq() is called,
1013          *  i.e. nr of wqes with flush error status is one less
1014          */
1015         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
1016                  qp_num, (*bad_wqe_cnt)-1);
1017         wqe->wqef = 0;
1018
1019         return 0;
1020 }
1021
1022 /*
1023  * internal_modify_qp with circumvention to handle aqp0 properly
1024  * smi_reset2init indicates if this is an internal reset-to-init-call for
1025  * smi. This flag must always be zero if called from ehca_modify_qp()!
1026  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
1027  */
1028 static int internal_modify_qp(struct ib_qp *ibqp,
1029                               struct ib_qp_attr *attr,
1030                               int attr_mask, int smi_reset2init)
1031 {
1032         enum ib_qp_state qp_cur_state, qp_new_state;
1033         int cnt, qp_attr_idx, ret = 0;
1034         enum ib_qp_statetrans statetrans;
1035         struct hcp_modify_qp_control_block *mqpcb;
1036         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1037         struct ehca_shca *shca =
1038                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
1039         u64 update_mask;
1040         u64 h_ret;
1041         int bad_wqe_cnt = 0;
1042         int squeue_locked = 0;
1043         unsigned long flags = 0;
1044
1045         /* do query_qp to obtain current attr values */
1046         mqpcb = ehca_alloc_fw_ctrlblock(GFP_ATOMIC);
1047         if (!mqpcb) {
1048                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
1049                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
1050                 return -ENOMEM;
1051         }
1052
1053         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
1054                                 my_qp->ipz_qp_handle,
1055                                 &my_qp->pf,
1056                                 mqpcb, my_qp->galpas.kernel);
1057         if (h_ret != H_SUCCESS) {
1058                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1059                          "ehca_qp=%p qp_num=%x h_ret=%li",
1060                          my_qp, ibqp->qp_num, h_ret);
1061                 ret = ehca2ib_return_code(h_ret);
1062                 goto modify_qp_exit1;
1063         }
1064
1065         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1066
1067         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
1068                 ret = -EINVAL;
1069                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1070                          "ehca_qp=%p qp_num=%x",
1071                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1072                 goto modify_qp_exit1;
1073         }
1074         /*
1075          * circumvention to set aqp0 initial state to init
1076          * as expected by IB spec
1077          */
1078         if (smi_reset2init == 0 &&
1079             ibqp->qp_type == IB_QPT_SMI &&
1080             qp_cur_state == IB_QPS_RESET &&
1081             (attr_mask & IB_QP_STATE) &&
1082             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1083                 struct ib_qp_attr smiqp_attr = {
1084                         .qp_state = IB_QPS_INIT,
1085                         .port_num = my_qp->init_attr.port_num,
1086                         .pkey_index = 0,
1087                         .qkey = 0
1088                 };
1089                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1090                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1091                 int smirc = internal_modify_qp(
1092                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1093                 if (smirc) {
1094                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1095                                  "ehca_modify_qp() rc=%i", smirc);
1096                         ret = H_PARAMETER;
1097                         goto modify_qp_exit1;
1098                 }
1099                 qp_cur_state = IB_QPS_INIT;
1100                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1101         }
1102         /* is transmitted current state  equal to "real" current state */
1103         if ((attr_mask & IB_QP_CUR_STATE) &&
1104             qp_cur_state != attr->cur_qp_state) {
1105                 ret = -EINVAL;
1106                 ehca_err(ibqp->device,
1107                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1108                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1109                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1110                 goto modify_qp_exit1;
1111         }
1112
1113         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1114                  "new qp_state=%x attribute_mask=%x",
1115                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1116
1117         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1118         if (!smi_reset2init &&
1119             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1120                                 attr_mask)) {
1121                 ret = -EINVAL;
1122                 ehca_err(ibqp->device,
1123                          "Invalid qp transition new_state=%x cur_state=%x "
1124                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1125                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1126                 goto modify_qp_exit1;
1127         }
1128
1129         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1130         if (mqpcb->qp_state)
1131                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1132         else {
1133                 ret = -EINVAL;
1134                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1135                          "ehca_qp=%p qp_num=%x",
1136                          qp_new_state, my_qp, ibqp->qp_num);
1137                 goto modify_qp_exit1;
1138         }
1139
1140         /* retrieve state transition struct to get req and opt attrs */
1141         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1142         if (statetrans < 0) {
1143                 ret = -EINVAL;
1144                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1145                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1146                          "qp_num=%x", qp_cur_state, qp_new_state,
1147                          statetrans, my_qp, ibqp->qp_num);
1148                 goto modify_qp_exit1;
1149         }
1150
1151         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1152
1153         if (qp_attr_idx < 0) {
1154                 ret = qp_attr_idx;
1155                 ehca_err(ibqp->device,
1156                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1157                          ibqp->qp_type, my_qp, ibqp->qp_num);
1158                 goto modify_qp_exit1;
1159         }
1160
1161         ehca_dbg(ibqp->device,
1162                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1163                  my_qp, ibqp->qp_num, statetrans);
1164
1165         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1166          * in non-LL UD QPs.
1167          */
1168         if ((my_qp->qp_type == IB_QPT_UD) &&
1169             (my_qp->ext_type != EQPT_LLQP) &&
1170             (statetrans == IB_QPST_INIT2RTR) &&
1171             (shca->hw_level >= 0x22)) {
1172                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1173                 mqpcb->send_grh_flag = 1;
1174         }
1175
1176         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1177         if ((my_qp->qp_type == IB_QPT_UD ||
1178              my_qp->qp_type == IB_QPT_GSI ||
1179              my_qp->qp_type == IB_QPT_SMI) &&
1180             statetrans == IB_QPST_SQE2RTS) {
1181                 /* mark next free wqe if kernel */
1182                 if (!ibqp->uobject) {
1183                         struct ehca_wqe *wqe;
1184                         /* lock send queue */
1185                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1186                         squeue_locked = 1;
1187                         /* mark next free wqe */
1188                         wqe = (struct ehca_wqe *)
1189                                 ipz_qeit_get(&my_qp->ipz_squeue);
1190                         wqe->optype = wqe->wqef = 0xff;
1191                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1192                                  ibqp->qp_num, wqe);
1193                 }
1194                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1195                 if (ret) {
1196                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1197                                  "ehca_qp=%p qp_num=%x ret=%i",
1198                                  my_qp, ibqp->qp_num, ret);
1199                         goto modify_qp_exit2;
1200                 }
1201         }
1202
1203         /*
1204          * enable RDMA_Atomic_Control if reset->init und reliable con
1205          * this is necessary since gen2 does not provide that flag,
1206          * but pHyp requires it
1207          */
1208         if (statetrans == IB_QPST_RESET2INIT &&
1209             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1210                 mqpcb->rdma_atomic_ctrl = 3;
1211                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1212         }
1213         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1214         if (statetrans == IB_QPST_INIT2RTR &&
1215             (ibqp->qp_type == IB_QPT_UC) &&
1216             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1217                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1218                 update_mask |=
1219                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1220         }
1221
1222         if (attr_mask & IB_QP_PKEY_INDEX) {
1223                 if (attr->pkey_index >= 16) {
1224                         ret = -EINVAL;
1225                         ehca_err(ibqp->device, "Invalid pkey_index=%x. "
1226                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1227                                  attr->pkey_index, my_qp, ibqp->qp_num);
1228                         goto modify_qp_exit2;
1229                 }
1230                 mqpcb->prim_p_key_idx = attr->pkey_index;
1231                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1232         }
1233         if (attr_mask & IB_QP_PORT) {
1234                 struct ehca_sport *sport;
1235                 struct ehca_qp *aqp1;
1236                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1237                         ret = -EINVAL;
1238                         ehca_err(ibqp->device, "Invalid port=%x. "
1239                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1240                                  attr->port_num, my_qp, ibqp->qp_num,
1241                                  shca->num_ports);
1242                         goto modify_qp_exit2;
1243                 }
1244                 sport = &shca->sport[attr->port_num - 1];
1245                 if (!sport->ibqp_sqp[IB_QPT_GSI]) {
1246                         /* should not occur */
1247                         ret = -EFAULT;
1248                         ehca_err(ibqp->device, "AQP1 was not created for "
1249                                  "port=%x", attr->port_num);
1250                         goto modify_qp_exit2;
1251                 }
1252                 aqp1 = container_of(sport->ibqp_sqp[IB_QPT_GSI],
1253                                     struct ehca_qp, ib_qp);
1254                 if (ibqp->qp_type != IB_QPT_GSI &&
1255                     ibqp->qp_type != IB_QPT_SMI &&
1256                     aqp1->mod_qp_parm) {
1257                         /*
1258                          * firmware will reject this modify_qp() because
1259                          * port is not activated/initialized fully
1260                          */
1261                         ret = -EFAULT;
1262                         ehca_warn(ibqp->device, "Couldn't modify qp port=%x: "
1263                                   "either port is being activated (try again) "
1264                                   "or cabling issue", attr->port_num);
1265                         goto modify_qp_exit2;
1266                 }
1267                 mqpcb->prim_phys_port = attr->port_num;
1268                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1269         }
1270         if (attr_mask & IB_QP_QKEY) {
1271                 mqpcb->qkey = attr->qkey;
1272                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1273         }
1274         if (attr_mask & IB_QP_AV) {
1275                 mqpcb->dlid = attr->ah_attr.dlid;
1276                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1277                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1278                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1279                 mqpcb->service_level = attr->ah_attr.sl;
1280                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1281
1282                 if (ehca_calc_ipd(shca, mqpcb->prim_phys_port,
1283                                   attr->ah_attr.static_rate,
1284                                   &mqpcb->max_static_rate)) {
1285                         ret = -EINVAL;
1286                         goto modify_qp_exit2;
1287                 }
1288                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1289
1290                 /*
1291                  * Always supply the GRH flag, even if it's zero, to give the
1292                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1293                  */
1294                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1295
1296                 /*
1297                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1298                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1299                  */
1300                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1301                         mqpcb->send_grh_flag = 1;
1302
1303                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1304                         update_mask |=
1305                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1306
1307                         for (cnt = 0; cnt < 16; cnt++)
1308                                 mqpcb->dest_gid.byte[cnt] =
1309                                         attr->ah_attr.grh.dgid.raw[cnt];
1310
1311                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1312                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1313                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1314                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1315                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1316                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1317                         update_mask |=
1318                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1319                 }
1320         }
1321
1322         if (attr_mask & IB_QP_PATH_MTU) {
1323                 /* store ld(MTU) */
1324                 my_qp->mtu_shift = attr->path_mtu + 7;
1325                 mqpcb->path_mtu = attr->path_mtu;
1326                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1327         }
1328         if (attr_mask & IB_QP_TIMEOUT) {
1329                 mqpcb->timeout = attr->timeout;
1330                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1331         }
1332         if (attr_mask & IB_QP_RETRY_CNT) {
1333                 mqpcb->retry_count = attr->retry_cnt;
1334                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1335         }
1336         if (attr_mask & IB_QP_RNR_RETRY) {
1337                 mqpcb->rnr_retry_count = attr->rnr_retry;
1338                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1339         }
1340         if (attr_mask & IB_QP_RQ_PSN) {
1341                 mqpcb->receive_psn = attr->rq_psn;
1342                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1343         }
1344         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1345                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1346                         attr->max_dest_rd_atomic : 2;
1347                 update_mask |=
1348                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1349         }
1350         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1351                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1352                         attr->max_rd_atomic : 2;
1353                 update_mask |=
1354                         EHCA_BMASK_SET
1355                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1356         }
1357         if (attr_mask & IB_QP_ALT_PATH) {
1358                 if (attr->alt_port_num < 1
1359                     || attr->alt_port_num > shca->num_ports) {
1360                         ret = -EINVAL;
1361                         ehca_err(ibqp->device, "Invalid alt_port=%x. "
1362                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1363                                  attr->alt_port_num, my_qp, ibqp->qp_num,
1364                                  shca->num_ports);
1365                         goto modify_qp_exit2;
1366                 }
1367                 mqpcb->alt_phys_port = attr->alt_port_num;
1368
1369                 if (attr->alt_pkey_index >= 16) {
1370                         ret = -EINVAL;
1371                         ehca_err(ibqp->device, "Invalid alt_pkey_index=%x. "
1372                                  "ehca_qp=%p qp_num=%x max_pkey_index=f",
1373                                  attr->pkey_index, my_qp, ibqp->qp_num);
1374                         goto modify_qp_exit2;
1375                 }
1376                 mqpcb->alt_p_key_idx = attr->alt_pkey_index;
1377
1378                 mqpcb->timeout_al = attr->alt_timeout;
1379                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1380                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1381                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1382
1383                 if (ehca_calc_ipd(shca, mqpcb->alt_phys_port,
1384                                   attr->alt_ah_attr.static_rate,
1385                                   &mqpcb->max_static_rate_al)) {
1386                         ret = -EINVAL;
1387                         goto modify_qp_exit2;
1388                 }
1389
1390                 /* OpenIB doesn't support alternate retry counts - copy them */
1391                 mqpcb->retry_count_al = mqpcb->retry_count;
1392                 mqpcb->rnr_retry_count_al = mqpcb->rnr_retry_count;
1393
1394                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_ALT_PHYS_PORT, 1)
1395                         | EHCA_BMASK_SET(MQPCB_MASK_ALT_P_KEY_IDX, 1)
1396                         | EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT_AL, 1)
1397                         | EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1)
1398                         | EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1)
1399                         | EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1)
1400                         | EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1)
1401                         | EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT_AL, 1)
1402                         | EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT_AL, 1);
1403
1404                 /*
1405                  * Always supply the GRH flag, even if it's zero, to give the
1406                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1407                  */
1408                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1409
1410                 /*
1411                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1412                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1413                  */
1414                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1415                         mqpcb->send_grh_flag_al = 1;
1416
1417                         for (cnt = 0; cnt < 16; cnt++)
1418                                 mqpcb->dest_gid_al.byte[cnt] =
1419                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1420                         mqpcb->source_gid_idx_al =
1421                                 attr->alt_ah_attr.grh.sgid_index;
1422                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1423                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1424                         mqpcb->traffic_class_al =
1425                                 attr->alt_ah_attr.grh.traffic_class;
1426
1427                         update_mask |=
1428                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1)
1429                                 | EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1)
1430                                 | EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1)
1431                                 | EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1) |
1432                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1433                 }
1434         }
1435
1436         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1437                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1438                 update_mask |=
1439                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1440         }
1441
1442         if (attr_mask & IB_QP_SQ_PSN) {
1443                 mqpcb->send_psn = attr->sq_psn;
1444                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1445         }
1446
1447         if (attr_mask & IB_QP_DEST_QPN) {
1448                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1449                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1450         }
1451
1452         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1453                 if (attr->path_mig_state != IB_MIG_REARM
1454                     && attr->path_mig_state != IB_MIG_MIGRATED) {
1455                         ret = -EINVAL;
1456                         ehca_err(ibqp->device, "Invalid mig_state=%x",
1457                                  attr->path_mig_state);
1458                         goto modify_qp_exit2;
1459                 }
1460                 mqpcb->path_migration_state = attr->path_mig_state + 1;
1461                 update_mask |=
1462                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1463         }
1464
1465         if (attr_mask & IB_QP_CAP) {
1466                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1467                 update_mask |=
1468                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1469                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1470                 update_mask |=
1471                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1472                 /* no support for max_send/recv_sge yet */
1473         }
1474
1475         if (ehca_debug_level >= 2)
1476                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1477
1478         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1479                                  my_qp->ipz_qp_handle,
1480                                  &my_qp->pf,
1481                                  update_mask,
1482                                  mqpcb, my_qp->galpas.kernel);
1483
1484         if (h_ret != H_SUCCESS) {
1485                 ret = ehca2ib_return_code(h_ret);
1486                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1487                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1488                 goto modify_qp_exit2;
1489         }
1490
1491         if ((my_qp->qp_type == IB_QPT_UD ||
1492              my_qp->qp_type == IB_QPT_GSI ||
1493              my_qp->qp_type == IB_QPT_SMI) &&
1494             statetrans == IB_QPST_SQE2RTS) {
1495                 /* doorbell to reprocessing wqes */
1496                 iosync(); /* serialize GAL register access */
1497                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1498                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1499         }
1500
1501         if (statetrans == IB_QPST_RESET2INIT ||
1502             statetrans == IB_QPST_INIT2INIT) {
1503                 mqpcb->qp_enable = 1;
1504                 mqpcb->qp_state = EHCA_QPS_INIT;
1505                 update_mask = 0;
1506                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1507
1508                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1509                                          my_qp->ipz_qp_handle,
1510                                          &my_qp->pf,
1511                                          update_mask,
1512                                          mqpcb,
1513                                          my_qp->galpas.kernel);
1514
1515                 if (h_ret != H_SUCCESS) {
1516                         ret = ehca2ib_return_code(h_ret);
1517                         ehca_err(ibqp->device, "ENABLE in context of "
1518                                  "RESET_2_INIT failed! Maybe you didn't get "
1519                                  "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1520                                  h_ret, my_qp, ibqp->qp_num);
1521                         goto modify_qp_exit2;
1522                 }
1523         }
1524
1525         if (statetrans == IB_QPST_ANY2RESET) {
1526                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1527                 ipz_qeit_reset(&my_qp->ipz_squeue);
1528         }
1529
1530         if (attr_mask & IB_QP_QKEY)
1531                 my_qp->qkey = attr->qkey;
1532
1533         my_qp->state = qp_new_state;
1534
1535 modify_qp_exit2:
1536         if (squeue_locked) { /* this means: sqe -> rts */
1537                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1538                 my_qp->sqerr_purgeflag = 1;
1539         }
1540
1541 modify_qp_exit1:
1542         ehca_free_fw_ctrlblock(mqpcb);
1543
1544         return ret;
1545 }
1546
1547 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1548                    struct ib_udata *udata)
1549 {
1550         struct ehca_shca *shca = container_of(ibqp->device, struct ehca_shca,
1551                                               ib_device);
1552         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1553
1554         /* The if-block below caches qp_attr to be modified for GSI and SMI
1555          * qps during the initialization by ib_mad. When the respective port
1556          * is activated, ie we got an event PORT_ACTIVE, we'll replay the
1557          * cached modify calls sequence, see ehca_recover_sqs() below.
1558          * Why that is required:
1559          * 1) If one port is connected, older code requires that port one
1560          *    to be connected and module option nr_ports=1 to be given by
1561          *    user, which is very inconvenient for end user.
1562          * 2) Firmware accepts modify_qp() only if respective port has become
1563          *    active. Older code had a wait loop of 30sec create_qp()/
1564          *    define_aqp1(), which is not appropriate in practice. This
1565          *    code now removes that wait loop, see define_aqp1(), and always
1566          *    reports all ports to ib_mad resp. users. Only activated ports
1567          *    will then usable for the users.
1568          */
1569         if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_SMI) {
1570                 int port = my_qp->init_attr.port_num;
1571                 struct ehca_sport *sport = &shca->sport[port - 1];
1572                 unsigned long flags;
1573                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1574                 /* cache qp_attr only during init */
1575                 if (my_qp->mod_qp_parm) {
1576                         struct ehca_mod_qp_parm *p;
1577                         if (my_qp->mod_qp_parm_idx >= EHCA_MOD_QP_PARM_MAX) {
1578                                 ehca_err(&shca->ib_device,
1579                                          "mod_qp_parm overflow state=%x port=%x"
1580                                          " type=%x", attr->qp_state,
1581                                          my_qp->init_attr.port_num,
1582                                          ibqp->qp_type);
1583                                 spin_unlock_irqrestore(&sport->mod_sqp_lock,
1584                                                        flags);
1585                                 return -EINVAL;
1586                         }
1587                         p = &my_qp->mod_qp_parm[my_qp->mod_qp_parm_idx];
1588                         p->mask = attr_mask;
1589                         p->attr = *attr;
1590                         my_qp->mod_qp_parm_idx++;
1591                         ehca_dbg(&shca->ib_device,
1592                                  "Saved qp_attr for state=%x port=%x type=%x",
1593                                  attr->qp_state, my_qp->init_attr.port_num,
1594                                  ibqp->qp_type);
1595                         spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1596                         return 0;
1597                 }
1598                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1599         }
1600
1601         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1602 }
1603
1604 void ehca_recover_sqp(struct ib_qp *sqp)
1605 {
1606         struct ehca_qp *my_sqp = container_of(sqp, struct ehca_qp, ib_qp);
1607         int port = my_sqp->init_attr.port_num;
1608         struct ib_qp_attr attr;
1609         struct ehca_mod_qp_parm *qp_parm;
1610         int i, qp_parm_idx, ret;
1611         unsigned long flags, wr_cnt;
1612
1613         if (!my_sqp->mod_qp_parm)
1614                 return;
1615         ehca_dbg(sqp->device, "SQP port=%x qp_num=%x", port, sqp->qp_num);
1616
1617         qp_parm = my_sqp->mod_qp_parm;
1618         qp_parm_idx = my_sqp->mod_qp_parm_idx;
1619         for (i = 0; i < qp_parm_idx; i++) {
1620                 attr = qp_parm[i].attr;
1621                 ret = internal_modify_qp(sqp, &attr, qp_parm[i].mask, 0);
1622                 if (ret) {
1623                         ehca_err(sqp->device, "Could not modify SQP port=%x "
1624                                  "qp_num=%x ret=%x", port, sqp->qp_num, ret);
1625                         goto free_qp_parm;
1626                 }
1627                 ehca_dbg(sqp->device, "SQP port=%x qp_num=%x in state=%x",
1628                          port, sqp->qp_num, attr.qp_state);
1629         }
1630
1631         /* re-trigger posted recv wrs */
1632         wr_cnt =  my_sqp->ipz_rqueue.current_q_offset /
1633                 my_sqp->ipz_rqueue.qe_size;
1634         if (wr_cnt) {
1635                 spin_lock_irqsave(&my_sqp->spinlock_r, flags);
1636                 hipz_update_rqa(my_sqp, wr_cnt);
1637                 spin_unlock_irqrestore(&my_sqp->spinlock_r, flags);
1638                 ehca_dbg(sqp->device, "doorbell port=%x qp_num=%x wr_cnt=%lx",
1639                          port, sqp->qp_num, wr_cnt);
1640         }
1641
1642 free_qp_parm:
1643         kfree(qp_parm);
1644         /* this prevents subsequent calls to modify_qp() to cache qp_attr */
1645         my_sqp->mod_qp_parm = NULL;
1646 }
1647
1648 int ehca_query_qp(struct ib_qp *qp,
1649                   struct ib_qp_attr *qp_attr,
1650                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1651 {
1652         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1653         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1654                                               ib_device);
1655         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1656         struct hcp_modify_qp_control_block *qpcb;
1657         int cnt, ret = 0;
1658         u64 h_ret;
1659
1660         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1661                 ehca_err(qp->device, "Invalid attribute mask "
1662                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1663                          my_qp, qp->qp_num, qp_attr_mask);
1664                 return -EINVAL;
1665         }
1666
1667         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1668         if (!qpcb) {
1669                 ehca_err(qp->device, "Out of memory for qpcb "
1670                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1671                 return -ENOMEM;
1672         }
1673
1674         h_ret = hipz_h_query_qp(adapter_handle,
1675                                 my_qp->ipz_qp_handle,
1676                                 &my_qp->pf,
1677                                 qpcb, my_qp->galpas.kernel);
1678
1679         if (h_ret != H_SUCCESS) {
1680                 ret = ehca2ib_return_code(h_ret);
1681                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1682                          "ehca_qp=%p qp_num=%x h_ret=%li",
1683                          my_qp, qp->qp_num, h_ret);
1684                 goto query_qp_exit1;
1685         }
1686
1687         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1688         qp_attr->qp_state = qp_attr->cur_qp_state;
1689
1690         if (qp_attr->cur_qp_state == -EINVAL) {
1691                 ret = -EINVAL;
1692                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1693                          "ehca_qp=%p qp_num=%x",
1694                          qpcb->qp_state, my_qp, qp->qp_num);
1695                 goto query_qp_exit1;
1696         }
1697
1698         if (qp_attr->qp_state == IB_QPS_SQD)
1699                 qp_attr->sq_draining = 1;
1700
1701         qp_attr->qkey = qpcb->qkey;
1702         qp_attr->path_mtu = qpcb->path_mtu;
1703         qp_attr->path_mig_state = qpcb->path_migration_state - 1;
1704         qp_attr->rq_psn = qpcb->receive_psn;
1705         qp_attr->sq_psn = qpcb->send_psn;
1706         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1707         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1708         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1709         /* UD_AV CIRCUMVENTION */
1710         if (my_qp->qp_type == IB_QPT_UD) {
1711                 qp_attr->cap.max_send_sge =
1712                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1713                 qp_attr->cap.max_recv_sge =
1714                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1715         } else {
1716                 qp_attr->cap.max_send_sge =
1717                         qpcb->actual_nr_sges_in_sq_wqe;
1718                 qp_attr->cap.max_recv_sge =
1719                         qpcb->actual_nr_sges_in_rq_wqe;
1720         }
1721
1722         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1723         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1724
1725         qp_attr->pkey_index =
1726                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1727
1728         qp_attr->port_num =
1729                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1730
1731         qp_attr->timeout = qpcb->timeout;
1732         qp_attr->retry_cnt = qpcb->retry_count;
1733         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1734
1735         qp_attr->alt_pkey_index =
1736                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1737
1738         qp_attr->alt_port_num = qpcb->alt_phys_port;
1739         qp_attr->alt_timeout = qpcb->timeout_al;
1740
1741         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1742         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1743
1744         /* primary av */
1745         qp_attr->ah_attr.sl = qpcb->service_level;
1746
1747         if (qpcb->send_grh_flag) {
1748                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1749         }
1750
1751         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1752         qp_attr->ah_attr.dlid = qpcb->dlid;
1753         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1754         qp_attr->ah_attr.port_num = qp_attr->port_num;
1755
1756         /* primary GRH */
1757         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1758         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1759         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1760         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1761
1762         for (cnt = 0; cnt < 16; cnt++)
1763                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1764                         qpcb->dest_gid.byte[cnt];
1765
1766         /* alternate AV */
1767         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1768         if (qpcb->send_grh_flag_al) {
1769                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1770         }
1771
1772         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1773         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1774         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1775
1776         /* alternate GRH */
1777         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1778         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1779         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1780         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1781
1782         for (cnt = 0; cnt < 16; cnt++)
1783                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1784                         qpcb->dest_gid_al.byte[cnt];
1785
1786         /* return init attributes given in ehca_create_qp */
1787         if (qp_init_attr)
1788                 *qp_init_attr = my_qp->init_attr;
1789
1790         if (ehca_debug_level >= 2)
1791                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1792
1793 query_qp_exit1:
1794         ehca_free_fw_ctrlblock(qpcb);
1795
1796         return ret;
1797 }
1798
1799 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1800                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1801 {
1802         struct ehca_qp *my_qp =
1803                 container_of(ibsrq, struct ehca_qp, ib_srq);
1804         struct ehca_shca *shca =
1805                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1806         struct hcp_modify_qp_control_block *mqpcb;
1807         u64 update_mask;
1808         u64 h_ret;
1809         int ret = 0;
1810
1811         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1812         if (!mqpcb) {
1813                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1814                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1815                 return -ENOMEM;
1816         }
1817
1818         update_mask = 0;
1819         if (attr_mask & IB_SRQ_LIMIT) {
1820                 attr_mask &= ~IB_SRQ_LIMIT;
1821                 update_mask |=
1822                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1823                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1824                 mqpcb->curr_srq_limit =
1825                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1826                 mqpcb->qp_aff_asyn_ev_log_reg =
1827                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1828         }
1829
1830         /* by now, all bits in attr_mask should have been cleared */
1831         if (attr_mask) {
1832                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1833                          "attr_mask=%x", attr_mask);
1834                 ret = -EINVAL;
1835                 goto modify_srq_exit0;
1836         }
1837
1838         if (ehca_debug_level >= 2)
1839                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1840
1841         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1842                                  NULL, update_mask, mqpcb,
1843                                  my_qp->galpas.kernel);
1844
1845         if (h_ret != H_SUCCESS) {
1846                 ret = ehca2ib_return_code(h_ret);
1847                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1848                          "ehca_qp=%p qp_num=%x",
1849                          h_ret, my_qp, my_qp->real_qp_num);
1850         }
1851
1852 modify_srq_exit0:
1853         ehca_free_fw_ctrlblock(mqpcb);
1854
1855         return ret;
1856 }
1857
1858 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1859 {
1860         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1861         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1862                                               ib_device);
1863         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1864         struct hcp_modify_qp_control_block *qpcb;
1865         int ret = 0;
1866         u64 h_ret;
1867
1868         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1869         if (!qpcb) {
1870                 ehca_err(srq->device, "Out of memory for qpcb "
1871                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1872                 return -ENOMEM;
1873         }
1874
1875         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1876                                 NULL, qpcb, my_qp->galpas.kernel);
1877
1878         if (h_ret != H_SUCCESS) {
1879                 ret = ehca2ib_return_code(h_ret);
1880                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1881                          "ehca_qp=%p qp_num=%x h_ret=%li",
1882                          my_qp, my_qp->real_qp_num, h_ret);
1883                 goto query_srq_exit1;
1884         }
1885
1886         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1887         srq_attr->max_sge = 3;
1888         srq_attr->srq_limit = EHCA_BMASK_GET(
1889                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1890
1891         if (ehca_debug_level >= 2)
1892                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1893
1894 query_srq_exit1:
1895         ehca_free_fw_ctrlblock(qpcb);
1896
1897         return ret;
1898 }
1899
1900 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1901                                struct ib_uobject *uobject)
1902 {
1903         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1904         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1905                                              ib_pd);
1906         struct ehca_sport *sport = &shca->sport[my_qp->init_attr.port_num - 1];
1907         u32 qp_num = my_qp->real_qp_num;
1908         int ret;
1909         u64 h_ret;
1910         u8 port_num;
1911         enum ib_qp_type qp_type;
1912         unsigned long flags;
1913
1914         if (uobject) {
1915                 if (my_qp->mm_count_galpa ||
1916                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1917                         ehca_err(dev, "Resources still referenced in "
1918                                  "user space qp_num=%x", qp_num);
1919                         return -EINVAL;
1920                 }
1921         }
1922
1923         if (my_qp->send_cq) {
1924                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1925                 if (ret) {
1926                         ehca_err(dev, "Couldn't unassign qp from "
1927                                  "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1928                                  qp_num, my_qp->send_cq->cq_number);
1929                         return ret;
1930                 }
1931         }
1932
1933         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1934         idr_remove(&ehca_qp_idr, my_qp->token);
1935         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1936
1937         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1938         if (h_ret != H_SUCCESS) {
1939                 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1940                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1941                 return ehca2ib_return_code(h_ret);
1942         }
1943
1944         port_num = my_qp->init_attr.port_num;
1945         qp_type  = my_qp->init_attr.qp_type;
1946
1947         if (qp_type == IB_QPT_SMI || qp_type == IB_QPT_GSI) {
1948                 spin_lock_irqsave(&sport->mod_sqp_lock, flags);
1949                 kfree(my_qp->mod_qp_parm);
1950                 my_qp->mod_qp_parm = NULL;
1951                 shca->sport[port_num - 1].ibqp_sqp[qp_type] = NULL;
1952                 spin_unlock_irqrestore(&sport->mod_sqp_lock, flags);
1953         }
1954
1955         /* no support for IB_QPT_SMI yet */
1956         if (qp_type == IB_QPT_GSI) {
1957                 struct ib_event event;
1958                 ehca_info(dev, "device %s: port %x is inactive.",
1959                           shca->ib_device.name, port_num);
1960                 event.device = &shca->ib_device;
1961                 event.event = IB_EVENT_PORT_ERR;
1962                 event.element.port_num = port_num;
1963                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1964                 ib_dispatch_event(&event);
1965         }
1966
1967         if (HAS_RQ(my_qp))
1968                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1969         if (HAS_SQ(my_qp))
1970                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1971         kmem_cache_free(qp_cache, my_qp);
1972         atomic_dec(&shca->num_qps);
1973         return 0;
1974 }
1975
1976 int ehca_destroy_qp(struct ib_qp *qp)
1977 {
1978         return internal_destroy_qp(qp->device,
1979                                    container_of(qp, struct ehca_qp, ib_qp),
1980                                    qp->uobject);
1981 }
1982
1983 int ehca_destroy_srq(struct ib_srq *srq)
1984 {
1985         return internal_destroy_qp(srq->device,
1986                                    container_of(srq, struct ehca_qp, ib_srq),
1987                                    srq->uobject);
1988 }
1989
1990 int ehca_init_qp_cache(void)
1991 {
1992         qp_cache = kmem_cache_create("ehca_cache_qp",
1993                                      sizeof(struct ehca_qp), 0,
1994                                      SLAB_HWCACHE_ALIGN,
1995                                      NULL);
1996         if (!qp_cache)
1997                 return -ENOMEM;
1998         return 0;
1999 }
2000
2001 void ehca_cleanup_qp_cache(void)
2002 {
2003         if (qp_cache)
2004                 kmem_cache_destroy(qp_cache);
2005 }