2 * INA2XX Current and Power Monitors
4 * Copyright 2015 Baylibre SAS.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Based on linux/drivers/iio/adc/ad7291.c
11 * Copyright 2010-2011 Analog Devices Inc.
13 * Based on linux/drivers/hwmon/ina2xx.c
14 * Copyright 2012 Lothar Felten <l-felten@ti.com>
16 * Licensed under the GPL-2 or later.
18 * IIO driver for INA219-220-226-230-231
20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F
23 #include <linux/delay.h>
24 #include <linux/i2c.h>
25 #include <linux/iio/iio.h>
26 #include <linux/iio/buffer.h>
27 #include <linux/iio/kfifo_buf.h>
28 #include <linux/iio/sysfs.h>
29 #include <linux/kthread.h>
30 #include <linux/module.h>
31 #include <linux/of_device.h>
32 #include <linux/regmap.h>
33 #include <linux/util_macros.h>
35 #include <linux/platform_data/ina2xx.h>
37 /* INA2XX registers definition */
38 #define INA2XX_CONFIG 0x00
39 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
40 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
41 #define INA2XX_POWER 0x03 /* readonly */
42 #define INA2XX_CURRENT 0x04 /* readonly */
43 #define INA2XX_CALIBRATION 0x05
45 #define INA226_MASK_ENABLE 0x06
46 #define INA226_CVRF BIT(3)
47 #define INA219_CNVR BIT(1)
49 #define INA2XX_MAX_REGISTERS 8
51 /* settings - depend on use case */
52 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
53 #define INA219_DEFAULT_IT 532
54 #define INA226_CONFIG_DEFAULT 0x4327
55 #define INA226_DEFAULT_AVG 4
56 #define INA226_DEFAULT_IT 1110
58 #define INA2XX_RSHUNT_DEFAULT 10000
61 * bit masks for reading the settings in the configuration register
62 * FIXME: use regmap_fields.
64 #define INA2XX_MODE_MASK GENMASK(3, 0)
66 /* Averaging for VBus/VShunt/Power */
67 #define INA226_AVG_MASK GENMASK(11, 9)
68 #define INA226_SHIFT_AVG(val) ((val) << 9)
70 /* Integration time for VBus */
71 #define INA219_ITB_MASK GENMASK(10, 7)
72 #define INA219_SHIFT_ITB(val) ((val) << 7)
73 #define INA226_ITB_MASK GENMASK(8, 6)
74 #define INA226_SHIFT_ITB(val) ((val) << 6)
76 /* Integration time for VShunt */
77 #define INA219_ITS_MASK GENMASK(6, 3)
78 #define INA219_SHIFT_ITS(val) ((val) << 3)
79 #define INA226_ITS_MASK GENMASK(5, 3)
80 #define INA226_SHIFT_ITS(val) ((val) << 3)
82 /* Cosmetic macro giving the sampling period for a full P=UxI cycle */
83 #define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \
86 static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
88 return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
91 static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
93 return (reg != INA2XX_CONFIG);
96 static inline bool is_signed_reg(unsigned int reg)
98 return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
101 static const struct regmap_config ina2xx_regmap_config = {
104 .max_register = INA2XX_MAX_REGISTERS,
105 .writeable_reg = ina2xx_is_writeable_reg,
106 .volatile_reg = ina2xx_is_volatile_reg,
109 enum ina2xx_ids { ina219, ina226 };
111 struct ina2xx_config {
113 int calibration_factor;
115 int bus_voltage_shift;
116 int bus_voltage_lsb; /* uV */
117 int power_lsb; /* uW */
118 enum ina2xx_ids chip_id;
121 struct ina2xx_chip_info {
122 struct regmap *regmap;
123 struct task_struct *task;
124 const struct ina2xx_config *config;
125 struct mutex state_lock;
126 unsigned int shunt_resistor;
128 int int_time_vbus; /* Bus voltage integration time uS */
129 int int_time_vshunt; /* Shunt voltage integration time uS */
130 bool allow_async_readout;
133 static const struct ina2xx_config ina2xx_config[] = {
135 .config_default = INA219_CONFIG_DEFAULT,
136 .calibration_factor = 40960000,
138 .bus_voltage_shift = 3,
139 .bus_voltage_lsb = 4000,
144 .config_default = INA226_CONFIG_DEFAULT,
145 .calibration_factor = 5120000,
147 .bus_voltage_shift = 0,
148 .bus_voltage_lsb = 1250,
154 static int ina2xx_read_raw(struct iio_dev *indio_dev,
155 struct iio_chan_spec const *chan,
156 int *val, int *val2, long mask)
159 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
163 case IIO_CHAN_INFO_RAW:
164 ret = regmap_read(chip->regmap, chan->address, ®val);
168 if (is_signed_reg(chan->address))
175 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
179 case IIO_CHAN_INFO_INT_TIME:
181 if (chan->address == INA2XX_SHUNT_VOLTAGE)
182 *val2 = chip->int_time_vshunt;
184 *val2 = chip->int_time_vbus;
186 return IIO_VAL_INT_PLUS_MICRO;
188 case IIO_CHAN_INFO_SAMP_FREQ:
190 * Sample freq is read only, it is a consequence of
191 * 1/AVG*(CT_bus+CT_shunt).
193 *val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
197 case IIO_CHAN_INFO_SCALE:
198 switch (chan->address) {
199 case INA2XX_SHUNT_VOLTAGE:
200 /* processed (mV) = raw/shunt_div */
201 *val2 = chip->config->shunt_div;
203 return IIO_VAL_FRACTIONAL;
205 case INA2XX_BUS_VOLTAGE:
206 /* processed (mV) = raw*lsb (uV) / (1000 << shift) */
207 *val = chip->config->bus_voltage_lsb;
208 *val2 = 1000 << chip->config->bus_voltage_shift;
209 return IIO_VAL_FRACTIONAL;
212 /* processed (mW) = raw*lsb (uW) / 1000 */
213 *val = chip->config->power_lsb;
215 return IIO_VAL_FRACTIONAL;
218 /* processed (mA) = raw (mA) */
228 * Available averaging rates for ina226. The indices correspond with
229 * the bit values expected by the chip (according to the ina226 datasheet,
230 * table 3 AVG bit settings, found at
231 * http://www.ti.com/lit/ds/symlink/ina226.pdf.
233 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
235 static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
236 unsigned int *config)
240 if (val > 1024 || val < 1)
243 bits = find_closest(val, ina226_avg_tab,
244 ARRAY_SIZE(ina226_avg_tab));
246 chip->avg = ina226_avg_tab[bits];
248 *config &= ~INA226_AVG_MASK;
249 *config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
254 /* Conversion times in uS */
255 static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
258 static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
259 unsigned int val_us, unsigned int *config)
263 if (val_us > 8244 || val_us < 140)
266 bits = find_closest(val_us, ina226_conv_time_tab,
267 ARRAY_SIZE(ina226_conv_time_tab));
269 chip->int_time_vbus = ina226_conv_time_tab[bits];
271 *config &= ~INA226_ITB_MASK;
272 *config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
277 static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
278 unsigned int val_us, unsigned int *config)
282 if (val_us > 8244 || val_us < 140)
285 bits = find_closest(val_us, ina226_conv_time_tab,
286 ARRAY_SIZE(ina226_conv_time_tab));
288 chip->int_time_vshunt = ina226_conv_time_tab[bits];
290 *config &= ~INA226_ITS_MASK;
291 *config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
296 /* Conversion times in uS. */
297 static const int ina219_conv_time_tab_subsample[] = { 84, 148, 276, 532 };
298 static const int ina219_conv_time_tab_average[] = { 532, 1060, 2130, 4260,
299 8510, 17020, 34050, 68100};
301 static int ina219_lookup_int_time(unsigned int *val_us, int *bits)
303 if (*val_us > 68100 || *val_us < 84)
306 if (*val_us <= 532) {
307 *bits = find_closest(*val_us, ina219_conv_time_tab_subsample,
308 ARRAY_SIZE(ina219_conv_time_tab_subsample));
309 *val_us = ina219_conv_time_tab_subsample[*bits];
311 *bits = find_closest(*val_us, ina219_conv_time_tab_average,
312 ARRAY_SIZE(ina219_conv_time_tab_average));
313 *val_us = ina219_conv_time_tab_average[*bits];
320 static int ina219_set_int_time_vbus(struct ina2xx_chip_info *chip,
321 unsigned int val_us, unsigned int *config)
324 unsigned int val_us_best = val_us;
326 ret = ina219_lookup_int_time(&val_us_best, &bits);
330 chip->int_time_vbus = val_us_best;
332 *config &= ~INA219_ITB_MASK;
333 *config |= INA219_SHIFT_ITB(bits) & INA219_ITB_MASK;
338 static int ina219_set_int_time_vshunt(struct ina2xx_chip_info *chip,
339 unsigned int val_us, unsigned int *config)
342 unsigned int val_us_best = val_us;
344 ret = ina219_lookup_int_time(&val_us_best, &bits);
348 chip->int_time_vshunt = val_us_best;
350 *config &= ~INA219_ITS_MASK;
351 *config |= INA219_SHIFT_ITS(bits) & INA219_ITS_MASK;
356 static int ina2xx_write_raw(struct iio_dev *indio_dev,
357 struct iio_chan_spec const *chan,
358 int val, int val2, long mask)
360 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
361 unsigned int config, tmp;
364 if (iio_buffer_enabled(indio_dev))
367 mutex_lock(&chip->state_lock);
369 ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
376 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
377 ret = ina226_set_average(chip, val, &tmp);
380 case IIO_CHAN_INFO_INT_TIME:
381 if (chip->config->chip_id == ina226) {
382 if (chan->address == INA2XX_SHUNT_VOLTAGE)
383 ret = ina226_set_int_time_vshunt(chip, val2,
386 ret = ina226_set_int_time_vbus(chip, val2,
389 if (chan->address == INA2XX_SHUNT_VOLTAGE)
390 ret = ina219_set_int_time_vshunt(chip, val2,
393 ret = ina219_set_int_time_vbus(chip, val2,
402 if (!ret && (tmp != config))
403 ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
405 mutex_unlock(&chip->state_lock);
410 static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
411 struct device_attribute *attr,
414 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
416 return sprintf(buf, "%d\n", chip->allow_async_readout);
419 static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
420 struct device_attribute *attr,
421 const char *buf, size_t len)
423 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
427 ret = strtobool((const char *) buf, &val);
431 chip->allow_async_readout = val;
437 * Set current LSB to 1mA, shunt is in uOhms
438 * (equation 13 in datasheet). We hardcode a Current_LSB
439 * of 1.0 x10-6. The only remaining parameter is RShunt.
440 * There is no need to expose the CALIBRATION register
441 * to the user for now. But we need to reset this register
442 * if the user updates RShunt after driver init, e.g upon
443 * reading an EEPROM/Probe-type value.
445 static int ina2xx_set_calibration(struct ina2xx_chip_info *chip)
447 u16 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor,
448 chip->shunt_resistor);
450 return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval);
453 static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
455 if (val <= 0 || val > chip->config->calibration_factor)
458 chip->shunt_resistor = val;
463 static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
464 struct device_attribute *attr,
467 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
469 return sprintf(buf, "%d\n", chip->shunt_resistor);
472 static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
473 struct device_attribute *attr,
474 const char *buf, size_t len)
476 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
480 ret = kstrtoul((const char *) buf, 10, &val);
484 ret = set_shunt_resistor(chip, val);
488 /* Update the Calibration register */
489 ret = ina2xx_set_calibration(chip);
496 #define INA219_CHAN(_type, _index, _address) { \
498 .address = (_address), \
500 .channel = (_index), \
501 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
502 BIT(IIO_CHAN_INFO_SCALE), \
503 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
504 .scan_index = (_index), \
509 .endianness = IIO_CPU, \
513 #define INA226_CHAN(_type, _index, _address) { \
515 .address = (_address), \
517 .channel = (_index), \
518 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
519 BIT(IIO_CHAN_INFO_SCALE), \
520 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
521 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
522 .scan_index = (_index), \
527 .endianness = IIO_CPU, \
532 * Sampling Freq is a consequence of the integration times of
533 * the Voltage channels.
535 #define INA219_CHAN_VOLTAGE(_index, _address) { \
536 .type = IIO_VOLTAGE, \
537 .address = (_address), \
539 .channel = (_index), \
540 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
541 BIT(IIO_CHAN_INFO_SCALE) | \
542 BIT(IIO_CHAN_INFO_INT_TIME), \
543 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
544 .scan_index = (_index), \
549 .endianness = IIO_LE, \
553 #define INA226_CHAN_VOLTAGE(_index, _address) { \
554 .type = IIO_VOLTAGE, \
555 .address = (_address), \
557 .channel = (_index), \
558 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
559 BIT(IIO_CHAN_INFO_SCALE) | \
560 BIT(IIO_CHAN_INFO_INT_TIME), \
561 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
562 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
563 .scan_index = (_index), \
568 .endianness = IIO_LE, \
573 static const struct iio_chan_spec ina226_channels[] = {
574 INA226_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
575 INA226_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
576 INA226_CHAN(IIO_POWER, 2, INA2XX_POWER),
577 INA226_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
578 IIO_CHAN_SOFT_TIMESTAMP(4),
581 static const struct iio_chan_spec ina219_channels[] = {
582 INA219_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
583 INA219_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
584 INA219_CHAN(IIO_POWER, 2, INA2XX_POWER),
585 INA219_CHAN(IIO_CURRENT, 3, INA2XX_CURRENT),
586 IIO_CHAN_SOFT_TIMESTAMP(4),
589 static int ina2xx_work_buffer(struct iio_dev *indio_dev)
591 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
592 unsigned short data[8];
596 int cnvr_need_clear = 0;
598 time_a = iio_get_time_ns(indio_dev);
601 * Because the timer thread and the chip conversion clock
602 * are asynchronous, the period difference will eventually
603 * result in reading V[k-1] again, or skip V[k] at time Tk.
604 * In order to resync the timer with the conversion process
605 * we check the ConVersionReadyFlag.
606 * On hardware that supports using the ALERT pin to toggle a
607 * GPIO a triggered buffer could be used instead.
608 * For now, we do an extra read of the MASK_ENABLE register (INA226)
609 * resp. the BUS_VOLTAGE register (INA219).
611 if (!chip->allow_async_readout)
613 if (chip->config->chip_id == ina226) {
614 ret = regmap_read(chip->regmap,
615 INA226_MASK_ENABLE, &alert);
616 alert &= INA226_CVRF;
618 ret = regmap_read(chip->regmap,
619 INA2XX_BUS_VOLTAGE, &alert);
620 alert &= INA219_CNVR;
621 cnvr_need_clear = alert;
630 * Single register reads: bulk_read will not work with ina226/219
631 * as there is no auto-increment of the register pointer.
633 for_each_set_bit(bit, indio_dev->active_scan_mask,
634 indio_dev->masklength) {
637 ret = regmap_read(chip->regmap,
638 INA2XX_SHUNT_VOLTAGE + bit, &val);
644 if (INA2XX_SHUNT_VOLTAGE + bit == INA2XX_POWER)
648 /* Dummy read on INA219 power register to clear CNVR flag */
649 if (cnvr_need_clear && chip->config->chip_id == ina219) {
652 ret = regmap_read(chip->regmap, INA2XX_POWER, &val);
657 time_b = iio_get_time_ns(indio_dev);
659 iio_push_to_buffers_with_timestamp(indio_dev,
660 (unsigned int *)data, time_a);
662 return (unsigned long)(time_b - time_a) / 1000;
665 static int ina2xx_capture_thread(void *data)
667 struct iio_dev *indio_dev = data;
668 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
669 int sampling_us = SAMPLING_PERIOD(chip);
673 * Poll a bit faster than the chip internal Fs, in case
674 * we wish to sync with the conversion ready flag.
676 if (!chip->allow_async_readout)
680 buffer_us = ina2xx_work_buffer(indio_dev);
684 if (sampling_us > buffer_us)
685 udelay(sampling_us - buffer_us);
687 } while (!kthread_should_stop());
692 static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
694 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
695 unsigned int sampling_us = SAMPLING_PERIOD(chip);
697 dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
698 (unsigned int)(*indio_dev->active_scan_mask),
699 1000000 / sampling_us, chip->avg);
701 dev_dbg(&indio_dev->dev, "Expected work period: %u us\n", sampling_us);
702 dev_dbg(&indio_dev->dev, "Async readout mode: %d\n",
703 chip->allow_async_readout);
705 chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
706 "%s:%d-%uus", indio_dev->name, indio_dev->id,
709 return PTR_ERR_OR_ZERO(chip->task);
712 static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
714 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
717 kthread_stop(chip->task);
724 static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
725 .postenable = &ina2xx_buffer_enable,
726 .predisable = &ina2xx_buffer_disable,
729 static int ina2xx_debug_reg(struct iio_dev *indio_dev,
730 unsigned reg, unsigned writeval, unsigned *readval)
732 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
735 return regmap_write(chip->regmap, reg, writeval);
737 return regmap_read(chip->regmap, reg, readval);
740 /* Possible integration times for vshunt and vbus */
741 static IIO_CONST_ATTR_NAMED(ina219_integration_time_available,
742 integration_time_available,
743 "0.000084 0.000148 0.000276 0.000532 0.001060 0.002130 0.004260 0.008510 0.017020 0.034050 0.068100");
745 static IIO_CONST_ATTR_NAMED(ina226_integration_time_available,
746 integration_time_available,
747 "0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
750 static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
751 ina2xx_allow_async_readout_show,
752 ina2xx_allow_async_readout_store, 0);
754 static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
755 ina2xx_shunt_resistor_show,
756 ina2xx_shunt_resistor_store, 0);
758 static struct attribute *ina219_attributes[] = {
759 &iio_dev_attr_in_allow_async_readout.dev_attr.attr,
760 &iio_const_attr_ina219_integration_time_available.dev_attr.attr,
761 &iio_dev_attr_in_shunt_resistor.dev_attr.attr,
765 static struct attribute *ina226_attributes[] = {
766 &iio_dev_attr_in_allow_async_readout.dev_attr.attr,
767 &iio_const_attr_ina226_integration_time_available.dev_attr.attr,
768 &iio_dev_attr_in_shunt_resistor.dev_attr.attr,
772 static const struct attribute_group ina219_attribute_group = {
773 .attrs = ina219_attributes,
776 static const struct attribute_group ina226_attribute_group = {
777 .attrs = ina226_attributes,
780 static const struct iio_info ina219_info = {
781 .driver_module = THIS_MODULE,
782 .attrs = &ina219_attribute_group,
783 .read_raw = ina2xx_read_raw,
784 .write_raw = ina2xx_write_raw,
785 .debugfs_reg_access = ina2xx_debug_reg,
788 static const struct iio_info ina226_info = {
789 .driver_module = THIS_MODULE,
790 .attrs = &ina226_attribute_group,
791 .read_raw = ina2xx_read_raw,
792 .write_raw = ina2xx_write_raw,
793 .debugfs_reg_access = ina2xx_debug_reg,
796 /* Initialize the configuration and calibration registers. */
797 static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
799 int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
803 return ina2xx_set_calibration(chip);
806 static int ina2xx_probe(struct i2c_client *client,
807 const struct i2c_device_id *id)
809 struct ina2xx_chip_info *chip;
810 struct iio_dev *indio_dev;
811 struct iio_buffer *buffer;
813 enum ina2xx_ids type;
816 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
820 chip = iio_priv(indio_dev);
822 /* This is only used for device removal purposes. */
823 i2c_set_clientdata(client, indio_dev);
825 chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
826 if (IS_ERR(chip->regmap)) {
827 dev_err(&client->dev, "failed to allocate register map\n");
828 return PTR_ERR(chip->regmap);
831 if (client->dev.of_node)
832 type = (enum ina2xx_ids)of_device_get_match_data(&client->dev);
834 type = id->driver_data;
835 chip->config = &ina2xx_config[type];
837 mutex_init(&chip->state_lock);
839 if (of_property_read_u32(client->dev.of_node,
840 "shunt-resistor", &val) < 0) {
841 struct ina2xx_platform_data *pdata =
842 dev_get_platdata(&client->dev);
845 val = pdata->shunt_uohms;
847 val = INA2XX_RSHUNT_DEFAULT;
850 ret = set_shunt_resistor(chip, val);
854 /* Patch the current config register with default. */
855 val = chip->config->config_default;
857 if (id->driver_data == ina226) {
858 ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
859 ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
860 ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
863 ina219_set_int_time_vbus(chip, INA219_DEFAULT_IT, &val);
864 ina219_set_int_time_vshunt(chip, INA219_DEFAULT_IT, &val);
867 ret = ina2xx_init(chip, val);
869 dev_err(&client->dev, "error configuring the device\n");
873 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
874 indio_dev->dev.parent = &client->dev;
875 indio_dev->dev.of_node = client->dev.of_node;
876 if (id->driver_data == ina226) {
877 indio_dev->channels = ina226_channels;
878 indio_dev->num_channels = ARRAY_SIZE(ina226_channels);
879 indio_dev->info = &ina226_info;
881 indio_dev->channels = ina219_channels;
882 indio_dev->num_channels = ARRAY_SIZE(ina219_channels);
883 indio_dev->info = &ina219_info;
885 indio_dev->name = id->name;
886 indio_dev->setup_ops = &ina2xx_setup_ops;
888 buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
892 iio_device_attach_buffer(indio_dev, buffer);
894 return iio_device_register(indio_dev);
897 static int ina2xx_remove(struct i2c_client *client)
899 struct iio_dev *indio_dev = i2c_get_clientdata(client);
900 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
902 iio_device_unregister(indio_dev);
905 return regmap_update_bits(chip->regmap, INA2XX_CONFIG,
906 INA2XX_MODE_MASK, 0);
909 static const struct i2c_device_id ina2xx_id[] = {
917 MODULE_DEVICE_TABLE(i2c, ina2xx_id);
919 static const struct of_device_id ina2xx_of_match[] = {
921 .compatible = "ti,ina219",
922 .data = (void *)ina219
925 .compatible = "ti,ina220",
926 .data = (void *)ina219
929 .compatible = "ti,ina226",
930 .data = (void *)ina226
933 .compatible = "ti,ina230",
934 .data = (void *)ina226
937 .compatible = "ti,ina231",
938 .data = (void *)ina226
942 MODULE_DEVICE_TABLE(of, ina2xx_of_match);
944 static struct i2c_driver ina2xx_driver = {
946 .name = KBUILD_MODNAME,
947 .of_match_table = ina2xx_of_match,
949 .probe = ina2xx_probe,
950 .remove = ina2xx_remove,
951 .id_table = ina2xx_id,
953 module_i2c_driver(ina2xx_driver);
955 MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
956 MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
957 MODULE_LICENSE("GPL v2");