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[sfrench/cifs-2.6.git] / drivers / ide / ide-iops.c
1 /*
2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
4  *
5  */
6
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/string.h>
10 #include <linux/kernel.h>
11 #include <linux/timer.h>
12 #include <linux/mm.h>
13 #include <linux/interrupt.h>
14 #include <linux/major.h>
15 #include <linux/errno.h>
16 #include <linux/genhd.h>
17 #include <linux/blkpg.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/hdreg.h>
22 #include <linux/ide.h>
23 #include <linux/bitops.h>
24 #include <linux/nmi.h>
25
26 #include <asm/byteorder.h>
27 #include <asm/irq.h>
28 #include <asm/uaccess.h>
29 #include <asm/io.h>
30
31 /*
32  *      Conventional PIO operations for ATA devices
33  */
34
35 static u8 ide_inb (unsigned long port)
36 {
37         return (u8) inb(port);
38 }
39
40 static u16 ide_inw (unsigned long port)
41 {
42         return (u16) inw(port);
43 }
44
45 static void ide_insw (unsigned long port, void *addr, u32 count)
46 {
47         insw(port, addr, count);
48 }
49
50 static void ide_insl (unsigned long port, void *addr, u32 count)
51 {
52         insl(port, addr, count);
53 }
54
55 static void ide_outb (u8 val, unsigned long port)
56 {
57         outb(val, port);
58 }
59
60 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
61 {
62         outb(addr, port);
63 }
64
65 static void ide_outw (u16 val, unsigned long port)
66 {
67         outw(val, port);
68 }
69
70 static void ide_outsw (unsigned long port, void *addr, u32 count)
71 {
72         outsw(port, addr, count);
73 }
74
75 static void ide_outsl (unsigned long port, void *addr, u32 count)
76 {
77         outsl(port, addr, count);
78 }
79
80 void default_hwif_iops (ide_hwif_t *hwif)
81 {
82         hwif->OUTB      = ide_outb;
83         hwif->OUTBSYNC  = ide_outbsync;
84         hwif->OUTW      = ide_outw;
85         hwif->OUTSW     = ide_outsw;
86         hwif->OUTSL     = ide_outsl;
87         hwif->INB       = ide_inb;
88         hwif->INW       = ide_inw;
89         hwif->INSW      = ide_insw;
90         hwif->INSL      = ide_insl;
91 }
92
93 /*
94  *      MMIO operations, typically used for SATA controllers
95  */
96
97 static u8 ide_mm_inb (unsigned long port)
98 {
99         return (u8) readb((void __iomem *) port);
100 }
101
102 static u16 ide_mm_inw (unsigned long port)
103 {
104         return (u16) readw((void __iomem *) port);
105 }
106
107 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
108 {
109         __ide_mm_insw((void __iomem *) port, addr, count);
110 }
111
112 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
113 {
114         __ide_mm_insl((void __iomem *) port, addr, count);
115 }
116
117 static void ide_mm_outb (u8 value, unsigned long port)
118 {
119         writeb(value, (void __iomem *) port);
120 }
121
122 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
123 {
124         writeb(value, (void __iomem *) port);
125 }
126
127 static void ide_mm_outw (u16 value, unsigned long port)
128 {
129         writew(value, (void __iomem *) port);
130 }
131
132 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
133 {
134         __ide_mm_outsw((void __iomem *) port, addr, count);
135 }
136
137 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
138 {
139         __ide_mm_outsl((void __iomem *) port, addr, count);
140 }
141
142 void default_hwif_mmiops (ide_hwif_t *hwif)
143 {
144         hwif->OUTB      = ide_mm_outb;
145         /* Most systems will need to override OUTBSYNC, alas however
146            this one is controller specific! */
147         hwif->OUTBSYNC  = ide_mm_outbsync;
148         hwif->OUTW      = ide_mm_outw;
149         hwif->OUTSW     = ide_mm_outsw;
150         hwif->OUTSL     = ide_mm_outsl;
151         hwif->INB       = ide_mm_inb;
152         hwif->INW       = ide_mm_inw;
153         hwif->INSW      = ide_mm_insw;
154         hwif->INSL      = ide_mm_insl;
155 }
156
157 EXPORT_SYMBOL(default_hwif_mmiops);
158
159 void SELECT_DRIVE (ide_drive_t *drive)
160 {
161         ide_hwif_t *hwif = drive->hwif;
162
163         if (hwif->selectproc)
164                 hwif->selectproc(drive);
165
166         hwif->OUTB(drive->select.all, hwif->io_ports[IDE_SELECT_OFFSET]);
167 }
168
169 void SELECT_MASK (ide_drive_t *drive, int mask)
170 {
171         if (HWIF(drive)->maskproc)
172                 HWIF(drive)->maskproc(drive, mask);
173 }
174
175 /*
176  * Some localbus EIDE interfaces require a special access sequence
177  * when using 32-bit I/O instructions to transfer data.  We call this
178  * the "vlb_sync" sequence, which consists of three successive reads
179  * of the sector count register location, with interrupts disabled
180  * to ensure that the reads all happen together.
181  */
182 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
183 {
184         (void) HWIF(drive)->INB(port);
185         (void) HWIF(drive)->INB(port);
186         (void) HWIF(drive)->INB(port);
187 }
188
189 /*
190  * This is used for most PIO data transfers *from* the IDE interface
191  */
192 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
193 {
194         ide_hwif_t *hwif        = HWIF(drive);
195         u8 io_32bit             = drive->io_32bit;
196
197         if (io_32bit) {
198                 if (io_32bit & 2) {
199                         unsigned long flags;
200
201                         local_irq_save(flags);
202                         ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
203                         hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
204                                    wcount);
205                         local_irq_restore(flags);
206                 } else
207                         hwif->INSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
208                                    wcount);
209         } else
210                 hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
211                            wcount << 1);
212 }
213
214 /*
215  * This is used for most PIO data transfers *to* the IDE interface
216  */
217 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
218 {
219         ide_hwif_t *hwif        = HWIF(drive);
220         u8 io_32bit             = drive->io_32bit;
221
222         if (io_32bit) {
223                 if (io_32bit & 2) {
224                         unsigned long flags;
225
226                         local_irq_save(flags);
227                         ata_vlb_sync(drive, hwif->io_ports[IDE_NSECTOR_OFFSET]);
228                         hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
229                                     wcount);
230                         local_irq_restore(flags);
231                 } else
232                         hwif->OUTSL(hwif->io_ports[IDE_DATA_OFFSET], buffer,
233                                     wcount);
234         } else
235                 hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET], buffer,
236                             wcount << 1);
237 }
238
239 /*
240  * The following routines are mainly used by the ATAPI drivers.
241  *
242  * These routines will round up any request for an odd number of bytes,
243  * so if an odd bytecount is specified, be sure that there's at least one
244  * extra byte allocated for the buffer.
245  */
246
247 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
248 {
249         ide_hwif_t *hwif = HWIF(drive);
250
251         ++bytecount;
252 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
253         if (MACH_IS_ATARI || MACH_IS_Q40) {
254                 /* Atari has a byte-swapped IDE interface */
255                 insw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
256                            bytecount / 2);
257                 return;
258         }
259 #endif /* CONFIG_ATARI || CONFIG_Q40 */
260         hwif->ata_input_data(drive, buffer, bytecount / 4);
261         if ((bytecount & 0x03) >= 2)
262                 hwif->INSW(hwif->io_ports[IDE_DATA_OFFSET],
263                            (u8 *)buffer + (bytecount & ~0x03), 1);
264 }
265
266 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
267 {
268         ide_hwif_t *hwif = HWIF(drive);
269
270         ++bytecount;
271 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
272         if (MACH_IS_ATARI || MACH_IS_Q40) {
273                 /* Atari has a byte-swapped IDE interface */
274                 outsw_swapw(hwif->io_ports[IDE_DATA_OFFSET], buffer,
275                             bytecount / 2);
276                 return;
277         }
278 #endif /* CONFIG_ATARI || CONFIG_Q40 */
279         hwif->ata_output_data(drive, buffer, bytecount / 4);
280         if ((bytecount & 0x03) >= 2)
281                 hwif->OUTSW(hwif->io_ports[IDE_DATA_OFFSET],
282                             (u8 *)buffer + (bytecount & ~0x03), 1);
283 }
284
285 void default_hwif_transport(ide_hwif_t *hwif)
286 {
287         hwif->ata_input_data            = ata_input_data;
288         hwif->ata_output_data           = ata_output_data;
289         hwif->atapi_input_bytes         = atapi_input_bytes;
290         hwif->atapi_output_bytes        = atapi_output_bytes;
291 }
292
293 void ide_fix_driveid (struct hd_driveid *id)
294 {
295 #ifndef __LITTLE_ENDIAN
296 # ifdef __BIG_ENDIAN
297         int i;
298         u16 *stringcast;
299
300         id->config         = __le16_to_cpu(id->config);
301         id->cyls           = __le16_to_cpu(id->cyls);
302         id->reserved2      = __le16_to_cpu(id->reserved2);
303         id->heads          = __le16_to_cpu(id->heads);
304         id->track_bytes    = __le16_to_cpu(id->track_bytes);
305         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
306         id->sectors        = __le16_to_cpu(id->sectors);
307         id->vendor0        = __le16_to_cpu(id->vendor0);
308         id->vendor1        = __le16_to_cpu(id->vendor1);
309         id->vendor2        = __le16_to_cpu(id->vendor2);
310         stringcast = (u16 *)&id->serial_no[0];
311         for (i = 0; i < (20/2); i++)
312                 stringcast[i] = __le16_to_cpu(stringcast[i]);
313         id->buf_type       = __le16_to_cpu(id->buf_type);
314         id->buf_size       = __le16_to_cpu(id->buf_size);
315         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
316         stringcast = (u16 *)&id->fw_rev[0];
317         for (i = 0; i < (8/2); i++)
318                 stringcast[i] = __le16_to_cpu(stringcast[i]);
319         stringcast = (u16 *)&id->model[0];
320         for (i = 0; i < (40/2); i++)
321                 stringcast[i] = __le16_to_cpu(stringcast[i]);
322         id->dword_io       = __le16_to_cpu(id->dword_io);
323         id->reserved50     = __le16_to_cpu(id->reserved50);
324         id->field_valid    = __le16_to_cpu(id->field_valid);
325         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
326         id->cur_heads      = __le16_to_cpu(id->cur_heads);
327         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
328         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
329         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
330         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
331         id->dma_1word      = __le16_to_cpu(id->dma_1word);
332         id->dma_mword      = __le16_to_cpu(id->dma_mword);
333         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
334         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
335         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
336         id->eide_pio       = __le16_to_cpu(id->eide_pio);
337         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
338         for (i = 0; i < 2; ++i)
339                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
340         for (i = 0; i < 4; ++i)
341                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
342         id->queue_depth    = __le16_to_cpu(id->queue_depth);
343         for (i = 0; i < 4; ++i)
344                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
345         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
346         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
347         id->command_set_1  = __le16_to_cpu(id->command_set_1);
348         id->command_set_2  = __le16_to_cpu(id->command_set_2);
349         id->cfsse          = __le16_to_cpu(id->cfsse);
350         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
351         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
352         id->csf_default    = __le16_to_cpu(id->csf_default);
353         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
354         id->trseuc         = __le16_to_cpu(id->trseuc);
355         id->trsEuc         = __le16_to_cpu(id->trsEuc);
356         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
357         id->mprc           = __le16_to_cpu(id->mprc);
358         id->hw_config      = __le16_to_cpu(id->hw_config);
359         id->acoustic       = __le16_to_cpu(id->acoustic);
360         id->msrqs          = __le16_to_cpu(id->msrqs);
361         id->sxfert         = __le16_to_cpu(id->sxfert);
362         id->sal            = __le16_to_cpu(id->sal);
363         id->spg            = __le32_to_cpu(id->spg);
364         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
365         for (i = 0; i < 22; i++)
366                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
367         id->last_lun       = __le16_to_cpu(id->last_lun);
368         id->word127        = __le16_to_cpu(id->word127);
369         id->dlf            = __le16_to_cpu(id->dlf);
370         id->csfo           = __le16_to_cpu(id->csfo);
371         for (i = 0; i < 26; i++)
372                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
373         id->word156        = __le16_to_cpu(id->word156);
374         for (i = 0; i < 3; i++)
375                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
376         id->cfa_power      = __le16_to_cpu(id->cfa_power);
377         for (i = 0; i < 14; i++)
378                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
379         for (i = 0; i < 31; i++)
380                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
381         for (i = 0; i < 48; i++)
382                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
383         id->integrity_word  = __le16_to_cpu(id->integrity_word);
384 # else
385 #  error "Please fix <asm/byteorder.h>"
386 # endif
387 #endif
388 }
389
390 /*
391  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
392  * removing leading/trailing blanks and compressing internal blanks.
393  * It is primarily used to tidy up the model name/number fields as
394  * returned by the WIN_[P]IDENTIFY commands.
395  */
396
397 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
398 {
399         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
400
401         if (byteswap) {
402                 /* convert from big-endian to host byte order */
403                 for (p = end ; p != s;) {
404                         unsigned short *pp = (unsigned short *) (p -= 2);
405                         *pp = ntohs(*pp);
406                 }
407         }
408         /* strip leading blanks */
409         while (s != end && *s == ' ')
410                 ++s;
411         /* compress internal blanks and strip trailing blanks */
412         while (s != end && *s) {
413                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
414                         *p++ = *(s-1);
415         }
416         /* wipe out trailing garbage */
417         while (p != end)
418                 *p++ = '\0';
419 }
420
421 EXPORT_SYMBOL(ide_fixstring);
422
423 /*
424  * Needed for PCI irq sharing
425  */
426 int drive_is_ready (ide_drive_t *drive)
427 {
428         ide_hwif_t *hwif        = HWIF(drive);
429         u8 stat                 = 0;
430
431         if (drive->waiting_for_dma)
432                 return hwif->ide_dma_test_irq(drive);
433
434 #if 0
435         /* need to guarantee 400ns since last command was issued */
436         udelay(1);
437 #endif
438
439         /*
440          * We do a passive status test under shared PCI interrupts on
441          * cards that truly share the ATA side interrupt, but may also share
442          * an interrupt with another pci card/device.  We make no assumptions
443          * about possible isa-pnp and pci-pnp issues yet.
444          */
445         if (hwif->io_ports[IDE_CONTROL_OFFSET])
446                 stat = ide_read_altstatus(drive);
447         else
448                 /* Note: this may clear a pending IRQ!! */
449                 stat = ide_read_status(drive);
450
451         if (stat & BUSY_STAT)
452                 /* drive busy:  definitely not interrupting */
453                 return 0;
454
455         /* drive ready: *might* be interrupting */
456         return 1;
457 }
458
459 EXPORT_SYMBOL(drive_is_ready);
460
461 /*
462  * This routine busy-waits for the drive status to be not "busy".
463  * It then checks the status for all of the "good" bits and none
464  * of the "bad" bits, and if all is okay it returns 0.  All other
465  * cases return error -- caller may then invoke ide_error().
466  *
467  * This routine should get fixed to not hog the cpu during extra long waits..
468  * That could be done by busy-waiting for the first jiffy or two, and then
469  * setting a timer to wake up at half second intervals thereafter,
470  * until timeout is achieved, before timing out.
471  */
472 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
473 {
474         unsigned long flags;
475         int i;
476         u8 stat;
477
478         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
479         stat = ide_read_status(drive);
480
481         if (stat & BUSY_STAT) {
482                 local_irq_set(flags);
483                 timeout += jiffies;
484                 while ((stat = ide_read_status(drive)) & BUSY_STAT) {
485                         if (time_after(jiffies, timeout)) {
486                                 /*
487                                  * One last read after the timeout in case
488                                  * heavy interrupt load made us not make any
489                                  * progress during the timeout..
490                                  */
491                                 stat = ide_read_status(drive);
492                                 if (!(stat & BUSY_STAT))
493                                         break;
494
495                                 local_irq_restore(flags);
496                                 *rstat = stat;
497                                 return -EBUSY;
498                         }
499                 }
500                 local_irq_restore(flags);
501         }
502         /*
503          * Allow status to settle, then read it again.
504          * A few rare drives vastly violate the 400ns spec here,
505          * so we'll wait up to 10usec for a "good" status
506          * rather than expensively fail things immediately.
507          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
508          */
509         for (i = 0; i < 10; i++) {
510                 udelay(1);
511                 stat = ide_read_status(drive);
512
513                 if (OK_STAT(stat, good, bad)) {
514                         *rstat = stat;
515                         return 0;
516                 }
517         }
518         *rstat = stat;
519         return -EFAULT;
520 }
521
522 /*
523  * In case of error returns error value after doing "*startstop = ide_error()".
524  * The caller should return the updated value of "startstop" in this case,
525  * "startstop" is unchanged when the function returns 0.
526  */
527 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
528 {
529         int err;
530         u8 stat;
531
532         /* bail early if we've exceeded max_failures */
533         if (drive->max_failures && (drive->failures > drive->max_failures)) {
534                 *startstop = ide_stopped;
535                 return 1;
536         }
537
538         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
539
540         if (err) {
541                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
542                 *startstop = ide_error(drive, s, stat);
543         }
544
545         return err;
546 }
547
548 EXPORT_SYMBOL(ide_wait_stat);
549
550 /**
551  *      ide_in_drive_list       -       look for drive in black/white list
552  *      @id: drive identifier
553  *      @drive_table: list to inspect
554  *
555  *      Look for a drive in the blacklist and the whitelist tables
556  *      Returns 1 if the drive is found in the table.
557  */
558
559 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
560 {
561         for ( ; drive_table->id_model; drive_table++)
562                 if ((!strcmp(drive_table->id_model, id->model)) &&
563                     (!drive_table->id_firmware ||
564                      strstr(id->fw_rev, drive_table->id_firmware)))
565                         return 1;
566         return 0;
567 }
568
569 EXPORT_SYMBOL_GPL(ide_in_drive_list);
570
571 /*
572  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
573  * We list them here and depend on the device side cable detection for them.
574  *
575  * Some optical devices with the buggy firmwares have the same problem.
576  */
577 static const struct drive_list_entry ivb_list[] = {
578         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
579         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
580         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
581         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
582         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
583         { NULL                          , NULL          }
584 };
585
586 /*
587  *  All hosts that use the 80c ribbon must use!
588  *  The name is derived from upper byte of word 93 and the 80c ribbon.
589  */
590 u8 eighty_ninty_three (ide_drive_t *drive)
591 {
592         ide_hwif_t *hwif = drive->hwif;
593         struct hd_driveid *id = drive->id;
594         int ivb = ide_in_drive_list(id, ivb_list);
595
596         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
597                 return 1;
598
599         if (ivb)
600                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
601                                   drive->name);
602
603         if (ide_dev_is_sata(id) && !ivb)
604                 return 1;
605
606         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
607                 goto no_80w;
608
609         /*
610          * FIXME:
611          * - change master/slave IDENTIFY order
612          * - force bit13 (80c cable present) check also for !ivb devices
613          *   (unless the slave device is pre-ATA3)
614          */
615         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
616                 return 1;
617
618 no_80w:
619         if (drive->udma33_warned == 1)
620                 return 0;
621
622         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
623                             "limiting max speed to UDMA33\n",
624                             drive->name,
625                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
626
627         drive->udma33_warned = 1;
628
629         return 0;
630 }
631
632 int ide_driveid_update(ide_drive_t *drive)
633 {
634         ide_hwif_t *hwif = drive->hwif;
635         struct hd_driveid *id;
636         unsigned long timeout, flags;
637         u8 stat;
638
639         /*
640          * Re-read drive->id for possible DMA mode
641          * change (copied from ide-probe.c)
642          */
643
644         SELECT_MASK(drive, 1);
645         ide_set_irq(drive, 1);
646         msleep(50);
647         hwif->OUTB(WIN_IDENTIFY, hwif->io_ports[IDE_COMMAND_OFFSET]);
648         timeout = jiffies + WAIT_WORSTCASE;
649         do {
650                 if (time_after(jiffies, timeout)) {
651                         SELECT_MASK(drive, 0);
652                         return 0;       /* drive timed-out */
653                 }
654
655                 msleep(50);     /* give drive a breather */
656                 stat = ide_read_altstatus(drive);
657         } while (stat & BUSY_STAT);
658
659         msleep(50);     /* wait for IRQ and DRQ_STAT */
660         stat = ide_read_status(drive);
661
662         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
663                 SELECT_MASK(drive, 0);
664                 printk("%s: CHECK for good STATUS\n", drive->name);
665                 return 0;
666         }
667         local_irq_save(flags);
668         SELECT_MASK(drive, 0);
669         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
670         if (!id) {
671                 local_irq_restore(flags);
672                 return 0;
673         }
674         hwif->ata_input_data(drive, id, SECTOR_WORDS);
675         (void)ide_read_status(drive);   /* clear drive IRQ */
676         local_irq_enable();
677         local_irq_restore(flags);
678         ide_fix_driveid(id);
679         if (id) {
680                 drive->id->dma_ultra = id->dma_ultra;
681                 drive->id->dma_mword = id->dma_mword;
682                 drive->id->dma_1word = id->dma_1word;
683                 /* anything more ? */
684                 kfree(id);
685
686                 if (drive->using_dma && ide_id_dma_bug(drive))
687                         ide_dma_off(drive);
688         }
689
690         return 1;
691 }
692
693 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
694 {
695         ide_hwif_t *hwif = drive->hwif;
696         int error = 0;
697         u8 stat;
698
699 //      while (HWGROUP(drive)->busy)
700 //              msleep(50);
701
702 #ifdef CONFIG_BLK_DEV_IDEDMA
703         if (hwif->dma_host_set) /* check if host supports DMA */
704                 hwif->dma_host_set(drive, 0);
705 #endif
706
707         /* Skip setting PIO flow-control modes on pre-EIDE drives */
708         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
709                 goto skip;
710
711         /*
712          * Don't use ide_wait_cmd here - it will
713          * attempt to set_geometry and recalibrate,
714          * but for some reason these don't work at
715          * this point (lost interrupt).
716          */
717         /*
718          * Select the drive, and issue the SETFEATURES command
719          */
720         disable_irq_nosync(hwif->irq);
721         
722         /*
723          *      FIXME: we race against the running IRQ here if
724          *      this is called from non IRQ context. If we use
725          *      disable_irq() we hang on the error path. Work
726          *      is needed.
727          */
728          
729         udelay(1);
730         SELECT_DRIVE(drive);
731         SELECT_MASK(drive, 0);
732         udelay(1);
733         ide_set_irq(drive, 0);
734         hwif->OUTB(speed, hwif->io_ports[IDE_NSECTOR_OFFSET]);
735         hwif->OUTB(SETFEATURES_XFER, hwif->io_ports[IDE_FEATURE_OFFSET]);
736         hwif->OUTBSYNC(drive, WIN_SETFEATURES,
737                        hwif->io_ports[IDE_COMMAND_OFFSET]);
738         if (drive->quirk_list == 2)
739                 ide_set_irq(drive, 1);
740
741         error = __ide_wait_stat(drive, drive->ready_stat,
742                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
743                                 WAIT_CMD, &stat);
744
745         SELECT_MASK(drive, 0);
746
747         enable_irq(hwif->irq);
748
749         if (error) {
750                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
751                 return error;
752         }
753
754         drive->id->dma_ultra &= ~0xFF00;
755         drive->id->dma_mword &= ~0x0F00;
756         drive->id->dma_1word &= ~0x0F00;
757
758  skip:
759 #ifdef CONFIG_BLK_DEV_IDEDMA
760         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
761             drive->using_dma)
762                 hwif->dma_host_set(drive, 1);
763         else if (hwif->dma_host_set)    /* check if host supports DMA */
764                 ide_dma_off_quietly(drive);
765 #endif
766
767         switch(speed) {
768                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
769                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
770                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
771                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
772                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
773                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
774                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
775                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
776                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
777                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
778                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
779                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
780                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
781                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
782                 default: break;
783         }
784         if (!drive->init_speed)
785                 drive->init_speed = speed;
786         drive->current_speed = speed;
787         return error;
788 }
789
790 /*
791  * This should get invoked any time we exit the driver to
792  * wait for an interrupt response from a drive.  handler() points
793  * at the appropriate code to handle the next interrupt, and a
794  * timer is started to prevent us from waiting forever in case
795  * something goes wrong (see the ide_timer_expiry() handler later on).
796  *
797  * See also ide_execute_command
798  */
799 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
800                       unsigned int timeout, ide_expiry_t *expiry)
801 {
802         ide_hwgroup_t *hwgroup = HWGROUP(drive);
803
804         BUG_ON(hwgroup->handler);
805         hwgroup->handler        = handler;
806         hwgroup->expiry         = expiry;
807         hwgroup->timer.expires  = jiffies + timeout;
808         hwgroup->req_gen_timer  = hwgroup->req_gen;
809         add_timer(&hwgroup->timer);
810 }
811
812 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
813                       unsigned int timeout, ide_expiry_t *expiry)
814 {
815         unsigned long flags;
816         spin_lock_irqsave(&ide_lock, flags);
817         __ide_set_handler(drive, handler, timeout, expiry);
818         spin_unlock_irqrestore(&ide_lock, flags);
819 }
820
821 EXPORT_SYMBOL(ide_set_handler);
822  
823 /**
824  *      ide_execute_command     -       execute an IDE command
825  *      @drive: IDE drive to issue the command against
826  *      @command: command byte to write
827  *      @handler: handler for next phase
828  *      @timeout: timeout for command
829  *      @expiry:  handler to run on timeout
830  *
831  *      Helper function to issue an IDE command. This handles the
832  *      atomicity requirements, command timing and ensures that the 
833  *      handler and IRQ setup do not race. All IDE command kick off
834  *      should go via this function or do equivalent locking.
835  */
836
837 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
838                          unsigned timeout, ide_expiry_t *expiry)
839 {
840         unsigned long flags;
841         ide_hwif_t *hwif = HWIF(drive);
842
843         spin_lock_irqsave(&ide_lock, flags);
844         __ide_set_handler(drive, handler, timeout, expiry);
845         hwif->OUTBSYNC(drive, cmd, hwif->io_ports[IDE_COMMAND_OFFSET]);
846         /*
847          * Drive takes 400nS to respond, we must avoid the IRQ being
848          * serviced before that.
849          *
850          * FIXME: we could skip this delay with care on non shared devices
851          */
852         ndelay(400);
853         spin_unlock_irqrestore(&ide_lock, flags);
854 }
855
856 EXPORT_SYMBOL(ide_execute_command);
857
858
859 /* needed below */
860 static ide_startstop_t do_reset1 (ide_drive_t *, int);
861
862 /*
863  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
864  * during an atapi drive reset operation. If the drive has not yet responded,
865  * and we have not yet hit our maximum waiting time, then the timer is restarted
866  * for another 50ms.
867  */
868 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
869 {
870         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
871         u8 stat;
872
873         SELECT_DRIVE(drive);
874         udelay (10);
875         stat = ide_read_status(drive);
876
877         if (OK_STAT(stat, 0, BUSY_STAT))
878                 printk("%s: ATAPI reset complete\n", drive->name);
879         else {
880                 if (time_before(jiffies, hwgroup->poll_timeout)) {
881                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
882                         /* continue polling */
883                         return ide_started;
884                 }
885                 /* end of polling */
886                 hwgroup->polling = 0;
887                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
888                                 drive->name, stat);
889                 /* do it the old fashioned way */
890                 return do_reset1(drive, 1);
891         }
892         /* done polling */
893         hwgroup->polling = 0;
894         hwgroup->resetting = 0;
895         return ide_stopped;
896 }
897
898 /*
899  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
900  * during an ide reset operation. If the drives have not yet responded,
901  * and we have not yet hit our maximum waiting time, then the timer is restarted
902  * for another 50ms.
903  */
904 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
905 {
906         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
907         ide_hwif_t *hwif        = HWIF(drive);
908         u8 tmp;
909
910         if (hwif->reset_poll != NULL) {
911                 if (hwif->reset_poll(drive)) {
912                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
913                                 hwif->name, drive->name);
914                         return ide_stopped;
915                 }
916         }
917
918         tmp = ide_read_status(drive);
919
920         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
921                 if (time_before(jiffies, hwgroup->poll_timeout)) {
922                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
923                         /* continue polling */
924                         return ide_started;
925                 }
926                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
927                 drive->failures++;
928         } else  {
929                 printk("%s: reset: ", hwif->name);
930                 tmp = ide_read_error(drive);
931
932                 if (tmp == 1) {
933                         printk("success\n");
934                         drive->failures = 0;
935                 } else {
936                         drive->failures++;
937                         printk("master: ");
938                         switch (tmp & 0x7f) {
939                                 case 1: printk("passed");
940                                         break;
941                                 case 2: printk("formatter device error");
942                                         break;
943                                 case 3: printk("sector buffer error");
944                                         break;
945                                 case 4: printk("ECC circuitry error");
946                                         break;
947                                 case 5: printk("controlling MPU error");
948                                         break;
949                                 default:printk("error (0x%02x?)", tmp);
950                         }
951                         if (tmp & 0x80)
952                                 printk("; slave: failed");
953                         printk("\n");
954                 }
955         }
956         hwgroup->polling = 0;   /* done polling */
957         hwgroup->resetting = 0; /* done reset attempt */
958         return ide_stopped;
959 }
960
961 static void ide_disk_pre_reset(ide_drive_t *drive)
962 {
963         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
964
965         drive->special.all = 0;
966         drive->special.b.set_geometry = legacy;
967         drive->special.b.recalibrate  = legacy;
968         drive->mult_count = 0;
969         if (!drive->keep_settings && !drive->using_dma)
970                 drive->mult_req = 0;
971         if (drive->mult_req != drive->mult_count)
972                 drive->special.b.set_multmode = 1;
973 }
974
975 static void pre_reset(ide_drive_t *drive)
976 {
977         if (drive->media == ide_disk)
978                 ide_disk_pre_reset(drive);
979         else
980                 drive->post_reset = 1;
981
982         if (drive->using_dma) {
983                 if (drive->crc_count)
984                         ide_check_dma_crc(drive);
985                 else
986                         ide_dma_off(drive);
987         }
988
989         if (!drive->keep_settings) {
990                 if (!drive->using_dma) {
991                         drive->unmask = 0;
992                         drive->io_32bit = 0;
993                 }
994                 return;
995         }
996
997         if (HWIF(drive)->pre_reset != NULL)
998                 HWIF(drive)->pre_reset(drive);
999
1000         if (drive->current_speed != 0xff)
1001                 drive->desired_speed = drive->current_speed;
1002         drive->current_speed = 0xff;
1003 }
1004
1005 /*
1006  * do_reset1() attempts to recover a confused drive by resetting it.
1007  * Unfortunately, resetting a disk drive actually resets all devices on
1008  * the same interface, so it can really be thought of as resetting the
1009  * interface rather than resetting the drive.
1010  *
1011  * ATAPI devices have their own reset mechanism which allows them to be
1012  * individually reset without clobbering other devices on the same interface.
1013  *
1014  * Unfortunately, the IDE interface does not generate an interrupt to let
1015  * us know when the reset operation has finished, so we must poll for this.
1016  * Equally poor, though, is the fact that this may a very long time to complete,
1017  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1018  * we set a timer to poll at 50ms intervals.
1019  */
1020 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1021 {
1022         unsigned int unit;
1023         unsigned long flags;
1024         ide_hwif_t *hwif;
1025         ide_hwgroup_t *hwgroup;
1026         u8 ctl;
1027
1028         spin_lock_irqsave(&ide_lock, flags);
1029         hwif = HWIF(drive);
1030         hwgroup = HWGROUP(drive);
1031
1032         /* We must not reset with running handlers */
1033         BUG_ON(hwgroup->handler != NULL);
1034
1035         /* For an ATAPI device, first try an ATAPI SRST. */
1036         if (drive->media != ide_disk && !do_not_try_atapi) {
1037                 hwgroup->resetting = 1;
1038                 pre_reset(drive);
1039                 SELECT_DRIVE(drive);
1040                 udelay (20);
1041                 hwif->OUTBSYNC(drive, WIN_SRST,
1042                                hwif->io_ports[IDE_COMMAND_OFFSET]);
1043                 ndelay(400);
1044                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1045                 hwgroup->polling = 1;
1046                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1047                 spin_unlock_irqrestore(&ide_lock, flags);
1048                 return ide_started;
1049         }
1050
1051         /*
1052          * First, reset any device state data we were maintaining
1053          * for any of the drives on this interface.
1054          */
1055         for (unit = 0; unit < MAX_DRIVES; ++unit)
1056                 pre_reset(&hwif->drives[unit]);
1057
1058         if (hwif->io_ports[IDE_CONTROL_OFFSET] == 0) {
1059                 spin_unlock_irqrestore(&ide_lock, flags);
1060                 return ide_stopped;
1061         }
1062
1063         hwgroup->resetting = 1;
1064         /*
1065          * Note that we also set nIEN while resetting the device,
1066          * to mask unwanted interrupts from the interface during the reset.
1067          * However, due to the design of PC hardware, this will cause an
1068          * immediate interrupt due to the edge transition it produces.
1069          * This single interrupt gives us a "fast poll" for drives that
1070          * recover from reset very quickly, saving us the first 50ms wait time.
1071          */
1072         /* set SRST and nIEN */
1073         hwif->OUTBSYNC(drive, drive->ctl|6, hwif->io_ports[IDE_CONTROL_OFFSET]);
1074         /* more than enough time */
1075         udelay(10);
1076         if (drive->quirk_list == 2)
1077                 ctl = drive->ctl;       /* clear SRST and nIEN */
1078         else
1079                 ctl = drive->ctl | 2;   /* clear SRST, leave nIEN */
1080         hwif->OUTBSYNC(drive, ctl, hwif->io_ports[IDE_CONTROL_OFFSET]);
1081         /* more than enough time */
1082         udelay(10);
1083         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1084         hwgroup->polling = 1;
1085         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1086
1087         /*
1088          * Some weird controller like resetting themselves to a strange
1089          * state when the disks are reset this way. At least, the Winbond
1090          * 553 documentation says that
1091          */
1092         if (hwif->resetproc)
1093                 hwif->resetproc(drive);
1094
1095         spin_unlock_irqrestore(&ide_lock, flags);
1096         return ide_started;
1097 }
1098
1099 /*
1100  * ide_do_reset() is the entry point to the drive/interface reset code.
1101  */
1102
1103 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1104 {
1105         return do_reset1(drive, 0);
1106 }
1107
1108 EXPORT_SYMBOL(ide_do_reset);
1109
1110 /*
1111  * ide_wait_not_busy() waits for the currently selected device on the hwif
1112  * to report a non-busy status, see comments in ide_probe_port().
1113  */
1114 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1115 {
1116         u8 stat = 0;
1117
1118         while(timeout--) {
1119                 /*
1120                  * Turn this into a schedule() sleep once I'm sure
1121                  * about locking issues (2.5 work ?).
1122                  */
1123                 mdelay(1);
1124                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1125                 if ((stat & BUSY_STAT) == 0)
1126                         return 0;
1127                 /*
1128                  * Assume a value of 0xff means nothing is connected to
1129                  * the interface and it doesn't implement the pull-down
1130                  * resistor on D7.
1131                  */
1132                 if (stat == 0xff)
1133                         return -ENODEV;
1134                 touch_softlockup_watchdog();
1135                 touch_nmi_watchdog();
1136         }
1137         return -EBUSY;
1138 }
1139
1140 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1141