drm/amd/display: No display after resume from WB/CB
[sfrench/cifs-2.6.git] / drivers / gpu / drm / tiny / mi0283qt.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * DRM driver for Multi-Inno MI0283QT panels
4  *
5  * Copyright 2016 Noralf Trønnes
6  */
7
8 #include <linux/backlight.h>
9 #include <linux/delay.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/module.h>
12 #include <linux/property.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/spi/spi.h>
15
16 #include <drm/drm_atomic_helper.h>
17 #include <drm/drm_drv.h>
18 #include <drm/drm_fb_helper.h>
19 #include <drm/drm_gem_atomic_helper.h>
20 #include <drm/drm_gem_dma_helper.h>
21 #include <drm/drm_managed.h>
22 #include <drm/drm_mipi_dbi.h>
23 #include <drm/drm_modeset_helper.h>
24 #include <video/mipi_display.h>
25
26 #define ILI9341_FRMCTR1         0xb1
27 #define ILI9341_DISCTRL         0xb6
28 #define ILI9341_ETMOD           0xb7
29
30 #define ILI9341_PWCTRL1         0xc0
31 #define ILI9341_PWCTRL2         0xc1
32 #define ILI9341_VMCTRL1         0xc5
33 #define ILI9341_VMCTRL2         0xc7
34 #define ILI9341_PWCTRLA         0xcb
35 #define ILI9341_PWCTRLB         0xcf
36
37 #define ILI9341_PGAMCTRL        0xe0
38 #define ILI9341_NGAMCTRL        0xe1
39 #define ILI9341_DTCTRLA         0xe8
40 #define ILI9341_DTCTRLB         0xea
41 #define ILI9341_PWRSEQ          0xed
42
43 #define ILI9341_EN3GAM          0xf2
44 #define ILI9341_PUMPCTRL        0xf7
45
46 #define ILI9341_MADCTL_BGR      BIT(3)
47 #define ILI9341_MADCTL_MV       BIT(5)
48 #define ILI9341_MADCTL_MX       BIT(6)
49 #define ILI9341_MADCTL_MY       BIT(7)
50
51 static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
52                             struct drm_crtc_state *crtc_state,
53                             struct drm_plane_state *plane_state)
54 {
55         struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
56         struct mipi_dbi *dbi = &dbidev->dbi;
57         u8 addr_mode;
58         int ret, idx;
59
60         if (!drm_dev_enter(pipe->crtc.dev, &idx))
61                 return;
62
63         DRM_DEBUG_KMS("\n");
64
65         ret = mipi_dbi_poweron_conditional_reset(dbidev);
66         if (ret < 0)
67                 goto out_exit;
68         if (ret == 1)
69                 goto out_enable;
70
71         mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
72
73         mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
74         mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
75         mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
76         mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
77         mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
78         mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
79
80         /* Power Control */
81         mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);
82         mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);
83         /* VCOM */
84         mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);
85         mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);
86
87         /* Memory Access Control */
88         mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
89
90         /* Frame Rate */
91         mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);
92
93         /* Gamma */
94         mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);
95         mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
96         mipi_dbi_command(dbi, ILI9341_PGAMCTRL,
97                        0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
98                        0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
99         mipi_dbi_command(dbi, ILI9341_NGAMCTRL,
100                        0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
101                        0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
102
103         /* DDRAM */
104         mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);
105
106         /* Display */
107         mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
108         mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
109         msleep(100);
110
111         mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
112         msleep(100);
113
114 out_enable:
115         /* The PiTFT (ili9340) has a hardware reset circuit that
116          * resets only on power-on and not on each reboot through
117          * a gpio like the rpi-display does.
118          * As a result, we need to always apply the rotation value
119          * regardless of the display "on/off" state.
120          */
121         switch (dbidev->rotation) {
122         default:
123                 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
124                             ILI9341_MADCTL_MX;
125                 break;
126         case 90:
127                 addr_mode = ILI9341_MADCTL_MY;
128                 break;
129         case 180:
130                 addr_mode = ILI9341_MADCTL_MV;
131                 break;
132         case 270:
133                 addr_mode = ILI9341_MADCTL_MX;
134                 break;
135         }
136         addr_mode |= ILI9341_MADCTL_BGR;
137         mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
138         mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
139 out_exit:
140         drm_dev_exit(idx);
141 }
142
143 static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
144         .mode_valid = mipi_dbi_pipe_mode_valid,
145         .enable = mi0283qt_enable,
146         .disable = mipi_dbi_pipe_disable,
147         .update = mipi_dbi_pipe_update,
148 };
149
150 static const struct drm_display_mode mi0283qt_mode = {
151         DRM_SIMPLE_MODE(320, 240, 58, 43),
152 };
153
154 DEFINE_DRM_GEM_DMA_FOPS(mi0283qt_fops);
155
156 static const struct drm_driver mi0283qt_driver = {
157         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
158         .fops                   = &mi0283qt_fops,
159         DRM_GEM_DMA_DRIVER_OPS_VMAP,
160         .debugfs_init           = mipi_dbi_debugfs_init,
161         .name                   = "mi0283qt",
162         .desc                   = "Multi-Inno MI0283QT",
163         .date                   = "20160614",
164         .major                  = 1,
165         .minor                  = 0,
166 };
167
168 static const struct of_device_id mi0283qt_of_match[] = {
169         { .compatible = "multi-inno,mi0283qt" },
170         {},
171 };
172 MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
173
174 static const struct spi_device_id mi0283qt_id[] = {
175         { "mi0283qt", 0 },
176         { },
177 };
178 MODULE_DEVICE_TABLE(spi, mi0283qt_id);
179
180 static int mi0283qt_probe(struct spi_device *spi)
181 {
182         struct device *dev = &spi->dev;
183         struct mipi_dbi_dev *dbidev;
184         struct drm_device *drm;
185         struct mipi_dbi *dbi;
186         struct gpio_desc *dc;
187         u32 rotation = 0;
188         int ret;
189
190         dbidev = devm_drm_dev_alloc(dev, &mi0283qt_driver,
191                                     struct mipi_dbi_dev, drm);
192         if (IS_ERR(dbidev))
193                 return PTR_ERR(dbidev);
194
195         dbi = &dbidev->dbi;
196         drm = &dbidev->drm;
197
198         dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
199         if (IS_ERR(dbi->reset))
200                 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
201
202         dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
203         if (IS_ERR(dc))
204                 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
205
206         dbidev->regulator = devm_regulator_get(dev, "power");
207         if (IS_ERR(dbidev->regulator))
208                 return PTR_ERR(dbidev->regulator);
209
210         dbidev->backlight = devm_of_find_backlight(dev);
211         if (IS_ERR(dbidev->backlight))
212                 return PTR_ERR(dbidev->backlight);
213
214         device_property_read_u32(dev, "rotation", &rotation);
215
216         ret = mipi_dbi_spi_init(spi, dbi, dc);
217         if (ret)
218                 return ret;
219
220         ret = mipi_dbi_dev_init(dbidev, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
221         if (ret)
222                 return ret;
223
224         drm_mode_config_reset(drm);
225
226         ret = drm_dev_register(drm, 0);
227         if (ret)
228                 return ret;
229
230         spi_set_drvdata(spi, drm);
231
232         drm_fbdev_generic_setup(drm, 0);
233
234         return 0;
235 }
236
237 static void mi0283qt_remove(struct spi_device *spi)
238 {
239         struct drm_device *drm = spi_get_drvdata(spi);
240
241         drm_dev_unplug(drm);
242         drm_atomic_helper_shutdown(drm);
243 }
244
245 static void mi0283qt_shutdown(struct spi_device *spi)
246 {
247         drm_atomic_helper_shutdown(spi_get_drvdata(spi));
248 }
249
250 static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
251 {
252         return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
253 }
254
255 static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
256 {
257         drm_mode_config_helper_resume(dev_get_drvdata(dev));
258
259         return 0;
260 }
261
262 static const struct dev_pm_ops mi0283qt_pm_ops = {
263         SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
264 };
265
266 static struct spi_driver mi0283qt_spi_driver = {
267         .driver = {
268                 .name = "mi0283qt",
269                 .owner = THIS_MODULE,
270                 .of_match_table = mi0283qt_of_match,
271                 .pm = &mi0283qt_pm_ops,
272         },
273         .id_table = mi0283qt_id,
274         .probe = mi0283qt_probe,
275         .remove = mi0283qt_remove,
276         .shutdown = mi0283qt_shutdown,
277 };
278 module_spi_driver(mi0283qt_spi_driver);
279
280 MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
281 MODULE_AUTHOR("Noralf Trønnes");
282 MODULE_LICENSE("GPL");