drivers/gpu/drm/sun4i/sun4i_tv.c

   1 /*
   2  * Copyright (C) 2015 Free Electrons
   3  * Copyright (C) 2015 NextThing Co
   4  *
   5  * Maxime Ripard <maxime.ripard@free-electrons.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/component.h>
  15 #include <linux/of_address.h>
  16 #include <linux/regmap.h>
  17 #include <linux/reset.h>
  18
  19 #include <drm/drmP.h>
  20 #include <drm/drm_atomic_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <drm/drm_panel.h>
  23
  24 #include "sun4i_backend.h"
  25 #include "sun4i_drv.h"
  26 #include "sun4i_tcon.h"
  27
  28 #define SUN4I_TVE_EN_REG                0x000
  29 #define SUN4I_TVE_EN_DAC_MAP_MASK               GENMASK(19, 4)
  30 #define SUN4I_TVE_EN_DAC_MAP(dac, out)          (((out) & 0xf) << (dac + 1) * 4)
  31 #define SUN4I_TVE_EN_ENABLE                     BIT(0)
  32
  33 #define SUN4I_TVE_CFG0_REG              0x004
  34 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M          BIT(26)
  35 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M        BIT(25)
  36 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M         BIT(24)
  37 #define SUN4I_TVE_CFG0_YC_EN                    BIT(17)
  38 #define SUN4I_TVE_CFG0_COMP_EN                  BIT(16)
  39 #define SUN4I_TVE_CFG0_RES(x)                   ((x) & 0xf)
  40 #define SUN4I_TVE_CFG0_RES_480i                 SUN4I_TVE_CFG0_RES(0)
  41 #define SUN4I_TVE_CFG0_RES_576i                 SUN4I_TVE_CFG0_RES(1)
  42
  43 #define SUN4I_TVE_DAC0_REG              0x008
  44 #define SUN4I_TVE_DAC0_CLOCK_INVERT             BIT(24)
  45 #define SUN4I_TVE_DAC0_LUMA(x)                  (((x) & 3) << 20)
  46 #define SUN4I_TVE_DAC0_LUMA_0_4                 SUN4I_TVE_DAC0_LUMA(3)
  47 #define SUN4I_TVE_DAC0_CHROMA(x)                (((x) & 3) << 18)
  48 #define SUN4I_TVE_DAC0_CHROMA_0_75              SUN4I_TVE_DAC0_CHROMA(3)
  49 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x)          (((x) & 3) << 16)
  50 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS   SUN4I_TVE_DAC0_INTERNAL_DAC(3)
  51 #define SUN4I_TVE_DAC0_DAC_EN(dac)              BIT(dac)
  52
  53 #define SUN4I_TVE_NOTCH_REG             0x00c
  54 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3))
  55
  56 #define SUN4I_TVE_CHROMA_FREQ_REG       0x010
  57
  58 #define SUN4I_TVE_PORCH_REG             0x014
  59 #define SUN4I_TVE_PORCH_BACK(x)                 ((x) << 16)
  60 #define SUN4I_TVE_PORCH_FRONT(x)                (x)
  61
  62 #define SUN4I_TVE_LINE_REG              0x01c
  63 #define SUN4I_TVE_LINE_FIRST(x)                 ((x) << 16)
  64 #define SUN4I_TVE_LINE_NUMBER(x)                (x)
  65
  66 #define SUN4I_TVE_LEVEL_REG             0x020
  67 #define SUN4I_TVE_LEVEL_BLANK(x)                ((x) << 16)
  68 #define SUN4I_TVE_LEVEL_BLACK(x)                (x)
  69
  70 #define SUN4I_TVE_DAC1_REG              0x024
  71 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x)        ((x) << (dac * 8))
  72
  73 #define SUN4I_TVE_DETECT_STA_REG        0x038
  74 #define SUN4I_TVE_DETECT_STA_DAC(dac)           BIT((dac * 8))
  75 #define SUN4I_TVE_DETECT_STA_UNCONNECTED                0
  76 #define SUN4I_TVE_DETECT_STA_CONNECTED                  1
  77 #define SUN4I_TVE_DETECT_STA_GROUND                     2
  78
  79 #define SUN4I_TVE_CB_CR_LVL_REG         0x10c
  80 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x)         ((x) << 8)
  81 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x)         (x)
  82
  83 #define SUN4I_TVE_TINT_BURST_PHASE_REG  0x110
  84 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x)    (x)
  85
  86 #define SUN4I_TVE_BURST_WIDTH_REG       0x114
  87 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x)      ((x) << 16)
  88 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x)    ((x) << 8)
  89 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x)    (x)
  90
  91 #define SUN4I_TVE_CB_CR_GAIN_REG        0x118
  92 #define SUN4I_TVE_CB_CR_GAIN_CR(x)              ((x) << 8)
  93 #define SUN4I_TVE_CB_CR_GAIN_CB(x)              (x)
  94
  95 #define SUN4I_TVE_SYNC_VBI_REG          0x11c
  96 #define SUN4I_TVE_SYNC_VBI_SYNC(x)              ((x) << 16)
  97 #define SUN4I_TVE_SYNC_VBI_VBLANK(x)            (x)
  98
  99 #define SUN4I_TVE_ACTIVE_LINE_REG       0x124
 100 #define SUN4I_TVE_ACTIVE_LINE(x)                (x)
 101
 102 #define SUN4I_TVE_CHROMA_REG            0x128
 103 #define SUN4I_TVE_CHROMA_COMP_GAIN(x)           ((x) & 3)
 104 #define SUN4I_TVE_CHROMA_COMP_GAIN_50           SUN4I_TVE_CHROMA_COMP_GAIN(2)
 105
 106 #define SUN4I_TVE_12C_REG               0x12c
 107 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE          BIT(8)
 108 #define SUN4I_TVE_12C_COMP_YUV_EN               BIT(0)
 109
 110 #define SUN4I_TVE_RESYNC_REG            0x130
 111 #define SUN4I_TVE_RESYNC_FIELD                  BIT(31)
 112 #define SUN4I_TVE_RESYNC_LINE(x)                ((x) << 16)
 113 #define SUN4I_TVE_RESYNC_PIXEL(x)               (x)
 114
 115 #define SUN4I_TVE_SLAVE_REG             0x134
 116
 117 #define SUN4I_TVE_WSS_DATA2_REG         0x244
 118
 119 struct color_gains {
 120         u16     cb;
 121         u16     cr;
 122 };
 123
 124 struct burst_levels {
 125         u16     cb;
 126         u16     cr;
 127 };
 128
 129 struct video_levels {
 130         u16     black;
 131         u16     blank;
 132 };
 133
 134 struct resync_parameters {
 135         bool    field;
 136         u16     line;
 137         u16     pixel;
 138 };
 139
 140 struct tv_mode {
 141         char            *name;
 142
 143         u32             mode;
 144         u32             chroma_freq;
 145         u16             back_porch;
 146         u16             front_porch;
 147         u16             line_number;
 148         u16             vblank_level;
 149
 150         u32             hdisplay;
 151         u16             hfront_porch;
 152         u16             hsync_len;
 153         u16             hback_porch;
 154
 155         u32             vdisplay;
 156         u16             vfront_porch;
 157         u16             vsync_len;
 158         u16             vback_porch;
 159
 160         bool            yc_en;
 161         bool            dac3_en;
 162         bool            dac_bit25_en;
 163
 164         struct color_gains              *color_gains;
 165         struct burst_levels             *burst_levels;
 166         struct video_levels             *video_levels;
 167         struct resync_parameters        *resync_params;
 168 };
 169
 170 struct sun4i_tv {
 171         struct drm_connector    connector;
 172         struct drm_encoder      encoder;
 173
 174         struct clk              *clk;
 175         struct regmap           *regs;
 176         struct reset_control    *reset;
 177
 178         struct sun4i_drv        *drv;
 179 };
 180
 181 struct video_levels pal_video_levels = {
 182         .black = 252,   .blank = 252,
 183 };
 184
 185 struct burst_levels pal_burst_levels = {
 186         .cb = 40,       .cr = 40,
 187 };
 188
 189 struct color_gains pal_color_gains = {
 190         .cb = 224,      .cr = 224,
 191 };
 192
 193 struct resync_parameters pal_resync_parameters = {
 194         .field = true,  .line = 13,     .pixel = 12,
 195 };
 196
 197 struct tv_mode tv_modes[] = {
 198         {
 199                 .name           = "PAL",
 200                 .mode           = SUN4I_TVE_CFG0_RES_576i,
 201                 .chroma_freq    = 0x2a098acb,
 202
 203                 .back_porch     = 138,
 204                 .front_porch    = 24,
 205                 .line_number    = 625,
 206
 207                 .hdisplay       = 720,
 208                 .hfront_porch   = 3,
 209                 .hsync_len      = 2,
 210                 .hback_porch    = 139,
 211
 212                 .vdisplay       = 576,
 213                 .vfront_porch   = 28,
 214                 .vsync_len      = 2,
 215                 .vback_porch    = 19,
 216
 217                 .vblank_level   = 252,
 218
 219                 .color_gains    = &pal_color_gains,
 220                 .burst_levels   = &pal_burst_levels,
 221                 .video_levels   = &pal_video_levels,
 222                 .resync_params  = &pal_resync_parameters,
 223         },
 224 };
 225
 226 static inline struct sun4i_tv *
 227 drm_encoder_to_sun4i_tv(struct drm_encoder *encoder)
 228 {
 229         return container_of(encoder, struct sun4i_tv,
 230                             encoder);
 231 }
 232
 233 static inline struct sun4i_tv *
 234 drm_connector_to_sun4i_tv(struct drm_connector *connector)
 235 {
 236         return container_of(connector, struct sun4i_tv,
 237                             connector);
 238 }
 239
 240 /*
 241  * FIXME: If only the drm_display_mode private field was usable, this
 242  * could go away...
 243  *
 244  * So far, it doesn't seem to be preserved when the mode is passed by
 245  * to mode_set for some reason.
 246  */
 247 static struct tv_mode *sun4i_tv_find_tv_by_mode(struct drm_display_mode *mode)
 248 {
 249         int i;
 250
 251         /* First try to identify the mode by name */
 252         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
 253                 struct tv_mode *tv_mode = &tv_modes[i];
 254
 255                 DRM_DEBUG_DRIVER("Comparing mode %s vs %s",
 256                                  mode->name, tv_mode->name);
 257
 258                 if (!strcmp(mode->name, tv_mode->name))
 259                         return tv_mode;
 260         }
 261
 262         /* Then by number of lines */
 263         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
 264                 struct tv_mode *tv_mode = &tv_modes[i];
 265
 266                 DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)",
 267                                  mode->name, tv_mode->name,
 268                                  mode->vdisplay, tv_mode->vdisplay);
 269
 270                 if (mode->vdisplay == tv_mode->vdisplay)
 271                         return tv_mode;
 272         }
 273
 274         return NULL;
 275 }
 276
 277 static void sun4i_tv_mode_to_drm_mode(struct tv_mode *tv_mode,
 278                                       struct drm_display_mode *mode)
 279 {
 280         DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name);
 281
 282         mode->type = DRM_MODE_TYPE_DRIVER;
 283         mode->clock = 13500;
 284         mode->flags = DRM_MODE_FLAG_INTERLACE;
 285
 286         mode->hdisplay = tv_mode->hdisplay;
 287         mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch;
 288         mode->hsync_end = mode->hsync_start + tv_mode->hsync_len;
 289         mode->htotal = mode->hsync_end  + tv_mode->hback_porch;
 290
 291         mode->vdisplay = tv_mode->vdisplay;
 292         mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch;
 293         mode->vsync_end = mode->vsync_start + tv_mode->vsync_len;
 294         mode->vtotal = mode->vsync_end  + tv_mode->vback_porch;
 295 }
 296
 297 static int sun4i_tv_atomic_check(struct drm_encoder *encoder,
 298                                  struct drm_crtc_state *crtc_state,
 299                                  struct drm_connector_state *conn_state)
 300 {
 301         return 0;
 302 }
 303
 304 static void sun4i_tv_disable(struct drm_encoder *encoder)
 305 {
 306         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
 307         struct sun4i_drv *drv = tv->drv;
 308         struct sun4i_tcon *tcon = drv->tcon;
 309
 310         DRM_DEBUG_DRIVER("Disabling the TV Output\n");
 311
 312         sun4i_tcon_channel_disable(tcon, 1);
 313
 314         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
 315                            SUN4I_TVE_EN_ENABLE,
 316                            0);
 317         sun4i_backend_disable_color_correction(drv->backend);
 318 }
 319
 320 static void sun4i_tv_enable(struct drm_encoder *encoder)
 321 {
 322         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
 323         struct sun4i_drv *drv = tv->drv;
 324         struct sun4i_tcon *tcon = drv->tcon;
 325
 326         DRM_DEBUG_DRIVER("Enabling the TV Output\n");
 327
 328         sun4i_backend_apply_color_correction(drv->backend);
 329
 330         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
 331                            SUN4I_TVE_EN_ENABLE,
 332                            SUN4I_TVE_EN_ENABLE);
 333
 334         sun4i_tcon_channel_enable(tcon, 1);
 335 }
 336
 337 static void sun4i_tv_mode_set(struct drm_encoder *encoder,
 338                               struct drm_display_mode *mode,
 339                               struct drm_display_mode *adjusted_mode)
 340 {
 341         struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder);
 342         struct sun4i_drv *drv = tv->drv;
 343         struct sun4i_tcon *tcon = drv->tcon;
 344         struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode);
 345
 346         sun4i_tcon1_mode_set(tcon, mode);
 347
 348         /* Enable and map the DAC to the output */
 349         regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG,
 350                            SUN4I_TVE_EN_DAC_MAP_MASK,
 351                            SUN4I_TVE_EN_DAC_MAP(0, 1) |
 352                            SUN4I_TVE_EN_DAC_MAP(1, 2) |
 353                            SUN4I_TVE_EN_DAC_MAP(2, 3) |
 354                            SUN4I_TVE_EN_DAC_MAP(3, 4));
 355
 356         /* Set PAL settings */
 357         regmap_write(tv->regs, SUN4I_TVE_CFG0_REG,
 358                      tv_mode->mode |
 359                      (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) |
 360                      SUN4I_TVE_CFG0_COMP_EN |
 361                      SUN4I_TVE_CFG0_DAC_CONTROL_54M |
 362                      SUN4I_TVE_CFG0_CORE_DATAPATH_54M |
 363                      SUN4I_TVE_CFG0_CORE_CONTROL_54M);
 364
 365         /* Configure the DAC for a composite output */
 366         regmap_write(tv->regs, SUN4I_TVE_DAC0_REG,
 367                      SUN4I_TVE_DAC0_DAC_EN(0) |
 368                      (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) |
 369                      SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS |
 370                      SUN4I_TVE_DAC0_CHROMA_0_75 |
 371                      SUN4I_TVE_DAC0_LUMA_0_4 |
 372                      SUN4I_TVE_DAC0_CLOCK_INVERT |
 373                      (tv_mode->dac_bit25_en ? BIT(25) : 0) |
 374                      BIT(30));
 375
 376         /* Configure the sample delay between DAC0 and the other DAC */
 377         regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG,
 378                      SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) |
 379                      SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0));
 380
 381         regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG,
 382                      tv_mode->chroma_freq);
 383
 384         /* Set the front and back porch */
 385         regmap_write(tv->regs, SUN4I_TVE_PORCH_REG,
 386                      SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) |
 387                      SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch));
 388
 389         /* Set the lines setup */
 390         regmap_write(tv->regs, SUN4I_TVE_LINE_REG,
 391                      SUN4I_TVE_LINE_FIRST(22) |
 392                      SUN4I_TVE_LINE_NUMBER(tv_mode->line_number));
 393
 394         regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG,
 395                      SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) |
 396                      SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black));
 397
 398         regmap_write(tv->regs, SUN4I_TVE_DAC1_REG,
 399                      SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) |
 400                      SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) |
 401                      SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) |
 402                      SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18));
 403
 404         regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG,
 405                      SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) |
 406                      SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr));
 407
 408         /* Set burst width for a composite output */
 409         regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG,
 410                      SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) |
 411                      SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) |
 412                      SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22));
 413
 414         regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG,
 415                      SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) |
 416                      SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr));
 417
 418         regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG,
 419                      SUN4I_TVE_SYNC_VBI_SYNC(0x10) |
 420                      SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level));
 421
 422         regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG,
 423                      SUN4I_TVE_ACTIVE_LINE(1440));
 424
 425         /* Set composite chroma gain to 50 % */
 426         regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG,
 427                      SUN4I_TVE_CHROMA_COMP_GAIN_50);
 428
 429         regmap_write(tv->regs, SUN4I_TVE_12C_REG,
 430                      SUN4I_TVE_12C_COMP_YUV_EN |
 431                      SUN4I_TVE_12C_NOTCH_WIDTH_WIDE);
 432
 433         regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG,
 434                      SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) |
 435                      SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) |
 436                      (tv_mode->resync_params->field ?
 437                       SUN4I_TVE_RESYNC_FIELD : 0));
 438
 439         regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0);
 440
 441         clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000);
 442 }
 443
 444 static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = {
 445         .atomic_check   = sun4i_tv_atomic_check,
 446         .disable        = sun4i_tv_disable,
 447         .enable         = sun4i_tv_enable,
 448         .mode_set       = sun4i_tv_mode_set,
 449 };
 450
 451 static void sun4i_tv_destroy(struct drm_encoder *encoder)
 452 {
 453         drm_encoder_cleanup(encoder);
 454 }
 455
 456 static struct drm_encoder_funcs sun4i_tv_funcs = {
 457         .destroy        = sun4i_tv_destroy,
 458 };
 459
 460 static int sun4i_tv_comp_get_modes(struct drm_connector *connector)
 461 {
 462         int i;
 463
 464         for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
 465                 struct drm_display_mode *mode = drm_mode_create(connector->dev);
 466                 struct tv_mode *tv_mode = &tv_modes[i];
 467
 468                 strcpy(mode->name, tv_mode->name);
 469
 470                 sun4i_tv_mode_to_drm_mode(tv_mode, mode);
 471                 drm_mode_probed_add(connector, mode);
 472         }
 473
 474         return i;
 475 }
 476
 477 static int sun4i_tv_comp_mode_valid(struct drm_connector *connector,
 478                                     struct drm_display_mode *mode)
 479 {
 480         /* TODO */
 481         return MODE_OK;
 482 }
 483
 484 static struct drm_encoder *
 485 sun4i_tv_comp_best_encoder(struct drm_connector *connector)
 486 {
 487         struct sun4i_tv *tv = drm_connector_to_sun4i_tv(connector);
 488
 489         return &tv->encoder;
 490 }
 491
 492 static struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = {
 493         .get_modes      = sun4i_tv_comp_get_modes,
 494         .mode_valid     = sun4i_tv_comp_mode_valid,
 495         .best_encoder   = sun4i_tv_comp_best_encoder,
 496 };
 497
 498 static enum drm_connector_status
 499 sun4i_tv_comp_connector_detect(struct drm_connector *connector, bool force)
 500 {
 501         return connector_status_connected;
 502 }
 503
 504 static void
 505 sun4i_tv_comp_connector_destroy(struct drm_connector *connector)
 506 {
 507         drm_connector_cleanup(connector);
 508 }
 509
 510 static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = {
 511         .dpms                   = drm_atomic_helper_connector_dpms,
 512         .detect                 = sun4i_tv_comp_connector_detect,
 513         .fill_modes             = drm_helper_probe_single_connector_modes,
 514         .destroy                = sun4i_tv_comp_connector_destroy,
 515         .reset                  = drm_atomic_helper_connector_reset,
 516         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 517         .atomic_destroy_state   = drm_atomic_helper_connector_destroy_state,
 518 };
 519
 520 static struct regmap_config sun4i_tv_regmap_config = {
 521         .reg_bits       = 32,
 522         .val_bits       = 32,
 523         .reg_stride     = 4,
 524         .max_register   = SUN4I_TVE_WSS_DATA2_REG,
 525         .name           = "tv-encoder",
 526 };
 527
 528 static int sun4i_tv_bind(struct device *dev, struct device *master,
 529                          void *data)
 530 {
 531         struct platform_device *pdev = to_platform_device(dev);
 532         struct drm_device *drm = data;
 533         struct sun4i_drv *drv = drm->dev_private;
 534         struct sun4i_tv *tv;
 535         struct resource *res;
 536         void __iomem *regs;
 537         int ret;
 538
 539         tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL);
 540         if (!tv)
 541                 return -ENOMEM;
 542         tv->drv = drv;
 543         dev_set_drvdata(dev, tv);
 544
 545         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 546         regs = devm_ioremap_resource(dev, res);
 547         if (IS_ERR(regs)) {
 548                 dev_err(dev, "Couldn't map the TV encoder registers\n");
 549                 return PTR_ERR(regs);
 550         }
 551
 552         tv->regs = devm_regmap_init_mmio(dev, regs,
 553                                          &sun4i_tv_regmap_config);
 554         if (IS_ERR(tv->regs)) {
 555                 dev_err(dev, "Couldn't create the TV encoder regmap\n");
 556                 return PTR_ERR(tv->regs);
 557         }
 558
 559         tv->reset = devm_reset_control_get(dev, NULL);
 560         if (IS_ERR(tv->reset)) {
 561                 dev_err(dev, "Couldn't get our reset line\n");
 562                 return PTR_ERR(tv->reset);
 563         }
 564
 565         ret = reset_control_deassert(tv->reset);
 566         if (ret) {
 567                 dev_err(dev, "Couldn't deassert our reset line\n");
 568                 return ret;
 569         }
 570
 571         tv->clk = devm_clk_get(dev, NULL);
 572         if (IS_ERR(tv->clk)) {
 573                 dev_err(dev, "Couldn't get the TV encoder clock\n");
 574                 ret = PTR_ERR(tv->clk);
 575                 goto err_assert_reset;
 576         }
 577         clk_prepare_enable(tv->clk);
 578
 579         drm_encoder_helper_add(&tv->encoder,
 580                                &sun4i_tv_helper_funcs);
 581         ret = drm_encoder_init(drm,
 582                                &tv->encoder,
 583                                &sun4i_tv_funcs,
 584                                DRM_MODE_ENCODER_TVDAC,
 585                                NULL);
 586         if (ret) {
 587                 dev_err(dev, "Couldn't initialise the TV encoder\n");
 588                 goto err_disable_clk;
 589         }
 590
 591         tv->encoder.possible_crtcs = BIT(0);
 592
 593         drm_connector_helper_add(&tv->connector,
 594                                  &sun4i_tv_comp_connector_helper_funcs);
 595         ret = drm_connector_init(drm, &tv->connector,
 596                                  &sun4i_tv_comp_connector_funcs,
 597                                  DRM_MODE_CONNECTOR_Composite);
 598         if (ret) {
 599                 dev_err(dev,
 600                         "Couldn't initialise the Composite connector\n");
 601                 goto err_cleanup_connector;
 602         }
 603         tv->connector.interlace_allowed = true;
 604
 605         drm_mode_connector_attach_encoder(&tv->connector, &tv->encoder);
 606
 607         return 0;
 608
 609 err_cleanup_connector:
 610         drm_encoder_cleanup(&tv->encoder);
 611 err_disable_clk:
 612         clk_disable_unprepare(tv->clk);
 613 err_assert_reset:
 614         reset_control_assert(tv->reset);
 615         return ret;
 616 }
 617
 618 static void sun4i_tv_unbind(struct device *dev, struct device *master,
 619                             void *data)
 620 {
 621         struct sun4i_tv *tv = dev_get_drvdata(dev);
 622
 623         drm_connector_cleanup(&tv->connector);
 624         drm_encoder_cleanup(&tv->encoder);
 625         clk_disable_unprepare(tv->clk);
 626 }
 627
 628 static struct component_ops sun4i_tv_ops = {
 629         .bind   = sun4i_tv_bind,
 630         .unbind = sun4i_tv_unbind,
 631 };
 632
 633 static int sun4i_tv_probe(struct platform_device *pdev)
 634 {
 635         return component_add(&pdev->dev, &sun4i_tv_ops);
 636 }
 637
 638 static int sun4i_tv_remove(struct platform_device *pdev)
 639 {
 640         component_del(&pdev->dev, &sun4i_tv_ops);
 641
 642         return 0;
 643 }
 644
 645 static const struct of_device_id sun4i_tv_of_table[] = {
 646         { .compatible = "allwinner,sun4i-a10-tv-encoder" },
 647         { }
 648 };
 649 MODULE_DEVICE_TABLE(of, sun4i_tv_of_table);
 650
 651 static struct platform_driver sun4i_tv_platform_driver = {
 652         .probe          = sun4i_tv_probe,
 653         .remove         = sun4i_tv_remove,
 654         .driver         = {
 655                 .name           = "sun4i-tve",
 656                 .of_match_table = sun4i_tv_of_table,
 657         },
 658 };
 659 module_platform_driver(sun4i_tv_platform_driver);
 660
 661 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
 662 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver");
 663 MODULE_LICENSE("GPL");