drm/radeon: Store PCI controller in struct radeon_device.hose
[sfrench/cifs-2.6.git] / drivers / gpu / drm / radeon / radeon_ttm.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32
33 #include <linux/dma-mapping.h>
34 #include <linux/pagemap.h>
35 #include <linux/pci.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
38 #include <linux/swap.h>
39 #include <linux/swiotlb.h>
40
41 #include <drm/drm_agpsupport.h>
42 #include <drm/drm_debugfs.h>
43 #include <drm/drm_device.h>
44 #include <drm/drm_file.h>
45 #include <drm/drm_prime.h>
46 #include <drm/radeon_drm.h>
47 #include <drm/ttm/ttm_bo_api.h>
48 #include <drm/ttm/ttm_bo_driver.h>
49 #include <drm/ttm/ttm_placement.h>
50
51 #include "radeon_reg.h"
52 #include "radeon.h"
53 #include "radeon_ttm.h"
54
55 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
56 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
57
58 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
59                               struct ttm_tt *ttm,
60                               struct ttm_resource *bo_mem);
61 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
62                                  struct ttm_tt *ttm);
63
64 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
65 {
66         struct radeon_mman *mman;
67         struct radeon_device *rdev;
68
69         mman = container_of(bdev, struct radeon_mman, bdev);
70         rdev = container_of(mman, struct radeon_device, mman);
71         return rdev;
72 }
73
74 static int radeon_ttm_init_vram(struct radeon_device *rdev)
75 {
76         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
77                                   false, rdev->mc.real_vram_size >> PAGE_SHIFT);
78 }
79
80 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
81 {
82         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
83                                   true, rdev->mc.gtt_size >> PAGE_SHIFT);
84 }
85
86 static void radeon_evict_flags(struct ttm_buffer_object *bo,
87                                 struct ttm_placement *placement)
88 {
89         static const struct ttm_place placements = {
90                 .fpfn = 0,
91                 .lpfn = 0,
92                 .mem_type = TTM_PL_SYSTEM,
93                 .flags = 0
94         };
95
96         struct radeon_bo *rbo;
97
98         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
99                 placement->placement = &placements;
100                 placement->busy_placement = &placements;
101                 placement->num_placement = 1;
102                 placement->num_busy_placement = 1;
103                 return;
104         }
105         rbo = container_of(bo, struct radeon_bo, tbo);
106         switch (bo->mem.mem_type) {
107         case TTM_PL_VRAM:
108                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
109                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
110                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
111                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
112                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
113                         int i;
114
115                         /* Try evicting to the CPU inaccessible part of VRAM
116                          * first, but only set GTT as busy placement, so this
117                          * BO will be evicted to GTT rather than causing other
118                          * BOs to be evicted from VRAM
119                          */
120                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
121                                                          RADEON_GEM_DOMAIN_GTT);
122                         rbo->placement.num_busy_placement = 0;
123                         for (i = 0; i < rbo->placement.num_placement; i++) {
124                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
125                                         if (rbo->placements[i].fpfn < fpfn)
126                                                 rbo->placements[i].fpfn = fpfn;
127                                 } else {
128                                         rbo->placement.busy_placement =
129                                                 &rbo->placements[i];
130                                         rbo->placement.num_busy_placement = 1;
131                                 }
132                         }
133                 } else
134                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
135                 break;
136         case TTM_PL_TT:
137         default:
138                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
139         }
140         *placement = rbo->placement;
141 }
142
143 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
144 {
145         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
146         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
147
148         if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
149                 return -EPERM;
150         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
151                                           filp->private_data);
152 }
153
154 static int radeon_move_blit(struct ttm_buffer_object *bo,
155                         bool evict,
156                         struct ttm_resource *new_mem,
157                         struct ttm_resource *old_mem)
158 {
159         struct radeon_device *rdev;
160         uint64_t old_start, new_start;
161         struct radeon_fence *fence;
162         unsigned num_pages;
163         int r, ridx;
164
165         rdev = radeon_get_rdev(bo->bdev);
166         ridx = radeon_copy_ring_index(rdev);
167         old_start = (u64)old_mem->start << PAGE_SHIFT;
168         new_start = (u64)new_mem->start << PAGE_SHIFT;
169
170         switch (old_mem->mem_type) {
171         case TTM_PL_VRAM:
172                 old_start += rdev->mc.vram_start;
173                 break;
174         case TTM_PL_TT:
175                 old_start += rdev->mc.gtt_start;
176                 break;
177         default:
178                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
179                 return -EINVAL;
180         }
181         switch (new_mem->mem_type) {
182         case TTM_PL_VRAM:
183                 new_start += rdev->mc.vram_start;
184                 break;
185         case TTM_PL_TT:
186                 new_start += rdev->mc.gtt_start;
187                 break;
188         default:
189                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
190                 return -EINVAL;
191         }
192         if (!rdev->ring[ridx].ready) {
193                 DRM_ERROR("Trying to move memory with ring turned off.\n");
194                 return -EINVAL;
195         }
196
197         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
198
199         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
200         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
201         if (IS_ERR(fence))
202                 return PTR_ERR(fence);
203
204         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
205         radeon_fence_unref(&fence);
206         return r;
207 }
208
209 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
210                           struct ttm_operation_ctx *ctx,
211                           struct ttm_resource *new_mem,
212                           struct ttm_place *hop)
213 {
214         struct radeon_device *rdev;
215         struct radeon_bo *rbo;
216         struct ttm_resource *old_mem = &bo->mem;
217         int r;
218
219         if (new_mem->mem_type == TTM_PL_TT) {
220                 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem);
221                 if (r)
222                         return r;
223         }
224
225         r = ttm_bo_wait_ctx(bo, ctx);
226         if (r)
227                 return r;
228
229         /* Can't move a pinned BO */
230         rbo = container_of(bo, struct radeon_bo, tbo);
231         if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
232                 return -EINVAL;
233
234         rdev = radeon_get_rdev(bo->bdev);
235         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
236                 ttm_bo_move_null(bo, new_mem);
237                 goto out;
238         }
239         if (old_mem->mem_type == TTM_PL_SYSTEM &&
240             new_mem->mem_type == TTM_PL_TT) {
241                 ttm_bo_move_null(bo, new_mem);
242                 goto out;
243         }
244
245         if (old_mem->mem_type == TTM_PL_TT &&
246             new_mem->mem_type == TTM_PL_SYSTEM) {
247                 radeon_ttm_tt_unbind(bo->bdev, bo->ttm);
248                 ttm_resource_free(bo, &bo->mem);
249                 ttm_bo_assign_mem(bo, new_mem);
250                 goto out;
251         }
252         if (rdev->ring[radeon_copy_ring_index(rdev)].ready &&
253             rdev->asic->copy.copy != NULL) {
254                 if ((old_mem->mem_type == TTM_PL_SYSTEM &&
255                      new_mem->mem_type == TTM_PL_VRAM) ||
256                     (old_mem->mem_type == TTM_PL_VRAM &&
257                      new_mem->mem_type == TTM_PL_SYSTEM)) {
258                         hop->fpfn = 0;
259                         hop->lpfn = 0;
260                         hop->mem_type = TTM_PL_TT;
261                         hop->flags = 0;
262                         return -EMULTIHOP;
263                 }
264
265                 r = radeon_move_blit(bo, evict, new_mem, old_mem);
266         } else {
267                 r = -ENODEV;
268         }
269
270         if (r) {
271                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
272                 if (r)
273                         return r;
274         }
275
276 out:
277         /* update statistics */
278         atomic64_add(bo->base.size, &rdev->num_bytes_moved);
279         radeon_bo_move_notify(bo, evict, new_mem);
280         return 0;
281 }
282
283 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
284 {
285         struct radeon_device *rdev = radeon_get_rdev(bdev);
286         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
287
288         switch (mem->mem_type) {
289         case TTM_PL_SYSTEM:
290                 /* system memory */
291                 return 0;
292         case TTM_PL_TT:
293 #if IS_ENABLED(CONFIG_AGP)
294                 if (rdev->flags & RADEON_IS_AGP) {
295                         /* RADEON_IS_AGP is set only if AGP is active */
296                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
297                                 rdev->mc.agp_base;
298                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
299                         mem->bus.caching = ttm_write_combined;
300                 }
301 #endif
302                 break;
303         case TTM_PL_VRAM:
304                 mem->bus.offset = mem->start << PAGE_SHIFT;
305                 /* check if it's visible */
306                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
307                         return -EINVAL;
308                 mem->bus.offset += rdev->mc.aper_base;
309                 mem->bus.is_iomem = true;
310                 mem->bus.caching = ttm_write_combined;
311 #ifdef __alpha__
312                 /*
313                  * Alpha: use bus.addr to hold the ioremap() return,
314                  * so we can modify bus.base below.
315                  */
316                 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size);
317                 if (!mem->bus.addr)
318                         return -ENOMEM;
319
320                 /*
321                  * Alpha: Use just the bus offset plus
322                  * the hose/domain memory base for bus.base.
323                  * It then can be used to build PTEs for VRAM
324                  * access, as done in ttm_bo_vm_fault().
325                  */
326                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
327                         rdev->hose->dense_mem_base;
328 #endif
329                 break;
330         default:
331                 return -EINVAL;
332         }
333         return 0;
334 }
335
336 /*
337  * TTM backend functions.
338  */
339 struct radeon_ttm_tt {
340         struct ttm_tt           ttm;
341         u64                             offset;
342
343         uint64_t                        userptr;
344         struct mm_struct                *usermm;
345         uint32_t                        userflags;
346         bool bound;
347 };
348
349 /* prepare the sg table with the user pages */
350 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
351 {
352         struct radeon_device *rdev = radeon_get_rdev(bdev);
353         struct radeon_ttm_tt *gtt = (void *)ttm;
354         unsigned pinned = 0;
355         int r;
356
357         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
358         enum dma_data_direction direction = write ?
359                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
360
361         if (current->mm != gtt->usermm)
362                 return -EPERM;
363
364         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
365                 /* check that we only pin down anonymous memory
366                    to prevent problems with writeback */
367                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
368                 struct vm_area_struct *vma;
369                 vma = find_vma(gtt->usermm, gtt->userptr);
370                 if (!vma || vma->vm_file || vma->vm_end < end)
371                         return -EPERM;
372         }
373
374         do {
375                 unsigned num_pages = ttm->num_pages - pinned;
376                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
377                 struct page **pages = ttm->pages + pinned;
378
379                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
380                                    pages, NULL);
381                 if (r < 0)
382                         goto release_pages;
383
384                 pinned += r;
385
386         } while (pinned < ttm->num_pages);
387
388         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
389                                       ttm->num_pages << PAGE_SHIFT,
390                                       GFP_KERNEL);
391         if (r)
392                 goto release_sg;
393
394         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
395         if (r)
396                 goto release_sg;
397
398         drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
399                                        ttm->num_pages);
400
401         return 0;
402
403 release_sg:
404         kfree(ttm->sg);
405
406 release_pages:
407         release_pages(ttm->pages, pinned);
408         return r;
409 }
410
411 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
412 {
413         struct radeon_device *rdev = radeon_get_rdev(bdev);
414         struct radeon_ttm_tt *gtt = (void *)ttm;
415         struct sg_page_iter sg_iter;
416
417         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
418         enum dma_data_direction direction = write ?
419                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
420
421         /* double check that we don't free the table twice */
422         if (!ttm->sg->sgl)
423                 return;
424
425         /* free the sg table and pages again */
426         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
427
428         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
429                 struct page *page = sg_page_iter_page(&sg_iter);
430                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
431                         set_page_dirty(page);
432
433                 mark_page_accessed(page);
434                 put_page(page);
435         }
436
437         sg_free_table(ttm->sg);
438 }
439
440 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
441 {
442         struct radeon_ttm_tt *gtt = (void*)ttm;
443
444         return (gtt->bound);
445 }
446
447 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
448                                    struct ttm_tt *ttm,
449                                    struct ttm_resource *bo_mem)
450 {
451         struct radeon_ttm_tt *gtt = (void*)ttm;
452         struct radeon_device *rdev = radeon_get_rdev(bdev);
453         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
454                 RADEON_GART_PAGE_WRITE;
455         int r;
456
457         if (gtt->bound)
458                 return 0;
459
460         if (gtt->userptr) {
461                 radeon_ttm_tt_pin_userptr(bdev, ttm);
462                 flags &= ~RADEON_GART_PAGE_WRITE;
463         }
464
465         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
466         if (!ttm->num_pages) {
467                 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
468                      ttm->num_pages, bo_mem, ttm);
469         }
470         if (ttm->caching == ttm_cached)
471                 flags |= RADEON_GART_PAGE_SNOOP;
472         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
473                              ttm->pages, gtt->ttm.dma_address, flags);
474         if (r) {
475                 DRM_ERROR("failed to bind %u pages at 0x%08X\n",
476                           ttm->num_pages, (unsigned)gtt->offset);
477                 return r;
478         }
479         gtt->bound = true;
480         return 0;
481 }
482
483 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
484 {
485         struct radeon_ttm_tt *gtt = (void *)ttm;
486         struct radeon_device *rdev = radeon_get_rdev(bdev);
487
488         if (!gtt->bound)
489                 return;
490
491         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
492
493         if (gtt->userptr)
494                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
495         gtt->bound = false;
496 }
497
498 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
499 {
500         struct radeon_ttm_tt *gtt = (void *)ttm;
501
502         radeon_ttm_backend_unbind(bdev, ttm);
503         ttm_tt_destroy_common(bdev, ttm);
504
505         ttm_tt_fini(&gtt->ttm);
506         kfree(gtt);
507 }
508
509 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
510                                            uint32_t page_flags)
511 {
512         struct radeon_ttm_tt *gtt;
513         enum ttm_caching caching;
514         struct radeon_bo *rbo;
515 #if IS_ENABLED(CONFIG_AGP)
516         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
517
518         if (rdev->flags & RADEON_IS_AGP) {
519                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
520                                          page_flags);
521         }
522 #endif
523         rbo = container_of(bo, struct radeon_bo, tbo);
524
525         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
526         if (gtt == NULL) {
527                 return NULL;
528         }
529
530         if (rbo->flags & RADEON_GEM_GTT_UC)
531                 caching = ttm_uncached;
532         else if (rbo->flags & RADEON_GEM_GTT_WC)
533                 caching = ttm_write_combined;
534         else
535                 caching = ttm_cached;
536
537         if (ttm_sg_tt_init(&gtt->ttm, bo, page_flags, caching)) {
538                 kfree(gtt);
539                 return NULL;
540         }
541         return &gtt->ttm;
542 }
543
544 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
545                                                   struct ttm_tt *ttm)
546 {
547 #if IS_ENABLED(CONFIG_AGP)
548         if (rdev->flags & RADEON_IS_AGP)
549                 return NULL;
550 #endif
551
552         if (!ttm)
553                 return NULL;
554         return container_of(ttm, struct radeon_ttm_tt, ttm);
555 }
556
557 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
558                                   struct ttm_tt *ttm,
559                                   struct ttm_operation_ctx *ctx)
560 {
561         struct radeon_device *rdev = radeon_get_rdev(bdev);
562         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
563         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
564
565         if (gtt && gtt->userptr) {
566                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
567                 if (!ttm->sg)
568                         return -ENOMEM;
569
570                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
571                 return 0;
572         }
573
574         if (slave && ttm->sg) {
575                 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address,
576                                                ttm->num_pages);
577                 return 0;
578         }
579
580         return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx);
581 }
582
583 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
584 {
585         struct radeon_device *rdev = radeon_get_rdev(bdev);
586         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
587         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
588
589         if (gtt && gtt->userptr) {
590                 kfree(ttm->sg);
591                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
592                 return;
593         }
594
595         if (slave)
596                 return;
597
598         return ttm_pool_free(&rdev->mman.bdev.pool, ttm);
599 }
600
601 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
602                               struct ttm_tt *ttm, uint64_t addr,
603                               uint32_t flags)
604 {
605         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
606
607         if (gtt == NULL)
608                 return -EINVAL;
609
610         gtt->userptr = addr;
611         gtt->usermm = current->mm;
612         gtt->userflags = flags;
613         return 0;
614 }
615
616 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
617                             struct ttm_tt *ttm)
618 {
619 #if IS_ENABLED(CONFIG_AGP)
620         struct radeon_device *rdev = radeon_get_rdev(bdev);
621         if (rdev->flags & RADEON_IS_AGP)
622                 return ttm_agp_is_bound(ttm);
623 #endif
624         return radeon_ttm_backend_is_bound(ttm);
625 }
626
627 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
628                               struct ttm_tt *ttm,
629                               struct ttm_resource *bo_mem)
630 {
631 #if IS_ENABLED(CONFIG_AGP)
632         struct radeon_device *rdev = radeon_get_rdev(bdev);
633 #endif
634
635         if (!bo_mem)
636                 return -EINVAL;
637 #if IS_ENABLED(CONFIG_AGP)
638         if (rdev->flags & RADEON_IS_AGP)
639                 return ttm_agp_bind(ttm, bo_mem);
640 #endif
641
642         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
643 }
644
645 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
646                                  struct ttm_tt *ttm)
647 {
648 #if IS_ENABLED(CONFIG_AGP)
649         struct radeon_device *rdev = radeon_get_rdev(bdev);
650
651         if (rdev->flags & RADEON_IS_AGP) {
652                 ttm_agp_unbind(ttm);
653                 return;
654         }
655 #endif
656         radeon_ttm_backend_unbind(bdev, ttm);
657 }
658
659 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
660                                   struct ttm_tt *ttm)
661 {
662 #if IS_ENABLED(CONFIG_AGP)
663         struct radeon_device *rdev = radeon_get_rdev(bdev);
664
665         if (rdev->flags & RADEON_IS_AGP) {
666                 ttm_agp_unbind(ttm);
667                 ttm_tt_destroy_common(bdev, ttm);
668                 ttm_agp_destroy(ttm);
669                 return;
670         }
671 #endif
672         radeon_ttm_backend_destroy(bdev, ttm);
673 }
674
675 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
676                                struct ttm_tt *ttm)
677 {
678         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
679
680         if (gtt == NULL)
681                 return false;
682
683         return !!gtt->userptr;
684 }
685
686 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
687                                struct ttm_tt *ttm)
688 {
689         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
690
691         if (gtt == NULL)
692                 return false;
693
694         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
695 }
696
697 static void
698 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo)
699 {
700         radeon_bo_move_notify(bo, false, NULL);
701 }
702
703 static struct ttm_bo_driver radeon_bo_driver = {
704         .ttm_tt_create = &radeon_ttm_tt_create,
705         .ttm_tt_populate = &radeon_ttm_tt_populate,
706         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
707         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
708         .eviction_valuable = ttm_bo_eviction_valuable,
709         .evict_flags = &radeon_evict_flags,
710         .move = &radeon_bo_move,
711         .verify_access = &radeon_verify_access,
712         .delete_mem_notify = &radeon_bo_delete_mem_notify,
713         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
714 };
715
716 int radeon_ttm_init(struct radeon_device *rdev)
717 {
718         int r;
719
720         /* No others user of address space so set it to 0 */
721         r = ttm_bo_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev,
722                                rdev->ddev->anon_inode->i_mapping,
723                                rdev->ddev->vma_offset_manager,
724                                rdev->need_swiotlb,
725                                dma_addressing_limited(&rdev->pdev->dev));
726         if (r) {
727                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
728                 return r;
729         }
730         rdev->mman.initialized = true;
731
732         ttm_pool_init(&rdev->mman.bdev.pool, rdev->dev, rdev->need_swiotlb,
733                       dma_addressing_limited(&rdev->pdev->dev));
734
735         r = radeon_ttm_init_vram(rdev);
736         if (r) {
737                 DRM_ERROR("Failed initializing VRAM heap.\n");
738                 return r;
739         }
740         /* Change the size here instead of the init above so only lpfn is affected */
741         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
742
743         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
744                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
745                              NULL, &rdev->stolen_vga_memory);
746         if (r) {
747                 return r;
748         }
749         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
750         if (r)
751                 return r;
752         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
753         radeon_bo_unreserve(rdev->stolen_vga_memory);
754         if (r) {
755                 radeon_bo_unref(&rdev->stolen_vga_memory);
756                 return r;
757         }
758         DRM_INFO("radeon: %uM of VRAM memory ready\n",
759                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
760
761         r = radeon_ttm_init_gtt(rdev);
762         if (r) {
763                 DRM_ERROR("Failed initializing GTT heap.\n");
764                 return r;
765         }
766         DRM_INFO("radeon: %uM of GTT memory ready.\n",
767                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
768
769         r = radeon_ttm_debugfs_init(rdev);
770         if (r) {
771                 DRM_ERROR("Failed to init debugfs\n");
772                 return r;
773         }
774         return 0;
775 }
776
777 void radeon_ttm_fini(struct radeon_device *rdev)
778 {
779         int r;
780
781         if (!rdev->mman.initialized)
782                 return;
783         radeon_ttm_debugfs_fini(rdev);
784         if (rdev->stolen_vga_memory) {
785                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
786                 if (r == 0) {
787                         radeon_bo_unpin(rdev->stolen_vga_memory);
788                         radeon_bo_unreserve(rdev->stolen_vga_memory);
789                 }
790                 radeon_bo_unref(&rdev->stolen_vga_memory);
791         }
792         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
793         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
794         ttm_bo_device_release(&rdev->mman.bdev);
795         radeon_gart_fini(rdev);
796         rdev->mman.initialized = false;
797         DRM_INFO("radeon: ttm finalized\n");
798 }
799
800 /* this should only be called at bootup or when userspace
801  * isn't running */
802 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
803 {
804         struct ttm_resource_manager *man;
805
806         if (!rdev->mman.initialized)
807                 return;
808
809         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
810         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
811         man->size = size >> PAGE_SHIFT;
812 }
813
814 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
815 {
816         struct ttm_buffer_object *bo = vmf->vma->vm_private_data;
817         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
818         vm_fault_t ret;
819
820         down_read(&rdev->pm.mclk_lock);
821
822         ret = ttm_bo_vm_reserve(bo, vmf);
823         if (ret)
824                 goto unlock_mclk;
825
826         ret = radeon_bo_fault_reserve_notify(bo);
827         if (ret)
828                 goto unlock_resv;
829
830         ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
831                                        TTM_BO_VM_NUM_PREFAULT, 1);
832         if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
833                 goto unlock_mclk;
834
835 unlock_resv:
836         dma_resv_unlock(bo->base.resv);
837
838 unlock_mclk:
839         up_read(&rdev->pm.mclk_lock);
840         return ret;
841 }
842
843 static struct vm_operations_struct radeon_ttm_vm_ops = {
844         .fault = radeon_ttm_fault,
845         .open = ttm_bo_vm_open,
846         .close = ttm_bo_vm_close,
847         .access = ttm_bo_vm_access
848 };
849
850 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
851 {
852         int r;
853         struct drm_file *file_priv = filp->private_data;
854         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
855
856         if (rdev == NULL)
857                 return -EINVAL;
858
859         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
860         if (unlikely(r != 0))
861                 return r;
862
863         vma->vm_ops = &radeon_ttm_vm_ops;
864         return 0;
865 }
866
867 #if defined(CONFIG_DEBUG_FS)
868
869 static int radeon_mm_dump_table(struct seq_file *m, void *data)
870 {
871         struct drm_info_node *node = (struct drm_info_node *)m->private;
872         unsigned ttm_pl = *(int*)node->info_ent->data;
873         struct drm_device *dev = node->minor->dev;
874         struct radeon_device *rdev = dev->dev_private;
875         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
876         struct drm_printer p = drm_seq_file_printer(m);
877
878         man->func->debug(man, &p);
879         return 0;
880 }
881
882 static int radeon_ttm_pool_debugfs(struct seq_file *m, void *data)
883 {
884         struct drm_info_node *node = (struct drm_info_node *)m->private;
885         struct drm_device *dev = node->minor->dev;
886         struct radeon_device *rdev = dev->dev_private;
887
888         return ttm_pool_debugfs(&rdev->mman.bdev.pool, m);
889 }
890
891 static int ttm_pl_vram = TTM_PL_VRAM;
892 static int ttm_pl_tt = TTM_PL_TT;
893
894 static struct drm_info_list radeon_ttm_debugfs_list[] = {
895         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
896         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
897         {"ttm_page_pool", radeon_ttm_pool_debugfs, 0, NULL}
898 };
899
900 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
901 {
902         struct radeon_device *rdev = inode->i_private;
903         i_size_write(inode, rdev->mc.mc_vram_size);
904         filep->private_data = inode->i_private;
905         return 0;
906 }
907
908 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
909                                     size_t size, loff_t *pos)
910 {
911         struct radeon_device *rdev = f->private_data;
912         ssize_t result = 0;
913         int r;
914
915         if (size & 0x3 || *pos & 0x3)
916                 return -EINVAL;
917
918         while (size) {
919                 unsigned long flags;
920                 uint32_t value;
921
922                 if (*pos >= rdev->mc.mc_vram_size)
923                         return result;
924
925                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
926                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
927                 if (rdev->family >= CHIP_CEDAR)
928                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
929                 value = RREG32(RADEON_MM_DATA);
930                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
931
932                 r = put_user(value, (uint32_t *)buf);
933                 if (r)
934                         return r;
935
936                 result += 4;
937                 buf += 4;
938                 *pos += 4;
939                 size -= 4;
940         }
941
942         return result;
943 }
944
945 static const struct file_operations radeon_ttm_vram_fops = {
946         .owner = THIS_MODULE,
947         .open = radeon_ttm_vram_open,
948         .read = radeon_ttm_vram_read,
949         .llseek = default_llseek
950 };
951
952 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
953 {
954         struct radeon_device *rdev = inode->i_private;
955         i_size_write(inode, rdev->mc.gtt_size);
956         filep->private_data = inode->i_private;
957         return 0;
958 }
959
960 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
961                                    size_t size, loff_t *pos)
962 {
963         struct radeon_device *rdev = f->private_data;
964         ssize_t result = 0;
965         int r;
966
967         while (size) {
968                 loff_t p = *pos / PAGE_SIZE;
969                 unsigned off = *pos & ~PAGE_MASK;
970                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
971                 struct page *page;
972                 void *ptr;
973
974                 if (p >= rdev->gart.num_cpu_pages)
975                         return result;
976
977                 page = rdev->gart.pages[p];
978                 if (page) {
979                         ptr = kmap(page);
980                         ptr += off;
981
982                         r = copy_to_user(buf, ptr, cur_size);
983                         kunmap(rdev->gart.pages[p]);
984                 } else
985                         r = clear_user(buf, cur_size);
986
987                 if (r)
988                         return -EFAULT;
989
990                 result += cur_size;
991                 buf += cur_size;
992                 *pos += cur_size;
993                 size -= cur_size;
994         }
995
996         return result;
997 }
998
999 static const struct file_operations radeon_ttm_gtt_fops = {
1000         .owner = THIS_MODULE,
1001         .open = radeon_ttm_gtt_open,
1002         .read = radeon_ttm_gtt_read,
1003         .llseek = default_llseek
1004 };
1005
1006 #endif
1007
1008 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1009 {
1010 #if defined(CONFIG_DEBUG_FS)
1011         unsigned count;
1012
1013         struct drm_minor *minor = rdev->ddev->primary;
1014         struct dentry *root = minor->debugfs_root;
1015
1016         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1017                                               root, rdev,
1018                                               &radeon_ttm_vram_fops);
1019
1020         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1021                                              root, rdev, &radeon_ttm_gtt_fops);
1022
1023         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1024
1025         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1026 #else
1027
1028         return 0;
1029 #endif
1030 }
1031
1032 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1033 {
1034 #if defined(CONFIG_DEBUG_FS)
1035
1036         debugfs_remove(rdev->mman.vram);
1037         rdev->mman.vram = NULL;
1038
1039         debugfs_remove(rdev->mman.gtt);
1040         rdev->mman.gtt = NULL;
1041 #endif
1042 }