6ccea51d40722f543593eae15764297d36393dcc
[sfrench/cifs-2.6.git] / drivers / gpu / drm / radeon / radeon_fb.c
1 /*
2  * Copyright © 2007 David Airlie
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *     David Airlie
25  */
26
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/slab.h>
31 #include <linux/vga_switcheroo.h>
32
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_crtc_helper.h>
35 #include <drm/drm_fb_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_framebuffer.h>
38 #include <drm/radeon_drm.h>
39
40 #include "radeon.h"
41
42 /* object hierarchy -
43  * this contains a helper + a radeon fb
44  * the helper contains a pointer to radeon framebuffer baseclass.
45  */
46 struct radeon_fbdev {
47         struct drm_fb_helper helper; /* must be first */
48         struct drm_framebuffer fb;
49         struct radeon_device *rdev;
50 };
51
52 static int
53 radeonfb_open(struct fb_info *info, int user)
54 {
55         struct radeon_fbdev *rfbdev = info->par;
56         struct radeon_device *rdev = rfbdev->rdev;
57         int ret = pm_runtime_get_sync(rdev->ddev->dev);
58
59         if (ret < 0 && ret != -EACCES) {
60                 pm_runtime_mark_last_busy(rdev->ddev->dev);
61                 pm_runtime_put_autosuspend(rdev->ddev->dev);
62                 return ret;
63         }
64         return 0;
65 }
66
67 static int
68 radeonfb_release(struct fb_info *info, int user)
69 {
70         struct radeon_fbdev *rfbdev = info->par;
71         struct radeon_device *rdev = rfbdev->rdev;
72
73         pm_runtime_mark_last_busy(rdev->ddev->dev);
74         pm_runtime_put_autosuspend(rdev->ddev->dev);
75         return 0;
76 }
77
78 static const struct fb_ops radeonfb_ops = {
79         .owner = THIS_MODULE,
80         DRM_FB_HELPER_DEFAULT_OPS,
81         .fb_open = radeonfb_open,
82         .fb_release = radeonfb_release,
83         .fb_fillrect = drm_fb_helper_cfb_fillrect,
84         .fb_copyarea = drm_fb_helper_cfb_copyarea,
85         .fb_imageblit = drm_fb_helper_cfb_imageblit,
86 };
87
88
89 int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
90 {
91         int aligned = width;
92         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
93         int pitch_mask = 0;
94
95         switch (cpp) {
96         case 1:
97                 pitch_mask = align_large ? 255 : 127;
98                 break;
99         case 2:
100                 pitch_mask = align_large ? 127 : 31;
101                 break;
102         case 3:
103         case 4:
104                 pitch_mask = align_large ? 63 : 15;
105                 break;
106         }
107
108         aligned += pitch_mask;
109         aligned &= ~pitch_mask;
110         return aligned * cpp;
111 }
112
113 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
114 {
115         struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
116         int ret;
117
118         ret = radeon_bo_reserve(rbo, false);
119         if (likely(ret == 0)) {
120                 radeon_bo_kunmap(rbo);
121                 radeon_bo_unpin(rbo);
122                 radeon_bo_unreserve(rbo);
123         }
124         drm_gem_object_put(gobj);
125 }
126
127 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
128                                          struct drm_mode_fb_cmd2 *mode_cmd,
129                                          struct drm_gem_object **gobj_p)
130 {
131         const struct drm_format_info *info;
132         struct radeon_device *rdev = rfbdev->rdev;
133         struct drm_gem_object *gobj = NULL;
134         struct radeon_bo *rbo = NULL;
135         bool fb_tiled = false; /* useful for testing */
136         u32 tiling_flags = 0;
137         int ret;
138         int aligned_size, size;
139         int height = mode_cmd->height;
140         u32 cpp;
141
142         info = drm_get_format_info(rdev->ddev, mode_cmd);
143         cpp = info->cpp[0];
144
145         /* need to align pitch with crtc limits */
146         mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
147                                                   fb_tiled);
148
149         if (rdev->family >= CHIP_R600)
150                 height = ALIGN(mode_cmd->height, 8);
151         size = mode_cmd->pitches[0] * height;
152         aligned_size = ALIGN(size, PAGE_SIZE);
153         ret = radeon_gem_object_create(rdev, aligned_size, 0,
154                                        RADEON_GEM_DOMAIN_VRAM,
155                                        0, true, &gobj);
156         if (ret) {
157                 pr_err("failed to allocate framebuffer (%d)\n", aligned_size);
158                 return -ENOMEM;
159         }
160         rbo = gem_to_radeon_bo(gobj);
161
162         if (fb_tiled)
163                 tiling_flags = RADEON_TILING_MACRO;
164
165 #ifdef __BIG_ENDIAN
166         switch (cpp) {
167         case 4:
168                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
169                 break;
170         case 2:
171                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
172                 break;
173         default:
174                 break;
175         }
176 #endif
177
178         if (tiling_flags) {
179                 ret = radeon_bo_set_tiling_flags(rbo,
180                                                  tiling_flags | RADEON_TILING_SURFACE,
181                                                  mode_cmd->pitches[0]);
182                 if (ret)
183                         dev_err(rdev->dev, "FB failed to set tiling flags\n");
184         }
185
186
187         ret = radeon_bo_reserve(rbo, false);
188         if (unlikely(ret != 0))
189                 goto out_unref;
190         /* Only 27 bit offset for legacy CRTC */
191         ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
192                                        ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
193                                        NULL);
194         if (ret) {
195                 radeon_bo_unreserve(rbo);
196                 goto out_unref;
197         }
198         if (fb_tiled)
199                 radeon_bo_check_tiling(rbo, 0, 0);
200         ret = radeon_bo_kmap(rbo, NULL);
201         radeon_bo_unreserve(rbo);
202         if (ret)
203                 goto out_unref;
204
205         *gobj_p = gobj;
206         return 0;
207 out_unref:
208         radeonfb_destroy_pinned_object(gobj);
209         *gobj_p = NULL;
210         return ret;
211 }
212
213 static int radeonfb_create(struct drm_fb_helper *helper,
214                            struct drm_fb_helper_surface_size *sizes)
215 {
216         struct radeon_fbdev *rfbdev =
217                 container_of(helper, struct radeon_fbdev, helper);
218         struct radeon_device *rdev = rfbdev->rdev;
219         struct fb_info *info;
220         struct drm_framebuffer *fb = NULL;
221         struct drm_mode_fb_cmd2 mode_cmd;
222         struct drm_gem_object *gobj = NULL;
223         struct radeon_bo *rbo = NULL;
224         int ret;
225         unsigned long tmp;
226
227         mode_cmd.width = sizes->surface_width;
228         mode_cmd.height = sizes->surface_height;
229
230         /* avivo can't scanout real 24bpp */
231         if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
232                 sizes->surface_bpp = 32;
233
234         mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
235                                                           sizes->surface_depth);
236
237         ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
238         if (ret) {
239                 DRM_ERROR("failed to create fbcon object %d\n", ret);
240                 return ret;
241         }
242
243         rbo = gem_to_radeon_bo(gobj);
244
245         /* okay we have an object now allocate the framebuffer */
246         info = drm_fb_helper_alloc_fbi(helper);
247         if (IS_ERR(info)) {
248                 ret = PTR_ERR(info);
249                 goto out;
250         }
251
252         /* radeon resume is fragile and needs a vt switch to help it along */
253         info->skip_vt_switch = false;
254
255         ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->fb, &mode_cmd, gobj);
256         if (ret) {
257                 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
258                 goto out;
259         }
260
261         fb = &rfbdev->fb;
262
263         /* setup helper */
264         rfbdev->helper.fb = fb;
265
266         memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
267
268         info->fbops = &radeonfb_ops;
269
270         tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
271         info->fix.smem_start = rdev->mc.aper_base + tmp;
272         info->fix.smem_len = radeon_bo_size(rbo);
273         info->screen_base = rbo->kptr;
274         info->screen_size = radeon_bo_size(rbo);
275
276         drm_fb_helper_fill_info(info, &rfbdev->helper, sizes);
277
278         /* setup aperture base/size for vesafb takeover */
279         info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
280         info->apertures->ranges[0].size = rdev->mc.aper_size;
281
282         /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
283
284         if (info->screen_base == NULL) {
285                 ret = -ENOSPC;
286                 goto out;
287         }
288
289         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
290         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
291         DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
292         DRM_INFO("fb depth is %d\n", fb->format->depth);
293         DRM_INFO("   pitch is %d\n", fb->pitches[0]);
294
295         vga_switcheroo_client_fb_set(rdev->pdev, info);
296         return 0;
297
298 out:
299         if (fb && ret) {
300                 drm_gem_object_put(gobj);
301                 drm_framebuffer_unregister_private(fb);
302                 drm_framebuffer_cleanup(fb);
303                 kfree(fb);
304         }
305         return ret;
306 }
307
308 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
309 {
310         struct drm_framebuffer *fb = &rfbdev->fb;
311
312         drm_fb_helper_unregister_fbi(&rfbdev->helper);
313
314         if (fb->obj[0]) {
315                 radeonfb_destroy_pinned_object(fb->obj[0]);
316                 fb->obj[0] = NULL;
317                 drm_framebuffer_unregister_private(fb);
318                 drm_framebuffer_cleanup(fb);
319         }
320         drm_fb_helper_fini(&rfbdev->helper);
321
322         return 0;
323 }
324
325 static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
326         .fb_probe = radeonfb_create,
327 };
328
329 int radeon_fbdev_init(struct radeon_device *rdev)
330 {
331         struct radeon_fbdev *rfbdev;
332         int bpp_sel = 32;
333         int ret;
334
335         /* don't enable fbdev if no connectors */
336         if (list_empty(&rdev->ddev->mode_config.connector_list))
337                 return 0;
338
339         /* select 8 bpp console on 8MB cards, or 16 bpp on RN50 or 32MB */
340         if (rdev->mc.real_vram_size <= (8*1024*1024))
341                 bpp_sel = 8;
342         else if (ASIC_IS_RN50(rdev) ||
343                  rdev->mc.real_vram_size <= (32*1024*1024))
344                 bpp_sel = 16;
345
346         rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
347         if (!rfbdev)
348                 return -ENOMEM;
349
350         rfbdev->rdev = rdev;
351         rdev->mode_info.rfbdev = rfbdev;
352
353         drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
354                               &radeon_fb_helper_funcs);
355
356         ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper);
357         if (ret)
358                 goto free;
359
360         /* disable all the possible outputs/crtcs before entering KMS mode */
361         drm_helper_disable_unused_functions(rdev->ddev);
362
363         ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
364         if (ret)
365                 goto fini;
366
367         return 0;
368
369 fini:
370         drm_fb_helper_fini(&rfbdev->helper);
371 free:
372         kfree(rfbdev);
373         return ret;
374 }
375
376 void radeon_fbdev_fini(struct radeon_device *rdev)
377 {
378         if (!rdev->mode_info.rfbdev)
379                 return;
380
381         radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
382         kfree(rdev->mode_info.rfbdev);
383         rdev->mode_info.rfbdev = NULL;
384 }
385
386 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
387 {
388         if (rdev->mode_info.rfbdev)
389                 drm_fb_helper_set_suspend(&rdev->mode_info.rfbdev->helper, state);
390 }
391
392 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
393 {
394         if (!rdev->mode_info.rfbdev)
395                 return false;
396
397         if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->fb.obj[0]))
398                 return true;
399         return false;
400 }