1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
9 #include <linux/clk-provider.h>
10 #include <linux/delay.h>
19 const struct msm_dsi_phy_cfg *cfg;
22 #define hw_clk_to_pll(x) container_of(x, struct msm_dsi_pll, clk_hw)
24 static inline void pll_write(void __iomem *reg, u32 data)
26 msm_writel(data, reg);
29 static inline u32 pll_read(const void __iomem *reg)
31 return msm_readl(reg);
34 static inline void pll_write_udelay(void __iomem *reg, u32 data, u32 delay_us)
40 static inline void pll_write_ndelay(void __iomem *reg, u32 data, u32 delay_ns)
42 pll_write((reg), data);
47 * DSI PLL Helper functions
51 long msm_dsi_pll_helper_clk_round_rate(struct clk_hw *hw,
52 unsigned long rate, unsigned long *parent_rate);
53 int msm_dsi_pll_helper_clk_prepare(struct clk_hw *hw);
54 void msm_dsi_pll_helper_clk_unprepare(struct clk_hw *hw);
56 #endif /* __DSI_PLL_H__ */