1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Red Hat
4 * Author: Rob Clark <robdclark@gmail.com>
7 #include <linux/delay.h>
9 #include <drm/drm_vblank.h>
16 static int mdp4_hw_init(struct msm_kms *kms)
18 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
19 struct drm_device *dev = mdp4_kms->dev;
23 pm_runtime_get_sync(dev->dev);
25 if (mdp4_kms->rev > 1) {
26 mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER0, 0x0707ffff);
27 mdp4_write(mdp4_kms, REG_MDP4_CS_CONTROLLER1, 0x03073f3f);
30 mdp4_write(mdp4_kms, REG_MDP4_PORTMAP_MODE, 0x3);
32 /* max read pending cmd config, 3 pending requests: */
33 mdp4_write(mdp4_kms, REG_MDP4_READ_CNFG, 0x02222);
35 clk = clk_get_rate(mdp4_kms->clk);
37 if ((mdp4_kms->rev >= 1) || (clk >= 90000000)) {
38 dmap_cfg = 0x47; /* 16 bytes-burst x 8 req */
39 vg_cfg = 0x47; /* 16 bytes-burs x 8 req */
41 dmap_cfg = 0x27; /* 8 bytes-burst x 8 req */
42 vg_cfg = 0x43; /* 16 bytes-burst x 4 req */
45 DBG("fetch config: dmap=%02x, vg=%02x", dmap_cfg, vg_cfg);
47 mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_P), dmap_cfg);
48 mdp4_write(mdp4_kms, REG_MDP4_DMA_FETCH_CONFIG(DMA_E), dmap_cfg);
50 mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG1), vg_cfg);
51 mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(VG2), vg_cfg);
52 mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB1), vg_cfg);
53 mdp4_write(mdp4_kms, REG_MDP4_PIPE_FETCH_CONFIG(RGB2), vg_cfg);
55 if (mdp4_kms->rev >= 2)
56 mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG_UPDATE_METHOD, 1);
57 mdp4_write(mdp4_kms, REG_MDP4_LAYERMIXER_IN_CFG, 0);
59 /* disable CSC matrix / YUV by default: */
60 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG1), 0);
61 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(VG2), 0);
62 mdp4_write(mdp4_kms, REG_MDP4_DMA_P_OP_MODE, 0);
63 mdp4_write(mdp4_kms, REG_MDP4_DMA_S_OP_MODE, 0);
64 mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(1), 0);
65 mdp4_write(mdp4_kms, REG_MDP4_OVLP_CSC_CONFIG(2), 0);
67 if (mdp4_kms->rev > 1)
68 mdp4_write(mdp4_kms, REG_MDP4_RESET_STATUS, 1);
70 pm_runtime_put_sync(dev->dev);
75 static void mdp4_enable_commit(struct msm_kms *kms)
77 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
78 mdp4_enable(mdp4_kms);
81 static void mdp4_disable_commit(struct msm_kms *kms)
83 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
84 mdp4_disable(mdp4_kms);
87 static void mdp4_flush_commit(struct msm_kms *kms, unsigned crtc_mask)
92 static void mdp4_wait_flush(struct msm_kms *kms, unsigned crtc_mask)
94 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
95 struct drm_crtc *crtc;
97 for_each_crtc_mask(mdp4_kms->dev, crtc, crtc_mask)
98 mdp4_crtc_wait_for_commit_done(crtc);
101 static void mdp4_complete_commit(struct msm_kms *kms, unsigned crtc_mask)
105 static long mdp4_round_pixclk(struct msm_kms *kms, unsigned long rate,
106 struct drm_encoder *encoder)
108 /* if we had >1 encoder, we'd need something more clever: */
109 switch (encoder->encoder_type) {
110 case DRM_MODE_ENCODER_TMDS:
111 return mdp4_dtv_round_pixclk(encoder, rate);
112 case DRM_MODE_ENCODER_LVDS:
113 case DRM_MODE_ENCODER_DSI:
119 static void mdp4_destroy(struct msm_kms *kms)
121 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
122 struct device *dev = mdp4_kms->dev->dev;
123 struct msm_gem_address_space *aspace = kms->aspace;
125 if (mdp4_kms->blank_cursor_iova)
126 msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace);
127 drm_gem_object_put(mdp4_kms->blank_cursor_bo);
130 aspace->mmu->funcs->detach(aspace->mmu);
131 msm_gem_address_space_put(aspace);
134 if (mdp4_kms->rpm_enabled)
135 pm_runtime_disable(dev);
137 mdp_kms_destroy(&mdp4_kms->base);
142 static const struct mdp_kms_funcs kms_funcs = {
144 .hw_init = mdp4_hw_init,
145 .irq_preinstall = mdp4_irq_preinstall,
146 .irq_postinstall = mdp4_irq_postinstall,
147 .irq_uninstall = mdp4_irq_uninstall,
149 .enable_vblank = mdp4_enable_vblank,
150 .disable_vblank = mdp4_disable_vblank,
151 .enable_commit = mdp4_enable_commit,
152 .disable_commit = mdp4_disable_commit,
153 .flush_commit = mdp4_flush_commit,
154 .wait_flush = mdp4_wait_flush,
155 .complete_commit = mdp4_complete_commit,
156 .get_format = mdp_get_format,
157 .round_pixclk = mdp4_round_pixclk,
158 .destroy = mdp4_destroy,
160 .set_irqmask = mdp4_set_irqmask,
163 int mdp4_disable(struct mdp4_kms *mdp4_kms)
167 clk_disable_unprepare(mdp4_kms->clk);
168 clk_disable_unprepare(mdp4_kms->pclk);
169 clk_disable_unprepare(mdp4_kms->lut_clk);
170 clk_disable_unprepare(mdp4_kms->axi_clk);
175 int mdp4_enable(struct mdp4_kms *mdp4_kms)
179 clk_prepare_enable(mdp4_kms->clk);
180 clk_prepare_enable(mdp4_kms->pclk);
181 clk_prepare_enable(mdp4_kms->lut_clk);
182 clk_prepare_enable(mdp4_kms->axi_clk);
188 static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms,
191 struct drm_device *dev = mdp4_kms->dev;
192 struct msm_drm_private *priv = dev->dev_private;
193 struct drm_encoder *encoder;
194 struct drm_connector *connector;
195 struct device_node *panel_node;
200 case DRM_MODE_ENCODER_LVDS:
202 * bail out early if there is no panel node (no need to
203 * initialize LCDC encoder and LVDS connector)
205 panel_node = of_graph_get_remote_node(dev->dev->of_node, 0, 0);
209 encoder = mdp4_lcdc_encoder_init(dev, panel_node);
210 if (IS_ERR(encoder)) {
211 DRM_DEV_ERROR(dev->dev, "failed to construct LCDC encoder\n");
212 of_node_put(panel_node);
213 return PTR_ERR(encoder);
216 /* LCDC can be hooked to DMA_P (TODO: Add DMA_S later?) */
217 encoder->possible_crtcs = 1 << DMA_P;
219 connector = mdp4_lvds_connector_init(dev, panel_node, encoder);
220 if (IS_ERR(connector)) {
221 DRM_DEV_ERROR(dev->dev, "failed to initialize LVDS connector\n");
222 of_node_put(panel_node);
223 return PTR_ERR(connector);
227 case DRM_MODE_ENCODER_TMDS:
228 encoder = mdp4_dtv_encoder_init(dev);
229 if (IS_ERR(encoder)) {
230 DRM_DEV_ERROR(dev->dev, "failed to construct DTV encoder\n");
231 return PTR_ERR(encoder);
234 /* DTV can be hooked to DMA_E: */
235 encoder->possible_crtcs = 1 << 1;
238 /* Construct bridge/connector for HDMI: */
239 ret = msm_hdmi_modeset_init(priv->hdmi, dev, encoder);
241 DRM_DEV_ERROR(dev->dev, "failed to initialize HDMI: %d\n", ret);
247 case DRM_MODE_ENCODER_DSI:
248 /* only DSI1 supported for now */
251 if (!priv->dsi[dsi_id])
254 encoder = mdp4_dsi_encoder_init(dev);
255 if (IS_ERR(encoder)) {
256 ret = PTR_ERR(encoder);
257 DRM_DEV_ERROR(dev->dev,
258 "failed to construct DSI encoder: %d\n", ret);
262 /* TODO: Add DMA_S later? */
263 encoder->possible_crtcs = 1 << DMA_P;
265 ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder);
267 DRM_DEV_ERROR(dev->dev, "failed to initialize DSI: %d\n",
274 DRM_DEV_ERROR(dev->dev, "Invalid or unsupported interface\n");
281 static int modeset_init(struct mdp4_kms *mdp4_kms)
283 struct drm_device *dev = mdp4_kms->dev;
284 struct msm_drm_private *priv = dev->dev_private;
285 struct drm_plane *plane;
286 struct drm_crtc *crtc;
288 static const enum mdp4_pipe rgb_planes[] = {
291 static const enum mdp4_pipe vg_planes[] = {
294 static const enum mdp4_dma mdp4_crtcs[] = {
297 static const char * const mdp4_crtc_names[] = {
300 static const int mdp4_intfs[] = {
301 DRM_MODE_ENCODER_LVDS,
302 DRM_MODE_ENCODER_DSI,
303 DRM_MODE_ENCODER_TMDS,
306 /* construct non-private planes: */
307 for (i = 0; i < ARRAY_SIZE(vg_planes); i++) {
308 plane = mdp4_plane_init(dev, vg_planes[i], false);
310 DRM_DEV_ERROR(dev->dev,
311 "failed to construct plane for VG%d\n", i + 1);
312 ret = PTR_ERR(plane);
317 for (i = 0; i < ARRAY_SIZE(mdp4_crtcs); i++) {
318 plane = mdp4_plane_init(dev, rgb_planes[i], true);
320 DRM_DEV_ERROR(dev->dev,
321 "failed to construct plane for RGB%d\n", i + 1);
322 ret = PTR_ERR(plane);
326 crtc = mdp4_crtc_init(dev, plane, priv->num_crtcs, i,
329 DRM_DEV_ERROR(dev->dev, "failed to construct crtc for %s\n",
339 * we currently set up two relatively fixed paths:
341 * LCDC/LVDS path: RGB1 -> DMA_P -> LCDC -> LVDS
343 * DSI path: RGB1 -> DMA_P -> DSI1 -> DSI Panel
345 * DTV/HDMI path: RGB2 -> DMA_E -> DTV -> HDMI
348 for (i = 0; i < ARRAY_SIZE(mdp4_intfs); i++) {
349 ret = mdp4_modeset_init_intf(mdp4_kms, mdp4_intfs[i]);
351 DRM_DEV_ERROR(dev->dev, "failed to initialize intf: %d, %d\n",
363 static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
364 u32 *major, u32 *minor)
366 struct drm_device *dev = mdp4_kms->dev;
369 mdp4_enable(mdp4_kms);
370 version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);
371 mdp4_disable(mdp4_kms);
373 *major = FIELD(version, MDP4_VERSION_MAJOR);
374 *minor = FIELD(version, MDP4_VERSION_MINOR);
376 DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
379 static int mdp4_kms_init(struct drm_device *dev)
381 struct platform_device *pdev = to_platform_device(dev->dev);
382 struct msm_drm_private *priv = dev->dev_private;
383 struct mdp4_kms *mdp4_kms;
384 struct msm_kms *kms = NULL;
386 struct msm_gem_address_space *aspace;
389 unsigned long max_clk;
391 /* TODO: Chips that aren't apq8064 have a 200 Mhz max_clk */
394 mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
396 DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
400 ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
402 DRM_DEV_ERROR(dev->dev, "failed to init kms\n");
406 priv->kms = &mdp4_kms->base.base;
411 mdp4_kms->mmio = msm_ioremap(pdev, NULL);
412 if (IS_ERR(mdp4_kms->mmio)) {
413 ret = PTR_ERR(mdp4_kms->mmio);
417 irq = platform_get_irq(pdev, 0);
425 /* NOTE: driver for this regulator still missing upstream.. use
426 * _get_exclusive() and ignore the error if it does not exist
427 * (and hope that the bootloader left it on for us)
429 mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
430 if (IS_ERR(mdp4_kms->vdd))
431 mdp4_kms->vdd = NULL;
434 ret = regulator_enable(mdp4_kms->vdd);
436 DRM_DEV_ERROR(dev->dev, "failed to enable regulator vdd: %d\n", ret);
441 mdp4_kms->clk = devm_clk_get(&pdev->dev, "core_clk");
442 if (IS_ERR(mdp4_kms->clk)) {
443 DRM_DEV_ERROR(dev->dev, "failed to get core_clk\n");
444 ret = PTR_ERR(mdp4_kms->clk);
448 mdp4_kms->pclk = devm_clk_get(&pdev->dev, "iface_clk");
449 if (IS_ERR(mdp4_kms->pclk))
450 mdp4_kms->pclk = NULL;
452 mdp4_kms->axi_clk = devm_clk_get(&pdev->dev, "bus_clk");
453 if (IS_ERR(mdp4_kms->axi_clk)) {
454 DRM_DEV_ERROR(dev->dev, "failed to get axi_clk\n");
455 ret = PTR_ERR(mdp4_kms->axi_clk);
459 clk_set_rate(mdp4_kms->clk, max_clk);
461 read_mdp_hw_revision(mdp4_kms, &major, &minor);
464 DRM_DEV_ERROR(dev->dev, "unexpected MDP version: v%d.%d\n",
470 mdp4_kms->rev = minor;
472 if (mdp4_kms->rev >= 2) {
473 mdp4_kms->lut_clk = devm_clk_get(&pdev->dev, "lut_clk");
474 if (IS_ERR(mdp4_kms->lut_clk)) {
475 DRM_DEV_ERROR(dev->dev, "failed to get lut_clk\n");
476 ret = PTR_ERR(mdp4_kms->lut_clk);
479 clk_set_rate(mdp4_kms->lut_clk, max_clk);
482 pm_runtime_enable(dev->dev);
483 mdp4_kms->rpm_enabled = true;
485 /* make sure things are off before attaching iommu (bootloader could
486 * have left things on, in which case we'll start getting faults if
489 mdp4_enable(mdp4_kms);
490 mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
491 mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0);
492 mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
493 mdp4_disable(mdp4_kms);
496 mmu = msm_iommu_new(&pdev->dev, 0);
501 DRM_DEV_INFO(dev->dev, "no iommu, fallback to phys "
502 "contig buffers for scanout\n");
505 aspace = msm_gem_address_space_create(mmu,
506 "mdp4", 0x1000, 0x100000000 - 0x1000);
508 if (IS_ERR(aspace)) {
510 mmu->funcs->destroy(mmu);
511 ret = PTR_ERR(aspace);
515 kms->aspace = aspace;
518 ret = modeset_init(mdp4_kms);
520 DRM_DEV_ERROR(dev->dev, "modeset_init failed: %d\n", ret);
524 mdp4_kms->blank_cursor_bo = msm_gem_new(dev, SZ_16K, MSM_BO_WC | MSM_BO_SCANOUT);
525 if (IS_ERR(mdp4_kms->blank_cursor_bo)) {
526 ret = PTR_ERR(mdp4_kms->blank_cursor_bo);
527 DRM_DEV_ERROR(dev->dev, "could not allocate blank-cursor bo: %d\n", ret);
528 mdp4_kms->blank_cursor_bo = NULL;
532 ret = msm_gem_get_and_pin_iova(mdp4_kms->blank_cursor_bo, kms->aspace,
533 &mdp4_kms->blank_cursor_iova);
535 DRM_DEV_ERROR(dev->dev, "could not pin blank-cursor bo: %d\n", ret);
539 dev->mode_config.min_width = 0;
540 dev->mode_config.min_height = 0;
541 dev->mode_config.max_width = 2048;
542 dev->mode_config.max_height = 2048;
553 static const struct dev_pm_ops mdp4_pm_ops = {
554 .prepare = msm_pm_prepare,
555 .complete = msm_pm_complete,
558 static int mdp4_probe(struct platform_device *pdev)
560 return msm_drv_probe(&pdev->dev, mdp4_kms_init);
563 static int mdp4_remove(struct platform_device *pdev)
565 component_master_del(&pdev->dev, &msm_drm_ops);
570 static const struct of_device_id mdp4_dt_match[] = {
571 { .compatible = "qcom,mdp4" },
574 MODULE_DEVICE_TABLE(of, mdp4_dt_match);
576 static struct platform_driver mdp4_platform_driver = {
578 .remove = mdp4_remove,
579 .shutdown = msm_drv_shutdown,
582 .of_match_table = mdp4_dt_match,
587 void __init msm_mdp4_register(void)
589 platform_driver_register(&mdp4_platform_driver);
592 void __exit msm_mdp4_unregister(void)
594 platform_driver_unregister(&mdp4_platform_driver);