drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
   4  */
   5
   6 #include "dpu_writeback.h"
   7
   8 static int dpu_wb_conn_get_modes(struct drm_connector *connector)
   9 {
  10         struct drm_device *dev = connector->dev;
  11         struct msm_drm_private *priv = dev->dev_private;
  12         struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
  13
  14         /*
  15          * We should ideally be limiting the modes only to the maxlinewidth but
  16          * on some chipsets this will allow even 4k modes to be added which will
  17          * fail the per SSPP bandwidth checks. So, till we have dual-SSPP support
  18          * and source split support added lets limit the modes based on max_mixer_width
  19          * as 4K modes can then be supported.
  20          */
  21         return drm_add_modes_noedid(connector, dpu_kms->catalog->caps->max_mixer_width,
  22                         dev->mode_config.max_height);
  23 }
  24
  25 static const struct drm_connector_funcs dpu_wb_conn_funcs = {
  26         .reset = drm_atomic_helper_connector_reset,
  27         .fill_modes = drm_helper_probe_single_connector_modes,
  28         .destroy = drm_connector_cleanup,
  29         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  30         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  31 };
  32
  33 static int dpu_wb_conn_prepare_job(struct drm_writeback_connector *connector,
  34                 struct drm_writeback_job *job)
  35 {
  36
  37         struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
  38
  39         if (!job->fb)
  40                 return 0;
  41
  42         dpu_encoder_prepare_wb_job(dpu_wb_conn->wb_enc, job);
  43
  44         return 0;
  45 }
  46
  47 static void dpu_wb_conn_cleanup_job(struct drm_writeback_connector *connector,
  48                 struct drm_writeback_job *job)
  49 {
  50         struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(connector);
  51
  52         if (!job->fb)
  53                 return;
  54
  55         dpu_encoder_cleanup_wb_job(dpu_wb_conn->wb_enc, job);
  56 }
  57
  58 static const struct drm_connector_helper_funcs dpu_wb_conn_helper_funcs = {
  59         .get_modes = dpu_wb_conn_get_modes,
  60         .prepare_writeback_job = dpu_wb_conn_prepare_job,
  61         .cleanup_writeback_job = dpu_wb_conn_cleanup_job,
  62 };
  63
  64 int dpu_writeback_init(struct drm_device *dev, struct drm_encoder *enc,
  65                 const u32 *format_list, u32 num_formats)
  66 {
  67         struct dpu_wb_connector *dpu_wb_conn;
  68         int rc = 0;
  69
  70         dpu_wb_conn = devm_kzalloc(dev->dev, sizeof(*dpu_wb_conn), GFP_KERNEL);
  71
  72         drm_connector_helper_add(&dpu_wb_conn->base.base, &dpu_wb_conn_helper_funcs);
  73
  74         /* DPU initializes the encoder and sets it up completely for writeback
  75          * cases and hence should use the new API drm_writeback_connector_init_with_encoder
  76          * to initialize the writeback connector
  77          */
  78         rc = drm_writeback_connector_init_with_encoder(dev, &dpu_wb_conn->base, enc,
  79                         &dpu_wb_conn_funcs, format_list, num_formats);
  80
  81         if (!rc)
  82                 dpu_wb_conn->wb_enc = enc;
  83
  84         return rc;
  85 }