drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/drm_atomic_helper.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include <drm/i915_drm.h>
  38
  39 #include "i915_drv.h"
  40 #include "intel_connector.h"
  41 #include "intel_drv.h"
  42 #include "intel_panel.h"
  43 #include "intel_sdvo.h"
  44 #include "intel_sdvo_regs.h"
  45
  46 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  47 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  48 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  49 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  50
  51 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  52                         SDVO_TV_MASK)
  53
  54 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  55 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  56 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  57 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  58 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  59
  60
  61 static const char * const tv_format_names[] = {
  62         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  63         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  64         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  65         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  66         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  67         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  68         "SECAM_60"
  69 };
  70
  71 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  72
  73 struct intel_sdvo {
  74         struct intel_encoder base;
  75
  76         struct i2c_adapter *i2c;
  77         u8 slave_addr;
  78
  79         struct i2c_adapter ddc;
  80
  81         /* Register for the SDVO device: SDVOB or SDVOC */
  82         i915_reg_t sdvo_reg;
  83
  84         /* Active outputs controlled by this SDVO output */
  85         u16 controlled_output;
  86
  87         /*
  88          * Capabilities of the SDVO device returned by
  89          * intel_sdvo_get_capabilities()
  90          */
  91         struct intel_sdvo_caps caps;
  92
  93         /* Pixel clock limitations reported by the SDVO device, in kHz */
  94         int pixel_clock_min, pixel_clock_max;
  95
  96         /*
  97         * For multiple function SDVO device,
  98         * this is for current attached outputs.
  99         */
 100         u16 attached_output;
 101
 102         /*
 103          * Hotplug activation bits for this device
 104          */
 105         u16 hotplug_active;
 106
 107         enum port port;
 108
 109         bool has_hdmi_monitor;
 110         bool has_hdmi_audio;
 111
 112         /* DDC bus used by this SDVO encoder */
 113         u8 ddc_bus;
 114
 115         /*
 116          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 117          */
 118         u8 dtd_sdvo_flags;
 119 };
 120
 121 struct intel_sdvo_connector {
 122         struct intel_connector base;
 123
 124         /* Mark the type of connector */
 125         u16 output_flag;
 126
 127         /* This contains all current supported TV format */
 128         u8 tv_format_supported[TV_FORMAT_NUM];
 129         int   format_supported_num;
 130         struct drm_property *tv_format;
 131
 132         /* add the property for the SDVO-TV */
 133         struct drm_property *left;
 134         struct drm_property *right;
 135         struct drm_property *top;
 136         struct drm_property *bottom;
 137         struct drm_property *hpos;
 138         struct drm_property *vpos;
 139         struct drm_property *contrast;
 140         struct drm_property *saturation;
 141         struct drm_property *hue;
 142         struct drm_property *sharpness;
 143         struct drm_property *flicker_filter;
 144         struct drm_property *flicker_filter_adaptive;
 145         struct drm_property *flicker_filter_2d;
 146         struct drm_property *tv_chroma_filter;
 147         struct drm_property *tv_luma_filter;
 148         struct drm_property *dot_crawl;
 149
 150         /* add the property for the SDVO-TV/LVDS */
 151         struct drm_property *brightness;
 152
 153         /* this is to get the range of margin.*/
 154         u32 max_hscan, max_vscan;
 155
 156         /**
 157          * This is set if we treat the device as HDMI, instead of DVI.
 158          */
 159         bool is_hdmi;
 160 };
 161
 162 struct intel_sdvo_connector_state {
 163         /* base.base: tv.saturation/contrast/hue/brightness */
 164         struct intel_digital_connector_state base;
 165
 166         struct {
 167                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 168                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 169                 unsigned chroma_filter, luma_filter, dot_crawl;
 170         } tv;
 171 };
 172
 173 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 174 {
 175         return container_of(encoder, struct intel_sdvo, base);
 176 }
 177
 178 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 179 {
 180         return to_sdvo(intel_attached_encoder(connector));
 181 }
 182
 183 static struct intel_sdvo_connector *
 184 to_intel_sdvo_connector(struct drm_connector *connector)
 185 {
 186         return container_of(connector, struct intel_sdvo_connector, base.base);
 187 }
 188
 189 #define to_intel_sdvo_connector_state(conn_state) \
 190         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 191
 192 static bool
 193 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 194 static bool
 195 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 196                               struct intel_sdvo_connector *intel_sdvo_connector,
 197                               int type);
 198 static bool
 199 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 200                                    struct intel_sdvo_connector *intel_sdvo_connector);
 201
 202 /*
 203  * Writes the SDVOB or SDVOC with the given value, but always writes both
 204  * SDVOB and SDVOC to work around apparent hardware issues (according to
 205  * comments in the BIOS).
 206  */
 207 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 208 {
 209         struct drm_device *dev = intel_sdvo->base.base.dev;
 210         struct drm_i915_private *dev_priv = to_i915(dev);
 211         u32 bval = val, cval = val;
 212         int i;
 213
 214         if (HAS_PCH_SPLIT(dev_priv)) {
 215                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 216                 POSTING_READ(intel_sdvo->sdvo_reg);
 217                 /*
 218                  * HW workaround, need to write this twice for issue
 219                  * that may result in first write getting masked.
 220                  */
 221                 if (HAS_PCH_IBX(dev_priv)) {
 222                         I915_WRITE(intel_sdvo->sdvo_reg, val);
 223                         POSTING_READ(intel_sdvo->sdvo_reg);
 224                 }
 225                 return;
 226         }
 227
 228         if (intel_sdvo->port == PORT_B)
 229                 cval = I915_READ(GEN3_SDVOC);
 230         else
 231                 bval = I915_READ(GEN3_SDVOB);
 232
 233         /*
 234          * Write the registers twice for luck. Sometimes,
 235          * writing them only once doesn't appear to 'stick'.
 236          * The BIOS does this too. Yay, magic
 237          */
 238         for (i = 0; i < 2; i++) {
 239                 I915_WRITE(GEN3_SDVOB, bval);
 240                 POSTING_READ(GEN3_SDVOB);
 241
 242                 I915_WRITE(GEN3_SDVOC, cval);
 243                 POSTING_READ(GEN3_SDVOC);
 244         }
 245 }
 246
 247 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 248 {
 249         struct i2c_msg msgs[] = {
 250                 {
 251                         .addr = intel_sdvo->slave_addr,
 252                         .flags = 0,
 253                         .len = 1,
 254                         .buf = &addr,
 255                 },
 256                 {
 257                         .addr = intel_sdvo->slave_addr,
 258                         .flags = I2C_M_RD,
 259                         .len = 1,
 260                         .buf = ch,
 261                 }
 262         };
 263         int ret;
 264
 265         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 266                 return true;
 267
 268         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 269         return false;
 270 }
 271
 272 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 273 /** Mapping of command numbers to names, for debug output */
 274 static const struct _sdvo_cmd_name {
 275         u8 cmd;
 276         const char *name;
 277 } __attribute__ ((packed)) sdvo_cmd_names[] = {
 278         SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 279         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 280         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 281         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 282         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 283         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 284         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 285         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 286         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 287         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 288         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 289         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 290         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 291         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 292         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 293         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 294         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 295         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 296         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 297         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 298         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 299         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 300         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 301         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 302         SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 303         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 304         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 305         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 306         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 307         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 308         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 309         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 310         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 311         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 312         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 313         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 314         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 315         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 316         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 317         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 318         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 319         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 320         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 321
 322         /* Add the op code for SDVO enhancements */
 323         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 324         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 325         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 326         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 327         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 328         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 329         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 330         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 331         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 332         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 333         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 334         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 335         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 336         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 337         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 338         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 339         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 340         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 341         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 342         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 343         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 344         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 345         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 346         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 347         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 348         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 349         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 350         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 351         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 352         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 353         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 354         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 355         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 356         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 357         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 358         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 359         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 360         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 361         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 362         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 363         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 364         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 365         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 367
 368         /* HDMI op code */
 369         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 370         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 371         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 372         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 373         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 374         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 375         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 376         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 377         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 378         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 379         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 380         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 381         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 382         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 383         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 384         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 385         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 386         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 387         SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 388         SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 389 };
 390
 391 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 392
 393 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 394                                    const void *args, int args_len)
 395 {
 396         int i, pos = 0;
 397 #define BUF_LEN 256
 398         char buffer[BUF_LEN];
 399
 400 #define BUF_PRINT(args...) \
 401         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 402
 403
 404         for (i = 0; i < args_len; i++) {
 405                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 406         }
 407         for (; i < 8; i++) {
 408                 BUF_PRINT("   ");
 409         }
 410         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 411                 if (cmd == sdvo_cmd_names[i].cmd) {
 412                         BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
 413                         break;
 414                 }
 415         }
 416         if (i == ARRAY_SIZE(sdvo_cmd_names)) {
 417                 BUF_PRINT("(%02X)", cmd);
 418         }
 419         BUG_ON(pos >= BUF_LEN - 1);
 420 #undef BUF_PRINT
 421 #undef BUF_LEN
 422
 423         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 424 }
 425
 426 static const char * const cmd_status_names[] = {
 427         "Power on",
 428         "Success",
 429         "Not supported",
 430         "Invalid arg",
 431         "Pending",
 432         "Target not specified",
 433         "Scaling not supported"
 434 };
 435
 436 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 437                                    const void *args, int args_len,
 438                                    bool unlocked)
 439 {
 440         u8 *buf, status;
 441         struct i2c_msg *msgs;
 442         int i, ret = true;
 443
 444         /* Would be simpler to allocate both in one go ? */
 445         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 446         if (!buf)
 447                 return false;
 448
 449         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 450         if (!msgs) {
 451                 kfree(buf);
 452                 return false;
 453         }
 454
 455         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 456
 457         for (i = 0; i < args_len; i++) {
 458                 msgs[i].addr = intel_sdvo->slave_addr;
 459                 msgs[i].flags = 0;
 460                 msgs[i].len = 2;
 461                 msgs[i].buf = buf + 2 *i;
 462                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 463                 buf[2*i + 1] = ((u8*)args)[i];
 464         }
 465         msgs[i].addr = intel_sdvo->slave_addr;
 466         msgs[i].flags = 0;
 467         msgs[i].len = 2;
 468         msgs[i].buf = buf + 2*i;
 469         buf[2*i + 0] = SDVO_I2C_OPCODE;
 470         buf[2*i + 1] = cmd;
 471
 472         /* the following two are to read the response */
 473         status = SDVO_I2C_CMD_STATUS;
 474         msgs[i+1].addr = intel_sdvo->slave_addr;
 475         msgs[i+1].flags = 0;
 476         msgs[i+1].len = 1;
 477         msgs[i+1].buf = &status;
 478
 479         msgs[i+2].addr = intel_sdvo->slave_addr;
 480         msgs[i+2].flags = I2C_M_RD;
 481         msgs[i+2].len = 1;
 482         msgs[i+2].buf = &status;
 483
 484         if (unlocked)
 485                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 486         else
 487                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 488         if (ret < 0) {
 489                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 490                 ret = false;
 491                 goto out;
 492         }
 493         if (ret != i+3) {
 494                 /* failure in I2C transfer */
 495                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 496                 ret = false;
 497         }
 498
 499 out:
 500         kfree(msgs);
 501         kfree(buf);
 502         return ret;
 503 }
 504
 505 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 506                                  const void *args, int args_len)
 507 {
 508         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 509 }
 510
 511 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 512                                      void *response, int response_len)
 513 {
 514         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 515         u8 status;
 516         int i, pos = 0;
 517 #define BUF_LEN 256
 518         char buffer[BUF_LEN];
 519
 520
 521         /*
 522          * The documentation states that all commands will be
 523          * processed within 15µs, and that we need only poll
 524          * the status byte a maximum of 3 times in order for the
 525          * command to be complete.
 526          *
 527          * Check 5 times in case the hardware failed to read the docs.
 528          *
 529          * Also beware that the first response by many devices is to
 530          * reply PENDING and stall for time. TVs are notorious for
 531          * requiring longer than specified to complete their replies.
 532          * Originally (in the DDX long ago), the delay was only ever 15ms
 533          * with an additional delay of 30ms applied for TVs added later after
 534          * many experiments. To accommodate both sets of delays, we do a
 535          * sequence of slow checks if the device is falling behind and fails
 536          * to reply within 5*15µs.
 537          */
 538         if (!intel_sdvo_read_byte(intel_sdvo,
 539                                   SDVO_I2C_CMD_STATUS,
 540                                   &status))
 541                 goto log_fail;
 542
 543         while ((status == SDVO_CMD_STATUS_PENDING ||
 544                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 545                 if (retry < 10)
 546                         msleep(15);
 547                 else
 548                         udelay(15);
 549
 550                 if (!intel_sdvo_read_byte(intel_sdvo,
 551                                           SDVO_I2C_CMD_STATUS,
 552                                           &status))
 553                         goto log_fail;
 554         }
 555
 556 #define BUF_PRINT(args...) \
 557         pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
 558
 559         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 560                 BUF_PRINT("(%s)", cmd_status_names[status]);
 561         else
 562                 BUF_PRINT("(??? %d)", status);
 563
 564         if (status != SDVO_CMD_STATUS_SUCCESS)
 565                 goto log_fail;
 566
 567         /* Read the command response */
 568         for (i = 0; i < response_len; i++) {
 569                 if (!intel_sdvo_read_byte(intel_sdvo,
 570                                           SDVO_I2C_RETURN_0 + i,
 571                                           &((u8 *)response)[i]))
 572                         goto log_fail;
 573                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 574         }
 575         BUG_ON(pos >= BUF_LEN - 1);
 576 #undef BUF_PRINT
 577 #undef BUF_LEN
 578
 579         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 580         return true;
 581
 582 log_fail:
 583         DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
 584         return false;
 585 }
 586
 587 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 588 {
 589         if (adjusted_mode->crtc_clock >= 100000)
 590                 return 1;
 591         else if (adjusted_mode->crtc_clock >= 50000)
 592                 return 2;
 593         else
 594                 return 4;
 595 }
 596
 597 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 598                                                 u8 ddc_bus)
 599 {
 600         /* This must be the immediately preceding write before the i2c xfer */
 601         return __intel_sdvo_write_cmd(intel_sdvo,
 602                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 603                                       &ddc_bus, 1, false);
 604 }
 605
 606 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 607 {
 608         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 609                 return false;
 610
 611         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 612 }
 613
 614 static bool
 615 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 616 {
 617         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 618                 return false;
 619
 620         return intel_sdvo_read_response(intel_sdvo, value, len);
 621 }
 622
 623 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 624 {
 625         struct intel_sdvo_set_target_input_args targets = {0};
 626         return intel_sdvo_set_value(intel_sdvo,
 627                                     SDVO_CMD_SET_TARGET_INPUT,
 628                                     &targets, sizeof(targets));
 629 }
 630
 631 /*
 632  * Return whether each input is trained.
 633  *
 634  * This function is making an assumption about the layout of the response,
 635  * which should be checked against the docs.
 636  */
 637 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 638 {
 639         struct intel_sdvo_get_trained_inputs_response response;
 640
 641         BUILD_BUG_ON(sizeof(response) != 1);
 642         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 643                                   &response, sizeof(response)))
 644                 return false;
 645
 646         *input_1 = response.input0_trained;
 647         *input_2 = response.input1_trained;
 648         return true;
 649 }
 650
 651 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 652                                           u16 outputs)
 653 {
 654         return intel_sdvo_set_value(intel_sdvo,
 655                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 656                                     &outputs, sizeof(outputs));
 657 }
 658
 659 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 660                                           u16 *outputs)
 661 {
 662         return intel_sdvo_get_value(intel_sdvo,
 663                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 664                                     outputs, sizeof(*outputs));
 665 }
 666
 667 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 668                                                int mode)
 669 {
 670         u8 state = SDVO_ENCODER_STATE_ON;
 671
 672         switch (mode) {
 673         case DRM_MODE_DPMS_ON:
 674                 state = SDVO_ENCODER_STATE_ON;
 675                 break;
 676         case DRM_MODE_DPMS_STANDBY:
 677                 state = SDVO_ENCODER_STATE_STANDBY;
 678                 break;
 679         case DRM_MODE_DPMS_SUSPEND:
 680                 state = SDVO_ENCODER_STATE_SUSPEND;
 681                 break;
 682         case DRM_MODE_DPMS_OFF:
 683                 state = SDVO_ENCODER_STATE_OFF;
 684                 break;
 685         }
 686
 687         return intel_sdvo_set_value(intel_sdvo,
 688                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 689 }
 690
 691 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 692                                                    int *clock_min,
 693                                                    int *clock_max)
 694 {
 695         struct intel_sdvo_pixel_clock_range clocks;
 696
 697         BUILD_BUG_ON(sizeof(clocks) != 4);
 698         if (!intel_sdvo_get_value(intel_sdvo,
 699                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 700                                   &clocks, sizeof(clocks)))
 701                 return false;
 702
 703         /* Convert the values from units of 10 kHz to kHz. */
 704         *clock_min = clocks.min * 10;
 705         *clock_max = clocks.max * 10;
 706         return true;
 707 }
 708
 709 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 710                                          u16 outputs)
 711 {
 712         return intel_sdvo_set_value(intel_sdvo,
 713                                     SDVO_CMD_SET_TARGET_OUTPUT,
 714                                     &outputs, sizeof(outputs));
 715 }
 716
 717 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 718                                   struct intel_sdvo_dtd *dtd)
 719 {
 720         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 721                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 722 }
 723
 724 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 725                                   struct intel_sdvo_dtd *dtd)
 726 {
 727         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 728                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 729 }
 730
 731 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 732                                          struct intel_sdvo_dtd *dtd)
 733 {
 734         return intel_sdvo_set_timing(intel_sdvo,
 735                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 736 }
 737
 738 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 739                                          struct intel_sdvo_dtd *dtd)
 740 {
 741         return intel_sdvo_set_timing(intel_sdvo,
 742                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 743 }
 744
 745 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 746                                         struct intel_sdvo_dtd *dtd)
 747 {
 748         return intel_sdvo_get_timing(intel_sdvo,
 749                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 750 }
 751
 752 static bool
 753 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 754                                          struct intel_sdvo_connector *intel_sdvo_connector,
 755                                          u16 clock,
 756                                          u16 width,
 757                                          u16 height)
 758 {
 759         struct intel_sdvo_preferred_input_timing_args args;
 760
 761         memset(&args, 0, sizeof(args));
 762         args.clock = clock;
 763         args.width = width;
 764         args.height = height;
 765         args.interlace = 0;
 766
 767         if (IS_LVDS(intel_sdvo_connector)) {
 768                 const struct drm_display_mode *fixed_mode =
 769                         intel_sdvo_connector->base.panel.fixed_mode;
 770
 771                 if (fixed_mode->hdisplay != width ||
 772                     fixed_mode->vdisplay != height)
 773                         args.scaled = 1;
 774         }
 775
 776         return intel_sdvo_set_value(intel_sdvo,
 777                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 778                                     &args, sizeof(args));
 779 }
 780
 781 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 782                                                   struct intel_sdvo_dtd *dtd)
 783 {
 784         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 785         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 786         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 787                                     &dtd->part1, sizeof(dtd->part1)) &&
 788                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 789                                      &dtd->part2, sizeof(dtd->part2));
 790 }
 791
 792 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 793 {
 794         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 795 }
 796
 797 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 798                                          const struct drm_display_mode *mode)
 799 {
 800         u16 width, height;
 801         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 802         u16 h_sync_offset, v_sync_offset;
 803         int mode_clock;
 804
 805         memset(dtd, 0, sizeof(*dtd));
 806
 807         width = mode->hdisplay;
 808         height = mode->vdisplay;
 809
 810         /* do some mode translations */
 811         h_blank_len = mode->htotal - mode->hdisplay;
 812         h_sync_len = mode->hsync_end - mode->hsync_start;
 813
 814         v_blank_len = mode->vtotal - mode->vdisplay;
 815         v_sync_len = mode->vsync_end - mode->vsync_start;
 816
 817         h_sync_offset = mode->hsync_start - mode->hdisplay;
 818         v_sync_offset = mode->vsync_start - mode->vdisplay;
 819
 820         mode_clock = mode->clock;
 821         mode_clock /= 10;
 822         dtd->part1.clock = mode_clock;
 823
 824         dtd->part1.h_active = width & 0xff;
 825         dtd->part1.h_blank = h_blank_len & 0xff;
 826         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 827                 ((h_blank_len >> 8) & 0xf);
 828         dtd->part1.v_active = height & 0xff;
 829         dtd->part1.v_blank = v_blank_len & 0xff;
 830         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 831                 ((v_blank_len >> 8) & 0xf);
 832
 833         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 834         dtd->part2.h_sync_width = h_sync_len & 0xff;
 835         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 836                 (v_sync_len & 0xf);
 837         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 838                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 839                 ((v_sync_len & 0x30) >> 4);
 840
 841         dtd->part2.dtd_flags = 0x18;
 842         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 843                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 844         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 845                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 846         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 847                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 848
 849         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 850 }
 851
 852 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 853                                          const struct intel_sdvo_dtd *dtd)
 854 {
 855         struct drm_display_mode mode = {};
 856
 857         mode.hdisplay = dtd->part1.h_active;
 858         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 859         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 860         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 861         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 862         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 863         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 864         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 865
 866         mode.vdisplay = dtd->part1.v_active;
 867         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 868         mode.vsync_start = mode.vdisplay;
 869         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 870         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 871         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 872         mode.vsync_end = mode.vsync_start +
 873                 (dtd->part2.v_sync_off_width & 0xf);
 874         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 875         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 876         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 877
 878         mode.clock = dtd->part1.clock * 10;
 879
 880         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 881                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 882         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 883                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 884         else
 885                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 886         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 887                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 888         else
 889                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 890
 891         drm_mode_set_crtcinfo(&mode, 0);
 892
 893         drm_mode_copy(pmode, &mode);
 894 }
 895
 896 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 897 {
 898         struct intel_sdvo_encode encode;
 899
 900         BUILD_BUG_ON(sizeof(encode) != 2);
 901         return intel_sdvo_get_value(intel_sdvo,
 902                                   SDVO_CMD_GET_SUPP_ENCODE,
 903                                   &encode, sizeof(encode));
 904 }
 905
 906 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 907                                   u8 mode)
 908 {
 909         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 910 }
 911
 912 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 913                                        u8 mode)
 914 {
 915         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 916 }
 917
 918 #if 0
 919 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 920 {
 921         int i, j;
 922         u8 set_buf_index[2];
 923         u8 av_split;
 924         u8 buf_size;
 925         u8 buf[48];
 926         u8 *pos;
 927
 928         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 929
 930         for (i = 0; i <= av_split; i++) {
 931                 set_buf_index[0] = i; set_buf_index[1] = 0;
 932                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 933                                      set_buf_index, 2);
 934                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 935                 intel_sdvo_read_response(encoder, &buf_size, 1);
 936
 937                 pos = buf;
 938                 for (j = 0; j <= buf_size; j += 8) {
 939                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 940                                              NULL, 0);
 941                         intel_sdvo_read_response(encoder, pos, 8);
 942                         pos += 8;
 943                 }
 944         }
 945 }
 946 #endif
 947
 948 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
 949                                        unsigned int if_index, u8 tx_rate,
 950                                        const u8 *data, unsigned int length)
 951 {
 952         u8 set_buf_index[2] = { if_index, 0 };
 953         u8 hbuf_size, tmp[8];
 954         int i;
 955
 956         if (!intel_sdvo_set_value(intel_sdvo,
 957                                   SDVO_CMD_SET_HBUF_INDEX,
 958                                   set_buf_index, 2))
 959                 return false;
 960
 961         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 962                                   &hbuf_size, 1))
 963                 return false;
 964
 965         /* Buffer size is 0 based, hooray! */
 966         hbuf_size++;
 967
 968         DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
 969                       if_index, length, hbuf_size);
 970
 971         for (i = 0; i < hbuf_size; i += 8) {
 972                 memset(tmp, 0, 8);
 973                 if (i < length)
 974                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
 975
 976                 if (!intel_sdvo_set_value(intel_sdvo,
 977                                           SDVO_CMD_SET_HBUF_DATA,
 978                                           tmp, 8))
 979                         return false;
 980         }
 981
 982         return intel_sdvo_set_value(intel_sdvo,
 983                                     SDVO_CMD_SET_HBUF_TXRATE,
 984                                     &tx_rate, 1);
 985 }
 986
 987 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
 988                                          unsigned int if_index,
 989                                          u8 *data, unsigned int length)
 990 {
 991         u8 set_buf_index[2] = { if_index, 0 };
 992         u8 hbuf_size, tx_rate, av_split;
 993         int i;
 994
 995         if (!intel_sdvo_get_value(intel_sdvo,
 996                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
 997                                   &av_split, 1))
 998                 return -ENXIO;
 999
1000         if (av_split < if_index)
1001                 return 0;
1002
1003         if (!intel_sdvo_get_value(intel_sdvo,
1004                                   SDVO_CMD_GET_HBUF_TXRATE,
1005                                   &tx_rate, 1))
1006                 return -ENXIO;
1007
1008         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1009                 return 0;
1010
1011         if (!intel_sdvo_set_value(intel_sdvo,
1012                                   SDVO_CMD_SET_HBUF_INDEX,
1013                                   set_buf_index, 2))
1014                 return -ENXIO;
1015
1016         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
1017                                   &hbuf_size, 1))
1018                 return -ENXIO;
1019
1020         /* Buffer size is 0 based, hooray! */
1021         hbuf_size++;
1022
1023         DRM_DEBUG_KMS("reading sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
1024                       if_index, length, hbuf_size);
1025
1026         hbuf_size = min_t(unsigned int, length, hbuf_size);
1027
1028         for (i = 0; i < hbuf_size; i += 8) {
1029                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1030                         return -ENXIO;
1031                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1032                                               min_t(unsigned int, 8, hbuf_size - i)))
1033                         return -ENXIO;
1034         }
1035
1036         return hbuf_size;
1037 }
1038
1039 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1040                                              struct intel_crtc_state *crtc_state,
1041                                              struct drm_connector_state *conn_state)
1042 {
1043         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1044         const struct drm_display_mode *adjusted_mode =
1045                 &crtc_state->base.adjusted_mode;
1046         int ret;
1047
1048         if (!crtc_state->has_hdmi_sink)
1049                 return true;
1050
1051         crtc_state->infoframes.enable |=
1052                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1053
1054         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1055                                                        conn_state->connector,
1056                                                        adjusted_mode);
1057         if (ret)
1058                 return false;
1059
1060         drm_hdmi_avi_infoframe_quant_range(frame,
1061                                            conn_state->connector,
1062                                            adjusted_mode,
1063                                            crtc_state->limited_color_range ?
1064                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1065                                            HDMI_QUANTIZATION_RANGE_FULL);
1066
1067         ret = hdmi_avi_infoframe_check(frame);
1068         if (WARN_ON(ret))
1069                 return false;
1070
1071         return true;
1072 }
1073
1074 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1075                                          const struct intel_crtc_state *crtc_state)
1076 {
1077         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1078         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1079         ssize_t len;
1080
1081         if ((crtc_state->infoframes.enable &
1082              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1083                 return true;
1084
1085         if (WARN_ON(frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1086                 return false;
1087
1088         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1089         if (WARN_ON(len < 0))
1090                 return false;
1091
1092         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1093                                           SDVO_HBUF_TX_VSYNC,
1094                                           sdvo_data, sizeof(sdvo_data));
1095 }
1096
1097 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1098                                          struct intel_crtc_state *crtc_state)
1099 {
1100         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1101         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1102         ssize_t len;
1103         int ret;
1104
1105         if (!crtc_state->has_hdmi_sink)
1106                 return;
1107
1108         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1109                                         sdvo_data, sizeof(sdvo_data));
1110         if (len < 0) {
1111                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1112                 return;
1113         } else if (len == 0) {
1114                 return;
1115         }
1116
1117         crtc_state->infoframes.enable |=
1118                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1119
1120         ret = hdmi_infoframe_unpack(frame, sdvo_data, sizeof(sdvo_data));
1121         if (ret) {
1122                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1123                 return;
1124         }
1125
1126         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1127                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1128                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1129 }
1130
1131 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1132                                      const struct drm_connector_state *conn_state)
1133 {
1134         struct intel_sdvo_tv_format format;
1135         u32 format_map;
1136
1137         format_map = 1 << conn_state->tv.mode;
1138         memset(&format, 0, sizeof(format));
1139         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1140
1141         BUILD_BUG_ON(sizeof(format) != 6);
1142         return intel_sdvo_set_value(intel_sdvo,
1143                                     SDVO_CMD_SET_TV_FORMAT,
1144                                     &format, sizeof(format));
1145 }
1146
1147 static bool
1148 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1149                                         const struct drm_display_mode *mode)
1150 {
1151         struct intel_sdvo_dtd output_dtd;
1152
1153         if (!intel_sdvo_set_target_output(intel_sdvo,
1154                                           intel_sdvo->attached_output))
1155                 return false;
1156
1157         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1158         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1159                 return false;
1160
1161         return true;
1162 }
1163
1164 /*
1165  * Asks the sdvo controller for the preferred input mode given the output mode.
1166  * Unfortunately we have to set up the full output mode to do that.
1167  */
1168 static bool
1169 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1170                                     struct intel_sdvo_connector *intel_sdvo_connector,
1171                                     const struct drm_display_mode *mode,
1172                                     struct drm_display_mode *adjusted_mode)
1173 {
1174         struct intel_sdvo_dtd input_dtd;
1175
1176         /* Reset the input timing to the screen. Assume always input 0. */
1177         if (!intel_sdvo_set_target_input(intel_sdvo))
1178                 return false;
1179
1180         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1181                                                       intel_sdvo_connector,
1182                                                       mode->clock / 10,
1183                                                       mode->hdisplay,
1184                                                       mode->vdisplay))
1185                 return false;
1186
1187         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1188                                                    &input_dtd))
1189                 return false;
1190
1191         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1192         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1193
1194         return true;
1195 }
1196
1197 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1198 {
1199         unsigned dotclock = pipe_config->port_clock;
1200         struct dpll *clock = &pipe_config->dpll;
1201
1202         /*
1203          * SDVO TV has fixed PLL values depend on its clock range,
1204          * this mirrors vbios setting.
1205          */
1206         if (dotclock >= 100000 && dotclock < 140500) {
1207                 clock->p1 = 2;
1208                 clock->p2 = 10;
1209                 clock->n = 3;
1210                 clock->m1 = 16;
1211                 clock->m2 = 8;
1212         } else if (dotclock >= 140500 && dotclock <= 200000) {
1213                 clock->p1 = 1;
1214                 clock->p2 = 10;
1215                 clock->n = 6;
1216                 clock->m1 = 12;
1217                 clock->m2 = 8;
1218         } else {
1219                 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1220         }
1221
1222         pipe_config->clock_set = true;
1223 }
1224
1225 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1226                                      struct intel_crtc_state *pipe_config,
1227                                      struct drm_connector_state *conn_state)
1228 {
1229         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1230         struct intel_sdvo_connector_state *intel_sdvo_state =
1231                 to_intel_sdvo_connector_state(conn_state);
1232         struct intel_sdvo_connector *intel_sdvo_connector =
1233                 to_intel_sdvo_connector(conn_state->connector);
1234         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1235         struct drm_display_mode *mode = &pipe_config->base.mode;
1236
1237         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1238         pipe_config->pipe_bpp = 8*3;
1239         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1240
1241         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1242                 pipe_config->has_pch_encoder = true;
1243
1244         /*
1245          * We need to construct preferred input timings based on our
1246          * output timings.  To do that, we have to set the output
1247          * timings, even though this isn't really the right place in
1248          * the sequence to do it. Oh well.
1249          */
1250         if (IS_TV(intel_sdvo_connector)) {
1251                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1252                         return -EINVAL;
1253
1254                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1255                                                            intel_sdvo_connector,
1256                                                            mode,
1257                                                            adjusted_mode);
1258                 pipe_config->sdvo_tv_clock = true;
1259         } else if (IS_LVDS(intel_sdvo_connector)) {
1260                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1261                                                              intel_sdvo_connector->base.panel.fixed_mode))
1262                         return -EINVAL;
1263
1264                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1265                                                            intel_sdvo_connector,
1266                                                            mode,
1267                                                            adjusted_mode);
1268         }
1269
1270         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1271                 return -EINVAL;
1272
1273         /*
1274          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1275          * SDVO device will factor out the multiplier during mode_set.
1276          */
1277         pipe_config->pixel_multiplier =
1278                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1279
1280         if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1281                 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1282
1283         if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1284             (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1285                 pipe_config->has_audio = true;
1286
1287         if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1288                 /*
1289                  * See CEA-861-E - 5.1 Default Encoding Parameters
1290                  *
1291                  * FIXME: This bit is only valid when using TMDS encoding and 8
1292                  * bit per color mode.
1293                  */
1294                 if (pipe_config->has_hdmi_sink &&
1295                     drm_match_cea_mode(adjusted_mode) > 1)
1296                         pipe_config->limited_color_range = true;
1297         } else {
1298                 if (pipe_config->has_hdmi_sink &&
1299                     intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1300                         pipe_config->limited_color_range = true;
1301         }
1302
1303         /* Clock computation needs to happen after pixel multiplier. */
1304         if (IS_TV(intel_sdvo_connector))
1305                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1306
1307         /* Set user selected PAR to incoming mode's member */
1308         if (intel_sdvo_connector->is_hdmi)
1309                 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1310
1311         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1312                                               pipe_config, conn_state)) {
1313                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1314                 return -EINVAL;
1315         }
1316
1317         return 0;
1318 }
1319
1320 #define UPDATE_PROPERTY(input, NAME) \
1321         do { \
1322                 val = input; \
1323                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1324         } while (0)
1325
1326 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1327                                     const struct intel_sdvo_connector_state *sdvo_state)
1328 {
1329         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1330         struct intel_sdvo_connector *intel_sdvo_conn =
1331                 to_intel_sdvo_connector(conn_state->connector);
1332         u16 val;
1333
1334         if (intel_sdvo_conn->left)
1335                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1336
1337         if (intel_sdvo_conn->top)
1338                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1339
1340         if (intel_sdvo_conn->hpos)
1341                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1342
1343         if (intel_sdvo_conn->vpos)
1344                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1345
1346         if (intel_sdvo_conn->saturation)
1347                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1348
1349         if (intel_sdvo_conn->contrast)
1350                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1351
1352         if (intel_sdvo_conn->hue)
1353                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1354
1355         if (intel_sdvo_conn->brightness)
1356                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1357
1358         if (intel_sdvo_conn->sharpness)
1359                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1360
1361         if (intel_sdvo_conn->flicker_filter)
1362                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1363
1364         if (intel_sdvo_conn->flicker_filter_2d)
1365                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1366
1367         if (intel_sdvo_conn->flicker_filter_adaptive)
1368                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1369
1370         if (intel_sdvo_conn->tv_chroma_filter)
1371                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1372
1373         if (intel_sdvo_conn->tv_luma_filter)
1374                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1375
1376         if (intel_sdvo_conn->dot_crawl)
1377                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1378
1379 #undef UPDATE_PROPERTY
1380 }
1381
1382 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1383                                   const struct intel_crtc_state *crtc_state,
1384                                   const struct drm_connector_state *conn_state)
1385 {
1386         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1387         struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1388         const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1389         const struct intel_sdvo_connector_state *sdvo_state =
1390                 to_intel_sdvo_connector_state(conn_state);
1391         const struct intel_sdvo_connector *intel_sdvo_connector =
1392                 to_intel_sdvo_connector(conn_state->connector);
1393         const struct drm_display_mode *mode = &crtc_state->base.mode;
1394         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1395         u32 sdvox;
1396         struct intel_sdvo_in_out_map in_out;
1397         struct intel_sdvo_dtd input_dtd, output_dtd;
1398         int rate;
1399
1400         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1401
1402         /*
1403          * First, set the input mapping for the first input to our controlled
1404          * output. This is only correct if we're a single-input device, in
1405          * which case the first input is the output from the appropriate SDVO
1406          * channel on the motherboard.  In a two-input device, the first input
1407          * will be SDVOB and the second SDVOC.
1408          */
1409         in_out.in0 = intel_sdvo->attached_output;
1410         in_out.in1 = 0;
1411
1412         intel_sdvo_set_value(intel_sdvo,
1413                              SDVO_CMD_SET_IN_OUT_MAP,
1414                              &in_out, sizeof(in_out));
1415
1416         /* Set the output timings to the screen */
1417         if (!intel_sdvo_set_target_output(intel_sdvo,
1418                                           intel_sdvo->attached_output))
1419                 return;
1420
1421         /* lvds has a special fixed output timing. */
1422         if (IS_LVDS(intel_sdvo_connector))
1423                 intel_sdvo_get_dtd_from_mode(&output_dtd,
1424                                              intel_sdvo_connector->base.panel.fixed_mode);
1425         else
1426                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1427         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1428                 DRM_INFO("Setting output timings on %s failed\n",
1429                          SDVO_NAME(intel_sdvo));
1430
1431         /* Set the input timing to the screen. Assume always input 0. */
1432         if (!intel_sdvo_set_target_input(intel_sdvo))
1433                 return;
1434
1435         if (crtc_state->has_hdmi_sink) {
1436                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1437                 intel_sdvo_set_colorimetry(intel_sdvo,
1438                                            SDVO_COLORIMETRY_RGB256);
1439                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1440         } else
1441                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1442
1443         if (IS_TV(intel_sdvo_connector) &&
1444             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1445                 return;
1446
1447         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1448
1449         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1450                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1451         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1452                 DRM_INFO("Setting input timings on %s failed\n",
1453                          SDVO_NAME(intel_sdvo));
1454
1455         switch (crtc_state->pixel_multiplier) {
1456         default:
1457                 WARN(1, "unknown pixel multiplier specified\n");
1458                 /* fall through */
1459         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1460         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1461         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1462         }
1463         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1464                 return;
1465
1466         /* Set the SDVO control regs. */
1467         if (INTEL_GEN(dev_priv) >= 4) {
1468                 /* The real mode polarity is set by the SDVO commands, using
1469                  * struct intel_sdvo_dtd. */
1470                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1471                 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1472                         sdvox |= HDMI_COLOR_RANGE_16_235;
1473                 if (INTEL_GEN(dev_priv) < 5)
1474                         sdvox |= SDVO_BORDER_ENABLE;
1475         } else {
1476                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1477                 if (intel_sdvo->port == PORT_B)
1478                         sdvox &= SDVOB_PRESERVE_MASK;
1479                 else
1480                         sdvox &= SDVOC_PRESERVE_MASK;
1481                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1482         }
1483
1484         if (HAS_PCH_CPT(dev_priv))
1485                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1486         else
1487                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1488
1489         if (crtc_state->has_audio) {
1490                 WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
1491                 sdvox |= SDVO_AUDIO_ENABLE;
1492         }
1493
1494         if (INTEL_GEN(dev_priv) >= 4) {
1495                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1496         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1497                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1498                 /* done in crtc_mode_set as it lives inside the dpll register */
1499         } else {
1500                 sdvox |= (crtc_state->pixel_multiplier - 1)
1501                         << SDVO_PORT_MULTIPLY_SHIFT;
1502         }
1503
1504         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1505             INTEL_GEN(dev_priv) < 5)
1506                 sdvox |= SDVO_STALL_SELECT;
1507         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1508 }
1509
1510 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1511 {
1512         struct intel_sdvo_connector *intel_sdvo_connector =
1513                 to_intel_sdvo_connector(&connector->base);
1514         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1515         u16 active_outputs = 0;
1516
1517         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1518
1519         return active_outputs & intel_sdvo_connector->output_flag;
1520 }
1521
1522 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1523                              i915_reg_t sdvo_reg, enum pipe *pipe)
1524 {
1525         u32 val;
1526
1527         val = I915_READ(sdvo_reg);
1528
1529         /* asserts want to know the pipe even if the port is disabled */
1530         if (HAS_PCH_CPT(dev_priv))
1531                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1532         else if (IS_CHERRYVIEW(dev_priv))
1533                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1534         else
1535                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1536
1537         return val & SDVO_ENABLE;
1538 }
1539
1540 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1541                                     enum pipe *pipe)
1542 {
1543         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1544         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1545         u16 active_outputs = 0;
1546         bool ret;
1547
1548         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1549
1550         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1551
1552         return ret || active_outputs;
1553 }
1554
1555 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1556                                   struct intel_crtc_state *pipe_config)
1557 {
1558         struct drm_device *dev = encoder->base.dev;
1559         struct drm_i915_private *dev_priv = to_i915(dev);
1560         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1561         struct intel_sdvo_dtd dtd;
1562         int encoder_pixel_multiplier = 0;
1563         int dotclock;
1564         u32 flags = 0, sdvox;
1565         u8 val;
1566         bool ret;
1567
1568         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1569
1570         sdvox = I915_READ(intel_sdvo->sdvo_reg);
1571
1572         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1573         if (!ret) {
1574                 /*
1575                  * Some sdvo encoders are not spec compliant and don't
1576                  * implement the mandatory get_timings function.
1577                  */
1578                 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1579                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1580         } else {
1581                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1582                         flags |= DRM_MODE_FLAG_PHSYNC;
1583                 else
1584                         flags |= DRM_MODE_FLAG_NHSYNC;
1585
1586                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1587                         flags |= DRM_MODE_FLAG_PVSYNC;
1588                 else
1589                         flags |= DRM_MODE_FLAG_NVSYNC;
1590         }
1591
1592         pipe_config->base.adjusted_mode.flags |= flags;
1593
1594         /*
1595          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1596          * the sdvo port register, on all other platforms it is part of the dpll
1597          * state. Since the general pipe state readout happens before the
1598          * encoder->get_config we so already have a valid pixel multplier on all
1599          * other platfroms.
1600          */
1601         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1602                 pipe_config->pixel_multiplier =
1603                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1604                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1605         }
1606
1607         dotclock = pipe_config->port_clock;
1608
1609         if (pipe_config->pixel_multiplier)
1610                 dotclock /= pipe_config->pixel_multiplier;
1611
1612         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1613
1614         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1615         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1616                                  &val, 1)) {
1617                 switch (val) {
1618                 case SDVO_CLOCK_RATE_MULT_1X:
1619                         encoder_pixel_multiplier = 1;
1620                         break;
1621                 case SDVO_CLOCK_RATE_MULT_2X:
1622                         encoder_pixel_multiplier = 2;
1623                         break;
1624                 case SDVO_CLOCK_RATE_MULT_4X:
1625                         encoder_pixel_multiplier = 4;
1626                         break;
1627                 }
1628         }
1629
1630         WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1631              "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1632              pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1633
1634         if (sdvox & HDMI_COLOR_RANGE_16_235)
1635                 pipe_config->limited_color_range = true;
1636
1637         if (sdvox & SDVO_AUDIO_ENABLE)
1638                 pipe_config->has_audio = true;
1639
1640         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1641                                  &val, 1)) {
1642                 if (val == SDVO_ENCODE_HDMI)
1643                         pipe_config->has_hdmi_sink = true;
1644         }
1645
1646         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1647 }
1648
1649 static void intel_disable_sdvo(struct intel_encoder *encoder,
1650                                const struct intel_crtc_state *old_crtc_state,
1651                                const struct drm_connector_state *conn_state)
1652 {
1653         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1654         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1655         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
1656         u32 temp;
1657
1658         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1659         if (0)
1660                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1661                                                    DRM_MODE_DPMS_OFF);
1662
1663         temp = I915_READ(intel_sdvo->sdvo_reg);
1664
1665         temp &= ~SDVO_ENABLE;
1666         intel_sdvo_write_sdvox(intel_sdvo, temp);
1667
1668         /*
1669          * HW workaround for IBX, we need to move the port
1670          * to transcoder A after disabling it to allow the
1671          * matching DP port to be enabled on transcoder A.
1672          */
1673         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1674                 /*
1675                  * We get CPU/PCH FIFO underruns on the other pipe when
1676                  * doing the workaround. Sweep them under the rug.
1677                  */
1678                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1679                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1680
1681                 temp &= ~SDVO_PIPE_SEL_MASK;
1682                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1683                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1684
1685                 temp &= ~SDVO_ENABLE;
1686                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1687
1688                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1689                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1690                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1691         }
1692 }
1693
1694 static void pch_disable_sdvo(struct intel_encoder *encoder,
1695                              const struct intel_crtc_state *old_crtc_state,
1696                              const struct drm_connector_state *old_conn_state)
1697 {
1698 }
1699
1700 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1701                                   const struct intel_crtc_state *old_crtc_state,
1702                                   const struct drm_connector_state *old_conn_state)
1703 {
1704         intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1705 }
1706
1707 static void intel_enable_sdvo(struct intel_encoder *encoder,
1708                               const struct intel_crtc_state *pipe_config,
1709                               const struct drm_connector_state *conn_state)
1710 {
1711         struct drm_device *dev = encoder->base.dev;
1712         struct drm_i915_private *dev_priv = to_i915(dev);
1713         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1714         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
1715         u32 temp;
1716         bool input1, input2;
1717         int i;
1718         bool success;
1719
1720         temp = I915_READ(intel_sdvo->sdvo_reg);
1721         temp |= SDVO_ENABLE;
1722         intel_sdvo_write_sdvox(intel_sdvo, temp);
1723
1724         for (i = 0; i < 2; i++)
1725                 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1726
1727         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1728         /*
1729          * Warn if the device reported failure to sync.
1730          *
1731          * A lot of SDVO devices fail to notify of sync, but it's
1732          * a given it the status is a success, we succeeded.
1733          */
1734         if (success && !input1) {
1735                 DRM_DEBUG_KMS("First %s output reported failure to "
1736                                 "sync\n", SDVO_NAME(intel_sdvo));
1737         }
1738
1739         if (0)
1740                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1741                                                    DRM_MODE_DPMS_ON);
1742         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1743 }
1744
1745 static enum drm_mode_status
1746 intel_sdvo_mode_valid(struct drm_connector *connector,
1747                       struct drm_display_mode *mode)
1748 {
1749         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1750         struct intel_sdvo_connector *intel_sdvo_connector =
1751                 to_intel_sdvo_connector(connector);
1752         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1753
1754         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1755                 return MODE_NO_DBLESCAN;
1756
1757         if (intel_sdvo->pixel_clock_min > mode->clock)
1758                 return MODE_CLOCK_LOW;
1759
1760         if (intel_sdvo->pixel_clock_max < mode->clock)
1761                 return MODE_CLOCK_HIGH;
1762
1763         if (mode->clock > max_dotclk)
1764                 return MODE_CLOCK_HIGH;
1765
1766         if (IS_LVDS(intel_sdvo_connector)) {
1767                 const struct drm_display_mode *fixed_mode =
1768                         intel_sdvo_connector->base.panel.fixed_mode;
1769
1770                 if (mode->hdisplay > fixed_mode->hdisplay)
1771                         return MODE_PANEL;
1772
1773                 if (mode->vdisplay > fixed_mode->vdisplay)
1774                         return MODE_PANEL;
1775         }
1776
1777         return MODE_OK;
1778 }
1779
1780 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1781 {
1782         BUILD_BUG_ON(sizeof(*caps) != 8);
1783         if (!intel_sdvo_get_value(intel_sdvo,
1784                                   SDVO_CMD_GET_DEVICE_CAPS,
1785                                   caps, sizeof(*caps)))
1786                 return false;
1787
1788         DRM_DEBUG_KMS("SDVO capabilities:\n"
1789                       "  vendor_id: %d\n"
1790                       "  device_id: %d\n"
1791                       "  device_rev_id: %d\n"
1792                       "  sdvo_version_major: %d\n"
1793                       "  sdvo_version_minor: %d\n"
1794                       "  sdvo_inputs_mask: %d\n"
1795                       "  smooth_scaling: %d\n"
1796                       "  sharp_scaling: %d\n"
1797                       "  up_scaling: %d\n"
1798                       "  down_scaling: %d\n"
1799                       "  stall_support: %d\n"
1800                       "  output_flags: %d\n",
1801                       caps->vendor_id,
1802                       caps->device_id,
1803                       caps->device_rev_id,
1804                       caps->sdvo_version_major,
1805                       caps->sdvo_version_minor,
1806                       caps->sdvo_inputs_mask,
1807                       caps->smooth_scaling,
1808                       caps->sharp_scaling,
1809                       caps->up_scaling,
1810                       caps->down_scaling,
1811                       caps->stall_support,
1812                       caps->output_flags);
1813
1814         return true;
1815 }
1816
1817 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1818 {
1819         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1820         u16 hotplug;
1821
1822         if (!I915_HAS_HOTPLUG(dev_priv))
1823                 return 0;
1824
1825         /*
1826          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1827          * on the line.
1828          */
1829         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1830                 return 0;
1831
1832         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1833                                         &hotplug, sizeof(hotplug)))
1834                 return 0;
1835
1836         return hotplug;
1837 }
1838
1839 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1840 {
1841         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1842
1843         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1844                              &intel_sdvo->hotplug_active, 2);
1845 }
1846
1847 static bool intel_sdvo_hotplug(struct intel_encoder *encoder,
1848                                struct intel_connector *connector)
1849 {
1850         intel_sdvo_enable_hotplug(encoder);
1851
1852         return intel_encoder_hotplug(encoder, connector);
1853 }
1854
1855 static bool
1856 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1857 {
1858         /* Is there more than one type of output? */
1859         return hweight16(intel_sdvo->caps.output_flags) > 1;
1860 }
1861
1862 static struct edid *
1863 intel_sdvo_get_edid(struct drm_connector *connector)
1864 {
1865         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1866         return drm_get_edid(connector, &sdvo->ddc);
1867 }
1868
1869 /* Mac mini hack -- use the same DDC as the analog connector */
1870 static struct edid *
1871 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1872 {
1873         struct drm_i915_private *dev_priv = to_i915(connector->dev);
1874
1875         return drm_get_edid(connector,
1876                             intel_gmbus_get_adapter(dev_priv,
1877                                                     dev_priv->vbt.crt_ddc_pin));
1878 }
1879
1880 static enum drm_connector_status
1881 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1882 {
1883         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1884         struct intel_sdvo_connector *intel_sdvo_connector =
1885                 to_intel_sdvo_connector(connector);
1886         enum drm_connector_status status;
1887         struct edid *edid;
1888
1889         edid = intel_sdvo_get_edid(connector);
1890
1891         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1892                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1893
1894                 /*
1895                  * Don't use the 1 as the argument of DDC bus switch to get
1896                  * the EDID. It is used for SDVO SPD ROM.
1897                  */
1898                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1899                         intel_sdvo->ddc_bus = ddc;
1900                         edid = intel_sdvo_get_edid(connector);
1901                         if (edid)
1902                                 break;
1903                 }
1904                 /*
1905                  * If we found the EDID on the other bus,
1906                  * assume that is the correct DDC bus.
1907                  */
1908                 if (edid == NULL)
1909                         intel_sdvo->ddc_bus = saved_ddc;
1910         }
1911
1912         /*
1913          * When there is no edid and no monitor is connected with VGA
1914          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1915          */
1916         if (edid == NULL)
1917                 edid = intel_sdvo_get_analog_edid(connector);
1918
1919         status = connector_status_unknown;
1920         if (edid != NULL) {
1921                 /* DDC bus is shared, match EDID to connector type */
1922                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1923                         status = connector_status_connected;
1924                         if (intel_sdvo_connector->is_hdmi) {
1925                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1926                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1927                         }
1928                 } else
1929                         status = connector_status_disconnected;
1930                 kfree(edid);
1931         }
1932
1933         return status;
1934 }
1935
1936 static bool
1937 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1938                                   struct edid *edid)
1939 {
1940         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1941         bool connector_is_digital = !!IS_DIGITAL(sdvo);
1942
1943         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1944                       connector_is_digital, monitor_is_digital);
1945         return connector_is_digital == monitor_is_digital;
1946 }
1947
1948 static enum drm_connector_status
1949 intel_sdvo_detect(struct drm_connector *connector, bool force)
1950 {
1951         u16 response;
1952         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1953         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1954         enum drm_connector_status ret;
1955
1956         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1957                       connector->base.id, connector->name);
1958
1959         if (!intel_sdvo_get_value(intel_sdvo,
1960                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
1961                                   &response, 2))
1962                 return connector_status_unknown;
1963
1964         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1965                       response & 0xff, response >> 8,
1966                       intel_sdvo_connector->output_flag);
1967
1968         if (response == 0)
1969                 return connector_status_disconnected;
1970
1971         intel_sdvo->attached_output = response;
1972
1973         intel_sdvo->has_hdmi_monitor = false;
1974         intel_sdvo->has_hdmi_audio = false;
1975
1976         if ((intel_sdvo_connector->output_flag & response) == 0)
1977                 ret = connector_status_disconnected;
1978         else if (IS_TMDS(intel_sdvo_connector))
1979                 ret = intel_sdvo_tmds_sink_detect(connector);
1980         else {
1981                 struct edid *edid;
1982
1983                 /* if we have an edid check it matches the connection */
1984                 edid = intel_sdvo_get_edid(connector);
1985                 if (edid == NULL)
1986                         edid = intel_sdvo_get_analog_edid(connector);
1987                 if (edid != NULL) {
1988                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1989                                                               edid))
1990                                 ret = connector_status_connected;
1991                         else
1992                                 ret = connector_status_disconnected;
1993
1994                         kfree(edid);
1995                 } else
1996                         ret = connector_status_connected;
1997         }
1998
1999         return ret;
2000 }
2001
2002 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2003 {
2004         struct edid *edid;
2005
2006         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2007                       connector->base.id, connector->name);
2008
2009         /* set the bus switch and get the modes */
2010         edid = intel_sdvo_get_edid(connector);
2011
2012         /*
2013          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2014          * link between analog and digital outputs. So, if the regular SDVO
2015          * DDC fails, check to see if the analog output is disconnected, in
2016          * which case we'll look there for the digital DDC data.
2017          */
2018         if (edid == NULL)
2019                 edid = intel_sdvo_get_analog_edid(connector);
2020
2021         if (edid != NULL) {
2022                 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2023                                                       edid)) {
2024                         drm_connector_update_edid_property(connector, edid);
2025                         drm_add_edid_modes(connector, edid);
2026                 }
2027
2028                 kfree(edid);
2029         }
2030 }
2031
2032 /*
2033  * Set of SDVO TV modes.
2034  * Note!  This is in reply order (see loop in get_tv_modes).
2035  * XXX: all 60Hz refresh?
2036  */
2037 static const struct drm_display_mode sdvo_tv_modes[] = {
2038         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2039                    416, 0, 200, 201, 232, 233, 0,
2040                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2041         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2042                    416, 0, 240, 241, 272, 273, 0,
2043                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2044         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2045                    496, 0, 300, 301, 332, 333, 0,
2046                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2047         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2048                    736, 0, 350, 351, 382, 383, 0,
2049                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2050         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2051                    736, 0, 400, 401, 432, 433, 0,
2052                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2053         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2054                    736, 0, 480, 481, 512, 513, 0,
2055                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2056         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2057                    800, 0, 480, 481, 512, 513, 0,
2058                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2059         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2060                    800, 0, 576, 577, 608, 609, 0,
2061                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2062         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2063                    816, 0, 350, 351, 382, 383, 0,
2064                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2065         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2066                    816, 0, 400, 401, 432, 433, 0,
2067                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2068         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2069                    816, 0, 480, 481, 512, 513, 0,
2070                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2071         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2072                    816, 0, 540, 541, 572, 573, 0,
2073                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2074         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2075                    816, 0, 576, 577, 608, 609, 0,
2076                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2077         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2078                    864, 0, 576, 577, 608, 609, 0,
2079                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2080         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2081                    896, 0, 600, 601, 632, 633, 0,
2082                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2083         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2084                    928, 0, 624, 625, 656, 657, 0,
2085                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2086         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2087                    1016, 0, 766, 767, 798, 799, 0,
2088                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2089         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2090                    1120, 0, 768, 769, 800, 801, 0,
2091                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2092         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2093                    1376, 0, 1024, 1025, 1056, 1057, 0,
2094                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2095 };
2096
2097 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
2098 {
2099         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2100         const struct drm_connector_state *conn_state = connector->state;
2101         struct intel_sdvo_sdtv_resolution_request tv_res;
2102         u32 reply = 0, format_map = 0;
2103         int i;
2104
2105         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2106                       connector->base.id, connector->name);
2107
2108         /*
2109          * Read the list of supported input resolutions for the selected TV
2110          * format.
2111          */
2112         format_map = 1 << conn_state->tv.mode;
2113         memcpy(&tv_res, &format_map,
2114                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2115
2116         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2117                 return;
2118
2119         BUILD_BUG_ON(sizeof(tv_res) != 3);
2120         if (!intel_sdvo_write_cmd(intel_sdvo,
2121                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2122                                   &tv_res, sizeof(tv_res)))
2123                 return;
2124         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2125                 return;
2126
2127         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
2128                 if (reply & (1 << i)) {
2129                         struct drm_display_mode *nmode;
2130                         nmode = drm_mode_duplicate(connector->dev,
2131                                                    &sdvo_tv_modes[i]);
2132                         if (nmode)
2133                                 drm_mode_probed_add(connector, nmode);
2134                 }
2135 }
2136
2137 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2138 {
2139         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2140         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2141         struct drm_display_mode *newmode;
2142
2143         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2144                       connector->base.id, connector->name);
2145
2146         /*
2147          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2148          * SDVO->LVDS transcoders can't cope with the EDID mode.
2149          */
2150         if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
2151                 newmode = drm_mode_duplicate(connector->dev,
2152                                              dev_priv->vbt.sdvo_lvds_vbt_mode);
2153                 if (newmode != NULL) {
2154                         /* Guarantee the mode is preferred */
2155                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
2156                                          DRM_MODE_TYPE_DRIVER);
2157                         drm_mode_probed_add(connector, newmode);
2158                 }
2159         }
2160
2161         /*
2162          * Attempt to get the mode list from DDC.
2163          * Assume that the preferred modes are
2164          * arranged in priority order.
2165          */
2166         intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2167 }
2168
2169 static int intel_sdvo_get_modes(struct drm_connector *connector)
2170 {
2171         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2172
2173         if (IS_TV(intel_sdvo_connector))
2174                 intel_sdvo_get_tv_modes(connector);
2175         else if (IS_LVDS(intel_sdvo_connector))
2176                 intel_sdvo_get_lvds_modes(connector);
2177         else
2178                 intel_sdvo_get_ddc_modes(connector);
2179
2180         return !list_empty(&connector->probed_modes);
2181 }
2182
2183 static int
2184 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2185                                          const struct drm_connector_state *state,
2186                                          struct drm_property *property,
2187                                          u64 *val)
2188 {
2189         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2190         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2191
2192         if (property == intel_sdvo_connector->tv_format) {
2193                 int i;
2194
2195                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2196                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2197                                 *val = i;
2198
2199                                 return 0;
2200                         }
2201
2202                 WARN_ON(1);
2203                 *val = 0;
2204         } else if (property == intel_sdvo_connector->top ||
2205                    property == intel_sdvo_connector->bottom)
2206                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2207         else if (property == intel_sdvo_connector->left ||
2208                  property == intel_sdvo_connector->right)
2209                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2210         else if (property == intel_sdvo_connector->hpos)
2211                 *val = sdvo_state->tv.hpos;
2212         else if (property == intel_sdvo_connector->vpos)
2213                 *val = sdvo_state->tv.vpos;
2214         else if (property == intel_sdvo_connector->saturation)
2215                 *val = state->tv.saturation;
2216         else if (property == intel_sdvo_connector->contrast)
2217                 *val = state->tv.contrast;
2218         else if (property == intel_sdvo_connector->hue)
2219                 *val = state->tv.hue;
2220         else if (property == intel_sdvo_connector->brightness)
2221                 *val = state->tv.brightness;
2222         else if (property == intel_sdvo_connector->sharpness)
2223                 *val = sdvo_state->tv.sharpness;
2224         else if (property == intel_sdvo_connector->flicker_filter)
2225                 *val = sdvo_state->tv.flicker_filter;
2226         else if (property == intel_sdvo_connector->flicker_filter_2d)
2227                 *val = sdvo_state->tv.flicker_filter_2d;
2228         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2229                 *val = sdvo_state->tv.flicker_filter_adaptive;
2230         else if (property == intel_sdvo_connector->tv_chroma_filter)
2231                 *val = sdvo_state->tv.chroma_filter;
2232         else if (property == intel_sdvo_connector->tv_luma_filter)
2233                 *val = sdvo_state->tv.luma_filter;
2234         else if (property == intel_sdvo_connector->dot_crawl)
2235                 *val = sdvo_state->tv.dot_crawl;
2236         else
2237                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2238
2239         return 0;
2240 }
2241
2242 static int
2243 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2244                                          struct drm_connector_state *state,
2245                                          struct drm_property *property,
2246                                          u64 val)
2247 {
2248         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2249         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2250
2251         if (property == intel_sdvo_connector->tv_format) {
2252                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2253
2254                 if (state->crtc) {
2255                         struct drm_crtc_state *crtc_state =
2256                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2257
2258                         crtc_state->connectors_changed = true;
2259                 }
2260         } else if (property == intel_sdvo_connector->top ||
2261                    property == intel_sdvo_connector->bottom)
2262                 /* Cannot set these independent from each other */
2263                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2264         else if (property == intel_sdvo_connector->left ||
2265                  property == intel_sdvo_connector->right)
2266                 /* Cannot set these independent from each other */
2267                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2268         else if (property == intel_sdvo_connector->hpos)
2269                 sdvo_state->tv.hpos = val;
2270         else if (property == intel_sdvo_connector->vpos)
2271                 sdvo_state->tv.vpos = val;
2272         else if (property == intel_sdvo_connector->saturation)
2273                 state->tv.saturation = val;
2274         else if (property == intel_sdvo_connector->contrast)
2275                 state->tv.contrast = val;
2276         else if (property == intel_sdvo_connector->hue)
2277                 state->tv.hue = val;
2278         else if (property == intel_sdvo_connector->brightness)
2279                 state->tv.brightness = val;
2280         else if (property == intel_sdvo_connector->sharpness)
2281                 sdvo_state->tv.sharpness = val;
2282         else if (property == intel_sdvo_connector->flicker_filter)
2283                 sdvo_state->tv.flicker_filter = val;
2284         else if (property == intel_sdvo_connector->flicker_filter_2d)
2285                 sdvo_state->tv.flicker_filter_2d = val;
2286         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2287                 sdvo_state->tv.flicker_filter_adaptive = val;
2288         else if (property == intel_sdvo_connector->tv_chroma_filter)
2289                 sdvo_state->tv.chroma_filter = val;
2290         else if (property == intel_sdvo_connector->tv_luma_filter)
2291                 sdvo_state->tv.luma_filter = val;
2292         else if (property == intel_sdvo_connector->dot_crawl)
2293                 sdvo_state->tv.dot_crawl = val;
2294         else
2295                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2296
2297         return 0;
2298 }
2299
2300 static int
2301 intel_sdvo_connector_register(struct drm_connector *connector)
2302 {
2303         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2304         int ret;
2305
2306         ret = intel_connector_register(connector);
2307         if (ret)
2308                 return ret;
2309
2310         return sysfs_create_link(&connector->kdev->kobj,
2311                                  &sdvo->ddc.dev.kobj,
2312                                  sdvo->ddc.dev.kobj.name);
2313 }
2314
2315 static void
2316 intel_sdvo_connector_unregister(struct drm_connector *connector)
2317 {
2318         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2319
2320         sysfs_remove_link(&connector->kdev->kobj,
2321                           sdvo->ddc.dev.kobj.name);
2322         intel_connector_unregister(connector);
2323 }
2324
2325 static struct drm_connector_state *
2326 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2327 {
2328         struct intel_sdvo_connector_state *state;
2329
2330         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2331         if (!state)
2332                 return NULL;
2333
2334         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2335         return &state->base.base;
2336 }
2337
2338 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2339         .detect = intel_sdvo_detect,
2340         .fill_modes = drm_helper_probe_single_connector_modes,
2341         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2342         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2343         .late_register = intel_sdvo_connector_register,
2344         .early_unregister = intel_sdvo_connector_unregister,
2345         .destroy = intel_connector_destroy,
2346         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2347         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2348 };
2349
2350 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2351                                    struct drm_connector_state *new_conn_state)
2352 {
2353         struct drm_atomic_state *state = new_conn_state->state;
2354         struct drm_connector_state *old_conn_state =
2355                 drm_atomic_get_old_connector_state(state, conn);
2356         struct intel_sdvo_connector_state *old_state =
2357                 to_intel_sdvo_connector_state(old_conn_state);
2358         struct intel_sdvo_connector_state *new_state =
2359                 to_intel_sdvo_connector_state(new_conn_state);
2360
2361         if (new_conn_state->crtc &&
2362             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2363              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2364                 struct drm_crtc_state *crtc_state =
2365                         drm_atomic_get_new_crtc_state(new_conn_state->state,
2366                                                       new_conn_state->crtc);
2367
2368                 crtc_state->connectors_changed = true;
2369         }
2370
2371         return intel_digital_connector_atomic_check(conn, new_conn_state);
2372 }
2373
2374 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2375         .get_modes = intel_sdvo_get_modes,
2376         .mode_valid = intel_sdvo_mode_valid,
2377         .atomic_check = intel_sdvo_atomic_check,
2378 };
2379
2380 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2381 {
2382         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2383
2384         i2c_del_adapter(&intel_sdvo->ddc);
2385         intel_encoder_destroy(encoder);
2386 }
2387
2388 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2389         .destroy = intel_sdvo_enc_destroy,
2390 };
2391
2392 static void
2393 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2394 {
2395         u16 mask = 0;
2396         unsigned int num_bits;
2397
2398         /*
2399          * Make a mask of outputs less than or equal to our own priority in the
2400          * list.
2401          */
2402         switch (sdvo->controlled_output) {
2403         case SDVO_OUTPUT_LVDS1:
2404                 mask |= SDVO_OUTPUT_LVDS1;
2405                 /* fall through */
2406         case SDVO_OUTPUT_LVDS0:
2407                 mask |= SDVO_OUTPUT_LVDS0;
2408                 /* fall through */
2409         case SDVO_OUTPUT_TMDS1:
2410                 mask |= SDVO_OUTPUT_TMDS1;
2411                 /* fall through */
2412         case SDVO_OUTPUT_TMDS0:
2413                 mask |= SDVO_OUTPUT_TMDS0;
2414                 /* fall through */
2415         case SDVO_OUTPUT_RGB1:
2416                 mask |= SDVO_OUTPUT_RGB1;
2417                 /* fall through */
2418         case SDVO_OUTPUT_RGB0:
2419                 mask |= SDVO_OUTPUT_RGB0;
2420                 break;
2421         }
2422
2423         /* Count bits to find what number we are in the priority list. */
2424         mask &= sdvo->caps.output_flags;
2425         num_bits = hweight16(mask);
2426         /* If more than 3 outputs, default to DDC bus 3 for now. */
2427         if (num_bits > 3)
2428                 num_bits = 3;
2429
2430         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2431         sdvo->ddc_bus = 1 << num_bits;
2432 }
2433
2434 /*
2435  * Choose the appropriate DDC bus for control bus switch command for this
2436  * SDVO output based on the controlled output.
2437  *
2438  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2439  * outputs, then LVDS outputs.
2440  */
2441 static void
2442 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2443                           struct intel_sdvo *sdvo)
2444 {
2445         struct sdvo_device_mapping *mapping;
2446
2447         if (sdvo->port == PORT_B)
2448                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2449         else
2450                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2451
2452         if (mapping->initialized)
2453                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2454         else
2455                 intel_sdvo_guess_ddc_bus(sdvo);
2456 }
2457
2458 static void
2459 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2460                           struct intel_sdvo *sdvo)
2461 {
2462         struct sdvo_device_mapping *mapping;
2463         u8 pin;
2464
2465         if (sdvo->port == PORT_B)
2466                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2467         else
2468                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2469
2470         if (mapping->initialized &&
2471             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2472                 pin = mapping->i2c_pin;
2473         else
2474                 pin = GMBUS_PIN_DPB;
2475
2476         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2477
2478         /*
2479          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2480          * our code totally fails once we start using gmbus. Hence fall back to
2481          * bit banging for now.
2482          */
2483         intel_gmbus_force_bit(sdvo->i2c, true);
2484 }
2485
2486 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2487 static void
2488 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2489 {
2490         intel_gmbus_force_bit(sdvo->i2c, false);
2491 }
2492
2493 static bool
2494 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2495 {
2496         return intel_sdvo_check_supp_encode(intel_sdvo);
2497 }
2498
2499 static u8
2500 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2501                           struct intel_sdvo *sdvo)
2502 {
2503         struct sdvo_device_mapping *my_mapping, *other_mapping;
2504
2505         if (sdvo->port == PORT_B) {
2506                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2507                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2508         } else {
2509                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2510                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2511         }
2512
2513         /* If the BIOS described our SDVO device, take advantage of it. */
2514         if (my_mapping->slave_addr)
2515                 return my_mapping->slave_addr;
2516
2517         /*
2518          * If the BIOS only described a different SDVO device, use the
2519          * address that it isn't using.
2520          */
2521         if (other_mapping->slave_addr) {
2522                 if (other_mapping->slave_addr == 0x70)
2523                         return 0x72;
2524                 else
2525                         return 0x70;
2526         }
2527
2528         /*
2529          * No SDVO device info is found for another DVO port,
2530          * so use mapping assumption we had before BIOS parsing.
2531          */
2532         if (sdvo->port == PORT_B)
2533                 return 0x70;
2534         else
2535                 return 0x72;
2536 }
2537
2538 static int
2539 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2540                           struct intel_sdvo *encoder)
2541 {
2542         struct drm_connector *drm_connector;
2543         int ret;
2544
2545         drm_connector = &connector->base.base;
2546         ret = drm_connector_init(encoder->base.base.dev,
2547                            drm_connector,
2548                            &intel_sdvo_connector_funcs,
2549                            connector->base.base.connector_type);
2550         if (ret < 0)
2551                 return ret;
2552
2553         drm_connector_helper_add(drm_connector,
2554                                  &intel_sdvo_connector_helper_funcs);
2555
2556         connector->base.base.interlace_allowed = 1;
2557         connector->base.base.doublescan_allowed = 0;
2558         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2559         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2560
2561         intel_connector_attach_encoder(&connector->base, &encoder->base);
2562
2563         return 0;
2564 }
2565
2566 static void
2567 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2568                                struct intel_sdvo_connector *connector)
2569 {
2570         struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2571
2572         intel_attach_force_audio_property(&connector->base.base);
2573         if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2574                 intel_attach_broadcast_rgb_property(&connector->base.base);
2575         }
2576         intel_attach_aspect_ratio_property(&connector->base.base);
2577         connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2578 }
2579
2580 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2581 {
2582         struct intel_sdvo_connector *sdvo_connector;
2583         struct intel_sdvo_connector_state *conn_state;
2584
2585         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2586         if (!sdvo_connector)
2587                 return NULL;
2588
2589         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2590         if (!conn_state) {
2591                 kfree(sdvo_connector);
2592                 return NULL;
2593         }
2594
2595         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2596                                             &conn_state->base.base);
2597
2598         return sdvo_connector;
2599 }
2600
2601 static bool
2602 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2603 {
2604         struct drm_encoder *encoder = &intel_sdvo->base.base;
2605         struct drm_i915_private *dev_priv = to_i915(encoder->dev);
2606         struct drm_connector *connector;
2607         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2608         struct intel_connector *intel_connector;
2609         struct intel_sdvo_connector *intel_sdvo_connector;
2610
2611         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2612
2613         intel_sdvo_connector = intel_sdvo_connector_alloc();
2614         if (!intel_sdvo_connector)
2615                 return false;
2616
2617         if (device == 0) {
2618                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2619                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2620         } else if (device == 1) {
2621                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2622                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2623         }
2624
2625         intel_connector = &intel_sdvo_connector->base;
2626         connector = &intel_connector->base;
2627         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2628                 intel_sdvo_connector->output_flag) {
2629                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2630                 /*
2631                  * Some SDVO devices have one-shot hotplug interrupts.
2632                  * Ensure that they get re-enabled when an interrupt happens.
2633                  */
2634                 intel_encoder->hotplug = intel_sdvo_hotplug;
2635                 intel_sdvo_enable_hotplug(intel_encoder);
2636         } else {
2637                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2638         }
2639         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2640         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2641
2642         /* gen3 doesn't do the hdmi bits in the SDVO register */
2643         if (INTEL_GEN(dev_priv) >= 4 &&
2644             intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2645                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2646                 intel_sdvo_connector->is_hdmi = true;
2647         }
2648
2649         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2650                 kfree(intel_sdvo_connector);
2651                 return false;
2652         }
2653
2654         if (intel_sdvo_connector->is_hdmi)
2655                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2656
2657         return true;
2658 }
2659
2660 static bool
2661 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2662 {
2663         struct drm_encoder *encoder = &intel_sdvo->base.base;
2664         struct drm_connector *connector;
2665         struct intel_connector *intel_connector;
2666         struct intel_sdvo_connector *intel_sdvo_connector;
2667
2668         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2669
2670         intel_sdvo_connector = intel_sdvo_connector_alloc();
2671         if (!intel_sdvo_connector)
2672                 return false;
2673
2674         intel_connector = &intel_sdvo_connector->base;
2675         connector = &intel_connector->base;
2676         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2677         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2678
2679         intel_sdvo->controlled_output |= type;
2680         intel_sdvo_connector->output_flag = type;
2681
2682         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2683                 kfree(intel_sdvo_connector);
2684                 return false;
2685         }
2686
2687         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2688                 goto err;
2689
2690         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2691                 goto err;
2692
2693         return true;
2694
2695 err:
2696         intel_connector_destroy(connector);
2697         return false;
2698 }
2699
2700 static bool
2701 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2702 {
2703         struct drm_encoder *encoder = &intel_sdvo->base.base;
2704         struct drm_connector *connector;
2705         struct intel_connector *intel_connector;
2706         struct intel_sdvo_connector *intel_sdvo_connector;
2707
2708         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2709
2710         intel_sdvo_connector = intel_sdvo_connector_alloc();
2711         if (!intel_sdvo_connector)
2712                 return false;
2713
2714         intel_connector = &intel_sdvo_connector->base;
2715         connector = &intel_connector->base;
2716         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2717         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2718         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2719
2720         if (device == 0) {
2721                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2722                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2723         } else if (device == 1) {
2724                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2725                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2726         }
2727
2728         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2729                 kfree(intel_sdvo_connector);
2730                 return false;
2731         }
2732
2733         return true;
2734 }
2735
2736 static bool
2737 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2738 {
2739         struct drm_encoder *encoder = &intel_sdvo->base.base;
2740         struct drm_connector *connector;
2741         struct intel_connector *intel_connector;
2742         struct intel_sdvo_connector *intel_sdvo_connector;
2743         struct drm_display_mode *mode;
2744
2745         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2746
2747         intel_sdvo_connector = intel_sdvo_connector_alloc();
2748         if (!intel_sdvo_connector)
2749                 return false;
2750
2751         intel_connector = &intel_sdvo_connector->base;
2752         connector = &intel_connector->base;
2753         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2754         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2755
2756         if (device == 0) {
2757                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2758                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2759         } else if (device == 1) {
2760                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2761                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2762         }
2763
2764         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2765                 kfree(intel_sdvo_connector);
2766                 return false;
2767         }
2768
2769         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2770                 goto err;
2771
2772         intel_sdvo_get_lvds_modes(connector);
2773
2774         list_for_each_entry(mode, &connector->probed_modes, head) {
2775                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
2776                         struct drm_display_mode *fixed_mode =
2777                                 drm_mode_duplicate(connector->dev, mode);
2778
2779                         intel_panel_init(&intel_connector->panel,
2780                                          fixed_mode, NULL);
2781                         break;
2782                 }
2783         }
2784
2785         if (!intel_connector->panel.fixed_mode)
2786                 goto err;
2787
2788         return true;
2789
2790 err:
2791         intel_connector_destroy(connector);
2792         return false;
2793 }
2794
2795 static bool
2796 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2797 {
2798         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2799
2800         if (flags & SDVO_OUTPUT_TMDS0)
2801                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2802                         return false;
2803
2804         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2805                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2806                         return false;
2807
2808         /* TV has no XXX1 function block */
2809         if (flags & SDVO_OUTPUT_SVID0)
2810                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2811                         return false;
2812
2813         if (flags & SDVO_OUTPUT_CVBS0)
2814                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2815                         return false;
2816
2817         if (flags & SDVO_OUTPUT_YPRPB0)
2818                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2819                         return false;
2820
2821         if (flags & SDVO_OUTPUT_RGB0)
2822                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2823                         return false;
2824
2825         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2826                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2827                         return false;
2828
2829         if (flags & SDVO_OUTPUT_LVDS0)
2830                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2831                         return false;
2832
2833         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2834                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2835                         return false;
2836
2837         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2838                 unsigned char bytes[2];
2839
2840                 intel_sdvo->controlled_output = 0;
2841                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2842                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2843                               SDVO_NAME(intel_sdvo),
2844                               bytes[0], bytes[1]);
2845                 return false;
2846         }
2847         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2848
2849         return true;
2850 }
2851
2852 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2853 {
2854         struct drm_device *dev = intel_sdvo->base.base.dev;
2855         struct drm_connector *connector, *tmp;
2856
2857         list_for_each_entry_safe(connector, tmp,
2858                                  &dev->mode_config.connector_list, head) {
2859                 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2860                         drm_connector_unregister(connector);
2861                         intel_connector_destroy(connector);
2862                 }
2863         }
2864 }
2865
2866 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2867                                           struct intel_sdvo_connector *intel_sdvo_connector,
2868                                           int type)
2869 {
2870         struct drm_device *dev = intel_sdvo->base.base.dev;
2871         struct intel_sdvo_tv_format format;
2872         u32 format_map, i;
2873
2874         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2875                 return false;
2876
2877         BUILD_BUG_ON(sizeof(format) != 6);
2878         if (!intel_sdvo_get_value(intel_sdvo,
2879                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2880                                   &format, sizeof(format)))
2881                 return false;
2882
2883         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2884
2885         if (format_map == 0)
2886                 return false;
2887
2888         intel_sdvo_connector->format_supported_num = 0;
2889         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2890                 if (format_map & (1 << i))
2891                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2892
2893
2894         intel_sdvo_connector->tv_format =
2895                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2896                                             "mode", intel_sdvo_connector->format_supported_num);
2897         if (!intel_sdvo_connector->tv_format)
2898                 return false;
2899
2900         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2901                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
2902                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2903
2904         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2905         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2906                                    intel_sdvo_connector->tv_format, 0);
2907         return true;
2908
2909 }
2910
2911 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2912         if (enhancements.name) { \
2913                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2914                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2915                         return false; \
2916                 intel_sdvo_connector->name = \
2917                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2918                 if (!intel_sdvo_connector->name) return false; \
2919                 state_assignment = response; \
2920                 drm_object_attach_property(&connector->base, \
2921                                            intel_sdvo_connector->name, 0); \
2922                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2923                               data_value[0], data_value[1], response); \
2924         } \
2925 } while (0)
2926
2927 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2928
2929 static bool
2930 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2931                                       struct intel_sdvo_connector *intel_sdvo_connector,
2932                                       struct intel_sdvo_enhancements_reply enhancements)
2933 {
2934         struct drm_device *dev = intel_sdvo->base.base.dev;
2935         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2936         struct drm_connector_state *conn_state = connector->state;
2937         struct intel_sdvo_connector_state *sdvo_state =
2938                 to_intel_sdvo_connector_state(conn_state);
2939         u16 response, data_value[2];
2940
2941         /* when horizontal overscan is supported, Add the left/right property */
2942         if (enhancements.overscan_h) {
2943                 if (!intel_sdvo_get_value(intel_sdvo,
2944                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2945                                           &data_value, 4))
2946                         return false;
2947
2948                 if (!intel_sdvo_get_value(intel_sdvo,
2949                                           SDVO_CMD_GET_OVERSCAN_H,
2950                                           &response, 2))
2951                         return false;
2952
2953                 sdvo_state->tv.overscan_h = response;
2954
2955                 intel_sdvo_connector->max_hscan = data_value[0];
2956                 intel_sdvo_connector->left =
2957                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2958                 if (!intel_sdvo_connector->left)
2959                         return false;
2960
2961                 drm_object_attach_property(&connector->base,
2962                                            intel_sdvo_connector->left, 0);
2963
2964                 intel_sdvo_connector->right =
2965                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2966                 if (!intel_sdvo_connector->right)
2967                         return false;
2968
2969                 drm_object_attach_property(&connector->base,
2970                                               intel_sdvo_connector->right, 0);
2971                 DRM_DEBUG_KMS("h_overscan: max %d, "
2972                               "default %d, current %d\n",
2973                               data_value[0], data_value[1], response);
2974         }
2975
2976         if (enhancements.overscan_v) {
2977                 if (!intel_sdvo_get_value(intel_sdvo,
2978                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2979                                           &data_value, 4))
2980                         return false;
2981
2982                 if (!intel_sdvo_get_value(intel_sdvo,
2983                                           SDVO_CMD_GET_OVERSCAN_V,
2984                                           &response, 2))
2985                         return false;
2986
2987                 sdvo_state->tv.overscan_v = response;
2988
2989                 intel_sdvo_connector->max_vscan = data_value[0];
2990                 intel_sdvo_connector->top =
2991                         drm_property_create_range(dev, 0,
2992                                             "top_margin", 0, data_value[0]);
2993                 if (!intel_sdvo_connector->top)
2994                         return false;
2995
2996                 drm_object_attach_property(&connector->base,
2997                                            intel_sdvo_connector->top, 0);
2998
2999                 intel_sdvo_connector->bottom =
3000                         drm_property_create_range(dev, 0,
3001                                             "bottom_margin", 0, data_value[0]);
3002                 if (!intel_sdvo_connector->bottom)
3003                         return false;
3004
3005                 drm_object_attach_property(&connector->base,
3006                                               intel_sdvo_connector->bottom, 0);
3007                 DRM_DEBUG_KMS("v_overscan: max %d, "
3008                               "default %d, current %d\n",
3009                               data_value[0], data_value[1], response);
3010         }
3011
3012         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3013         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3014         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3015         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3016         ENHANCEMENT(&conn_state->tv, hue, HUE);
3017         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3018         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3019         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3020         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3021         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3022         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3023         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3024
3025         if (enhancements.dot_crawl) {
3026                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3027                         return false;
3028
3029                 sdvo_state->tv.dot_crawl = response & 0x1;
3030                 intel_sdvo_connector->dot_crawl =
3031                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3032                 if (!intel_sdvo_connector->dot_crawl)
3033                         return false;
3034
3035                 drm_object_attach_property(&connector->base,
3036                                            intel_sdvo_connector->dot_crawl, 0);
3037                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3038         }
3039
3040         return true;
3041 }
3042
3043 static bool
3044 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3045                                         struct intel_sdvo_connector *intel_sdvo_connector,
3046                                         struct intel_sdvo_enhancements_reply enhancements)
3047 {
3048         struct drm_device *dev = intel_sdvo->base.base.dev;
3049         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3050         u16 response, data_value[2];
3051
3052         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3053
3054         return true;
3055 }
3056 #undef ENHANCEMENT
3057 #undef _ENHANCEMENT
3058
3059 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3060                                                struct intel_sdvo_connector *intel_sdvo_connector)
3061 {
3062         union {
3063                 struct intel_sdvo_enhancements_reply reply;
3064                 u16 response;
3065         } enhancements;
3066
3067         BUILD_BUG_ON(sizeof(enhancements) != 2);
3068
3069         if (!intel_sdvo_get_value(intel_sdvo,
3070                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3071                                   &enhancements, sizeof(enhancements)) ||
3072             enhancements.response == 0) {
3073                 DRM_DEBUG_KMS("No enhancement is supported\n");
3074                 return true;
3075         }
3076
3077         if (IS_TV(intel_sdvo_connector))
3078                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3079         else if (IS_LVDS(intel_sdvo_connector))
3080                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3081         else
3082                 return true;
3083 }
3084
3085 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3086                                      struct i2c_msg *msgs,
3087                                      int num)
3088 {
3089         struct intel_sdvo *sdvo = adapter->algo_data;
3090
3091         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3092                 return -EIO;
3093
3094         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3095 }
3096
3097 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3098 {
3099         struct intel_sdvo *sdvo = adapter->algo_data;
3100         return sdvo->i2c->algo->functionality(sdvo->i2c);
3101 }
3102
3103 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3104         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3105         .functionality  = intel_sdvo_ddc_proxy_func
3106 };
3107
3108 static void proxy_lock_bus(struct i2c_adapter *adapter,
3109                            unsigned int flags)
3110 {
3111         struct intel_sdvo *sdvo = adapter->algo_data;
3112         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3113 }
3114
3115 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3116                              unsigned int flags)
3117 {
3118         struct intel_sdvo *sdvo = adapter->algo_data;
3119         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3120 }
3121
3122 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3123                              unsigned int flags)
3124 {
3125         struct intel_sdvo *sdvo = adapter->algo_data;
3126         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3127 }
3128
3129 static const struct i2c_lock_operations proxy_lock_ops = {
3130         .lock_bus =    proxy_lock_bus,
3131         .trylock_bus = proxy_trylock_bus,
3132         .unlock_bus =  proxy_unlock_bus,
3133 };
3134
3135 static bool
3136 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3137                           struct drm_i915_private *dev_priv)
3138 {
3139         struct pci_dev *pdev = dev_priv->drm.pdev;
3140
3141         sdvo->ddc.owner = THIS_MODULE;
3142         sdvo->ddc.class = I2C_CLASS_DDC;
3143         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3144         sdvo->ddc.dev.parent = &pdev->dev;
3145         sdvo->ddc.algo_data = sdvo;
3146         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3147         sdvo->ddc.lock_ops = &proxy_lock_ops;
3148
3149         return i2c_add_adapter(&sdvo->ddc) == 0;
3150 }
3151
3152 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3153                                    enum port port)
3154 {
3155         if (HAS_PCH_SPLIT(dev_priv))
3156                 WARN_ON(port != PORT_B);
3157         else
3158                 WARN_ON(port != PORT_B && port != PORT_C);
3159 }
3160
3161 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3162                      i915_reg_t sdvo_reg, enum port port)
3163 {
3164         struct intel_encoder *intel_encoder;
3165         struct intel_sdvo *intel_sdvo;
3166         int i;
3167
3168         assert_sdvo_port_valid(dev_priv, port);
3169
3170         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3171         if (!intel_sdvo)
3172                 return false;
3173
3174         intel_sdvo->sdvo_reg = sdvo_reg;
3175         intel_sdvo->port = port;
3176         intel_sdvo->slave_addr =
3177                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3178         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3179         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3180                 goto err_i2c_bus;
3181
3182         /* encoder type will be decided later */
3183         intel_encoder = &intel_sdvo->base;
3184         intel_encoder->type = INTEL_OUTPUT_SDVO;
3185         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3186         intel_encoder->port = port;
3187         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3188                          &intel_sdvo_enc_funcs, 0,
3189                          "SDVO %c", port_name(port));
3190
3191         /* Read the regs to test if we can talk to the device */
3192         for (i = 0; i < 0x40; i++) {
3193                 u8 byte;
3194
3195                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3196                         DRM_DEBUG_KMS("No SDVO device found on %s\n",
3197                                       SDVO_NAME(intel_sdvo));
3198                         goto err;
3199                 }
3200         }
3201
3202         intel_encoder->compute_config = intel_sdvo_compute_config;
3203         if (HAS_PCH_SPLIT(dev_priv)) {
3204                 intel_encoder->disable = pch_disable_sdvo;
3205                 intel_encoder->post_disable = pch_post_disable_sdvo;
3206         } else {
3207                 intel_encoder->disable = intel_disable_sdvo;
3208         }
3209         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3210         intel_encoder->enable = intel_enable_sdvo;
3211         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3212         intel_encoder->get_config = intel_sdvo_get_config;
3213
3214         /* In default case sdvo lvds is false */
3215         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3216                 goto err;
3217
3218         if (intel_sdvo_output_setup(intel_sdvo,
3219                                     intel_sdvo->caps.output_flags) != true) {
3220                 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3221                               SDVO_NAME(intel_sdvo));
3222                 /* Output_setup can leave behind connectors! */
3223                 goto err_output;
3224         }
3225
3226         /*
3227          * Only enable the hotplug irq if we need it, to work around noisy
3228          * hotplug lines.
3229          */
3230         if (intel_sdvo->hotplug_active) {
3231                 if (intel_sdvo->port == PORT_B)
3232                         intel_encoder->hpd_pin = HPD_SDVO_B;
3233                 else
3234                         intel_encoder->hpd_pin = HPD_SDVO_C;
3235         }
3236
3237         /*
3238          * Cloning SDVO with anything is often impossible, since the SDVO
3239          * encoder can request a special input timing mode. And even if that's
3240          * not the case we have evidence that cloning a plain unscaled mode with
3241          * VGA doesn't really work. Furthermore the cloning flags are way too
3242          * simplistic anyway to express such constraints, so just give up on
3243          * cloning for SDVO encoders.
3244          */
3245         intel_sdvo->base.cloneable = 0;
3246
3247         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3248
3249         /* Set the input timing to the screen. Assume always input 0. */
3250         if (!intel_sdvo_set_target_input(intel_sdvo))
3251                 goto err_output;
3252
3253         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3254                                                     &intel_sdvo->pixel_clock_min,
3255                                                     &intel_sdvo->pixel_clock_max))
3256                 goto err_output;
3257
3258         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3259                         "clock range %dMHz - %dMHz, "
3260                         "input 1: %c, input 2: %c, "
3261                         "output 1: %c, output 2: %c\n",
3262                         SDVO_NAME(intel_sdvo),
3263                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3264                         intel_sdvo->caps.device_rev_id,
3265                         intel_sdvo->pixel_clock_min / 1000,
3266                         intel_sdvo->pixel_clock_max / 1000,
3267                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3268                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3269                         /* check currently supported outputs */
3270                         intel_sdvo->caps.output_flags &
3271                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3272                         intel_sdvo->caps.output_flags &
3273                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3274         return true;
3275
3276 err_output:
3277         intel_sdvo_output_cleanup(intel_sdvo);
3278
3279 err:
3280         drm_encoder_cleanup(&intel_encoder->base);
3281         i2c_del_adapter(&intel_sdvo->ddc);
3282 err_i2c_bus:
3283         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3284         kfree(intel_sdvo);
3285
3286         return false;
3287 }