drivers/gpu/drm/i915/intel_bw.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #ifndef __INTEL_BW_H__
   7 #define __INTEL_BW_H__
   8
   9 #include <drm/drm_atomic.h>
  10
  11 #include "i915_drv.h"
  12 #include "intel_display.h"
  13
  14 struct drm_i915_private;
  15 struct intel_atomic_state;
  16 struct intel_crtc_state;
  17
  18 struct intel_bw_state {
  19         struct drm_private_state base;
  20
  21         unsigned int data_rate[I915_MAX_PIPES];
  22         u8 num_active_planes[I915_MAX_PIPES];
  23 };
  24
  25 #define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base)
  26
  27 static inline struct intel_bw_state *
  28 intel_atomic_get_bw_state(struct intel_atomic_state *state)
  29 {
  30         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
  31         struct drm_private_state *bw_state;
  32
  33         bw_state = drm_atomic_get_private_obj_state(&state->base,
  34                                                     &dev_priv->bw_obj);
  35         if (IS_ERR(bw_state))
  36                 return ERR_CAST(bw_state);
  37
  38         return to_intel_bw_state(bw_state);
  39 }
  40
  41 void intel_bw_init_hw(struct drm_i915_private *dev_priv);
  42 int intel_bw_init(struct drm_i915_private *dev_priv);
  43 int intel_bw_atomic_check(struct intel_atomic_state *state);
  44 void intel_bw_crtc_update(struct intel_bw_state *bw_state,
  45                           const struct intel_crtc_state *crtc_state);
  46
  47 #endif /* __INTEL_BW_H__ */