2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include <linux/sched/mm.h>
26 #include <drm/drm_gem.h>
28 #include "display/intel_frontbuffer.h"
30 #include "gem/i915_gem_lmem.h"
31 #include "gt/intel_engine.h"
32 #include "gt/intel_engine_heartbeat.h"
33 #include "gt/intel_gt.h"
34 #include "gt/intel_gt_requests.h"
37 #include "i915_sw_fence_work.h"
38 #include "i915_trace.h"
41 static struct kmem_cache *slab_vmas;
43 static struct i915_vma *i915_vma_alloc(void)
45 return kmem_cache_zalloc(slab_vmas, GFP_KERNEL);
48 static void i915_vma_free(struct i915_vma *vma)
50 return kmem_cache_free(slab_vmas, vma);
53 #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM)
55 #include <linux/stackdepot.h>
57 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
61 if (!vma->node.stack) {
62 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
63 vma->node.start, vma->node.size, reason);
67 stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
68 DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
69 vma->node.start, vma->node.size, reason, buf);
74 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
80 static inline struct i915_vma *active_to_vma(struct i915_active *ref)
82 return container_of(ref, typeof(struct i915_vma), active);
85 static int __i915_vma_active(struct i915_active *ref)
87 return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT;
90 static void __i915_vma_retire(struct i915_active *ref)
92 i915_vma_put(active_to_vma(ref));
95 static struct i915_vma *
96 vma_create(struct drm_i915_gem_object *obj,
97 struct i915_address_space *vm,
98 const struct i915_ggtt_view *view)
100 struct i915_vma *pos = ERR_PTR(-E2BIG);
101 struct i915_vma *vma;
102 struct rb_node *rb, **p;
104 /* The aliasing_ppgtt should never be used directly! */
105 GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm);
107 vma = i915_vma_alloc();
109 return ERR_PTR(-ENOMEM);
111 kref_init(&vma->ref);
112 vma->vm = i915_vm_get(vm);
113 vma->ops = &vm->vma_ops;
115 vma->size = obj->base.size;
116 vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
118 i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire, 0);
120 /* Declare ourselves safe for use inside shrinkers */
121 if (IS_ENABLED(CONFIG_LOCKDEP)) {
122 fs_reclaim_acquire(GFP_KERNEL);
123 might_lock(&vma->active.mutex);
124 fs_reclaim_release(GFP_KERNEL);
127 INIT_LIST_HEAD(&vma->closed_link);
129 if (view && view->type != I915_GGTT_VIEW_NORMAL) {
130 vma->ggtt_view = *view;
131 if (view->type == I915_GGTT_VIEW_PARTIAL) {
132 GEM_BUG_ON(range_overflows_t(u64,
133 view->partial.offset,
135 obj->base.size >> PAGE_SHIFT));
136 vma->size = view->partial.size;
137 vma->size <<= PAGE_SHIFT;
138 GEM_BUG_ON(vma->size > obj->base.size);
139 } else if (view->type == I915_GGTT_VIEW_ROTATED) {
140 vma->size = intel_rotation_info_size(&view->rotated);
141 vma->size <<= PAGE_SHIFT;
142 } else if (view->type == I915_GGTT_VIEW_REMAPPED) {
143 vma->size = intel_remapped_info_size(&view->remapped);
144 vma->size <<= PAGE_SHIFT;
148 if (unlikely(vma->size > vm->total))
151 GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
153 spin_lock(&obj->vma.lock);
155 if (i915_is_ggtt(vm)) {
156 if (unlikely(overflows_type(vma->size, u32)))
159 vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
160 i915_gem_object_get_tiling(obj),
161 i915_gem_object_get_stride(obj));
162 if (unlikely(vma->fence_size < vma->size || /* overflow */
163 vma->fence_size > vm->total))
166 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
168 vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size,
169 i915_gem_object_get_tiling(obj),
170 i915_gem_object_get_stride(obj));
171 GEM_BUG_ON(!is_power_of_2(vma->fence_alignment));
173 __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
177 p = &obj->vma.tree.rb_node;
182 pos = rb_entry(rb, struct i915_vma, obj_node);
185 * If the view already exists in the tree, another thread
186 * already created a matching vma, so return the older instance
187 * and dispose of ours.
189 cmp = i915_vma_compare(pos, vm, view);
197 rb_link_node(&vma->obj_node, rb, p);
198 rb_insert_color(&vma->obj_node, &obj->vma.tree);
200 if (i915_vma_is_ggtt(vma))
202 * We put the GGTT vma at the start of the vma-list, followed
203 * by the ppGGTT vma. This allows us to break early when
204 * iterating over only the GGTT vma for an object, see
205 * for_each_ggtt_vma()
207 list_add(&vma->obj_link, &obj->vma.list);
209 list_add_tail(&vma->obj_link, &obj->vma.list);
211 spin_unlock(&obj->vma.lock);
216 spin_unlock(&obj->vma.lock);
223 static struct i915_vma *
224 i915_vma_lookup(struct drm_i915_gem_object *obj,
225 struct i915_address_space *vm,
226 const struct i915_ggtt_view *view)
230 rb = obj->vma.tree.rb_node;
232 struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node);
235 cmp = i915_vma_compare(vma, vm, view);
249 * i915_vma_instance - return the singleton instance of the VMA
250 * @obj: parent &struct drm_i915_gem_object to be mapped
251 * @vm: address space in which the mapping is located
252 * @view: additional mapping requirements
254 * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with
255 * the same @view characteristics. If a match is not found, one is created.
256 * Once created, the VMA is kept until either the object is freed, or the
257 * address space is closed.
259 * Returns the vma, or an error pointer.
262 i915_vma_instance(struct drm_i915_gem_object *obj,
263 struct i915_address_space *vm,
264 const struct i915_ggtt_view *view)
266 struct i915_vma *vma;
268 GEM_BUG_ON(view && !i915_is_ggtt_or_dpt(vm));
269 GEM_BUG_ON(!atomic_read(&vm->open));
271 spin_lock(&obj->vma.lock);
272 vma = i915_vma_lookup(obj, vm, view);
273 spin_unlock(&obj->vma.lock);
275 /* vma_create() will resolve the race if another creates the vma */
277 vma = vma_create(obj, vm, view);
279 GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view));
283 struct i915_vma_work {
284 struct dma_fence_work base;
285 struct i915_address_space *vm;
286 struct i915_vm_pt_stash stash;
287 struct i915_vma *vma;
288 struct drm_i915_gem_object *pinned;
289 struct i915_sw_dma_fence_cb cb;
290 enum i915_cache_level cache_level;
294 static void __vma_bind(struct dma_fence_work *work)
296 struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
297 struct i915_vma *vma = vw->vma;
299 vma->ops->bind_vma(vw->vm, &vw->stash,
300 vma, vw->cache_level, vw->flags);
303 static void __vma_release(struct dma_fence_work *work)
305 struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
308 __i915_gem_object_unpin_pages(vw->pinned);
309 i915_gem_object_put(vw->pinned);
312 i915_vm_free_pt_stash(vw->vm, &vw->stash);
316 static const struct dma_fence_work_ops bind_ops = {
319 .release = __vma_release,
322 struct i915_vma_work *i915_vma_work(void)
324 struct i915_vma_work *vw;
326 vw = kzalloc(sizeof(*vw), GFP_KERNEL);
330 dma_fence_work_init(&vw->base, &bind_ops);
331 vw->base.dma.error = -EAGAIN; /* disable the worker by default */
336 int i915_vma_wait_for_bind(struct i915_vma *vma)
340 if (rcu_access_pointer(vma->active.excl.fence)) {
341 struct dma_fence *fence;
344 fence = dma_fence_get_rcu_safe(&vma->active.excl.fence);
347 err = dma_fence_wait(fence, true);
348 dma_fence_put(fence);
355 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
356 static int i915_vma_verify_bind_complete(struct i915_vma *vma)
358 struct dma_fence *fence = i915_active_fence_get(&vma->active.excl);
364 if (dma_fence_is_signaled(fence))
369 dma_fence_put(fence);
374 #define i915_vma_verify_bind_complete(_vma) 0
378 * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space.
380 * @cache_level: mapping cache level
381 * @flags: flags like global or local mapping
382 * @work: preallocated worker for allocating and binding the PTE
384 * DMA addresses are taken from the scatter-gather table of this object (or of
385 * this VMA in case of non-default GGTT views) and PTE entries set up.
386 * Note that DMA addresses are also the only part of the SG table we care about.
388 int i915_vma_bind(struct i915_vma *vma,
389 enum i915_cache_level cache_level,
391 struct i915_vma_work *work)
396 lockdep_assert_held(&vma->vm->mutex);
397 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
398 GEM_BUG_ON(vma->size > vma->node.size);
400 if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
405 if (GEM_DEBUG_WARN_ON(!flags))
409 bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
411 vma_flags = atomic_read(&vma->flags);
412 vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
414 bind_flags &= ~vma_flags;
418 GEM_BUG_ON(!atomic_read(&vma->pages_count));
420 trace_i915_vma_bind(vma, bind_flags);
421 if (work && bind_flags & vma->vm->bind_async_flags) {
422 struct dma_fence *prev;
425 work->cache_level = cache_level;
426 work->flags = bind_flags;
429 * Note we only want to chain up to the migration fence on
430 * the pages (not the object itself). As we don't track that,
431 * yet, we have to use the exclusive fence instead.
433 * Also note that we do not want to track the async vma as
434 * part of the obj->resv->excl_fence as it only affects
435 * execution and not content or object's backing store lifetime.
437 prev = i915_active_set_exclusive(&vma->active, &work->base.dma);
439 __i915_sw_fence_await_dma_fence(&work->base.chain,
445 work->base.dma.error = 0; /* enable the queue_work() */
447 __i915_gem_object_pin_pages(vma->obj);
448 work->pinned = i915_gem_object_get(vma->obj);
453 ret = i915_gem_object_wait_moving_fence(vma->obj, true);
457 vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);
460 atomic_or(bind_flags, &vma->flags);
464 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
469 if (!i915_gem_object_is_lmem(vma->obj)) {
470 if (GEM_WARN_ON(!i915_vma_is_map_and_fenceable(vma))) {
476 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
477 GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND));
478 GEM_BUG_ON(i915_vma_verify_bind_complete(vma));
480 ptr = READ_ONCE(vma->iomap);
483 * TODO: consider just using i915_gem_object_pin_map() for lmem
484 * instead, which already supports mapping non-contiguous chunks
485 * of pages, that way we can also drop the
486 * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
488 if (i915_gem_object_is_lmem(vma->obj))
489 ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
490 vma->obj->base.size);
492 ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
500 if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
501 io_mapping_unmap(ptr);
508 err = i915_vma_pin_fence(vma);
512 i915_vma_set_ggtt_write(vma);
514 /* NB Access through the GTT requires the device to be awake. */
518 __i915_vma_unpin(vma);
520 return IO_ERR_PTR(err);
523 void i915_vma_flush_writes(struct i915_vma *vma)
525 if (i915_vma_unset_ggtt_write(vma))
526 intel_gt_flush_ggtt_writes(vma->vm->gt);
529 void i915_vma_unpin_iomap(struct i915_vma *vma)
531 GEM_BUG_ON(vma->iomap == NULL);
533 i915_vma_flush_writes(vma);
535 i915_vma_unpin_fence(vma);
539 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags)
541 struct i915_vma *vma;
542 struct drm_i915_gem_object *obj;
544 vma = fetch_and_zero(p_vma);
553 if (flags & I915_VMA_RELEASE_MAP)
554 i915_gem_object_unpin_map(obj);
556 i915_gem_object_put(obj);
559 bool i915_vma_misplaced(const struct i915_vma *vma,
560 u64 size, u64 alignment, u64 flags)
562 if (!drm_mm_node_allocated(&vma->node))
565 if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma)))
568 if (vma->node.size < size)
571 GEM_BUG_ON(alignment && !is_power_of_2(alignment));
572 if (alignment && !IS_ALIGNED(vma->node.start, alignment))
575 if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma))
578 if (flags & PIN_OFFSET_BIAS &&
579 vma->node.start < (flags & PIN_OFFSET_MASK))
582 if (flags & PIN_OFFSET_FIXED &&
583 vma->node.start != (flags & PIN_OFFSET_MASK))
589 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
591 bool mappable, fenceable;
593 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
594 GEM_BUG_ON(!vma->fence_size);
596 fenceable = (vma->node.size >= vma->fence_size &&
597 IS_ALIGNED(vma->node.start, vma->fence_alignment));
599 mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
601 if (mappable && fenceable)
602 set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
604 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
607 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color)
609 struct drm_mm_node *node = &vma->node;
610 struct drm_mm_node *other;
613 * On some machines we have to be careful when putting differing types
614 * of snoopable memory together to avoid the prefetcher crossing memory
615 * domains and dying. During vm initialisation, we decide whether or not
616 * these constraints apply and set the drm_mm.color_adjust
619 if (!i915_vm_has_cache_coloring(vma->vm))
622 /* Only valid to be called on an already inserted vma */
623 GEM_BUG_ON(!drm_mm_node_allocated(node));
624 GEM_BUG_ON(list_empty(&node->node_list));
626 other = list_prev_entry(node, node_list);
627 if (i915_node_color_differs(other, color) &&
628 !drm_mm_hole_follows(other))
631 other = list_next_entry(node, node_list);
632 if (i915_node_color_differs(other, color) &&
633 !drm_mm_hole_follows(node))
640 * i915_vma_insert - finds a slot for the vma in its address space
642 * @size: requested size in bytes (can be larger than the VMA)
643 * @alignment: required alignment
644 * @flags: mask of PIN_* flags to use
646 * First we try to allocate some free space that meets the requirements for
647 * the VMA. Failiing that, if the flags permit, it will evict an old VMA,
648 * preferrably the oldest idle entry to make room for the new VMA.
651 * 0 on success, negative error code otherwise.
654 i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
660 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
661 GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
663 size = max(size, vma->size);
664 alignment = max(alignment, vma->display_alignment);
665 if (flags & PIN_MAPPABLE) {
666 size = max_t(typeof(size), size, vma->fence_size);
667 alignment = max_t(typeof(alignment),
668 alignment, vma->fence_alignment);
671 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
672 GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
673 GEM_BUG_ON(!is_power_of_2(alignment));
675 start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0;
676 GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
678 end = vma->vm->total;
679 if (flags & PIN_MAPPABLE)
680 end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
681 if (flags & PIN_ZONE_4G)
682 end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
683 GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
685 /* If binding the object/GGTT view requires more space than the entire
686 * aperture has, reject it early before evicting everything in a vain
687 * attempt to find space.
690 DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
691 size, flags & PIN_MAPPABLE ? "mappable" : "total",
697 if (i915_vm_has_cache_coloring(vma->vm))
698 color = vma->obj->cache_level;
700 if (flags & PIN_OFFSET_FIXED) {
701 u64 offset = flags & PIN_OFFSET_MASK;
702 if (!IS_ALIGNED(offset, alignment) ||
703 range_overflows(offset, size, end))
706 ret = i915_gem_gtt_reserve(vma->vm, &vma->node,
713 * We only support huge gtt pages through the 48b PPGTT,
714 * however we also don't want to force any alignment for
715 * objects which need to be tightly packed into the low 32bits.
717 * Note that we assume that GGTT are limited to 4GiB for the
718 * forseeable future. See also i915_ggtt_offset().
720 if (upper_32_bits(end - 1) &&
721 vma->page_sizes.sg > I915_GTT_PAGE_SIZE) {
723 * We can't mix 64K and 4K PTEs in the same page-table
724 * (2M block), and so to avoid the ugliness and
725 * complexity of coloring we opt for just aligning 64K
729 rounddown_pow_of_two(vma->page_sizes.sg |
730 I915_GTT_PAGE_SIZE_2M);
733 * Check we don't expand for the limited Global GTT
734 * (mappable aperture is even more precious!). This
735 * also checks that we exclude the aliasing-ppgtt.
737 GEM_BUG_ON(i915_vma_is_ggtt(vma));
739 alignment = max(alignment, page_alignment);
741 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
742 size = round_up(size, I915_GTT_PAGE_SIZE_2M);
745 ret = i915_gem_gtt_insert(vma->vm, &vma->node,
746 size, alignment, color,
751 GEM_BUG_ON(vma->node.start < start);
752 GEM_BUG_ON(vma->node.start + vma->node.size > end);
754 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
755 GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color));
757 list_add_tail(&vma->vm_link, &vma->vm->bound_list);
763 i915_vma_detach(struct i915_vma *vma)
765 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
766 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
769 * And finally now the object is completely decoupled from this
770 * vma, we can drop its hold on the backing storage and allow
771 * it to be reaped by the shrinker.
773 list_del(&vma->vm_link);
776 static bool try_qad_pin(struct i915_vma *vma, unsigned int flags)
781 bound = atomic_read(&vma->flags);
783 if (unlikely(flags & ~bound))
786 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR)))
789 if (!(bound & I915_VMA_PIN_MASK))
792 GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0);
793 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
799 * If pin_count==0, but we are bound, check under the lock to avoid
800 * racing with a concurrent i915_vma_unbind().
802 mutex_lock(&vma->vm->mutex);
804 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR))) {
809 if (unlikely(flags & ~bound)) {
813 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
814 mutex_unlock(&vma->vm->mutex);
819 static struct scatterlist *
820 rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
821 unsigned int width, unsigned int height,
822 unsigned int src_stride, unsigned int dst_stride,
823 struct sg_table *st, struct scatterlist *sg)
825 unsigned int column, row;
826 unsigned int src_idx;
828 for (column = 0; column < width; column++) {
831 src_idx = src_stride * (height - 1) + column + offset;
832 for (row = 0; row < height; row++) {
835 * We don't need the pages, but need to initialize
836 * the entries so the sg list can be happily traversed.
837 * The only thing we need are DMA addresses.
839 sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
841 i915_gem_object_get_dma_address(obj, src_idx);
842 sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
844 src_idx -= src_stride;
847 left = (dst_stride - height) * I915_GTT_PAGE_SIZE;
855 * The DE ignores the PTEs for the padding tiles, the sg entry
856 * here is just a conenience to indicate how many padding PTEs
857 * to insert at this spot.
859 sg_set_page(sg, NULL, left, 0);
860 sg_dma_address(sg) = 0;
861 sg_dma_len(sg) = left;
868 static noinline struct sg_table *
869 intel_rotate_pages(struct intel_rotation_info *rot_info,
870 struct drm_i915_gem_object *obj)
872 unsigned int size = intel_rotation_info_size(rot_info);
873 struct drm_i915_private *i915 = to_i915(obj->base.dev);
875 struct scatterlist *sg;
879 /* Allocate target SG list. */
880 st = kmalloc(sizeof(*st), GFP_KERNEL);
884 ret = sg_alloc_table(st, size, GFP_KERNEL);
891 for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
892 sg = rotate_pages(obj, rot_info->plane[i].offset,
893 rot_info->plane[i].width, rot_info->plane[i].height,
894 rot_info->plane[i].src_stride,
895 rot_info->plane[i].dst_stride,
904 drm_dbg(&i915->drm, "Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n",
905 obj->base.size, rot_info->plane[0].width,
906 rot_info->plane[0].height, size);
911 static struct scatterlist *
912 remap_pages(struct drm_i915_gem_object *obj,
913 unsigned int offset, unsigned int alignment_pad,
914 unsigned int width, unsigned int height,
915 unsigned int src_stride, unsigned int dst_stride,
916 struct sg_table *st, struct scatterlist *sg)
920 if (!width || !height)
927 * The DE ignores the PTEs for the padding tiles, the sg entry
928 * here is just a convenience to indicate how many padding PTEs
929 * to insert at this spot.
931 sg_set_page(sg, NULL, alignment_pad * 4096, 0);
932 sg_dma_address(sg) = 0;
933 sg_dma_len(sg) = alignment_pad * 4096;
937 for (row = 0; row < height; row++) {
938 unsigned int left = width * I915_GTT_PAGE_SIZE;
945 * We don't need the pages, but need to initialize
946 * the entries so the sg list can be happily traversed.
947 * The only thing we need are DMA addresses.
950 addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
952 length = min(left, length);
956 sg_set_page(sg, NULL, length, 0);
957 sg_dma_address(sg) = addr;
958 sg_dma_len(sg) = length;
961 offset += length / I915_GTT_PAGE_SIZE;
965 offset += src_stride - width;
967 left = (dst_stride - width) * I915_GTT_PAGE_SIZE;
975 * The DE ignores the PTEs for the padding tiles, the sg entry
976 * here is just a conenience to indicate how many padding PTEs
977 * to insert at this spot.
979 sg_set_page(sg, NULL, left, 0);
980 sg_dma_address(sg) = 0;
981 sg_dma_len(sg) = left;
988 static noinline struct sg_table *
989 intel_remap_pages(struct intel_remapped_info *rem_info,
990 struct drm_i915_gem_object *obj)
992 unsigned int size = intel_remapped_info_size(rem_info);
993 struct drm_i915_private *i915 = to_i915(obj->base.dev);
995 struct scatterlist *sg;
996 unsigned int gtt_offset = 0;
1000 /* Allocate target SG list. */
1001 st = kmalloc(sizeof(*st), GFP_KERNEL);
1005 ret = sg_alloc_table(st, size, GFP_KERNEL);
1012 for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++) {
1013 unsigned int alignment_pad = 0;
1015 if (rem_info->plane_alignment)
1016 alignment_pad = ALIGN(gtt_offset, rem_info->plane_alignment) - gtt_offset;
1018 sg = remap_pages(obj,
1019 rem_info->plane[i].offset, alignment_pad,
1020 rem_info->plane[i].width, rem_info->plane[i].height,
1021 rem_info->plane[i].src_stride, rem_info->plane[i].dst_stride,
1024 gtt_offset += alignment_pad +
1025 rem_info->plane[i].dst_stride * rem_info->plane[i].height;
1036 drm_dbg(&i915->drm, "Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
1037 obj->base.size, rem_info->plane[0].width,
1038 rem_info->plane[0].height, size);
1040 return ERR_PTR(ret);
1043 static noinline struct sg_table *
1044 intel_partial_pages(const struct i915_ggtt_view *view,
1045 struct drm_i915_gem_object *obj)
1047 struct sg_table *st;
1048 struct scatterlist *sg, *iter;
1049 unsigned int count = view->partial.size;
1050 unsigned int offset;
1053 st = kmalloc(sizeof(*st), GFP_KERNEL);
1057 ret = sg_alloc_table(st, count, GFP_KERNEL);
1061 iter = i915_gem_object_get_sg_dma(obj, view->partial.offset, &offset);
1069 len = min(sg_dma_len(iter) - (offset << PAGE_SHIFT),
1070 count << PAGE_SHIFT);
1071 sg_set_page(sg, NULL, len, 0);
1072 sg_dma_address(sg) =
1073 sg_dma_address(iter) + (offset << PAGE_SHIFT);
1074 sg_dma_len(sg) = len;
1077 count -= len >> PAGE_SHIFT;
1080 i915_sg_trim(st); /* Drop any unused tail entries. */
1086 iter = __sg_next(iter);
1093 return ERR_PTR(ret);
1097 __i915_vma_get_pages(struct i915_vma *vma)
1099 struct sg_table *pages;
1103 * The vma->pages are only valid within the lifespan of the borrowed
1104 * obj->mm.pages. When the obj->mm.pages sg_table is regenerated, so
1105 * must be the vma->pages. A simple rule is that vma->pages must only
1106 * be accessed when the obj->mm.pages are pinned.
1108 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(vma->obj));
1110 switch (vma->ggtt_view.type) {
1112 GEM_BUG_ON(vma->ggtt_view.type);
1114 case I915_GGTT_VIEW_NORMAL:
1115 pages = vma->obj->mm.pages;
1118 case I915_GGTT_VIEW_ROTATED:
1120 intel_rotate_pages(&vma->ggtt_view.rotated, vma->obj);
1123 case I915_GGTT_VIEW_REMAPPED:
1125 intel_remap_pages(&vma->ggtt_view.remapped, vma->obj);
1128 case I915_GGTT_VIEW_PARTIAL:
1129 pages = intel_partial_pages(&vma->ggtt_view, vma->obj);
1134 if (IS_ERR(pages)) {
1135 ret = PTR_ERR(pages);
1137 drm_err(&vma->vm->i915->drm,
1138 "Failed to get pages for VMA view type %u (%d)!\n",
1139 vma->ggtt_view.type, ret);
1147 I915_SELFTEST_EXPORT int i915_vma_get_pages(struct i915_vma *vma)
1151 if (atomic_add_unless(&vma->pages_count, 1, 0))
1154 err = i915_gem_object_pin_pages(vma->obj);
1158 err = __i915_vma_get_pages(vma);
1162 vma->page_sizes = vma->obj->mm.page_sizes;
1163 atomic_inc(&vma->pages_count);
1168 __i915_gem_object_unpin_pages(vma->obj);
1173 static void __vma_put_pages(struct i915_vma *vma, unsigned int count)
1175 /* We allocate under vma_get_pages, so beware the shrinker */
1176 struct sg_table *pages = READ_ONCE(vma->pages);
1178 GEM_BUG_ON(atomic_read(&vma->pages_count) < count);
1180 if (atomic_sub_return(count, &vma->pages_count) == 0) {
1182 * The atomic_sub_return is a read barrier for the READ_ONCE of
1185 * READ_ONCE is safe because this is either called from the same
1186 * function (i915_vma_pin_ww), or guarded by vma->vm->mutex.
1188 * TODO: We're leaving vma->pages dangling, until vma->obj->resv
1191 if (pages != vma->obj->mm.pages) {
1192 sg_free_table(pages);
1196 i915_gem_object_unpin_pages(vma->obj);
1200 I915_SELFTEST_EXPORT void i915_vma_put_pages(struct i915_vma *vma)
1202 if (atomic_add_unless(&vma->pages_count, -1, 1))
1205 __vma_put_pages(vma, 1);
1208 static void vma_unbind_pages(struct i915_vma *vma)
1212 lockdep_assert_held(&vma->vm->mutex);
1214 /* The upper portion of pages_count is the number of bindings */
1215 count = atomic_read(&vma->pages_count);
1216 count >>= I915_VMA_PAGES_BIAS;
1219 __vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS);
1222 int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1223 u64 size, u64 alignment, u64 flags)
1225 struct i915_vma_work *work = NULL;
1226 struct dma_fence *moving = NULL;
1227 intel_wakeref_t wakeref = 0;
1231 assert_vma_held(vma);
1234 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
1235 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
1237 GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL)));
1239 /* First try and grab the pin without rebinding the vma */
1240 if (try_qad_pin(vma, flags & I915_VMA_BIND_MASK))
1243 err = i915_vma_get_pages(vma);
1247 if (flags & PIN_GLOBAL)
1248 wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
1250 moving = vma->obj ? i915_gem_object_get_moving_fence(vma->obj) : NULL;
1251 if (flags & vma->vm->bind_async_flags || moving) {
1253 err = i915_vm_lock_objects(vma->vm, ww);
1257 work = i915_vma_work();
1263 work->vm = i915_vm_get(vma->vm);
1265 dma_fence_work_chain(&work->base, moving);
1267 /* Allocate enough page directories to used PTE */
1268 if (vma->vm->allocate_va_range) {
1269 err = i915_vm_alloc_pt_stash(vma->vm,
1275 err = i915_vm_map_pt_stash(vma->vm, &work->stash);
1282 * Differentiate between user/kernel vma inside the aliasing-ppgtt.
1284 * We conflate the Global GTT with the user's vma when using the
1285 * aliasing-ppgtt, but it is still vitally important to try and
1286 * keep the use cases distinct. For example, userptr objects are
1287 * not allowed inside the Global GTT as that will cause lock
1288 * inversions when we have to evict them the mmu_notifier callbacks -
1289 * but they are allowed to be part of the user ppGTT which can never
1290 * be mapped. As such we try to give the distinct users of the same
1291 * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt
1292 * and i915_ppgtt separate].
1294 * NB this may cause us to mask real lock inversions -- while the
1295 * code is safe today, lockdep may not be able to spot future
1298 err = mutex_lock_interruptible_nested(&vma->vm->mutex,
1299 !(flags & PIN_GLOBAL));
1303 /* No more allocations allowed now we hold vm->mutex */
1305 if (unlikely(i915_vma_is_closed(vma))) {
1310 bound = atomic_read(&vma->flags);
1311 if (unlikely(bound & I915_VMA_ERROR)) {
1316 if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) {
1317 err = -EAGAIN; /* pins are meant to be fairly temporary */
1321 if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) {
1322 __i915_vma_pin(vma);
1326 err = i915_active_acquire(&vma->active);
1330 if (!(bound & I915_VMA_BIND_MASK)) {
1331 err = i915_vma_insert(vma, size, alignment, flags);
1335 if (i915_is_ggtt(vma->vm))
1336 __i915_vma_set_map_and_fenceable(vma);
1339 GEM_BUG_ON(!vma->pages);
1340 err = i915_vma_bind(vma,
1341 vma->obj->cache_level,
1346 /* There should only be at most 2 active bindings (user, global) */
1347 GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound);
1348 atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count);
1349 list_move_tail(&vma->vm_link, &vma->vm->bound_list);
1351 __i915_vma_pin(vma);
1352 GEM_BUG_ON(!i915_vma_is_pinned(vma));
1353 GEM_BUG_ON(!i915_vma_is_bound(vma, flags));
1354 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
1357 if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) {
1358 i915_vma_detach(vma);
1359 drm_mm_remove_node(&vma->node);
1362 i915_active_release(&vma->active);
1364 mutex_unlock(&vma->vm->mutex);
1367 dma_fence_work_commit_imm(&work->base);
1370 intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
1373 dma_fence_put(moving);
1375 i915_vma_put_pages(vma);
1379 static void flush_idle_contexts(struct intel_gt *gt)
1381 struct intel_engine_cs *engine;
1382 enum intel_engine_id id;
1384 for_each_engine(engine, gt, id)
1385 intel_engine_flush_barriers(engine);
1387 intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
1390 static int __i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1391 u32 align, unsigned int flags)
1393 struct i915_address_space *vm = vma->vm;
1397 err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL);
1399 if (err != -ENOSPC) {
1401 err = i915_vma_wait_for_bind(vma);
1403 i915_vma_unpin(vma);
1408 /* Unlike i915_vma_pin, we don't take no for an answer! */
1409 flush_idle_contexts(vm->gt);
1410 if (mutex_lock_interruptible(&vm->mutex) == 0) {
1411 i915_gem_evict_vm(vm);
1412 mutex_unlock(&vm->mutex);
1417 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1418 u32 align, unsigned int flags)
1420 struct i915_gem_ww_ctx _ww;
1423 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
1426 return __i915_ggtt_pin(vma, ww, align, flags);
1428 #ifdef CONFIG_LOCKDEP
1429 WARN_ON(dma_resv_held(vma->obj->base.resv));
1432 for_i915_gem_ww(&_ww, err, true) {
1433 err = i915_gem_object_lock(vma->obj, &_ww);
1435 err = __i915_ggtt_pin(vma, &_ww, align, flags);
1441 static void __vma_close(struct i915_vma *vma, struct intel_gt *gt)
1444 * We defer actually closing, unbinding and destroying the VMA until
1445 * the next idle point, or if the object is freed in the meantime. By
1446 * postponing the unbind, we allow for it to be resurrected by the
1447 * client, avoiding the work required to rebind the VMA. This is
1448 * advantageous for DRI, where the client/server pass objects
1449 * between themselves, temporarily opening a local VMA to the
1450 * object, and then closing it again. The same object is then reused
1451 * on the next frame (or two, depending on the depth of the swap queue)
1452 * causing us to rebind the VMA once more. This ends up being a lot
1453 * of wasted work for the steady state.
1455 GEM_BUG_ON(i915_vma_is_closed(vma));
1456 list_add(&vma->closed_link, >->closed_vma);
1459 void i915_vma_close(struct i915_vma *vma)
1461 struct intel_gt *gt = vma->vm->gt;
1462 unsigned long flags;
1464 if (i915_vma_is_ggtt(vma))
1467 GEM_BUG_ON(!atomic_read(&vma->open_count));
1468 if (atomic_dec_and_lock_irqsave(&vma->open_count,
1471 __vma_close(vma, gt);
1472 spin_unlock_irqrestore(>->closed_lock, flags);
1476 static void __i915_vma_remove_closed(struct i915_vma *vma)
1478 struct intel_gt *gt = vma->vm->gt;
1480 spin_lock_irq(>->closed_lock);
1481 list_del_init(&vma->closed_link);
1482 spin_unlock_irq(>->closed_lock);
1485 void i915_vma_reopen(struct i915_vma *vma)
1487 if (i915_vma_is_closed(vma))
1488 __i915_vma_remove_closed(vma);
1491 void i915_vma_release(struct kref *ref)
1493 struct i915_vma *vma = container_of(ref, typeof(*vma), ref);
1494 struct drm_i915_gem_object *obj = vma->obj;
1496 if (drm_mm_node_allocated(&vma->node)) {
1497 mutex_lock(&vma->vm->mutex);
1498 atomic_and(~I915_VMA_PIN_MASK, &vma->flags);
1499 WARN_ON(__i915_vma_unbind(vma));
1500 mutex_unlock(&vma->vm->mutex);
1501 GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
1503 GEM_BUG_ON(i915_vma_is_active(vma));
1505 spin_lock(&obj->vma.lock);
1506 list_del(&vma->obj_link);
1507 if (!RB_EMPTY_NODE(&vma->obj_node))
1508 rb_erase(&vma->obj_node, &obj->vma.tree);
1509 spin_unlock(&obj->vma.lock);
1511 __i915_vma_remove_closed(vma);
1512 i915_vm_put(vma->vm);
1514 i915_active_fini(&vma->active);
1518 void i915_vma_parked(struct intel_gt *gt)
1520 struct i915_vma *vma, *next;
1523 spin_lock_irq(>->closed_lock);
1524 list_for_each_entry_safe(vma, next, >->closed_vma, closed_link) {
1525 struct drm_i915_gem_object *obj = vma->obj;
1526 struct i915_address_space *vm = vma->vm;
1528 /* XXX All to avoid keeping a reference on i915_vma itself */
1530 if (!kref_get_unless_zero(&obj->base.refcount))
1533 if (!i915_vm_tryopen(vm)) {
1534 i915_gem_object_put(obj);
1538 list_move(&vma->closed_link, &closed);
1540 spin_unlock_irq(>->closed_lock);
1542 /* As the GT is held idle, no vma can be reopened as we destroy them */
1543 list_for_each_entry_safe(vma, next, &closed, closed_link) {
1544 struct drm_i915_gem_object *obj = vma->obj;
1545 struct i915_address_space *vm = vma->vm;
1547 INIT_LIST_HEAD(&vma->closed_link);
1548 __i915_vma_put(vma);
1550 i915_gem_object_put(obj);
1555 static void __i915_vma_iounmap(struct i915_vma *vma)
1557 GEM_BUG_ON(i915_vma_is_pinned(vma));
1559 if (vma->iomap == NULL)
1562 io_mapping_unmap(vma->iomap);
1566 void i915_vma_revoke_mmap(struct i915_vma *vma)
1568 struct drm_vma_offset_node *node;
1571 if (!i915_vma_has_userfault(vma))
1574 GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
1575 GEM_BUG_ON(!vma->obj->userfault_count);
1577 node = &vma->mmo->vma_node;
1578 vma_offset = vma->ggtt_view.partial.offset << PAGE_SHIFT;
1579 unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping,
1580 drm_vma_node_offset_addr(node) + vma_offset,
1584 i915_vma_unset_userfault(vma);
1585 if (!--vma->obj->userfault_count)
1586 list_del(&vma->obj->userfault_link);
1590 __i915_request_await_bind(struct i915_request *rq, struct i915_vma *vma)
1592 return __i915_request_await_exclusive(rq, &vma->active);
1595 static int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq)
1599 GEM_BUG_ON(!i915_vma_is_pinned(vma));
1601 /* Wait for the vma to be bound before we start! */
1602 err = __i915_request_await_bind(rq, vma);
1606 return i915_active_add_request(&vma->active, rq);
1609 int _i915_vma_move_to_active(struct i915_vma *vma,
1610 struct i915_request *rq,
1611 struct dma_fence *fence,
1614 struct drm_i915_gem_object *obj = vma->obj;
1617 assert_object_held(obj);
1619 err = __i915_vma_move_to_active(vma, rq);
1623 if (flags & EXEC_OBJECT_WRITE) {
1624 struct intel_frontbuffer *front;
1626 front = __intel_frontbuffer_get(obj);
1627 if (unlikely(front)) {
1628 if (intel_frontbuffer_invalidate(front, ORIGIN_CS))
1629 i915_active_add_request(&front->write, rq);
1630 intel_frontbuffer_put(front);
1634 dma_resv_add_excl_fence(vma->obj->base.resv, fence);
1635 obj->write_domain = I915_GEM_DOMAIN_RENDER;
1636 obj->read_domains = 0;
1639 if (!(flags & __EXEC_OBJECT_NO_RESERVE)) {
1640 err = dma_resv_reserve_shared(vma->obj->base.resv, 1);
1646 dma_resv_add_shared_fence(vma->obj->base.resv, fence);
1647 obj->write_domain = 0;
1651 if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence)
1652 i915_active_add_request(&vma->fence->active, rq);
1654 obj->read_domains |= I915_GEM_GPU_DOMAINS;
1655 obj->mm.dirty = true;
1657 GEM_BUG_ON(!i915_vma_is_active(vma));
1661 void __i915_vma_evict(struct i915_vma *vma)
1663 GEM_BUG_ON(i915_vma_is_pinned(vma));
1665 if (i915_vma_is_map_and_fenceable(vma)) {
1666 /* Force a pagefault for domain tracking on next user access */
1667 i915_vma_revoke_mmap(vma);
1670 * Check that we have flushed all writes through the GGTT
1671 * before the unbind, other due to non-strict nature of those
1672 * indirect writes they may end up referencing the GGTT PTE
1675 * Note that we may be concurrently poking at the GGTT_WRITE
1676 * bit from set-domain, as we mark all GGTT vma associated
1677 * with an object. We know this is for another vma, as we
1678 * are currently unbinding this one -- so if this vma will be
1679 * reused, it will be refaulted and have its dirty bit set
1680 * before the next write.
1682 i915_vma_flush_writes(vma);
1684 /* release the fence reg _after_ flushing */
1685 i915_vma_revoke_fence(vma);
1687 __i915_vma_iounmap(vma);
1688 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
1690 GEM_BUG_ON(vma->fence);
1691 GEM_BUG_ON(i915_vma_has_userfault(vma));
1693 if (likely(atomic_read(&vma->vm->open))) {
1694 trace_i915_vma_unbind(vma);
1695 vma->ops->unbind_vma(vma->vm, vma);
1697 atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE),
1700 i915_vma_detach(vma);
1701 vma_unbind_pages(vma);
1704 int __i915_vma_unbind(struct i915_vma *vma)
1708 lockdep_assert_held(&vma->vm->mutex);
1710 if (!drm_mm_node_allocated(&vma->node))
1713 if (i915_vma_is_pinned(vma)) {
1714 vma_print_allocator(vma, "is pinned");
1719 * After confirming that no one else is pinning this vma, wait for
1720 * any laggards who may have crept in during the wait (through
1721 * a residual pin skipping the vm->mutex) to complete.
1723 ret = i915_vma_sync(vma);
1727 GEM_BUG_ON(i915_vma_is_active(vma));
1728 __i915_vma_evict(vma);
1730 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
1734 int i915_vma_unbind(struct i915_vma *vma)
1736 struct i915_address_space *vm = vma->vm;
1737 intel_wakeref_t wakeref = 0;
1740 /* Optimistic wait before taking the mutex */
1741 err = i915_vma_sync(vma);
1745 if (!drm_mm_node_allocated(&vma->node))
1748 if (i915_vma_is_pinned(vma)) {
1749 vma_print_allocator(vma, "is pinned");
1753 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
1754 /* XXX not always required: nop_clear_range */
1755 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
1757 err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref);
1761 err = __i915_vma_unbind(vma);
1762 mutex_unlock(&vm->mutex);
1766 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
1770 struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma)
1772 i915_gem_object_make_unshrinkable(vma->obj);
1776 void i915_vma_make_shrinkable(struct i915_vma *vma)
1778 i915_gem_object_make_shrinkable(vma->obj);
1781 void i915_vma_make_purgeable(struct i915_vma *vma)
1783 i915_gem_object_make_purgeable(vma->obj);
1786 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1787 #include "selftests/i915_vma.c"
1790 void i915_vma_module_exit(void)
1792 kmem_cache_destroy(slab_vmas);
1795 int __init i915_vma_module_init(void)
1797 slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN);