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24 * Robert Bragg <robert@sixbynine.org>
29 * DOC: i915 Perf Overview
31 * Gen graphics supports a large number of performance counters that can help
32 * driver and application developers understand and optimize their use of the
35 * This i915 perf interface enables userspace to configure and open a file
36 * descriptor representing a stream of GPU metrics which can then be read() as
37 * a stream of sample records.
39 * The interface is particularly suited to exposing buffered metrics that are
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
42 * Streams representing a single context are accessible to applications with a
43 * corresponding drm file descriptor, such that OpenGL can use the interface
44 * without special privileges. Access to system-wide metrics requires root
45 * privileges by default, unless changed via the dev.i915.perf_event_paranoid
51 * DOC: i915 Perf History and Comparison with Core Perf
53 * The interface was initially inspired by the core Perf infrastructure but
54 * some notable differences are:
56 * i915 perf file descriptors represent a "stream" instead of an "event"; where
57 * a perf event primarily corresponds to a single 64bit value, while a stream
58 * might sample sets of tightly-coupled counters, depending on the
59 * configuration. For example the Gen OA unit isn't designed to support
60 * orthogonal configurations of individual counters; it's configured for a set
61 * of related counters. Samples for an i915 perf stream capturing OA metrics
62 * will include a set of counter values packed in a compact HW specific format.
63 * The OA unit supports a number of different packing formats which can be
64 * selected by the user opening the stream. Perf has support for grouping
65 * events, but each event in the group is configured, validated and
66 * authenticated individually with separate system calls.
68 * i915 perf stream configurations are provided as an array of u64 (key,value)
69 * pairs, instead of a fixed struct with multiple miscellaneous config members,
70 * interleaved with event-type specific members.
72 * i915 perf doesn't support exposing metrics via an mmap'd circular buffer.
73 * The supported metrics are being written to memory by the GPU unsynchronized
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
75 * the constraints on HW configuration require reports to be filtered before it
76 * would be acceptable to expose them to unprivileged applications - to hide
77 * the metrics of other processes/contexts. For these use cases a read() based
78 * interface is a good fit, and provides an opportunity to filter data as it
79 * gets copied from the GPU mapped buffers to userspace buffers.
82 * Issues hit with first prototype based on Core Perf
83 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
85 * The first prototype of this driver was based on the core perf
86 * infrastructure, and while we did make that mostly work, with some changes to
87 * perf, we found we were breaking or working around too many assumptions baked
88 * into perf's currently cpu centric design.
90 * In the end we didn't see a clear benefit to making perf's implementation and
91 * interface more complex by changing design assumptions while we knew we still
92 * wouldn't be able to use any existing perf based userspace tools.
94 * Also considering the Gen specific nature of the Observability hardware and
95 * how userspace will sometimes need to combine i915 perf OA metrics with
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
97 * expecting the interface to be used by a platform specific userspace such as
98 * OpenGL or tools. This is to say; we aren't inherently missing out on having
99 * a standard vendor/architecture agnostic interface by not using perf.
102 * For posterity, in case we might re-visit trying to adapt core perf to be
103 * better suited to exposing i915 metrics these were the main pain points we
106 * - The perf based OA PMU driver broke some significant design assumptions:
108 * Existing perf pmus are used for profiling work on a cpu and we were
109 * introducing the idea of _IS_DEVICE pmus with different security
110 * implications, the need to fake cpu-related data (such as user/kernel
111 * registers) to fit with perf's current design, and adding _DEVICE records
112 * as a way to forward device-specific status records.
114 * The OA unit writes reports of counters into a circular buffer, without
115 * involvement from the CPU, making our PMU driver the first of a kind.
117 * Given the way we were periodically forward data from the GPU-mapped, OA
118 * buffer to perf's buffer, those bursts of sample writes looked to perf like
119 * we were sampling too fast and so we had to subvert its throttling checks.
121 * Perf supports groups of counters and allows those to be read via
122 * transactions internally but transactions currently seem designed to be
123 * explicitly initiated from the cpu (say in response to a userspace read())
124 * and while we could pull a report out of the OA buffer we can't
125 * trigger a report from the cpu on demand.
127 * Related to being report based; the OA counters are configured in HW as a
128 * set while perf generally expects counter configurations to be orthogonal.
129 * Although counters can be associated with a group leader as they are
130 * opened, there's no clear precedent for being able to provide group-wide
131 * configuration attributes (for example we want to let userspace choose the
132 * OA unit report format used to capture all counters in a set, or specify a
133 * GPU context to filter metrics on). We avoided using perf's grouping
134 * feature and forwarded OA reports to userspace via perf's 'raw' sample
135 * field. This suited our userspace well considering how coupled the counters
136 * are when dealing with normalizing. It would be inconvenient to split
137 * counters up into separate events, only to require userspace to recombine
138 * them. For Mesa it's also convenient to be forwarded raw, periodic reports
139 * for combining with the side-band raw reports it captures using
140 * MI_REPORT_PERF_COUNT commands.
142 * - As a side note on perf's grouping feature; there was also some concern
143 * that using PERF_FORMAT_GROUP as a way to pack together counter values
144 * would quite drastically inflate our sample sizes, which would likely
145 * lower the effective sampling resolutions we could use when the available
146 * memory bandwidth is limited.
148 * With the OA unit's report formats, counters are packed together as 32
149 * or 40bit values, with the largest report size being 256 bytes.
151 * PERF_FORMAT_GROUP values are 64bit, but there doesn't appear to be a
152 * documented ordering to the values, implying PERF_FORMAT_ID must also be
153 * used to add a 64bit ID before each value; giving 16 bytes per counter.
155 * Related to counter orthogonality; we can't time share the OA unit, while
156 * event scheduling is a central design idea within perf for allowing
157 * userspace to open + enable more events than can be configured in HW at any
158 * one time. The OA unit is not designed to allow re-configuration while in
159 * use. We can't reconfigure the OA unit without losing internal OA unit
160 * state which we can't access explicitly to save and restore. Reconfiguring
161 * the OA unit is also relatively slow, involving ~100 register writes. From
162 * userspace Mesa also depends on a stable OA configuration when emitting
163 * MI_REPORT_PERF_COUNT commands and importantly the OA unit can't be
164 * disabled while there are outstanding MI_RPC commands lest we hang the
167 * The contents of sample records aren't extensible by device drivers (i.e.
168 * the sample_type bits). As an example; Sourab Gupta had been looking to
169 * attach GPU timestamps to our OA samples. We were shoehorning OA reports
170 * into sample records by using the 'raw' field, but it's tricky to pack more
171 * than one thing into this field because events/core.c currently only lets a
172 * pmu give a single raw data pointer plus len which will be copied into the
173 * ring buffer. To include more than the OA report we'd have to copy the
174 * report into an intermediate larger buffer. I'd been considering allowing a
175 * vector of data+len values to be specified for copying the raw data, but
176 * it felt like a kludge to being using the raw field for this purpose.
178 * - It felt like our perf based PMU was making some technical compromises
179 * just for the sake of using perf:
181 * perf_event_open() requires events to either relate to a pid or a specific
182 * cpu core, while our device pmu related to neither. Events opened with a
183 * pid will be automatically enabled/disabled according to the scheduling of
184 * that process - so not appropriate for us. When an event is related to a
185 * cpu id, perf ensures pmu methods will be invoked via an inter process
186 * interrupt on that core. To avoid invasive changes our userspace opened OA
187 * perf events for a specific cpu. This was workable but it meant the
188 * majority of the OA driver ran in atomic context, including all OA report
189 * forwarding, which wasn't really necessary in our case and seems to make
190 * our locking requirements somewhat complex as we handled the interaction
191 * with the rest of the i915 driver.
194 #include <linux/anon_inodes.h>
195 #include <linux/sizes.h>
196 #include <linux/uuid.h>
198 #include "gem/i915_gem_context.h"
199 #include "gem/i915_gem_pm.h"
200 #include "gt/intel_lrc_reg.h"
202 #include "i915_drv.h"
203 #include "i915_oa_hsw.h"
204 #include "i915_oa_bdw.h"
205 #include "i915_oa_chv.h"
206 #include "i915_oa_sklgt2.h"
207 #include "i915_oa_sklgt3.h"
208 #include "i915_oa_sklgt4.h"
209 #include "i915_oa_bxt.h"
210 #include "i915_oa_kblgt2.h"
211 #include "i915_oa_kblgt3.h"
212 #include "i915_oa_glk.h"
213 #include "i915_oa_cflgt2.h"
214 #include "i915_oa_cflgt3.h"
215 #include "i915_oa_cnl.h"
216 #include "i915_oa_icl.h"
218 /* HW requires this to be a power of two, between 128k and 16M, though driver
219 * is currently generally designed assuming the largest 16M size is used such
220 * that the overflow cases are unlikely in normal operation.
222 #define OA_BUFFER_SIZE SZ_16M
224 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
227 * DOC: OA Tail Pointer Race
229 * There's a HW race condition between OA unit tail pointer register updates and
230 * writes to memory whereby the tail pointer can sometimes get ahead of what's
231 * been written out to the OA buffer so far (in terms of what's visible to the
234 * Although this can be observed explicitly while copying reports to userspace
235 * by checking for a zeroed report-id field in tail reports, we want to account
236 * for this earlier, as part of the oa_buffer_check to avoid lots of redundant
239 * In effect we define a tail pointer for reading that lags the real tail
240 * pointer by at least %OA_TAIL_MARGIN_NSEC nanoseconds, which gives enough
241 * time for the corresponding reports to become visible to the CPU.
243 * To manage this we actually track two tail pointers:
244 * 1) An 'aging' tail with an associated timestamp that is tracked until we
245 * can trust the corresponding data is visible to the CPU; at which point
246 * it is considered 'aged'.
247 * 2) An 'aged' tail that can be used for read()ing.
249 * The two separate pointers let us decouple read()s from tail pointer aging.
251 * The tail pointers are checked and updated at a limited rate within a hrtimer
252 * callback (the same callback that is used for delivering EPOLLIN events)
254 * Initially the tails are marked invalid with %INVALID_TAIL_PTR which
255 * indicates that an updated tail pointer is needed.
257 * Most of the implementation details for this workaround are in
258 * oa_buffer_check_unlocked() and _append_oa_reports()
260 * Note for posterity: previously the driver used to define an effective tail
261 * pointer that lagged the real pointer by a 'tail margin' measured in bytes
262 * derived from %OA_TAIL_MARGIN_NSEC and the configured sampling frequency.
263 * This was flawed considering that the OA unit may also automatically generate
264 * non-periodic reports (such as on context switch) or the OA unit may be
265 * enabled without any periodic sampling.
267 #define OA_TAIL_MARGIN_NSEC 100000ULL
268 #define INVALID_TAIL_PTR 0xffffffff
270 /* frequency for checking whether the OA unit has written new reports to the
271 * circular OA buffer...
273 #define POLL_FREQUENCY 200
274 #define POLL_PERIOD (NSEC_PER_SEC / POLL_FREQUENCY)
276 /* for sysctl proc_dointvec_minmax of dev.i915.perf_stream_paranoid */
279 static u32 i915_perf_stream_paranoid = true;
281 /* The maximum exponent the hardware accepts is 63 (essentially it selects one
282 * of the 64bit timestamp bits to trigger reports from) but there's currently
283 * no known use case for sampling as infrequently as once per 47 thousand years.
285 * Since the timestamps included in OA reports are only 32bits it seems
286 * reasonable to limit the OA exponent where it's still possible to account for
287 * overflow in OA report timestamps.
289 #define OA_EXPONENT_MAX 31
291 #define INVALID_CTX_ID 0xffffffff
293 /* On Gen8+ automatically triggered OA reports include a 'reason' field... */
294 #define OAREPORT_REASON_MASK 0x3f
295 #define OAREPORT_REASON_SHIFT 19
296 #define OAREPORT_REASON_TIMER (1<<0)
297 #define OAREPORT_REASON_CTX_SWITCH (1<<3)
298 #define OAREPORT_REASON_CLK_RATIO (1<<5)
301 /* For sysctl proc_dointvec_minmax of i915_oa_max_sample_rate
303 * The highest sampling frequency we can theoretically program the OA unit
304 * with is always half the timestamp frequency: E.g. 6.25Mhz for Haswell.
306 * Initialized just before we register the sysctl parameter.
308 static int oa_sample_rate_hard_limit;
310 /* Theoretically we can program the OA unit to sample every 160ns but don't
311 * allow that by default unless root...
313 * The default threshold of 100000Hz is based on perf's similar
314 * kernel.perf_event_max_sample_rate sysctl parameter.
316 static u32 i915_oa_max_sample_rate = 100000;
318 /* XXX: beware if future OA HW adds new report formats that the current
319 * code assumes all reports have a power-of-two size and ~(size - 1) can
320 * be used as a mask to align the OA tail pointer.
322 static const struct i915_oa_format hsw_oa_formats[I915_OA_FORMAT_MAX] = {
323 [I915_OA_FORMAT_A13] = { 0, 64 },
324 [I915_OA_FORMAT_A29] = { 1, 128 },
325 [I915_OA_FORMAT_A13_B8_C8] = { 2, 128 },
326 /* A29_B8_C8 Disallowed as 192 bytes doesn't factor into buffer size */
327 [I915_OA_FORMAT_B4_C8] = { 4, 64 },
328 [I915_OA_FORMAT_A45_B8_C8] = { 5, 256 },
329 [I915_OA_FORMAT_B4_C8_A16] = { 6, 128 },
330 [I915_OA_FORMAT_C4_B8] = { 7, 64 },
333 static const struct i915_oa_format gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = {
334 [I915_OA_FORMAT_A12] = { 0, 64 },
335 [I915_OA_FORMAT_A12_B8_C8] = { 2, 128 },
336 [I915_OA_FORMAT_A32u40_A4u32_B8_C8] = { 5, 256 },
337 [I915_OA_FORMAT_C4_B8] = { 7, 64 },
340 #define SAMPLE_OA_REPORT (1<<0)
343 * struct perf_open_properties - for validated properties given to open a stream
344 * @sample_flags: `DRM_I915_PERF_PROP_SAMPLE_*` properties are tracked as flags
345 * @single_context: Whether a single or all gpu contexts should be monitored
346 * @ctx_handle: A gem ctx handle for use with @single_context
347 * @metrics_set: An ID for an OA unit metric set advertised via sysfs
348 * @oa_format: An OA unit HW report format
349 * @oa_periodic: Whether to enable periodic OA unit sampling
350 * @oa_period_exponent: The OA unit sampling period is derived from this
352 * As read_properties_unlocked() enumerates and validates the properties given
353 * to open a stream of metrics the configuration is built up in the structure
354 * which starts out zero initialized.
356 struct perf_open_properties {
359 u64 single_context:1;
362 /* OA sampling state */
366 int oa_period_exponent;
369 static void free_oa_config(struct drm_i915_private *dev_priv,
370 struct i915_oa_config *oa_config)
372 if (!PTR_ERR(oa_config->flex_regs))
373 kfree(oa_config->flex_regs);
374 if (!PTR_ERR(oa_config->b_counter_regs))
375 kfree(oa_config->b_counter_regs);
376 if (!PTR_ERR(oa_config->mux_regs))
377 kfree(oa_config->mux_regs);
381 static void put_oa_config(struct drm_i915_private *dev_priv,
382 struct i915_oa_config *oa_config)
384 if (!atomic_dec_and_test(&oa_config->ref_count))
387 free_oa_config(dev_priv, oa_config);
390 static int get_oa_config(struct drm_i915_private *dev_priv,
392 struct i915_oa_config **out_config)
396 if (metrics_set == 1) {
397 *out_config = &dev_priv->perf.oa.test_config;
398 atomic_inc(&dev_priv->perf.oa.test_config.ref_count);
402 ret = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
406 *out_config = idr_find(&dev_priv->perf.metrics_idr, metrics_set);
410 atomic_inc(&(*out_config)->ref_count);
412 mutex_unlock(&dev_priv->perf.metrics_lock);
417 static u32 gen8_oa_hw_tail_read(struct drm_i915_private *dev_priv)
419 return I915_READ(GEN8_OATAILPTR) & GEN8_OATAILPTR_MASK;
422 static u32 gen7_oa_hw_tail_read(struct drm_i915_private *dev_priv)
424 u32 oastatus1 = I915_READ(GEN7_OASTATUS1);
426 return oastatus1 & GEN7_OASTATUS1_TAIL_MASK;
430 * oa_buffer_check_unlocked - check for data and update tail ptr state
431 * @dev_priv: i915 device instance
433 * This is either called via fops (for blocking reads in user ctx) or the poll
434 * check hrtimer (atomic ctx) to check the OA buffer tail pointer and check
435 * if there is data available for userspace to read.
437 * This function is central to providing a workaround for the OA unit tail
438 * pointer having a race with respect to what data is visible to the CPU.
439 * It is responsible for reading tail pointers from the hardware and giving
440 * the pointers time to 'age' before they are made available for reading.
441 * (See description of OA_TAIL_MARGIN_NSEC above for further details.)
443 * Besides returning true when there is data available to read() this function
444 * also has the side effect of updating the oa_buffer.tails[], .aging_timestamp
445 * and .aged_tail_idx state used for reading.
447 * Note: It's safe to read OA config state here unlocked, assuming that this is
448 * only called while the stream is enabled, while the global OA configuration
451 * Returns: %true if the OA buffer contains data, else %false
453 static bool oa_buffer_check_unlocked(struct drm_i915_private *dev_priv)
455 int report_size = dev_priv->perf.oa.oa_buffer.format_size;
457 unsigned int aged_idx;
458 u32 head, hw_tail, aged_tail, aging_tail;
461 /* We have to consider the (unlikely) possibility that read() errors
462 * could result in an OA buffer reset which might reset the head,
463 * tails[] and aged_tail state.
465 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
467 /* NB: The head we observe here might effectively be a little out of
468 * date (between head and tails[aged_idx].offset if there is currently
469 * a read() in progress.
471 head = dev_priv->perf.oa.oa_buffer.head;
473 aged_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx;
474 aged_tail = dev_priv->perf.oa.oa_buffer.tails[aged_idx].offset;
475 aging_tail = dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset;
477 hw_tail = dev_priv->perf.oa.ops.oa_hw_tail_read(dev_priv);
479 /* The tail pointer increases in 64 byte increments,
480 * not in report_size steps...
482 hw_tail &= ~(report_size - 1);
484 now = ktime_get_mono_fast_ns();
486 /* Update the aged tail
488 * Flip the tail pointer available for read()s once the aging tail is
489 * old enough to trust that the corresponding data will be visible to
492 * Do this before updating the aging pointer in case we may be able to
493 * immediately start aging a new pointer too (if new data has become
494 * available) without needing to wait for a later hrtimer callback.
496 if (aging_tail != INVALID_TAIL_PTR &&
497 ((now - dev_priv->perf.oa.oa_buffer.aging_timestamp) >
498 OA_TAIL_MARGIN_NSEC)) {
501 dev_priv->perf.oa.oa_buffer.aged_tail_idx = aged_idx;
503 aged_tail = aging_tail;
505 /* Mark that we need a new pointer to start aging... */
506 dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset = INVALID_TAIL_PTR;
507 aging_tail = INVALID_TAIL_PTR;
510 /* Update the aging tail
512 * We throttle aging tail updates until we have a new tail that
513 * represents >= one report more data than is already available for
514 * reading. This ensures there will be enough data for a successful
515 * read once this new pointer has aged and ensures we will give the new
516 * pointer time to age.
518 if (aging_tail == INVALID_TAIL_PTR &&
519 (aged_tail == INVALID_TAIL_PTR ||
520 OA_TAKEN(hw_tail, aged_tail) >= report_size)) {
521 struct i915_vma *vma = dev_priv->perf.oa.oa_buffer.vma;
522 u32 gtt_offset = i915_ggtt_offset(vma);
524 /* Be paranoid and do a bounds check on the pointer read back
525 * from hardware, just in case some spurious hardware condition
526 * could put the tail out of bounds...
528 if (hw_tail >= gtt_offset &&
529 hw_tail < (gtt_offset + OA_BUFFER_SIZE)) {
530 dev_priv->perf.oa.oa_buffer.tails[!aged_idx].offset =
531 aging_tail = hw_tail;
532 dev_priv->perf.oa.oa_buffer.aging_timestamp = now;
534 DRM_ERROR("Ignoring spurious out of range OA buffer tail pointer = %u\n",
539 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
541 return aged_tail == INVALID_TAIL_PTR ?
542 false : OA_TAKEN(aged_tail, head) >= report_size;
546 * append_oa_status - Appends a status record to a userspace read() buffer.
547 * @stream: An i915-perf stream opened for OA metrics
548 * @buf: destination buffer given by userspace
549 * @count: the number of bytes userspace wants to read
550 * @offset: (inout): the current position for writing into @buf
551 * @type: The kind of status to report to userspace
553 * Writes a status record (such as `DRM_I915_PERF_RECORD_OA_REPORT_LOST`)
554 * into the userspace read() buffer.
556 * The @buf @offset will only be updated on success.
558 * Returns: 0 on success, negative error code on failure.
560 static int append_oa_status(struct i915_perf_stream *stream,
564 enum drm_i915_perf_record_type type)
566 struct drm_i915_perf_record_header header = { type, 0, sizeof(header) };
568 if ((count - *offset) < header.size)
571 if (copy_to_user(buf + *offset, &header, sizeof(header)))
574 (*offset) += header.size;
580 * append_oa_sample - Copies single OA report into userspace read() buffer.
581 * @stream: An i915-perf stream opened for OA metrics
582 * @buf: destination buffer given by userspace
583 * @count: the number of bytes userspace wants to read
584 * @offset: (inout): the current position for writing into @buf
585 * @report: A single OA report to (optionally) include as part of the sample
587 * The contents of a sample are configured through `DRM_I915_PERF_PROP_SAMPLE_*`
588 * properties when opening a stream, tracked as `stream->sample_flags`. This
589 * function copies the requested components of a single sample to the given
592 * The @buf @offset will only be updated on success.
594 * Returns: 0 on success, negative error code on failure.
596 static int append_oa_sample(struct i915_perf_stream *stream,
602 struct drm_i915_private *dev_priv = stream->dev_priv;
603 int report_size = dev_priv->perf.oa.oa_buffer.format_size;
604 struct drm_i915_perf_record_header header;
605 u32 sample_flags = stream->sample_flags;
607 header.type = DRM_I915_PERF_RECORD_SAMPLE;
609 header.size = stream->sample_size;
611 if ((count - *offset) < header.size)
615 if (copy_to_user(buf, &header, sizeof(header)))
617 buf += sizeof(header);
619 if (sample_flags & SAMPLE_OA_REPORT) {
620 if (copy_to_user(buf, report, report_size))
624 (*offset) += header.size;
630 * Copies all buffered OA reports into userspace read() buffer.
631 * @stream: An i915-perf stream opened for OA metrics
632 * @buf: destination buffer given by userspace
633 * @count: the number of bytes userspace wants to read
634 * @offset: (inout): the current position for writing into @buf
636 * Notably any error condition resulting in a short read (-%ENOSPC or
637 * -%EFAULT) will be returned even though one or more records may
638 * have been successfully copied. In this case it's up to the caller
639 * to decide if the error should be squashed before returning to
642 * Note: reports are consumed from the head, and appended to the
643 * tail, so the tail chases the head?... If you think that's mad
644 * and back-to-front you're not alone, but this follows the
645 * Gen PRM naming convention.
647 * Returns: 0 on success, negative error code on failure.
649 static int gen8_append_oa_reports(struct i915_perf_stream *stream,
654 struct drm_i915_private *dev_priv = stream->dev_priv;
655 int report_size = dev_priv->perf.oa.oa_buffer.format_size;
656 u8 *oa_buf_base = dev_priv->perf.oa.oa_buffer.vaddr;
657 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma);
658 u32 mask = (OA_BUFFER_SIZE - 1);
659 size_t start_offset = *offset;
661 unsigned int aged_tail_idx;
666 if (WARN_ON(!stream->enabled))
669 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
671 head = dev_priv->perf.oa.oa_buffer.head;
672 aged_tail_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx;
673 tail = dev_priv->perf.oa.oa_buffer.tails[aged_tail_idx].offset;
675 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
678 * An invalid tail pointer here means we're still waiting for the poll
679 * hrtimer callback to give us a pointer
681 if (tail == INVALID_TAIL_PTR)
685 * NB: oa_buffer.head/tail include the gtt_offset which we don't want
686 * while indexing relative to oa_buf_base.
692 * An out of bounds or misaligned head or tail pointer implies a driver
693 * bug since we validate + align the tail pointers we read from the
694 * hardware and we are in full control of the head pointer which should
695 * only be incremented by multiples of the report size (notably also
696 * all a power of two).
698 if (WARN_ONCE(head > OA_BUFFER_SIZE || head % report_size ||
699 tail > OA_BUFFER_SIZE || tail % report_size,
700 "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
706 (taken = OA_TAKEN(tail, head));
707 head = (head + report_size) & mask) {
708 u8 *report = oa_buf_base + head;
709 u32 *report32 = (void *)report;
714 * All the report sizes factor neatly into the buffer
715 * size so we never expect to see a report split
716 * between the beginning and end of the buffer.
718 * Given the initial alignment check a misalignment
719 * here would imply a driver bug that would result
722 if (WARN_ON((OA_BUFFER_SIZE - head) < report_size)) {
723 DRM_ERROR("Spurious OA head ptr: non-integral report offset\n");
728 * The reason field includes flags identifying what
729 * triggered this specific report (mostly timer
730 * triggered or e.g. due to a context switch).
732 * This field is never expected to be zero so we can
733 * check that the report isn't invalid before copying
736 reason = ((report32[0] >> OAREPORT_REASON_SHIFT) &
737 OAREPORT_REASON_MASK);
739 if (__ratelimit(&dev_priv->perf.oa.spurious_report_rs))
740 DRM_NOTE("Skipping spurious, invalid OA report\n");
744 ctx_id = report32[2] & dev_priv->perf.oa.specific_ctx_id_mask;
747 * Squash whatever is in the CTX_ID field if it's marked as
748 * invalid to be sure we avoid false-positive, single-context
751 * Note: that we don't clear the valid_ctx_bit so userspace can
752 * understand that the ID has been squashed by the kernel.
754 if (!(report32[0] & dev_priv->perf.oa.gen8_valid_ctx_bit))
755 ctx_id = report32[2] = INVALID_CTX_ID;
758 * NB: For Gen 8 the OA unit no longer supports clock gating
759 * off for a specific context and the kernel can't securely
760 * stop the counters from updating as system-wide / global
763 * Automatic reports now include a context ID so reports can be
764 * filtered on the cpu but it's not worth trying to
765 * automatically subtract/hide counter progress for other
766 * contexts while filtering since we can't stop userspace
767 * issuing MI_REPORT_PERF_COUNT commands which would still
768 * provide a side-band view of the real values.
770 * To allow userspace (such as Mesa/GL_INTEL_performance_query)
771 * to normalize counters for a single filtered context then it
772 * needs be forwarded bookend context-switch reports so that it
773 * can track switches in between MI_REPORT_PERF_COUNT commands
774 * and can itself subtract/ignore the progress of counters
775 * associated with other contexts. Note that the hardware
776 * automatically triggers reports when switching to a new
777 * context which are tagged with the ID of the newly active
778 * context. To avoid the complexity (and likely fragility) of
779 * reading ahead while parsing reports to try and minimize
780 * forwarding redundant context switch reports (i.e. between
781 * other, unrelated contexts) we simply elect to forward them
784 * We don't rely solely on the reason field to identify context
785 * switches since it's not-uncommon for periodic samples to
786 * identify a switch before any 'context switch' report.
788 if (!dev_priv->perf.oa.exclusive_stream->ctx ||
789 dev_priv->perf.oa.specific_ctx_id == ctx_id ||
790 (dev_priv->perf.oa.oa_buffer.last_ctx_id ==
791 dev_priv->perf.oa.specific_ctx_id) ||
792 reason & OAREPORT_REASON_CTX_SWITCH) {
795 * While filtering for a single context we avoid
796 * leaking the IDs of other contexts.
798 if (dev_priv->perf.oa.exclusive_stream->ctx &&
799 dev_priv->perf.oa.specific_ctx_id != ctx_id) {
800 report32[2] = INVALID_CTX_ID;
803 ret = append_oa_sample(stream, buf, count, offset,
808 dev_priv->perf.oa.oa_buffer.last_ctx_id = ctx_id;
812 * The above reason field sanity check is based on
813 * the assumption that the OA buffer is initially
814 * zeroed and we reset the field after copying so the
815 * check is still meaningful once old reports start
821 if (start_offset != *offset) {
822 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
825 * We removed the gtt_offset for the copy loop above, indexing
826 * relative to oa_buf_base so put back here...
830 I915_WRITE(GEN8_OAHEADPTR, head & GEN8_OAHEADPTR_MASK);
831 dev_priv->perf.oa.oa_buffer.head = head;
833 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
840 * gen8_oa_read - copy status records then buffered OA reports
841 * @stream: An i915-perf stream opened for OA metrics
842 * @buf: destination buffer given by userspace
843 * @count: the number of bytes userspace wants to read
844 * @offset: (inout): the current position for writing into @buf
846 * Checks OA unit status registers and if necessary appends corresponding
847 * status records for userspace (such as for a buffer full condition) and then
848 * initiate appending any buffered OA reports.
850 * Updates @offset according to the number of bytes successfully copied into
851 * the userspace buffer.
853 * NB: some data may be successfully copied to the userspace buffer
854 * even if an error is returned, and this is reflected in the
857 * Returns: zero on success or a negative error code
859 static int gen8_oa_read(struct i915_perf_stream *stream,
864 struct drm_i915_private *dev_priv = stream->dev_priv;
868 if (WARN_ON(!dev_priv->perf.oa.oa_buffer.vaddr))
871 oastatus = I915_READ(GEN8_OASTATUS);
874 * We treat OABUFFER_OVERFLOW as a significant error:
876 * Although theoretically we could handle this more gracefully
877 * sometimes, some Gens don't correctly suppress certain
878 * automatically triggered reports in this condition and so we
879 * have to assume that old reports are now being trampled
882 * Considering how we don't currently give userspace control
883 * over the OA buffer size and always configure a large 16MB
884 * buffer, then a buffer overflow does anyway likely indicate
885 * that something has gone quite badly wrong.
887 if (oastatus & GEN8_OASTATUS_OABUFFER_OVERFLOW) {
888 ret = append_oa_status(stream, buf, count, offset,
889 DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
893 DRM_DEBUG("OA buffer overflow (exponent = %d): force restart\n",
894 dev_priv->perf.oa.period_exponent);
896 dev_priv->perf.oa.ops.oa_disable(stream);
897 dev_priv->perf.oa.ops.oa_enable(stream);
900 * Note: .oa_enable() is expected to re-init the oabuffer and
901 * reset GEN8_OASTATUS for us
903 oastatus = I915_READ(GEN8_OASTATUS);
906 if (oastatus & GEN8_OASTATUS_REPORT_LOST) {
907 ret = append_oa_status(stream, buf, count, offset,
908 DRM_I915_PERF_RECORD_OA_REPORT_LOST);
911 I915_WRITE(GEN8_OASTATUS,
912 oastatus & ~GEN8_OASTATUS_REPORT_LOST);
915 return gen8_append_oa_reports(stream, buf, count, offset);
919 * Copies all buffered OA reports into userspace read() buffer.
920 * @stream: An i915-perf stream opened for OA metrics
921 * @buf: destination buffer given by userspace
922 * @count: the number of bytes userspace wants to read
923 * @offset: (inout): the current position for writing into @buf
925 * Notably any error condition resulting in a short read (-%ENOSPC or
926 * -%EFAULT) will be returned even though one or more records may
927 * have been successfully copied. In this case it's up to the caller
928 * to decide if the error should be squashed before returning to
931 * Note: reports are consumed from the head, and appended to the
932 * tail, so the tail chases the head?... If you think that's mad
933 * and back-to-front you're not alone, but this follows the
934 * Gen PRM naming convention.
936 * Returns: 0 on success, negative error code on failure.
938 static int gen7_append_oa_reports(struct i915_perf_stream *stream,
943 struct drm_i915_private *dev_priv = stream->dev_priv;
944 int report_size = dev_priv->perf.oa.oa_buffer.format_size;
945 u8 *oa_buf_base = dev_priv->perf.oa.oa_buffer.vaddr;
946 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma);
947 u32 mask = (OA_BUFFER_SIZE - 1);
948 size_t start_offset = *offset;
950 unsigned int aged_tail_idx;
955 if (WARN_ON(!stream->enabled))
958 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
960 head = dev_priv->perf.oa.oa_buffer.head;
961 aged_tail_idx = dev_priv->perf.oa.oa_buffer.aged_tail_idx;
962 tail = dev_priv->perf.oa.oa_buffer.tails[aged_tail_idx].offset;
964 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
966 /* An invalid tail pointer here means we're still waiting for the poll
967 * hrtimer callback to give us a pointer
969 if (tail == INVALID_TAIL_PTR)
972 /* NB: oa_buffer.head/tail include the gtt_offset which we don't want
973 * while indexing relative to oa_buf_base.
978 /* An out of bounds or misaligned head or tail pointer implies a driver
979 * bug since we validate + align the tail pointers we read from the
980 * hardware and we are in full control of the head pointer which should
981 * only be incremented by multiples of the report size (notably also
982 * all a power of two).
984 if (WARN_ONCE(head > OA_BUFFER_SIZE || head % report_size ||
985 tail > OA_BUFFER_SIZE || tail % report_size,
986 "Inconsistent OA buffer pointers: head = %u, tail = %u\n",
992 (taken = OA_TAKEN(tail, head));
993 head = (head + report_size) & mask) {
994 u8 *report = oa_buf_base + head;
995 u32 *report32 = (void *)report;
997 /* All the report sizes factor neatly into the buffer
998 * size so we never expect to see a report split
999 * between the beginning and end of the buffer.
1001 * Given the initial alignment check a misalignment
1002 * here would imply a driver bug that would result
1005 if (WARN_ON((OA_BUFFER_SIZE - head) < report_size)) {
1006 DRM_ERROR("Spurious OA head ptr: non-integral report offset\n");
1010 /* The report-ID field for periodic samples includes
1011 * some undocumented flags related to what triggered
1012 * the report and is never expected to be zero so we
1013 * can check that the report isn't invalid before
1014 * copying it to userspace...
1016 if (report32[0] == 0) {
1017 if (__ratelimit(&dev_priv->perf.oa.spurious_report_rs))
1018 DRM_NOTE("Skipping spurious, invalid OA report\n");
1022 ret = append_oa_sample(stream, buf, count, offset, report);
1026 /* The above report-id field sanity check is based on
1027 * the assumption that the OA buffer is initially
1028 * zeroed and we reset the field after copying so the
1029 * check is still meaningful once old reports start
1030 * being overwritten.
1035 if (start_offset != *offset) {
1036 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1038 /* We removed the gtt_offset for the copy loop above, indexing
1039 * relative to oa_buf_base so put back here...
1043 I915_WRITE(GEN7_OASTATUS2,
1044 ((head & GEN7_OASTATUS2_HEAD_MASK) |
1045 GEN7_OASTATUS2_MEM_SELECT_GGTT));
1046 dev_priv->perf.oa.oa_buffer.head = head;
1048 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1055 * gen7_oa_read - copy status records then buffered OA reports
1056 * @stream: An i915-perf stream opened for OA metrics
1057 * @buf: destination buffer given by userspace
1058 * @count: the number of bytes userspace wants to read
1059 * @offset: (inout): the current position for writing into @buf
1061 * Checks Gen 7 specific OA unit status registers and if necessary appends
1062 * corresponding status records for userspace (such as for a buffer full
1063 * condition) and then initiate appending any buffered OA reports.
1065 * Updates @offset according to the number of bytes successfully copied into
1066 * the userspace buffer.
1068 * Returns: zero on success or a negative error code
1070 static int gen7_oa_read(struct i915_perf_stream *stream,
1075 struct drm_i915_private *dev_priv = stream->dev_priv;
1079 if (WARN_ON(!dev_priv->perf.oa.oa_buffer.vaddr))
1082 oastatus1 = I915_READ(GEN7_OASTATUS1);
1084 /* XXX: On Haswell we don't have a safe way to clear oastatus1
1085 * bits while the OA unit is enabled (while the tail pointer
1086 * may be updated asynchronously) so we ignore status bits
1087 * that have already been reported to userspace.
1089 oastatus1 &= ~dev_priv->perf.oa.gen7_latched_oastatus1;
1091 /* We treat OABUFFER_OVERFLOW as a significant error:
1093 * - The status can be interpreted to mean that the buffer is
1094 * currently full (with a higher precedence than OA_TAKEN()
1095 * which will start to report a near-empty buffer after an
1096 * overflow) but it's awkward that we can't clear the status
1097 * on Haswell, so without a reset we won't be able to catch
1100 * - Since it also implies the HW has started overwriting old
1101 * reports it may also affect our sanity checks for invalid
1102 * reports when copying to userspace that assume new reports
1103 * are being written to cleared memory.
1105 * - In the future we may want to introduce a flight recorder
1106 * mode where the driver will automatically maintain a safe
1107 * guard band between head/tail, avoiding this overflow
1108 * condition, but we avoid the added driver complexity for
1111 if (unlikely(oastatus1 & GEN7_OASTATUS1_OABUFFER_OVERFLOW)) {
1112 ret = append_oa_status(stream, buf, count, offset,
1113 DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
1117 DRM_DEBUG("OA buffer overflow (exponent = %d): force restart\n",
1118 dev_priv->perf.oa.period_exponent);
1120 dev_priv->perf.oa.ops.oa_disable(stream);
1121 dev_priv->perf.oa.ops.oa_enable(stream);
1123 oastatus1 = I915_READ(GEN7_OASTATUS1);
1126 if (unlikely(oastatus1 & GEN7_OASTATUS1_REPORT_LOST)) {
1127 ret = append_oa_status(stream, buf, count, offset,
1128 DRM_I915_PERF_RECORD_OA_REPORT_LOST);
1131 dev_priv->perf.oa.gen7_latched_oastatus1 |=
1132 GEN7_OASTATUS1_REPORT_LOST;
1135 return gen7_append_oa_reports(stream, buf, count, offset);
1139 * i915_oa_wait_unlocked - handles blocking IO until OA data available
1140 * @stream: An i915-perf stream opened for OA metrics
1142 * Called when userspace tries to read() from a blocking stream FD opened
1143 * for OA metrics. It waits until the hrtimer callback finds a non-empty
1144 * OA buffer and wakes us.
1146 * Note: it's acceptable to have this return with some false positives
1147 * since any subsequent read handling will return -EAGAIN if there isn't
1148 * really data ready for userspace yet.
1150 * Returns: zero on success or a negative error code
1152 static int i915_oa_wait_unlocked(struct i915_perf_stream *stream)
1154 struct drm_i915_private *dev_priv = stream->dev_priv;
1156 /* We would wait indefinitely if periodic sampling is not enabled */
1157 if (!dev_priv->perf.oa.periodic)
1160 return wait_event_interruptible(dev_priv->perf.oa.poll_wq,
1161 oa_buffer_check_unlocked(dev_priv));
1165 * i915_oa_poll_wait - call poll_wait() for an OA stream poll()
1166 * @stream: An i915-perf stream opened for OA metrics
1167 * @file: An i915 perf stream file
1168 * @wait: poll() state table
1170 * For handling userspace polling on an i915 perf stream opened for OA metrics,
1171 * this starts a poll_wait with the wait queue that our hrtimer callback wakes
1172 * when it sees data ready to read in the circular OA buffer.
1174 static void i915_oa_poll_wait(struct i915_perf_stream *stream,
1178 struct drm_i915_private *dev_priv = stream->dev_priv;
1180 poll_wait(file, &dev_priv->perf.oa.poll_wq, wait);
1184 * i915_oa_read - just calls through to &i915_oa_ops->read
1185 * @stream: An i915-perf stream opened for OA metrics
1186 * @buf: destination buffer given by userspace
1187 * @count: the number of bytes userspace wants to read
1188 * @offset: (inout): the current position for writing into @buf
1190 * Updates @offset according to the number of bytes successfully copied into
1191 * the userspace buffer.
1193 * Returns: zero on success or a negative error code
1195 static int i915_oa_read(struct i915_perf_stream *stream,
1200 struct drm_i915_private *dev_priv = stream->dev_priv;
1202 return dev_priv->perf.oa.ops.read(stream, buf, count, offset);
1205 static struct intel_context *oa_pin_context(struct drm_i915_private *i915,
1206 struct i915_gem_context *ctx)
1208 struct i915_gem_engines_iter it;
1209 struct intel_context *ce;
1212 err = i915_mutex_lock_interruptible(&i915->drm);
1214 return ERR_PTR(err);
1216 for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) {
1217 if (ce->engine->class != RENDER_CLASS)
1221 * As the ID is the gtt offset of the context's vma we
1222 * pin the vma to ensure the ID remains fixed.
1224 err = intel_context_pin(ce);
1226 i915->perf.oa.pinned_ctx = ce;
1230 i915_gem_context_unlock_engines(ctx);
1232 mutex_unlock(&i915->drm.struct_mutex);
1234 return ERR_PTR(err);
1236 return i915->perf.oa.pinned_ctx;
1240 * oa_get_render_ctx_id - determine and hold ctx hw id
1241 * @stream: An i915-perf stream opened for OA metrics
1243 * Determine the render context hw id, and ensure it remains fixed for the
1244 * lifetime of the stream. This ensures that we don't have to worry about
1245 * updating the context ID in OACONTROL on the fly.
1247 * Returns: zero on success or a negative error code
1249 static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
1251 struct drm_i915_private *i915 = stream->dev_priv;
1252 struct intel_context *ce;
1254 ce = oa_pin_context(i915, stream->ctx);
1258 switch (INTEL_GEN(i915)) {
1261 * On Haswell we don't do any post processing of the reports
1262 * and don't need to use the mask.
1264 i915->perf.oa.specific_ctx_id = i915_ggtt_offset(ce->state);
1265 i915->perf.oa.specific_ctx_id_mask = 0;
1272 if (USES_GUC_SUBMISSION(i915)) {
1274 * When using GuC, the context descriptor we write in
1275 * i915 is read by GuC and rewritten before it's
1276 * actually written into the hardware. The LRCA is
1277 * what is put into the context id field of the
1278 * context descriptor by GuC. Because it's aligned to
1279 * a page, the lower 12bits are always at 0 and
1280 * dropped by GuC. They won't be part of the context
1281 * ID in the OA reports, so squash those lower bits.
1283 i915->perf.oa.specific_ctx_id =
1284 lower_32_bits(ce->lrc_desc) >> 12;
1287 * GuC uses the top bit to signal proxy submission, so
1290 i915->perf.oa.specific_ctx_id_mask =
1291 (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
1293 i915->perf.oa.specific_ctx_id_mask =
1294 (1U << GEN8_CTX_ID_WIDTH) - 1;
1295 i915->perf.oa.specific_ctx_id =
1296 upper_32_bits(ce->lrc_desc);
1297 i915->perf.oa.specific_ctx_id &=
1298 i915->perf.oa.specific_ctx_id_mask;
1303 i915->perf.oa.specific_ctx_id_mask =
1304 ((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
1305 ((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
1306 ((1 << GEN11_ENGINE_CLASS_WIDTH) - 1) << (GEN11_ENGINE_CLASS_SHIFT - 32);
1307 i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc);
1308 i915->perf.oa.specific_ctx_id &=
1309 i915->perf.oa.specific_ctx_id_mask;
1314 MISSING_CASE(INTEL_GEN(i915));
1317 DRM_DEBUG_DRIVER("filtering on ctx_id=0x%x ctx_id_mask=0x%x\n",
1318 i915->perf.oa.specific_ctx_id,
1319 i915->perf.oa.specific_ctx_id_mask);
1325 * oa_put_render_ctx_id - counterpart to oa_get_render_ctx_id releases hold
1326 * @stream: An i915-perf stream opened for OA metrics
1328 * In case anything needed doing to ensure the context HW ID would remain valid
1329 * for the lifetime of the stream, then that can be undone here.
1331 static void oa_put_render_ctx_id(struct i915_perf_stream *stream)
1333 struct drm_i915_private *dev_priv = stream->dev_priv;
1334 struct intel_context *ce;
1336 dev_priv->perf.oa.specific_ctx_id = INVALID_CTX_ID;
1337 dev_priv->perf.oa.specific_ctx_id_mask = 0;
1339 ce = fetch_and_zero(&dev_priv->perf.oa.pinned_ctx);
1341 mutex_lock(&dev_priv->drm.struct_mutex);
1342 intel_context_unpin(ce);
1343 mutex_unlock(&dev_priv->drm.struct_mutex);
1348 free_oa_buffer(struct drm_i915_private *i915)
1350 mutex_lock(&i915->drm.struct_mutex);
1352 i915_vma_unpin_and_release(&i915->perf.oa.oa_buffer.vma,
1353 I915_VMA_RELEASE_MAP);
1355 mutex_unlock(&i915->drm.struct_mutex);
1357 i915->perf.oa.oa_buffer.vaddr = NULL;
1360 static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
1362 struct drm_i915_private *dev_priv = stream->dev_priv;
1364 BUG_ON(stream != dev_priv->perf.oa.exclusive_stream);
1367 * Unset exclusive_stream first, it will be checked while disabling
1368 * the metric set on gen8+.
1370 mutex_lock(&dev_priv->drm.struct_mutex);
1371 dev_priv->perf.oa.exclusive_stream = NULL;
1372 dev_priv->perf.oa.ops.disable_metric_set(dev_priv);
1373 mutex_unlock(&dev_priv->drm.struct_mutex);
1375 free_oa_buffer(dev_priv);
1377 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
1378 intel_runtime_pm_put(&dev_priv->runtime_pm, stream->wakeref);
1381 oa_put_render_ctx_id(stream);
1383 put_oa_config(dev_priv, stream->oa_config);
1385 if (dev_priv->perf.oa.spurious_report_rs.missed) {
1386 DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
1387 dev_priv->perf.oa.spurious_report_rs.missed);
1391 static void gen7_init_oa_buffer(struct drm_i915_private *dev_priv)
1393 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma);
1394 unsigned long flags;
1396 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1398 /* Pre-DevBDW: OABUFFER must be set with counters off,
1399 * before OASTATUS1, but after OASTATUS2
1401 I915_WRITE(GEN7_OASTATUS2,
1402 gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); /* head */
1403 dev_priv->perf.oa.oa_buffer.head = gtt_offset;
1405 I915_WRITE(GEN7_OABUFFER, gtt_offset);
1407 I915_WRITE(GEN7_OASTATUS1, gtt_offset | OABUFFER_SIZE_16M); /* tail */
1409 /* Mark that we need updated tail pointers to read from... */
1410 dev_priv->perf.oa.oa_buffer.tails[0].offset = INVALID_TAIL_PTR;
1411 dev_priv->perf.oa.oa_buffer.tails[1].offset = INVALID_TAIL_PTR;
1413 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1415 /* On Haswell we have to track which OASTATUS1 flags we've
1416 * already seen since they can't be cleared while periodic
1417 * sampling is enabled.
1419 dev_priv->perf.oa.gen7_latched_oastatus1 = 0;
1421 /* NB: although the OA buffer will initially be allocated
1422 * zeroed via shmfs (and so this memset is redundant when
1423 * first allocating), we may re-init the OA buffer, either
1424 * when re-enabling a stream or in error/reset paths.
1426 * The reason we clear the buffer for each re-init is for the
1427 * sanity check in gen7_append_oa_reports() that looks at the
1428 * report-id field to make sure it's non-zero which relies on
1429 * the assumption that new reports are being written to zeroed
1432 memset(dev_priv->perf.oa.oa_buffer.vaddr, 0, OA_BUFFER_SIZE);
1434 /* Maybe make ->pollin per-stream state if we support multiple
1435 * concurrent streams in the future.
1437 dev_priv->perf.oa.pollin = false;
1440 static void gen8_init_oa_buffer(struct drm_i915_private *dev_priv)
1442 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma);
1443 unsigned long flags;
1445 spin_lock_irqsave(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1447 I915_WRITE(GEN8_OASTATUS, 0);
1448 I915_WRITE(GEN8_OAHEADPTR, gtt_offset);
1449 dev_priv->perf.oa.oa_buffer.head = gtt_offset;
1451 I915_WRITE(GEN8_OABUFFER_UDW, 0);
1456 * "This MMIO must be set before the OATAILPTR
1457 * register and after the OAHEADPTR register. This is
1458 * to enable proper functionality of the overflow
1461 I915_WRITE(GEN8_OABUFFER, gtt_offset |
1462 OABUFFER_SIZE_16M | GEN8_OABUFFER_MEM_SELECT_GGTT);
1463 I915_WRITE(GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);
1465 /* Mark that we need updated tail pointers to read from... */
1466 dev_priv->perf.oa.oa_buffer.tails[0].offset = INVALID_TAIL_PTR;
1467 dev_priv->perf.oa.oa_buffer.tails[1].offset = INVALID_TAIL_PTR;
1470 * Reset state used to recognise context switches, affecting which
1471 * reports we will forward to userspace while filtering for a single
1474 dev_priv->perf.oa.oa_buffer.last_ctx_id = INVALID_CTX_ID;
1476 spin_unlock_irqrestore(&dev_priv->perf.oa.oa_buffer.ptr_lock, flags);
1479 * NB: although the OA buffer will initially be allocated
1480 * zeroed via shmfs (and so this memset is redundant when
1481 * first allocating), we may re-init the OA buffer, either
1482 * when re-enabling a stream or in error/reset paths.
1484 * The reason we clear the buffer for each re-init is for the
1485 * sanity check in gen8_append_oa_reports() that looks at the
1486 * reason field to make sure it's non-zero which relies on
1487 * the assumption that new reports are being written to zeroed
1490 memset(dev_priv->perf.oa.oa_buffer.vaddr, 0, OA_BUFFER_SIZE);
1493 * Maybe make ->pollin per-stream state if we support multiple
1494 * concurrent streams in the future.
1496 dev_priv->perf.oa.pollin = false;
1499 static int alloc_oa_buffer(struct drm_i915_private *dev_priv)
1501 struct drm_i915_gem_object *bo;
1502 struct i915_vma *vma;
1505 if (WARN_ON(dev_priv->perf.oa.oa_buffer.vma))
1508 ret = i915_mutex_lock_interruptible(&dev_priv->drm);
1512 BUILD_BUG_ON_NOT_POWER_OF_2(OA_BUFFER_SIZE);
1513 BUILD_BUG_ON(OA_BUFFER_SIZE < SZ_128K || OA_BUFFER_SIZE > SZ_16M);
1515 bo = i915_gem_object_create_shmem(dev_priv, OA_BUFFER_SIZE);
1517 DRM_ERROR("Failed to allocate OA buffer\n");
1522 i915_gem_object_set_cache_coherency(bo, I915_CACHE_LLC);
1524 /* PreHSW required 512K alignment, HSW requires 16M */
1525 vma = i915_gem_object_ggtt_pin(bo, NULL, 0, SZ_16M, 0);
1530 dev_priv->perf.oa.oa_buffer.vma = vma;
1532 dev_priv->perf.oa.oa_buffer.vaddr =
1533 i915_gem_object_pin_map(bo, I915_MAP_WB);
1534 if (IS_ERR(dev_priv->perf.oa.oa_buffer.vaddr)) {
1535 ret = PTR_ERR(dev_priv->perf.oa.oa_buffer.vaddr);
1539 DRM_DEBUG_DRIVER("OA Buffer initialized, gtt offset = 0x%x, vaddr = %p\n",
1540 i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma),
1541 dev_priv->perf.oa.oa_buffer.vaddr);
1546 __i915_vma_unpin(vma);
1549 i915_gem_object_put(bo);
1551 dev_priv->perf.oa.oa_buffer.vaddr = NULL;
1552 dev_priv->perf.oa.oa_buffer.vma = NULL;
1555 mutex_unlock(&dev_priv->drm.struct_mutex);
1559 static void config_oa_regs(struct drm_i915_private *dev_priv,
1560 const struct i915_oa_reg *regs,
1565 for (i = 0; i < n_regs; i++) {
1566 const struct i915_oa_reg *reg = regs + i;
1568 I915_WRITE(reg->addr, reg->value);
1572 static int hsw_enable_metric_set(struct i915_perf_stream *stream)
1574 struct drm_i915_private *dev_priv = stream->dev_priv;
1575 const struct i915_oa_config *oa_config = stream->oa_config;
1579 * OA unit is using “crclk” for its functionality. When trunk
1580 * level clock gating takes place, OA clock would be gated,
1581 * unable to count the events from non-render clock domain.
1582 * Render clock gating must be disabled when OA is enabled to
1583 * count the events from non-render domain. Unit level clock
1584 * gating for RCS should also be disabled.
1586 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &
1587 ~GEN7_DOP_CLOCK_GATE_ENABLE));
1588 I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) |
1589 GEN6_CSUNIT_CLOCK_GATE_DISABLE));
1591 config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
1593 /* It apparently takes a fairly long time for a new MUX
1594 * configuration to be be applied after these register writes.
1595 * This delay duration was derived empirically based on the
1596 * render_basic config but hopefully it covers the maximum
1597 * configuration latency.
1599 * As a fallback, the checks in _append_oa_reports() to skip
1600 * invalid OA reports do also seem to work to discard reports
1601 * generated before this config has completed - albeit not
1604 * Unfortunately this is essentially a magic number, since we
1605 * don't currently know of a reliable mechanism for predicting
1606 * how long the MUX config will take to apply and besides
1607 * seeing invalid reports we don't know of a reliable way to
1608 * explicitly check that the MUX config has landed.
1610 * It's even possible we've miss characterized the underlying
1611 * problem - it just seems like the simplest explanation why
1612 * a delay at this location would mitigate any invalid reports.
1614 usleep_range(15000, 20000);
1616 config_oa_regs(dev_priv, oa_config->b_counter_regs,
1617 oa_config->b_counter_regs_len);
1622 static void hsw_disable_metric_set(struct drm_i915_private *dev_priv)
1624 I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) &
1625 ~GEN6_CSUNIT_CLOCK_GATE_DISABLE));
1626 I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) |
1627 GEN7_DOP_CLOCK_GATE_ENABLE));
1629 I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &
1634 * NB: It must always remain pointer safe to run this even if the OA unit
1635 * has been disabled.
1637 * It's fine to put out-of-date values into these per-context registers
1638 * in the case that the OA unit has been disabled.
1641 gen8_update_reg_state_unlocked(struct intel_context *ce,
1643 const struct i915_oa_config *oa_config)
1645 struct drm_i915_private *i915 = ce->gem_context->i915;
1646 u32 ctx_oactxctrl = i915->perf.oa.ctx_oactxctrl_offset;
1647 u32 ctx_flexeu0 = i915->perf.oa.ctx_flexeu0_offset;
1648 /* The MMIO offsets for Flex EU registers aren't contiguous */
1649 i915_reg_t flex_regs[] = {
1660 CTX_REG(reg_state, ctx_oactxctrl, GEN8_OACTXCONTROL,
1661 (i915->perf.oa.period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) |
1662 (i915->perf.oa.periodic ? GEN8_OA_TIMER_ENABLE : 0) |
1663 GEN8_OA_COUNTER_RESUME);
1665 for (i = 0; i < ARRAY_SIZE(flex_regs); i++) {
1666 u32 state_offset = ctx_flexeu0 + i * 2;
1667 u32 mmio = i915_mmio_reg_offset(flex_regs[i]);
1670 * This arbitrary default will select the 'EU FPU0 Pipeline
1671 * Active' event. In the future it's anticipated that there
1672 * will be an explicit 'No Event' we can select, but not yet...
1679 for (j = 0; j < oa_config->flex_regs_len; j++) {
1680 if (i915_mmio_reg_offset(oa_config->flex_regs[j].addr) == mmio) {
1681 value = oa_config->flex_regs[j].value;
1687 CTX_REG(reg_state, state_offset, flex_regs[i], value);
1691 CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
1692 intel_sseu_make_rpcs(i915, &ce->sseu));
1696 * Manages updating the per-context aspects of the OA stream
1697 * configuration across all contexts.
1699 * The awkward consideration here is that OACTXCONTROL controls the
1700 * exponent for periodic sampling which is primarily used for system
1701 * wide profiling where we'd like a consistent sampling period even in
1702 * the face of context switches.
1704 * Our approach of updating the register state context (as opposed to
1705 * say using a workaround batch buffer) ensures that the hardware
1706 * won't automatically reload an out-of-date timer exponent even
1707 * transiently before a WA BB could be parsed.
1709 * This function needs to:
1710 * - Ensure the currently running context's per-context OA state is
1712 * - Ensure that all existing contexts will have the correct per-context
1713 * OA state if they are scheduled for use.
1714 * - Ensure any new contexts will be initialized with the correct
1715 * per-context OA state.
1717 * Note: it's only the RCS/Render context that has any OA state.
1719 static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv,
1720 const struct i915_oa_config *oa_config)
1722 unsigned int map_type = i915_coherent_map_type(dev_priv);
1723 struct i915_gem_context *ctx;
1724 struct i915_request *rq;
1727 lockdep_assert_held(&dev_priv->drm.struct_mutex);
1730 * The OA register config is setup through the context image. This image
1731 * might be written to by the GPU on context switch (in particular on
1732 * lite-restore). This means we can't safely update a context's image,
1733 * if this context is scheduled/submitted to run on the GPU.
1735 * We could emit the OA register config through the batch buffer but
1736 * this might leave small interval of time where the OA unit is
1737 * configured at an invalid sampling period.
1739 * So far the best way to work around this issue seems to be draining
1740 * the GPU from any submitted work.
1742 ret = i915_gem_wait_for_idle(dev_priv,
1744 MAX_SCHEDULE_TIMEOUT);
1748 /* Update all contexts now that we've stalled the submission. */
1749 list_for_each_entry(ctx, &dev_priv->contexts.list, link) {
1750 struct i915_gem_engines_iter it;
1751 struct intel_context *ce;
1753 for_each_gem_engine(ce,
1754 i915_gem_context_lock_engines(ctx),
1758 if (ce->engine->class != RENDER_CLASS)
1761 /* OA settings will be set upon first use */
1765 regs = i915_gem_object_pin_map(ce->state->obj,
1768 i915_gem_context_unlock_engines(ctx);
1769 return PTR_ERR(regs);
1772 ce->state->obj->mm.dirty = true;
1773 regs += LRC_STATE_PN * PAGE_SIZE / sizeof(*regs);
1775 gen8_update_reg_state_unlocked(ce, regs, oa_config);
1777 i915_gem_object_unpin_map(ce->state->obj);
1779 i915_gem_context_unlock_engines(ctx);
1783 * Apply the configuration by doing one context restore of the edited
1786 rq = i915_request_create(dev_priv->engine[RCS0]->kernel_context);
1790 i915_request_add(rq);
1795 static int gen8_enable_metric_set(struct i915_perf_stream *stream)
1797 struct drm_i915_private *dev_priv = stream->dev_priv;
1798 const struct i915_oa_config *oa_config = stream->oa_config;
1802 * We disable slice/unslice clock ratio change reports on SKL since
1803 * they are too noisy. The HW generates a lot of redundant reports
1804 * where the ratio hasn't really changed causing a lot of redundant
1805 * work to processes and increasing the chances we'll hit buffer
1808 * Although we don't currently use the 'disable overrun' OABUFFER
1809 * feature it's worth noting that clock ratio reports have to be
1810 * disabled before considering to use that feature since the HW doesn't
1811 * correctly block these reports.
1813 * Currently none of the high-level metrics we have depend on knowing
1814 * this ratio to normalize.
1816 * Note: This register is not power context saved and restored, but
1817 * that's OK considering that we disable RC6 while the OA unit is
1820 * The _INCLUDE_CLK_RATIO bit allows the slice/unslice frequency to
1821 * be read back from automatically triggered reports, as part of the
1824 if (IS_GEN_RANGE(dev_priv, 9, 11)) {
1825 I915_WRITE(GEN8_OA_DEBUG,
1826 _MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
1827 GEN9_OA_DEBUG_INCLUDE_CLK_RATIO));
1831 * Update all contexts prior writing the mux configurations as we need
1832 * to make sure all slices/subslices are ON before writing to NOA
1835 ret = gen8_configure_all_contexts(dev_priv, oa_config);
1839 config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
1841 config_oa_regs(dev_priv, oa_config->b_counter_regs,
1842 oa_config->b_counter_regs_len);
1847 static void gen8_disable_metric_set(struct drm_i915_private *dev_priv)
1849 /* Reset all contexts' slices/subslices configurations. */
1850 gen8_configure_all_contexts(dev_priv, NULL);
1852 I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) &
1856 static void gen10_disable_metric_set(struct drm_i915_private *dev_priv)
1858 /* Reset all contexts' slices/subslices configurations. */
1859 gen8_configure_all_contexts(dev_priv, NULL);
1861 /* Make sure we disable noa to save power. */
1862 I915_WRITE(RPM_CONFIG1,
1863 I915_READ(RPM_CONFIG1) & ~GEN10_GT_NOA_ENABLE);
1866 static void gen7_oa_enable(struct i915_perf_stream *stream)
1868 struct drm_i915_private *dev_priv = stream->dev_priv;
1869 struct i915_gem_context *ctx = stream->ctx;
1870 u32 ctx_id = dev_priv->perf.oa.specific_ctx_id;
1871 bool periodic = dev_priv->perf.oa.periodic;
1872 u32 period_exponent = dev_priv->perf.oa.period_exponent;
1873 u32 report_format = dev_priv->perf.oa.oa_buffer.format;
1876 * Reset buf pointers so we don't forward reports from before now.
1878 * Think carefully if considering trying to avoid this, since it
1879 * also ensures status flags and the buffer itself are cleared
1880 * in error paths, and we have checks for invalid reports based
1881 * on the assumption that certain fields are written to zeroed
1882 * memory which this helps maintains.
1884 gen7_init_oa_buffer(dev_priv);
1886 I915_WRITE(GEN7_OACONTROL,
1887 (ctx_id & GEN7_OACONTROL_CTX_MASK) |
1889 GEN7_OACONTROL_TIMER_PERIOD_SHIFT) |
1890 (periodic ? GEN7_OACONTROL_TIMER_ENABLE : 0) |
1891 (report_format << GEN7_OACONTROL_FORMAT_SHIFT) |
1892 (ctx ? GEN7_OACONTROL_PER_CTX_ENABLE : 0) |
1893 GEN7_OACONTROL_ENABLE);
1896 static void gen8_oa_enable(struct i915_perf_stream *stream)
1898 struct drm_i915_private *dev_priv = stream->dev_priv;
1899 u32 report_format = dev_priv->perf.oa.oa_buffer.format;
1902 * Reset buf pointers so we don't forward reports from before now.
1904 * Think carefully if considering trying to avoid this, since it
1905 * also ensures status flags and the buffer itself are cleared
1906 * in error paths, and we have checks for invalid reports based
1907 * on the assumption that certain fields are written to zeroed
1908 * memory which this helps maintains.
1910 gen8_init_oa_buffer(dev_priv);
1913 * Note: we don't rely on the hardware to perform single context
1914 * filtering and instead filter on the cpu based on the context-id
1917 I915_WRITE(GEN8_OACONTROL, (report_format <<
1918 GEN8_OA_REPORT_FORMAT_SHIFT) |
1919 GEN8_OA_COUNTER_ENABLE);
1923 * i915_oa_stream_enable - handle `I915_PERF_IOCTL_ENABLE` for OA stream
1924 * @stream: An i915 perf stream opened for OA metrics
1926 * [Re]enables hardware periodic sampling according to the period configured
1927 * when opening the stream. This also starts a hrtimer that will periodically
1928 * check for data in the circular OA buffer for notifying userspace (e.g.
1929 * during a read() or poll()).
1931 static void i915_oa_stream_enable(struct i915_perf_stream *stream)
1933 struct drm_i915_private *dev_priv = stream->dev_priv;
1935 dev_priv->perf.oa.ops.oa_enable(stream);
1937 if (dev_priv->perf.oa.periodic)
1938 hrtimer_start(&dev_priv->perf.oa.poll_check_timer,
1939 ns_to_ktime(POLL_PERIOD),
1940 HRTIMER_MODE_REL_PINNED);
1943 static void gen7_oa_disable(struct i915_perf_stream *stream)
1945 struct intel_uncore *uncore = &stream->dev_priv->uncore;
1947 intel_uncore_write(uncore, GEN7_OACONTROL, 0);
1948 if (intel_wait_for_register(uncore,
1949 GEN7_OACONTROL, GEN7_OACONTROL_ENABLE, 0,
1951 DRM_ERROR("wait for OA to be disabled timed out\n");
1954 static void gen8_oa_disable(struct i915_perf_stream *stream)
1956 struct intel_uncore *uncore = &stream->dev_priv->uncore;
1958 intel_uncore_write(uncore, GEN8_OACONTROL, 0);
1959 if (intel_wait_for_register(uncore,
1960 GEN8_OACONTROL, GEN8_OA_COUNTER_ENABLE, 0,
1962 DRM_ERROR("wait for OA to be disabled timed out\n");
1966 * i915_oa_stream_disable - handle `I915_PERF_IOCTL_DISABLE` for OA stream
1967 * @stream: An i915 perf stream opened for OA metrics
1969 * Stops the OA unit from periodically writing counter reports into the
1970 * circular OA buffer. This also stops the hrtimer that periodically checks for
1971 * data in the circular OA buffer, for notifying userspace.
1973 static void i915_oa_stream_disable(struct i915_perf_stream *stream)
1975 struct drm_i915_private *dev_priv = stream->dev_priv;
1977 dev_priv->perf.oa.ops.oa_disable(stream);
1979 if (dev_priv->perf.oa.periodic)
1980 hrtimer_cancel(&dev_priv->perf.oa.poll_check_timer);
1983 static const struct i915_perf_stream_ops i915_oa_stream_ops = {
1984 .destroy = i915_oa_stream_destroy,
1985 .enable = i915_oa_stream_enable,
1986 .disable = i915_oa_stream_disable,
1987 .wait_unlocked = i915_oa_wait_unlocked,
1988 .poll_wait = i915_oa_poll_wait,
1989 .read = i915_oa_read,
1993 * i915_oa_stream_init - validate combined props for OA stream and init
1994 * @stream: An i915 perf stream
1995 * @param: The open parameters passed to `DRM_I915_PERF_OPEN`
1996 * @props: The property state that configures stream (individually validated)
1998 * While read_properties_unlocked() validates properties in isolation it
1999 * doesn't ensure that the combination necessarily makes sense.
2001 * At this point it has been determined that userspace wants a stream of
2002 * OA metrics, but still we need to further validate the combined
2003 * properties are OK.
2005 * If the configuration makes sense then we can allocate memory for
2006 * a circular OA buffer and apply the requested metric set configuration.
2008 * Returns: zero on success or a negative error code.
2010 static int i915_oa_stream_init(struct i915_perf_stream *stream,
2011 struct drm_i915_perf_open_param *param,
2012 struct perf_open_properties *props)
2014 struct drm_i915_private *dev_priv = stream->dev_priv;
2018 /* If the sysfs metrics/ directory wasn't registered for some
2019 * reason then don't let userspace try their luck with config
2022 if (!dev_priv->perf.metrics_kobj) {
2023 DRM_DEBUG("OA metrics weren't advertised via sysfs\n");
2027 if (!(props->sample_flags & SAMPLE_OA_REPORT)) {
2028 DRM_DEBUG("Only OA report sampling supported\n");
2032 if (!dev_priv->perf.oa.ops.enable_metric_set) {
2033 DRM_DEBUG("OA unit not supported\n");
2037 /* To avoid the complexity of having to accurately filter
2038 * counter reports and marshal to the appropriate client
2039 * we currently only allow exclusive access
2041 if (dev_priv->perf.oa.exclusive_stream) {
2042 DRM_DEBUG("OA unit already in use\n");
2046 if (!props->oa_format) {
2047 DRM_DEBUG("OA report format not specified\n");
2051 /* We set up some ratelimit state to potentially throttle any _NOTES
2052 * about spurious, invalid OA reports which we don't forward to
2055 * The initialization is associated with opening the stream (not driver
2056 * init) considering we print a _NOTE about any throttling when closing
2057 * the stream instead of waiting until driver _fini which no one would
2060 * Using the same limiting factors as printk_ratelimit()
2062 ratelimit_state_init(&dev_priv->perf.oa.spurious_report_rs,
2064 /* Since we use a DRM_NOTE for spurious reports it would be
2065 * inconsistent to let __ratelimit() automatically print a warning for
2068 ratelimit_set_flags(&dev_priv->perf.oa.spurious_report_rs,
2069 RATELIMIT_MSG_ON_RELEASE);
2071 stream->sample_size = sizeof(struct drm_i915_perf_record_header);
2073 format_size = dev_priv->perf.oa.oa_formats[props->oa_format].size;
2075 stream->sample_flags |= SAMPLE_OA_REPORT;
2076 stream->sample_size += format_size;
2078 dev_priv->perf.oa.oa_buffer.format_size = format_size;
2079 if (WARN_ON(dev_priv->perf.oa.oa_buffer.format_size == 0))
2082 dev_priv->perf.oa.oa_buffer.format =
2083 dev_priv->perf.oa.oa_formats[props->oa_format].format;
2085 dev_priv->perf.oa.periodic = props->oa_periodic;
2086 if (dev_priv->perf.oa.periodic)
2087 dev_priv->perf.oa.period_exponent = props->oa_period_exponent;
2090 ret = oa_get_render_ctx_id(stream);
2092 DRM_DEBUG("Invalid context id to filter with\n");
2097 ret = get_oa_config(dev_priv, props->metrics_set, &stream->oa_config);
2099 DRM_DEBUG("Invalid OA config id=%i\n", props->metrics_set);
2103 /* PRM - observability performance counters:
2105 * OACONTROL, performance counter enable, note:
2107 * "When this bit is set, in order to have coherent counts,
2108 * RC6 power state and trunk clock gating must be disabled.
2109 * This can be achieved by programming MMIO registers as
2110 * 0xA094=0 and 0xA090[31]=1"
2112 * In our case we are expecting that taking pm + FORCEWAKE
2113 * references will effectively disable RC6.
2115 stream->wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
2116 intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
2118 ret = alloc_oa_buffer(dev_priv);
2120 goto err_oa_buf_alloc;
2122 ret = i915_mutex_lock_interruptible(&dev_priv->drm);
2126 stream->ops = &i915_oa_stream_ops;
2127 dev_priv->perf.oa.exclusive_stream = stream;
2129 ret = dev_priv->perf.oa.ops.enable_metric_set(stream);
2131 DRM_DEBUG("Unable to enable metric set\n");
2135 mutex_unlock(&dev_priv->drm.struct_mutex);
2140 dev_priv->perf.oa.exclusive_stream = NULL;
2141 dev_priv->perf.oa.ops.disable_metric_set(dev_priv);
2142 mutex_unlock(&dev_priv->drm.struct_mutex);
2145 free_oa_buffer(dev_priv);
2148 put_oa_config(dev_priv, stream->oa_config);
2150 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
2151 intel_runtime_pm_put(&dev_priv->runtime_pm, stream->wakeref);
2155 oa_put_render_ctx_id(stream);
2160 void i915_oa_init_reg_state(struct intel_engine_cs *engine,
2161 struct intel_context *ce,
2164 struct i915_perf_stream *stream;
2166 if (engine->class != RENDER_CLASS)
2169 stream = engine->i915->perf.oa.exclusive_stream;
2171 gen8_update_reg_state_unlocked(ce, regs, stream->oa_config);
2175 * i915_perf_read_locked - &i915_perf_stream_ops->read with error normalisation
2176 * @stream: An i915 perf stream
2177 * @file: An i915 perf stream file
2178 * @buf: destination buffer given by userspace
2179 * @count: the number of bytes userspace wants to read
2180 * @ppos: (inout) file seek position (unused)
2182 * Besides wrapping &i915_perf_stream_ops->read this provides a common place to
2183 * ensure that if we've successfully copied any data then reporting that takes
2184 * precedence over any internal error status, so the data isn't lost.
2186 * For example ret will be -ENOSPC whenever there is more buffered data than
2187 * can be copied to userspace, but that's only interesting if we weren't able
2188 * to copy some data because it implies the userspace buffer is too small to
2189 * receive a single record (and we never split records).
2191 * Another case with ret == -EFAULT is more of a grey area since it would seem
2192 * like bad form for userspace to ask us to overrun its buffer, but the user
2195 * http://yarchive.net/comp/linux/partial_reads_writes.html
2197 * Returns: The number of bytes copied or a negative error code on failure.
2199 static ssize_t i915_perf_read_locked(struct i915_perf_stream *stream,
2205 /* Note we keep the offset (aka bytes read) separate from any
2206 * error status so that the final check for whether we return
2207 * the bytes read with a higher precedence than any error (see
2208 * comment below) doesn't need to be handled/duplicated in
2209 * stream->ops->read() implementations.
2212 int ret = stream->ops->read(stream, buf, count, &offset);
2214 return offset ?: (ret ?: -EAGAIN);
2218 * i915_perf_read - handles read() FOP for i915 perf stream FDs
2219 * @file: An i915 perf stream file
2220 * @buf: destination buffer given by userspace
2221 * @count: the number of bytes userspace wants to read
2222 * @ppos: (inout) file seek position (unused)
2224 * The entry point for handling a read() on a stream file descriptor from
2225 * userspace. Most of the work is left to the i915_perf_read_locked() and
2226 * &i915_perf_stream_ops->read but to save having stream implementations (of
2227 * which we might have multiple later) we handle blocking read here.
2229 * We can also consistently treat trying to read from a disabled stream
2230 * as an IO error so implementations can assume the stream is enabled
2233 * Returns: The number of bytes copied or a negative error code on failure.
2235 static ssize_t i915_perf_read(struct file *file,
2240 struct i915_perf_stream *stream = file->private_data;
2241 struct drm_i915_private *dev_priv = stream->dev_priv;
2244 /* To ensure it's handled consistently we simply treat all reads of a
2245 * disabled stream as an error. In particular it might otherwise lead
2246 * to a deadlock for blocking file descriptors...
2248 if (!stream->enabled)
2251 if (!(file->f_flags & O_NONBLOCK)) {
2252 /* There's the small chance of false positives from
2253 * stream->ops->wait_unlocked.
2255 * E.g. with single context filtering since we only wait until
2256 * oabuffer has >= 1 report we don't immediately know whether
2257 * any reports really belong to the current context
2260 ret = stream->ops->wait_unlocked(stream);
2264 mutex_lock(&dev_priv->perf.lock);
2265 ret = i915_perf_read_locked(stream, file,
2267 mutex_unlock(&dev_priv->perf.lock);
2268 } while (ret == -EAGAIN);
2270 mutex_lock(&dev_priv->perf.lock);
2271 ret = i915_perf_read_locked(stream, file, buf, count, ppos);
2272 mutex_unlock(&dev_priv->perf.lock);
2275 /* We allow the poll checking to sometimes report false positive EPOLLIN
2276 * events where we might actually report EAGAIN on read() if there's
2277 * not really any data available. In this situation though we don't
2278 * want to enter a busy loop between poll() reporting a EPOLLIN event
2279 * and read() returning -EAGAIN. Clearing the oa.pollin state here
2280 * effectively ensures we back off until the next hrtimer callback
2281 * before reporting another EPOLLIN event.
2283 if (ret >= 0 || ret == -EAGAIN) {
2284 /* Maybe make ->pollin per-stream state if we support multiple
2285 * concurrent streams in the future.
2287 dev_priv->perf.oa.pollin = false;
2293 static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer)
2295 struct drm_i915_private *dev_priv =
2296 container_of(hrtimer, typeof(*dev_priv),
2297 perf.oa.poll_check_timer);
2299 if (oa_buffer_check_unlocked(dev_priv)) {
2300 dev_priv->perf.oa.pollin = true;
2301 wake_up(&dev_priv->perf.oa.poll_wq);
2304 hrtimer_forward_now(hrtimer, ns_to_ktime(POLL_PERIOD));
2306 return HRTIMER_RESTART;
2310 * i915_perf_poll_locked - poll_wait() with a suitable wait queue for stream
2311 * @dev_priv: i915 device instance
2312 * @stream: An i915 perf stream
2313 * @file: An i915 perf stream file
2314 * @wait: poll() state table
2316 * For handling userspace polling on an i915 perf stream, this calls through to
2317 * &i915_perf_stream_ops->poll_wait to call poll_wait() with a wait queue that
2318 * will be woken for new stream data.
2320 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2321 * with any non-file-operation driver hooks.
2323 * Returns: any poll events that are ready without sleeping
2325 static __poll_t i915_perf_poll_locked(struct drm_i915_private *dev_priv,
2326 struct i915_perf_stream *stream,
2330 __poll_t events = 0;
2332 stream->ops->poll_wait(stream, file, wait);
2334 /* Note: we don't explicitly check whether there's something to read
2335 * here since this path may be very hot depending on what else
2336 * userspace is polling, or on the timeout in use. We rely solely on
2337 * the hrtimer/oa_poll_check_timer_cb to notify us when there are
2340 if (dev_priv->perf.oa.pollin)
2347 * i915_perf_poll - call poll_wait() with a suitable wait queue for stream
2348 * @file: An i915 perf stream file
2349 * @wait: poll() state table
2351 * For handling userspace polling on an i915 perf stream, this ensures
2352 * poll_wait() gets called with a wait queue that will be woken for new stream
2355 * Note: Implementation deferred to i915_perf_poll_locked()
2357 * Returns: any poll events that are ready without sleeping
2359 static __poll_t i915_perf_poll(struct file *file, poll_table *wait)
2361 struct i915_perf_stream *stream = file->private_data;
2362 struct drm_i915_private *dev_priv = stream->dev_priv;
2365 mutex_lock(&dev_priv->perf.lock);
2366 ret = i915_perf_poll_locked(dev_priv, stream, file, wait);
2367 mutex_unlock(&dev_priv->perf.lock);
2373 * i915_perf_enable_locked - handle `I915_PERF_IOCTL_ENABLE` ioctl
2374 * @stream: A disabled i915 perf stream
2376 * [Re]enables the associated capture of data for this stream.
2378 * If a stream was previously enabled then there's currently no intention
2379 * to provide userspace any guarantee about the preservation of previously
2382 static void i915_perf_enable_locked(struct i915_perf_stream *stream)
2384 if (stream->enabled)
2387 /* Allow stream->ops->enable() to refer to this */
2388 stream->enabled = true;
2390 if (stream->ops->enable)
2391 stream->ops->enable(stream);
2395 * i915_perf_disable_locked - handle `I915_PERF_IOCTL_DISABLE` ioctl
2396 * @stream: An enabled i915 perf stream
2398 * Disables the associated capture of data for this stream.
2400 * The intention is that disabling an re-enabling a stream will ideally be
2401 * cheaper than destroying and re-opening a stream with the same configuration,
2402 * though there are no formal guarantees about what state or buffered data
2403 * must be retained between disabling and re-enabling a stream.
2405 * Note: while a stream is disabled it's considered an error for userspace
2406 * to attempt to read from the stream (-EIO).
2408 static void i915_perf_disable_locked(struct i915_perf_stream *stream)
2410 if (!stream->enabled)
2413 /* Allow stream->ops->disable() to refer to this */
2414 stream->enabled = false;
2416 if (stream->ops->disable)
2417 stream->ops->disable(stream);
2421 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
2422 * @stream: An i915 perf stream
2423 * @cmd: the ioctl request
2424 * @arg: the ioctl data
2426 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2427 * with any non-file-operation driver hooks.
2429 * Returns: zero on success or a negative error code. Returns -EINVAL for
2430 * an unknown ioctl request.
2432 static long i915_perf_ioctl_locked(struct i915_perf_stream *stream,
2437 case I915_PERF_IOCTL_ENABLE:
2438 i915_perf_enable_locked(stream);
2440 case I915_PERF_IOCTL_DISABLE:
2441 i915_perf_disable_locked(stream);
2449 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
2450 * @file: An i915 perf stream file
2451 * @cmd: the ioctl request
2452 * @arg: the ioctl data
2454 * Implementation deferred to i915_perf_ioctl_locked().
2456 * Returns: zero on success or a negative error code. Returns -EINVAL for
2457 * an unknown ioctl request.
2459 static long i915_perf_ioctl(struct file *file,
2463 struct i915_perf_stream *stream = file->private_data;
2464 struct drm_i915_private *dev_priv = stream->dev_priv;
2467 mutex_lock(&dev_priv->perf.lock);
2468 ret = i915_perf_ioctl_locked(stream, cmd, arg);
2469 mutex_unlock(&dev_priv->perf.lock);
2475 * i915_perf_destroy_locked - destroy an i915 perf stream
2476 * @stream: An i915 perf stream
2478 * Frees all resources associated with the given i915 perf @stream, disabling
2479 * any associated data capture in the process.
2481 * Note: The &drm_i915_private->perf.lock mutex has been taken to serialize
2482 * with any non-file-operation driver hooks.
2484 static void i915_perf_destroy_locked(struct i915_perf_stream *stream)
2486 if (stream->enabled)
2487 i915_perf_disable_locked(stream);
2489 if (stream->ops->destroy)
2490 stream->ops->destroy(stream);
2492 list_del(&stream->link);
2495 i915_gem_context_put(stream->ctx);
2501 * i915_perf_release - handles userspace close() of a stream file
2502 * @inode: anonymous inode associated with file
2503 * @file: An i915 perf stream file
2505 * Cleans up any resources associated with an open i915 perf stream file.
2507 * NB: close() can't really fail from the userspace point of view.
2509 * Returns: zero on success or a negative error code.
2511 static int i915_perf_release(struct inode *inode, struct file *file)
2513 struct i915_perf_stream *stream = file->private_data;
2514 struct drm_i915_private *dev_priv = stream->dev_priv;
2516 mutex_lock(&dev_priv->perf.lock);
2517 i915_perf_destroy_locked(stream);
2518 mutex_unlock(&dev_priv->perf.lock);
2524 static const struct file_operations fops = {
2525 .owner = THIS_MODULE,
2526 .llseek = no_llseek,
2527 .release = i915_perf_release,
2528 .poll = i915_perf_poll,
2529 .read = i915_perf_read,
2530 .unlocked_ioctl = i915_perf_ioctl,
2531 /* Our ioctl have no arguments, so it's safe to use the same function
2532 * to handle 32bits compatibility.
2534 .compat_ioctl = i915_perf_ioctl,
2539 * i915_perf_open_ioctl_locked - DRM ioctl() for userspace to open a stream FD
2540 * @dev_priv: i915 device instance
2541 * @param: The open parameters passed to 'DRM_I915_PERF_OPEN`
2542 * @props: individually validated u64 property value pairs
2545 * See i915_perf_ioctl_open() for interface details.
2547 * Implements further stream config validation and stream initialization on
2548 * behalf of i915_perf_open_ioctl() with the &drm_i915_private->perf.lock mutex
2549 * taken to serialize with any non-file-operation driver hooks.
2551 * Note: at this point the @props have only been validated in isolation and
2552 * it's still necessary to validate that the combination of properties makes
2555 * In the case where userspace is interested in OA unit metrics then further
2556 * config validation and stream initialization details will be handled by
2557 * i915_oa_stream_init(). The code here should only validate config state that
2558 * will be relevant to all stream types / backends.
2560 * Returns: zero on success or a negative error code.
2563 i915_perf_open_ioctl_locked(struct drm_i915_private *dev_priv,
2564 struct drm_i915_perf_open_param *param,
2565 struct perf_open_properties *props,
2566 struct drm_file *file)
2568 struct i915_gem_context *specific_ctx = NULL;
2569 struct i915_perf_stream *stream = NULL;
2570 unsigned long f_flags = 0;
2571 bool privileged_op = true;
2575 if (props->single_context) {
2576 u32 ctx_handle = props->ctx_handle;
2577 struct drm_i915_file_private *file_priv = file->driver_priv;
2579 specific_ctx = i915_gem_context_lookup(file_priv, ctx_handle);
2580 if (!specific_ctx) {
2581 DRM_DEBUG("Failed to look up context with ID %u for opening perf stream\n",
2589 * On Haswell the OA unit supports clock gating off for a specific
2590 * context and in this mode there's no visibility of metrics for the
2591 * rest of the system, which we consider acceptable for a
2592 * non-privileged client.
2594 * For Gen8+ the OA unit no longer supports clock gating off for a
2595 * specific context and the kernel can't securely stop the counters
2596 * from updating as system-wide / global values. Even though we can
2597 * filter reports based on the included context ID we can't block
2598 * clients from seeing the raw / global counter values via
2599 * MI_REPORT_PERF_COUNT commands and so consider it a privileged op to
2600 * enable the OA unit by default.
2602 if (IS_HASWELL(dev_priv) && specific_ctx)
2603 privileged_op = false;
2605 /* Similar to perf's kernel.perf_paranoid_cpu sysctl option
2606 * we check a dev.i915.perf_stream_paranoid sysctl option
2607 * to determine if it's ok to access system wide OA counters
2608 * without CAP_SYS_ADMIN privileges.
2610 if (privileged_op &&
2611 i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
2612 DRM_DEBUG("Insufficient privileges to open system-wide i915 perf stream\n");
2617 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
2623 stream->dev_priv = dev_priv;
2624 stream->ctx = specific_ctx;
2626 ret = i915_oa_stream_init(stream, param, props);
2630 /* we avoid simply assigning stream->sample_flags = props->sample_flags
2631 * to have _stream_init check the combination of sample flags more
2632 * thoroughly, but still this is the expected result at this point.
2634 if (WARN_ON(stream->sample_flags != props->sample_flags)) {
2639 list_add(&stream->link, &dev_priv->perf.streams);
2641 if (param->flags & I915_PERF_FLAG_FD_CLOEXEC)
2642 f_flags |= O_CLOEXEC;
2643 if (param->flags & I915_PERF_FLAG_FD_NONBLOCK)
2644 f_flags |= O_NONBLOCK;
2646 stream_fd = anon_inode_getfd("[i915_perf]", &fops, stream, f_flags);
2647 if (stream_fd < 0) {
2652 if (!(param->flags & I915_PERF_FLAG_DISABLED))
2653 i915_perf_enable_locked(stream);
2658 list_del(&stream->link);
2660 if (stream->ops->destroy)
2661 stream->ops->destroy(stream);
2666 i915_gem_context_put(specific_ctx);
2671 static u64 oa_exponent_to_ns(struct drm_i915_private *dev_priv, int exponent)
2673 return div64_u64(1000000000ULL * (2ULL << exponent),
2674 1000ULL * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
2678 * read_properties_unlocked - validate + copy userspace stream open properties
2679 * @dev_priv: i915 device instance
2680 * @uprops: The array of u64 key value pairs given by userspace
2681 * @n_props: The number of key value pairs expected in @uprops
2682 * @props: The stream configuration built up while validating properties
2684 * Note this function only validates properties in isolation it doesn't
2685 * validate that the combination of properties makes sense or that all
2686 * properties necessary for a particular kind of stream have been set.
2688 * Note that there currently aren't any ordering requirements for properties so
2689 * we shouldn't validate or assume anything about ordering here. This doesn't
2690 * rule out defining new properties with ordering requirements in the future.
2692 static int read_properties_unlocked(struct drm_i915_private *dev_priv,
2695 struct perf_open_properties *props)
2697 u64 __user *uprop = uprops;
2700 memset(props, 0, sizeof(struct perf_open_properties));
2703 DRM_DEBUG("No i915 perf properties given\n");
2707 /* Considering that ID = 0 is reserved and assuming that we don't
2708 * (currently) expect any configurations to ever specify duplicate
2709 * values for a particular property ID then the last _PROP_MAX value is
2710 * one greater than the maximum number of properties we expect to get
2713 if (n_props >= DRM_I915_PERF_PROP_MAX) {
2714 DRM_DEBUG("More i915 perf properties specified than exist\n");
2718 for (i = 0; i < n_props; i++) {
2719 u64 oa_period, oa_freq_hz;
2723 ret = get_user(id, uprop);
2727 ret = get_user(value, uprop + 1);
2731 if (id == 0 || id >= DRM_I915_PERF_PROP_MAX) {
2732 DRM_DEBUG("Unknown i915 perf property ID\n");
2736 switch ((enum drm_i915_perf_property_id)id) {
2737 case DRM_I915_PERF_PROP_CTX_HANDLE:
2738 props->single_context = 1;
2739 props->ctx_handle = value;
2741 case DRM_I915_PERF_PROP_SAMPLE_OA:
2743 props->sample_flags |= SAMPLE_OA_REPORT;
2745 case DRM_I915_PERF_PROP_OA_METRICS_SET:
2747 DRM_DEBUG("Unknown OA metric set ID\n");
2750 props->metrics_set = value;
2752 case DRM_I915_PERF_PROP_OA_FORMAT:
2753 if (value == 0 || value >= I915_OA_FORMAT_MAX) {
2754 DRM_DEBUG("Out-of-range OA report format %llu\n",
2758 if (!dev_priv->perf.oa.oa_formats[value].size) {
2759 DRM_DEBUG("Unsupported OA report format %llu\n",
2763 props->oa_format = value;
2765 case DRM_I915_PERF_PROP_OA_EXPONENT:
2766 if (value > OA_EXPONENT_MAX) {
2767 DRM_DEBUG("OA timer exponent too high (> %u)\n",
2772 /* Theoretically we can program the OA unit to sample
2773 * e.g. every 160ns for HSW, 167ns for BDW/SKL or 104ns
2774 * for BXT. We don't allow such high sampling
2775 * frequencies by default unless root.
2778 BUILD_BUG_ON(sizeof(oa_period) != 8);
2779 oa_period = oa_exponent_to_ns(dev_priv, value);
2781 /* This check is primarily to ensure that oa_period <=
2782 * UINT32_MAX (before passing to do_div which only
2783 * accepts a u32 denominator), but we can also skip
2784 * checking anything < 1Hz which implicitly can't be
2785 * limited via an integer oa_max_sample_rate.
2787 if (oa_period <= NSEC_PER_SEC) {
2788 u64 tmp = NSEC_PER_SEC;
2789 do_div(tmp, oa_period);
2794 if (oa_freq_hz > i915_oa_max_sample_rate &&
2795 !capable(CAP_SYS_ADMIN)) {
2796 DRM_DEBUG("OA exponent would exceed the max sampling frequency (sysctl dev.i915.oa_max_sample_rate) %uHz without root privileges\n",
2797 i915_oa_max_sample_rate);
2801 props->oa_periodic = true;
2802 props->oa_period_exponent = value;
2804 case DRM_I915_PERF_PROP_MAX:
2816 * i915_perf_open_ioctl - DRM ioctl() for userspace to open a stream FD
2818 * @data: ioctl data copied from userspace (unvalidated)
2821 * Validates the stream open parameters given by userspace including flags
2822 * and an array of u64 key, value pair properties.
2824 * Very little is assumed up front about the nature of the stream being
2825 * opened (for instance we don't assume it's for periodic OA unit metrics). An
2826 * i915-perf stream is expected to be a suitable interface for other forms of
2827 * buffered data written by the GPU besides periodic OA metrics.
2829 * Note we copy the properties from userspace outside of the i915 perf
2830 * mutex to avoid an awkward lockdep with mmap_sem.
2832 * Most of the implementation details are handled by
2833 * i915_perf_open_ioctl_locked() after taking the &drm_i915_private->perf.lock
2834 * mutex for serializing with any non-file-operation driver hooks.
2836 * Return: A newly opened i915 Perf stream file descriptor or negative
2837 * error code on failure.
2839 int i915_perf_open_ioctl(struct drm_device *dev, void *data,
2840 struct drm_file *file)
2842 struct drm_i915_private *dev_priv = dev->dev_private;
2843 struct drm_i915_perf_open_param *param = data;
2844 struct perf_open_properties props;
2845 u32 known_open_flags;
2848 if (!dev_priv->perf.initialized) {
2849 DRM_DEBUG("i915 perf interface not available for this system\n");
2853 known_open_flags = I915_PERF_FLAG_FD_CLOEXEC |
2854 I915_PERF_FLAG_FD_NONBLOCK |
2855 I915_PERF_FLAG_DISABLED;
2856 if (param->flags & ~known_open_flags) {
2857 DRM_DEBUG("Unknown drm_i915_perf_open_param flag\n");
2861 ret = read_properties_unlocked(dev_priv,
2862 u64_to_user_ptr(param->properties_ptr),
2863 param->num_properties,
2868 mutex_lock(&dev_priv->perf.lock);
2869 ret = i915_perf_open_ioctl_locked(dev_priv, param, &props, file);
2870 mutex_unlock(&dev_priv->perf.lock);
2876 * i915_perf_register - exposes i915-perf to userspace
2877 * @dev_priv: i915 device instance
2879 * In particular OA metric sets are advertised under a sysfs metrics/
2880 * directory allowing userspace to enumerate valid IDs that can be
2881 * used to open an i915-perf stream.
2883 void i915_perf_register(struct drm_i915_private *dev_priv)
2887 if (!dev_priv->perf.initialized)
2890 /* To be sure we're synchronized with an attempted
2891 * i915_perf_open_ioctl(); considering that we register after
2892 * being exposed to userspace.
2894 mutex_lock(&dev_priv->perf.lock);
2896 dev_priv->perf.metrics_kobj =
2897 kobject_create_and_add("metrics",
2898 &dev_priv->drm.primary->kdev->kobj);
2899 if (!dev_priv->perf.metrics_kobj)
2902 sysfs_attr_init(&dev_priv->perf.oa.test_config.sysfs_metric_id.attr);
2904 if (INTEL_GEN(dev_priv) >= 11) {
2905 i915_perf_load_test_config_icl(dev_priv);
2906 } else if (IS_CANNONLAKE(dev_priv)) {
2907 i915_perf_load_test_config_cnl(dev_priv);
2908 } else if (IS_COFFEELAKE(dev_priv)) {
2909 if (IS_CFL_GT2(dev_priv))
2910 i915_perf_load_test_config_cflgt2(dev_priv);
2911 if (IS_CFL_GT3(dev_priv))
2912 i915_perf_load_test_config_cflgt3(dev_priv);
2913 } else if (IS_GEMINILAKE(dev_priv)) {
2914 i915_perf_load_test_config_glk(dev_priv);
2915 } else if (IS_KABYLAKE(dev_priv)) {
2916 if (IS_KBL_GT2(dev_priv))
2917 i915_perf_load_test_config_kblgt2(dev_priv);
2918 else if (IS_KBL_GT3(dev_priv))
2919 i915_perf_load_test_config_kblgt3(dev_priv);
2920 } else if (IS_BROXTON(dev_priv)) {
2921 i915_perf_load_test_config_bxt(dev_priv);
2922 } else if (IS_SKYLAKE(dev_priv)) {
2923 if (IS_SKL_GT2(dev_priv))
2924 i915_perf_load_test_config_sklgt2(dev_priv);
2925 else if (IS_SKL_GT3(dev_priv))
2926 i915_perf_load_test_config_sklgt3(dev_priv);
2927 else if (IS_SKL_GT4(dev_priv))
2928 i915_perf_load_test_config_sklgt4(dev_priv);
2929 } else if (IS_CHERRYVIEW(dev_priv)) {
2930 i915_perf_load_test_config_chv(dev_priv);
2931 } else if (IS_BROADWELL(dev_priv)) {
2932 i915_perf_load_test_config_bdw(dev_priv);
2933 } else if (IS_HASWELL(dev_priv)) {
2934 i915_perf_load_test_config_hsw(dev_priv);
2937 if (dev_priv->perf.oa.test_config.id == 0)
2940 ret = sysfs_create_group(dev_priv->perf.metrics_kobj,
2941 &dev_priv->perf.oa.test_config.sysfs_metric);
2945 atomic_set(&dev_priv->perf.oa.test_config.ref_count, 1);
2950 kobject_put(dev_priv->perf.metrics_kobj);
2951 dev_priv->perf.metrics_kobj = NULL;
2954 mutex_unlock(&dev_priv->perf.lock);
2958 * i915_perf_unregister - hide i915-perf from userspace
2959 * @dev_priv: i915 device instance
2961 * i915-perf state cleanup is split up into an 'unregister' and
2962 * 'deinit' phase where the interface is first hidden from
2963 * userspace by i915_perf_unregister() before cleaning up
2964 * remaining state in i915_perf_fini().
2966 void i915_perf_unregister(struct drm_i915_private *dev_priv)
2968 if (!dev_priv->perf.metrics_kobj)
2971 sysfs_remove_group(dev_priv->perf.metrics_kobj,
2972 &dev_priv->perf.oa.test_config.sysfs_metric);
2974 kobject_put(dev_priv->perf.metrics_kobj);
2975 dev_priv->perf.metrics_kobj = NULL;
2978 static bool gen8_is_valid_flex_addr(struct drm_i915_private *dev_priv, u32 addr)
2980 static const i915_reg_t flex_eu_regs[] = {
2991 for (i = 0; i < ARRAY_SIZE(flex_eu_regs); i++) {
2992 if (i915_mmio_reg_offset(flex_eu_regs[i]) == addr)
2998 static bool gen7_is_valid_b_counter_addr(struct drm_i915_private *dev_priv, u32 addr)
3000 return (addr >= i915_mmio_reg_offset(OASTARTTRIG1) &&
3001 addr <= i915_mmio_reg_offset(OASTARTTRIG8)) ||
3002 (addr >= i915_mmio_reg_offset(OAREPORTTRIG1) &&
3003 addr <= i915_mmio_reg_offset(OAREPORTTRIG8)) ||
3004 (addr >= i915_mmio_reg_offset(OACEC0_0) &&
3005 addr <= i915_mmio_reg_offset(OACEC7_1));
3008 static bool gen7_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3010 return addr == i915_mmio_reg_offset(HALF_SLICE_CHICKEN2) ||
3011 (addr >= i915_mmio_reg_offset(MICRO_BP0_0) &&
3012 addr <= i915_mmio_reg_offset(NOA_WRITE)) ||
3013 (addr >= i915_mmio_reg_offset(OA_PERFCNT1_LO) &&
3014 addr <= i915_mmio_reg_offset(OA_PERFCNT2_HI)) ||
3015 (addr >= i915_mmio_reg_offset(OA_PERFMATRIX_LO) &&
3016 addr <= i915_mmio_reg_offset(OA_PERFMATRIX_HI));
3019 static bool gen8_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3021 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3022 addr == i915_mmio_reg_offset(WAIT_FOR_RC6_EXIT) ||
3023 (addr >= i915_mmio_reg_offset(RPM_CONFIG0) &&
3024 addr <= i915_mmio_reg_offset(NOA_CONFIG(8)));
3027 static bool gen10_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3029 return gen8_is_valid_mux_addr(dev_priv, addr) ||
3030 addr == i915_mmio_reg_offset(GEN10_NOA_WRITE_HIGH) ||
3031 (addr >= i915_mmio_reg_offset(OA_PERFCNT3_LO) &&
3032 addr <= i915_mmio_reg_offset(OA_PERFCNT4_HI));
3035 static bool hsw_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3037 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3038 (addr >= 0x25100 && addr <= 0x2FF90) ||
3039 (addr >= i915_mmio_reg_offset(HSW_MBVID2_NOA0) &&
3040 addr <= i915_mmio_reg_offset(HSW_MBVID2_NOA9)) ||
3041 addr == i915_mmio_reg_offset(HSW_MBVID2_MISR0);
3044 static bool chv_is_valid_mux_addr(struct drm_i915_private *dev_priv, u32 addr)
3046 return gen7_is_valid_mux_addr(dev_priv, addr) ||
3047 (addr >= 0x182300 && addr <= 0x1823A4);
3050 static u32 mask_reg_value(u32 reg, u32 val)
3052 /* HALF_SLICE_CHICKEN2 is programmed with a the
3053 * WaDisableSTUnitPowerOptimization workaround. Make sure the value
3054 * programmed by userspace doesn't change this.
3056 if (i915_mmio_reg_offset(HALF_SLICE_CHICKEN2) == reg)
3057 val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
3059 /* WAIT_FOR_RC6_EXIT has only one bit fullfilling the function
3060 * indicated by its name and a bunch of selection fields used by OA
3063 if (i915_mmio_reg_offset(WAIT_FOR_RC6_EXIT) == reg)
3064 val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);
3069 static struct i915_oa_reg *alloc_oa_regs(struct drm_i915_private *dev_priv,
3070 bool (*is_valid)(struct drm_i915_private *dev_priv, u32 addr),
3074 struct i915_oa_reg *oa_regs;
3081 if (!access_ok(regs, n_regs * sizeof(u32) * 2))
3082 return ERR_PTR(-EFAULT);
3084 /* No is_valid function means we're not allowing any register to be programmed. */
3085 GEM_BUG_ON(!is_valid);
3087 return ERR_PTR(-EINVAL);
3089 oa_regs = kmalloc_array(n_regs, sizeof(*oa_regs), GFP_KERNEL);
3091 return ERR_PTR(-ENOMEM);
3093 for (i = 0; i < n_regs; i++) {
3096 err = get_user(addr, regs);
3100 if (!is_valid(dev_priv, addr)) {
3101 DRM_DEBUG("Invalid oa_reg address: %X\n", addr);
3106 err = get_user(value, regs + 1);
3110 oa_regs[i].addr = _MMIO(addr);
3111 oa_regs[i].value = mask_reg_value(addr, value);
3120 return ERR_PTR(err);
3123 static ssize_t show_dynamic_id(struct device *dev,
3124 struct device_attribute *attr,
3127 struct i915_oa_config *oa_config =
3128 container_of(attr, typeof(*oa_config), sysfs_metric_id);
3130 return sprintf(buf, "%d\n", oa_config->id);
3133 static int create_dynamic_oa_sysfs_entry(struct drm_i915_private *dev_priv,
3134 struct i915_oa_config *oa_config)
3136 sysfs_attr_init(&oa_config->sysfs_metric_id.attr);
3137 oa_config->sysfs_metric_id.attr.name = "id";
3138 oa_config->sysfs_metric_id.attr.mode = S_IRUGO;
3139 oa_config->sysfs_metric_id.show = show_dynamic_id;
3140 oa_config->sysfs_metric_id.store = NULL;
3142 oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr;
3143 oa_config->attrs[1] = NULL;
3145 oa_config->sysfs_metric.name = oa_config->uuid;
3146 oa_config->sysfs_metric.attrs = oa_config->attrs;
3148 return sysfs_create_group(dev_priv->perf.metrics_kobj,
3149 &oa_config->sysfs_metric);
3153 * i915_perf_add_config_ioctl - DRM ioctl() for userspace to add a new OA config
3155 * @data: ioctl data (pointer to struct drm_i915_perf_oa_config) copied from
3156 * userspace (unvalidated)
3159 * Validates the submitted OA register to be saved into a new OA config that
3160 * can then be used for programming the OA unit and its NOA network.
3162 * Returns: A new allocated config number to be used with the perf open ioctl
3163 * or a negative error code on failure.
3165 int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
3166 struct drm_file *file)
3168 struct drm_i915_private *dev_priv = dev->dev_private;
3169 struct drm_i915_perf_oa_config *args = data;
3170 struct i915_oa_config *oa_config, *tmp;
3173 if (!dev_priv->perf.initialized) {
3174 DRM_DEBUG("i915 perf interface not available for this system\n");
3178 if (!dev_priv->perf.metrics_kobj) {
3179 DRM_DEBUG("OA metrics weren't advertised via sysfs\n");
3183 if (i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
3184 DRM_DEBUG("Insufficient privileges to add i915 OA config\n");
3188 if ((!args->mux_regs_ptr || !args->n_mux_regs) &&
3189 (!args->boolean_regs_ptr || !args->n_boolean_regs) &&
3190 (!args->flex_regs_ptr || !args->n_flex_regs)) {
3191 DRM_DEBUG("No OA registers given\n");
3195 oa_config = kzalloc(sizeof(*oa_config), GFP_KERNEL);
3197 DRM_DEBUG("Failed to allocate memory for the OA config\n");
3201 atomic_set(&oa_config->ref_count, 1);
3203 if (!uuid_is_valid(args->uuid)) {
3204 DRM_DEBUG("Invalid uuid format for OA config\n");
3209 /* Last character in oa_config->uuid will be 0 because oa_config is
3212 memcpy(oa_config->uuid, args->uuid, sizeof(args->uuid));
3214 oa_config->mux_regs_len = args->n_mux_regs;
3215 oa_config->mux_regs =
3216 alloc_oa_regs(dev_priv,
3217 dev_priv->perf.oa.ops.is_valid_mux_reg,
3218 u64_to_user_ptr(args->mux_regs_ptr),
3221 if (IS_ERR(oa_config->mux_regs)) {
3222 DRM_DEBUG("Failed to create OA config for mux_regs\n");
3223 err = PTR_ERR(oa_config->mux_regs);
3227 oa_config->b_counter_regs_len = args->n_boolean_regs;
3228 oa_config->b_counter_regs =
3229 alloc_oa_regs(dev_priv,
3230 dev_priv->perf.oa.ops.is_valid_b_counter_reg,
3231 u64_to_user_ptr(args->boolean_regs_ptr),
3232 args->n_boolean_regs);
3234 if (IS_ERR(oa_config->b_counter_regs)) {
3235 DRM_DEBUG("Failed to create OA config for b_counter_regs\n");
3236 err = PTR_ERR(oa_config->b_counter_regs);
3240 if (INTEL_GEN(dev_priv) < 8) {
3241 if (args->n_flex_regs != 0) {
3246 oa_config->flex_regs_len = args->n_flex_regs;
3247 oa_config->flex_regs =
3248 alloc_oa_regs(dev_priv,
3249 dev_priv->perf.oa.ops.is_valid_flex_reg,
3250 u64_to_user_ptr(args->flex_regs_ptr),
3253 if (IS_ERR(oa_config->flex_regs)) {
3254 DRM_DEBUG("Failed to create OA config for flex_regs\n");
3255 err = PTR_ERR(oa_config->flex_regs);
3260 err = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
3264 /* We shouldn't have too many configs, so this iteration shouldn't be
3267 idr_for_each_entry(&dev_priv->perf.metrics_idr, tmp, id) {
3268 if (!strcmp(tmp->uuid, oa_config->uuid)) {
3269 DRM_DEBUG("OA config already exists with this uuid\n");
3275 err = create_dynamic_oa_sysfs_entry(dev_priv, oa_config);
3277 DRM_DEBUG("Failed to create sysfs entry for OA config\n");
3281 /* Config id 0 is invalid, id 1 for kernel stored test config. */
3282 oa_config->id = idr_alloc(&dev_priv->perf.metrics_idr,
3285 if (oa_config->id < 0) {
3286 DRM_DEBUG("Failed to create sysfs entry for OA config\n");
3287 err = oa_config->id;
3291 mutex_unlock(&dev_priv->perf.metrics_lock);
3293 DRM_DEBUG("Added config %s id=%i\n", oa_config->uuid, oa_config->id);
3295 return oa_config->id;
3298 mutex_unlock(&dev_priv->perf.metrics_lock);
3300 put_oa_config(dev_priv, oa_config);
3301 DRM_DEBUG("Failed to add new OA config\n");
3306 * i915_perf_remove_config_ioctl - DRM ioctl() for userspace to remove an OA config
3308 * @data: ioctl data (pointer to u64 integer) copied from userspace
3311 * Configs can be removed while being used, the will stop appearing in sysfs
3312 * and their content will be freed when the stream using the config is closed.
3314 * Returns: 0 on success or a negative error code on failure.
3316 int i915_perf_remove_config_ioctl(struct drm_device *dev, void *data,
3317 struct drm_file *file)
3319 struct drm_i915_private *dev_priv = dev->dev_private;
3321 struct i915_oa_config *oa_config;
3324 if (!dev_priv->perf.initialized) {
3325 DRM_DEBUG("i915 perf interface not available for this system\n");
3329 if (i915_perf_stream_paranoid && !capable(CAP_SYS_ADMIN)) {
3330 DRM_DEBUG("Insufficient privileges to remove i915 OA config\n");
3334 ret = mutex_lock_interruptible(&dev_priv->perf.metrics_lock);
3338 oa_config = idr_find(&dev_priv->perf.metrics_idr, *arg);
3340 DRM_DEBUG("Failed to remove unknown OA config\n");
3345 GEM_BUG_ON(*arg != oa_config->id);
3347 sysfs_remove_group(dev_priv->perf.metrics_kobj,
3348 &oa_config->sysfs_metric);
3350 idr_remove(&dev_priv->perf.metrics_idr, *arg);
3352 DRM_DEBUG("Removed config %s id=%i\n", oa_config->uuid, oa_config->id);
3354 put_oa_config(dev_priv, oa_config);
3357 mutex_unlock(&dev_priv->perf.metrics_lock);
3362 static struct ctl_table oa_table[] = {
3364 .procname = "perf_stream_paranoid",
3365 .data = &i915_perf_stream_paranoid,
3366 .maxlen = sizeof(i915_perf_stream_paranoid),
3368 .proc_handler = proc_dointvec_minmax,
3373 .procname = "oa_max_sample_rate",
3374 .data = &i915_oa_max_sample_rate,
3375 .maxlen = sizeof(i915_oa_max_sample_rate),
3377 .proc_handler = proc_dointvec_minmax,
3379 .extra2 = &oa_sample_rate_hard_limit,
3384 static struct ctl_table i915_root[] = {
3394 static struct ctl_table dev_root[] = {
3405 * i915_perf_init - initialize i915-perf state on module load
3406 * @dev_priv: i915 device instance
3408 * Initializes i915-perf state without exposing anything to userspace.
3410 * Note: i915-perf initialization is split into an 'init' and 'register'
3411 * phase with the i915_perf_register() exposing state to userspace.
3413 void i915_perf_init(struct drm_i915_private *dev_priv)
3415 if (IS_HASWELL(dev_priv)) {
3416 dev_priv->perf.oa.ops.is_valid_b_counter_reg =
3417 gen7_is_valid_b_counter_addr;
3418 dev_priv->perf.oa.ops.is_valid_mux_reg =
3419 hsw_is_valid_mux_addr;
3420 dev_priv->perf.oa.ops.is_valid_flex_reg = NULL;
3421 dev_priv->perf.oa.ops.enable_metric_set = hsw_enable_metric_set;
3422 dev_priv->perf.oa.ops.disable_metric_set = hsw_disable_metric_set;
3423 dev_priv->perf.oa.ops.oa_enable = gen7_oa_enable;
3424 dev_priv->perf.oa.ops.oa_disable = gen7_oa_disable;
3425 dev_priv->perf.oa.ops.read = gen7_oa_read;
3426 dev_priv->perf.oa.ops.oa_hw_tail_read =
3427 gen7_oa_hw_tail_read;
3429 dev_priv->perf.oa.oa_formats = hsw_oa_formats;
3430 } else if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
3431 /* Note: that although we could theoretically also support the
3432 * legacy ringbuffer mode on BDW (and earlier iterations of
3433 * this driver, before upstreaming did this) it didn't seem
3434 * worth the complexity to maintain now that BDW+ enable
3435 * execlist mode by default.
3437 dev_priv->perf.oa.oa_formats = gen8_plus_oa_formats;
3439 dev_priv->perf.oa.ops.oa_enable = gen8_oa_enable;
3440 dev_priv->perf.oa.ops.oa_disable = gen8_oa_disable;
3441 dev_priv->perf.oa.ops.read = gen8_oa_read;
3442 dev_priv->perf.oa.ops.oa_hw_tail_read = gen8_oa_hw_tail_read;
3444 if (IS_GEN_RANGE(dev_priv, 8, 9)) {
3445 dev_priv->perf.oa.ops.is_valid_b_counter_reg =
3446 gen7_is_valid_b_counter_addr;
3447 dev_priv->perf.oa.ops.is_valid_mux_reg =
3448 gen8_is_valid_mux_addr;
3449 dev_priv->perf.oa.ops.is_valid_flex_reg =
3450 gen8_is_valid_flex_addr;
3452 if (IS_CHERRYVIEW(dev_priv)) {
3453 dev_priv->perf.oa.ops.is_valid_mux_reg =
3454 chv_is_valid_mux_addr;
3457 dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
3458 dev_priv->perf.oa.ops.disable_metric_set = gen8_disable_metric_set;
3460 if (IS_GEN(dev_priv, 8)) {
3461 dev_priv->perf.oa.ctx_oactxctrl_offset = 0x120;
3462 dev_priv->perf.oa.ctx_flexeu0_offset = 0x2ce;
3464 dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<25);
3466 dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
3467 dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
3469 dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
3471 } else if (IS_GEN_RANGE(dev_priv, 10, 11)) {
3472 dev_priv->perf.oa.ops.is_valid_b_counter_reg =
3473 gen7_is_valid_b_counter_addr;
3474 dev_priv->perf.oa.ops.is_valid_mux_reg =
3475 gen10_is_valid_mux_addr;
3476 dev_priv->perf.oa.ops.is_valid_flex_reg =
3477 gen8_is_valid_flex_addr;
3479 dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
3480 dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
3482 dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
3483 dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
3485 dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
3489 if (dev_priv->perf.oa.ops.enable_metric_set) {
3490 hrtimer_init(&dev_priv->perf.oa.poll_check_timer,
3491 CLOCK_MONOTONIC, HRTIMER_MODE_REL);
3492 dev_priv->perf.oa.poll_check_timer.function = oa_poll_check_timer_cb;
3493 init_waitqueue_head(&dev_priv->perf.oa.poll_wq);
3495 INIT_LIST_HEAD(&dev_priv->perf.streams);
3496 mutex_init(&dev_priv->perf.lock);
3497 spin_lock_init(&dev_priv->perf.oa.oa_buffer.ptr_lock);
3499 oa_sample_rate_hard_limit = 1000 *
3500 (RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz / 2);
3501 dev_priv->perf.sysctl_header = register_sysctl_table(dev_root);
3503 mutex_init(&dev_priv->perf.metrics_lock);
3504 idr_init(&dev_priv->perf.metrics_idr);
3506 dev_priv->perf.initialized = true;
3510 static int destroy_config(int id, void *p, void *data)
3512 struct drm_i915_private *dev_priv = data;
3513 struct i915_oa_config *oa_config = p;
3515 put_oa_config(dev_priv, oa_config);
3521 * i915_perf_fini - Counter part to i915_perf_init()
3522 * @dev_priv: i915 device instance
3524 void i915_perf_fini(struct drm_i915_private *dev_priv)
3526 if (!dev_priv->perf.initialized)
3529 idr_for_each(&dev_priv->perf.metrics_idr, destroy_config, dev_priv);
3530 idr_destroy(&dev_priv->perf.metrics_idr);
3532 unregister_sysctl_table(dev_priv->perf.sysctl_header);
3534 memset(&dev_priv->perf.oa.ops, 0, sizeof(dev_priv->perf.oa.ops));
3536 dev_priv->perf.initialized = false;