drivers/gpu/drm/i915/display/intel_dp_hdcp.c

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright (C) 2020 Google, Inc.
   4  *
   5  * Authors:
   6  * Sean Paul <seanpaul@chromium.org>
   7  */
   8
   9 #include <drm/display/drm_dp_helper.h>
  10 #include <drm/display/drm_dp_mst_helper.h>
  11 #include <drm/display/drm_hdcp_helper.h>
  12 #include <drm/drm_print.h>
  13
  14 #include "i915_reg.h"
  15 #include "intel_ddi.h"
  16 #include "intel_de.h"
  17 #include "intel_display_types.h"
  18 #include "intel_dp.h"
  19 #include "intel_dp_hdcp.h"
  20 #include "intel_hdcp.h"
  21 #include "intel_hdcp_regs.h"
  22
  23 static u32 transcoder_to_stream_enc_status(enum transcoder cpu_transcoder)
  24 {
  25         switch (cpu_transcoder) {
  26         case TRANSCODER_A:
  27                 return HDCP_STATUS_STREAM_A_ENC;
  28         case TRANSCODER_B:
  29                 return HDCP_STATUS_STREAM_B_ENC;
  30         case TRANSCODER_C:
  31                 return HDCP_STATUS_STREAM_C_ENC;
  32         case TRANSCODER_D:
  33                 return HDCP_STATUS_STREAM_D_ENC;
  34         default:
  35                 return 0;
  36         }
  37 }
  38
  39 static void intel_dp_hdcp_wait_for_cp_irq(struct intel_connector *connector,
  40                                           int timeout)
  41 {
  42         struct intel_hdcp *hdcp = &connector->hdcp;
  43         long ret;
  44
  45 #define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count))
  46         ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
  47                                                msecs_to_jiffies(timeout));
  48
  49         if (!ret)
  50                 drm_dbg_kms(connector->base.dev,
  51                             "Timedout at waiting for CP_IRQ\n");
  52 }
  53
  54 static
  55 int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
  56                                 u8 *an)
  57 {
  58         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
  59         u8 aksv[DRM_HDCP_KSV_LEN] = {};
  60         ssize_t dpcd_ret;
  61
  62         /* Output An first, that's easy */
  63         dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
  64                                      an, DRM_HDCP_AN_LEN);
  65         if (dpcd_ret != DRM_HDCP_AN_LEN) {
  66                 drm_dbg_kms(&i915->drm,
  67                             "Failed to write An over DP/AUX (%zd)\n",
  68                             dpcd_ret);
  69                 return dpcd_ret >= 0 ? -EIO : dpcd_ret;
  70         }
  71
  72         /*
  73          * Since Aksv is Oh-So-Secret, we can't access it in software. So we
  74          * send an empty buffer of the correct length through the DP helpers. On
  75          * the other side, in the transfer hook, we'll generate a flag based on
  76          * the destination address which will tickle the hardware to output the
  77          * Aksv on our behalf after the header is sent.
  78          */
  79         dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
  80                                      aksv, DRM_HDCP_KSV_LEN);
  81         if (dpcd_ret != DRM_HDCP_KSV_LEN) {
  82                 drm_dbg_kms(&i915->drm,
  83                             "Failed to write Aksv over DP/AUX (%zd)\n",
  84                             dpcd_ret);
  85                 return dpcd_ret >= 0 ? -EIO : dpcd_ret;
  86         }
  87         return 0;
  88 }
  89
  90 static int intel_dp_hdcp_read_bksv(struct intel_digital_port *dig_port,
  91                                    u8 *bksv)
  92 {
  93         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
  94         ssize_t ret;
  95
  96         ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
  97                                DRM_HDCP_KSV_LEN);
  98         if (ret != DRM_HDCP_KSV_LEN) {
  99                 drm_dbg_kms(&i915->drm,
 100                             "Read Bksv from DP/AUX failed (%zd)\n", ret);
 101                 return ret >= 0 ? -EIO : ret;
 102         }
 103         return 0;
 104 }
 105
 106 static int intel_dp_hdcp_read_bstatus(struct intel_digital_port *dig_port,
 107                                       u8 *bstatus)
 108 {
 109         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 110         ssize_t ret;
 111
 112         /*
 113          * For some reason the HDMI and DP HDCP specs call this register
 114          * definition by different names. In the HDMI spec, it's called BSTATUS,
 115          * but in DP it's called BINFO.
 116          */
 117         ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
 118                                bstatus, DRM_HDCP_BSTATUS_LEN);
 119         if (ret != DRM_HDCP_BSTATUS_LEN) {
 120                 drm_dbg_kms(&i915->drm,
 121                             "Read bstatus from DP/AUX failed (%zd)\n", ret);
 122                 return ret >= 0 ? -EIO : ret;
 123         }
 124         return 0;
 125 }
 126
 127 static
 128 int intel_dp_hdcp_read_bcaps(struct drm_dp_aux *aux,
 129                              struct drm_i915_private *i915,
 130                              u8 *bcaps)
 131 {
 132         ssize_t ret;
 133
 134         ret = drm_dp_dpcd_read(aux, DP_AUX_HDCP_BCAPS,
 135                                bcaps, 1);
 136         if (ret != 1) {
 137                 drm_dbg_kms(&i915->drm,
 138                             "Read bcaps from DP/AUX failed (%zd)\n", ret);
 139                 return ret >= 0 ? -EIO : ret;
 140         }
 141
 142         return 0;
 143 }
 144
 145 static
 146 int intel_dp_hdcp_repeater_present(struct intel_digital_port *dig_port,
 147                                    bool *repeater_present)
 148 {
 149         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 150         ssize_t ret;
 151         u8 bcaps;
 152
 153         ret = intel_dp_hdcp_read_bcaps(&dig_port->dp.aux, i915,  &bcaps);
 154         if (ret)
 155                 return ret;
 156
 157         *repeater_present = bcaps & DP_BCAPS_REPEATER_PRESENT;
 158         return 0;
 159 }
 160
 161 static
 162 int intel_dp_hdcp_read_ri_prime(struct intel_digital_port *dig_port,
 163                                 u8 *ri_prime)
 164 {
 165         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 166         ssize_t ret;
 167
 168         ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
 169                                ri_prime, DRM_HDCP_RI_LEN);
 170         if (ret != DRM_HDCP_RI_LEN) {
 171                 drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n",
 172                             ret);
 173                 return ret >= 0 ? -EIO : ret;
 174         }
 175         return 0;
 176 }
 177
 178 static
 179 int intel_dp_hdcp_read_ksv_ready(struct intel_digital_port *dig_port,
 180                                  bool *ksv_ready)
 181 {
 182         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 183         ssize_t ret;
 184         u8 bstatus;
 185
 186         ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
 187                                &bstatus, 1);
 188         if (ret != 1) {
 189                 drm_dbg_kms(&i915->drm,
 190                             "Read bstatus from DP/AUX failed (%zd)\n", ret);
 191                 return ret >= 0 ? -EIO : ret;
 192         }
 193         *ksv_ready = bstatus & DP_BSTATUS_READY;
 194         return 0;
 195 }
 196
 197 static
 198 int intel_dp_hdcp_read_ksv_fifo(struct intel_digital_port *dig_port,
 199                                 int num_downstream, u8 *ksv_fifo)
 200 {
 201         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 202         ssize_t ret;
 203         int i;
 204
 205         /* KSV list is read via 15 byte window (3 entries @ 5 bytes each) */
 206         for (i = 0; i < num_downstream; i += 3) {
 207                 size_t len = min(num_downstream - i, 3) * DRM_HDCP_KSV_LEN;
 208                 ret = drm_dp_dpcd_read(&dig_port->dp.aux,
 209                                        DP_AUX_HDCP_KSV_FIFO,
 210                                        ksv_fifo + i * DRM_HDCP_KSV_LEN,
 211                                        len);
 212                 if (ret != len) {
 213                         drm_dbg_kms(&i915->drm,
 214                                     "Read ksv[%d] from DP/AUX failed (%zd)\n",
 215                                     i, ret);
 216                         return ret >= 0 ? -EIO : ret;
 217                 }
 218         }
 219         return 0;
 220 }
 221
 222 static
 223 int intel_dp_hdcp_read_v_prime_part(struct intel_digital_port *dig_port,
 224                                     int i, u32 *part)
 225 {
 226         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 227         ssize_t ret;
 228
 229         if (i >= DRM_HDCP_V_PRIME_NUM_PARTS)
 230                 return -EINVAL;
 231
 232         ret = drm_dp_dpcd_read(&dig_port->dp.aux,
 233                                DP_AUX_HDCP_V_PRIME(i), part,
 234                                DRM_HDCP_V_PRIME_PART_LEN);
 235         if (ret != DRM_HDCP_V_PRIME_PART_LEN) {
 236                 drm_dbg_kms(&i915->drm,
 237                             "Read v'[%d] from DP/AUX failed (%zd)\n", i, ret);
 238                 return ret >= 0 ? -EIO : ret;
 239         }
 240         return 0;
 241 }
 242
 243 static
 244 int intel_dp_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
 245                                     enum transcoder cpu_transcoder,
 246                                     bool enable)
 247 {
 248         /* Not used for single stream DisplayPort setups */
 249         return 0;
 250 }
 251
 252 static
 253 bool intel_dp_hdcp_check_link(struct intel_digital_port *dig_port,
 254                               struct intel_connector *connector)
 255 {
 256         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 257         ssize_t ret;
 258         u8 bstatus;
 259
 260         ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
 261                                &bstatus, 1);
 262         if (ret != 1) {
 263                 drm_dbg_kms(&i915->drm,
 264                             "Read bstatus from DP/AUX failed (%zd)\n", ret);
 265                 return false;
 266         }
 267
 268         return !(bstatus & (DP_BSTATUS_LINK_FAILURE | DP_BSTATUS_REAUTH_REQ));
 269 }
 270
 271 static
 272 int intel_dp_hdcp_get_capability(struct intel_digital_port *dig_port,
 273                                  bool *hdcp_capable)
 274 {
 275         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 276         ssize_t ret;
 277         u8 bcaps;
 278
 279         ret = intel_dp_hdcp_read_bcaps(&dig_port->dp.aux, i915, &bcaps);
 280         if (ret)
 281                 return ret;
 282
 283         *hdcp_capable = bcaps & DP_BCAPS_HDCP_CAPABLE;
 284         return 0;
 285 }
 286
 287 struct hdcp2_dp_errata_stream_type {
 288         u8      msg_id;
 289         u8      stream_type;
 290 } __packed;
 291
 292 struct hdcp2_dp_msg_data {
 293         u8 msg_id;
 294         u32 offset;
 295         bool msg_detectable;
 296         u32 timeout;
 297         u32 timeout2; /* Added for non_paired situation */
 298         /* Timeout to read entire msg */
 299         u32 msg_read_timeout;
 300 };
 301
 302 static const struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
 303         { HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0, 0},
 304         { HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
 305           false, HDCP_2_2_CERT_TIMEOUT_MS, 0, HDCP_2_2_DP_CERT_READ_TIMEOUT_MS},
 306         { HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
 307           false, 0, 0, 0 },
 308         { HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
 309           false, 0, 0, 0 },
 310         { HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
 311           true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
 312           HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS, HDCP_2_2_DP_HPRIME_READ_TIMEOUT_MS},
 313         { HDCP_2_2_AKE_SEND_PAIRING_INFO,
 314           DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
 315           HDCP_2_2_PAIRING_TIMEOUT_MS, 0, HDCP_2_2_DP_PAIRING_READ_TIMEOUT_MS },
 316         { HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0, 0 },
 317         { HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
 318           false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0, 0 },
 319         { HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
 320           0, 0, 0 },
 321         { HDCP_2_2_REP_SEND_RECVID_LIST,
 322           DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
 323           HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0, 0 },
 324         { HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
 325           0, 0, 0 },
 326         { HDCP_2_2_REP_STREAM_MANAGE,
 327           DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
 328           0, 0, 0},
 329         { HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
 330           false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0, 0 },
 331 /* local define to shovel this through the write_2_2 interface */
 332 #define HDCP_2_2_ERRATA_DP_STREAM_TYPE  50
 333         { HDCP_2_2_ERRATA_DP_STREAM_TYPE,
 334           DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
 335           0, 0 },
 336 };
 337
 338 static int
 339 intel_dp_hdcp2_read_rx_status(struct intel_connector *connector,
 340                               u8 *rx_status)
 341 {
 342         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 343         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 344         struct drm_dp_aux *aux = &dig_port->dp.aux;
 345         ssize_t ret;
 346
 347         ret = drm_dp_dpcd_read(aux,
 348                                DP_HDCP_2_2_REG_RXSTATUS_OFFSET, rx_status,
 349                                HDCP_2_2_DP_RXSTATUS_LEN);
 350         if (ret != HDCP_2_2_DP_RXSTATUS_LEN) {
 351                 drm_dbg_kms(&i915->drm,
 352                             "Read bstatus from DP/AUX failed (%zd)\n", ret);
 353                 return ret >= 0 ? -EIO : ret;
 354         }
 355
 356         return 0;
 357 }
 358
 359 static
 360 int hdcp2_detect_msg_availability(struct intel_connector *connector,
 361                                   u8 msg_id, bool *msg_ready)
 362 {
 363         u8 rx_status;
 364         int ret;
 365
 366         *msg_ready = false;
 367         ret = intel_dp_hdcp2_read_rx_status(connector, &rx_status);
 368         if (ret < 0)
 369                 return ret;
 370
 371         switch (msg_id) {
 372         case HDCP_2_2_AKE_SEND_HPRIME:
 373                 if (HDCP_2_2_DP_RXSTATUS_H_PRIME(rx_status))
 374                         *msg_ready = true;
 375                 break;
 376         case HDCP_2_2_AKE_SEND_PAIRING_INFO:
 377                 if (HDCP_2_2_DP_RXSTATUS_PAIRING(rx_status))
 378                         *msg_ready = true;
 379                 break;
 380         case HDCP_2_2_REP_SEND_RECVID_LIST:
 381                 if (HDCP_2_2_DP_RXSTATUS_READY(rx_status))
 382                         *msg_ready = true;
 383                 break;
 384         default:
 385                 drm_err(connector->base.dev,
 386                         "Unidentified msg_id: %d\n", msg_id);
 387                 return -EINVAL;
 388         }
 389
 390         return 0;
 391 }
 392
 393 static ssize_t
 394 intel_dp_hdcp2_wait_for_msg(struct intel_connector *connector,
 395                             const struct hdcp2_dp_msg_data *hdcp2_msg_data)
 396 {
 397         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 398         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 399         struct intel_dp *dp = &dig_port->dp;
 400         struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
 401         u8 msg_id = hdcp2_msg_data->msg_id;
 402         int ret, timeout;
 403         bool msg_ready = false;
 404
 405         if (msg_id == HDCP_2_2_AKE_SEND_HPRIME && !hdcp->is_paired)
 406                 timeout = hdcp2_msg_data->timeout2;
 407         else
 408                 timeout = hdcp2_msg_data->timeout;
 409
 410         /*
 411          * There is no way to detect the CERT, LPRIME and STREAM_READY
 412          * availability. So Wait for timeout and read the msg.
 413          */
 414         if (!hdcp2_msg_data->msg_detectable) {
 415                 mdelay(timeout);
 416                 ret = 0;
 417         } else {
 418                 /*
 419                  * As we want to check the msg availability at timeout, Ignoring
 420                  * the timeout at wait for CP_IRQ.
 421                  */
 422                 intel_dp_hdcp_wait_for_cp_irq(connector, timeout);
 423                 ret = hdcp2_detect_msg_availability(connector, msg_id,
 424                                                     &msg_ready);
 425                 if (!msg_ready)
 426                         ret = -ETIMEDOUT;
 427         }
 428
 429         if (ret)
 430                 drm_dbg_kms(&i915->drm,
 431                             "msg_id %d, ret %d, timeout(mSec): %d\n",
 432                             hdcp2_msg_data->msg_id, ret, timeout);
 433
 434         return ret;
 435 }
 436
 437 static const struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
 438 {
 439         int i;
 440
 441         for (i = 0; i < ARRAY_SIZE(hdcp2_dp_msg_data); i++)
 442                 if (hdcp2_dp_msg_data[i].msg_id == msg_id)
 443                         return &hdcp2_dp_msg_data[i];
 444
 445         return NULL;
 446 }
 447
 448 static
 449 int intel_dp_hdcp2_write_msg(struct intel_connector *connector,
 450                              void *buf, size_t size)
 451 {
 452         unsigned int offset;
 453         u8 *byte = buf;
 454         ssize_t ret, bytes_to_write, len;
 455         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 456         struct drm_dp_aux *aux = &dig_port->dp.aux;
 457         const struct hdcp2_dp_msg_data *hdcp2_msg_data;
 458
 459         hdcp2_msg_data = get_hdcp2_dp_msg_data(*byte);
 460         if (!hdcp2_msg_data)
 461                 return -EINVAL;
 462
 463         offset = hdcp2_msg_data->offset;
 464
 465         /* No msg_id in DP HDCP2.2 msgs */
 466         bytes_to_write = size - 1;
 467         byte++;
 468
 469         while (bytes_to_write) {
 470                 len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
 471                                 DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
 472
 473                 ret = drm_dp_dpcd_write(aux,
 474                                         offset, (void *)byte, len);
 475                 if (ret < 0)
 476                         return ret;
 477
 478                 bytes_to_write -= ret;
 479                 byte += ret;
 480                 offset += ret;
 481         }
 482
 483         return size;
 484 }
 485
 486 static
 487 ssize_t get_receiver_id_list_rx_info(struct intel_connector *connector,
 488                                      u32 *dev_cnt, u8 *byte)
 489 {
 490         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 491         struct drm_dp_aux *aux = &dig_port->dp.aux;
 492         ssize_t ret;
 493         u8 *rx_info = byte;
 494
 495         ret = drm_dp_dpcd_read(aux,
 496                                DP_HDCP_2_2_REG_RXINFO_OFFSET,
 497                                (void *)rx_info, HDCP_2_2_RXINFO_LEN);
 498         if (ret != HDCP_2_2_RXINFO_LEN)
 499                 return ret >= 0 ? -EIO : ret;
 500
 501         *dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
 502                    HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
 503
 504         if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
 505                 *dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
 506
 507         return ret;
 508 }
 509
 510 static
 511 int intel_dp_hdcp2_read_msg(struct intel_connector *connector,
 512                             u8 msg_id, void *buf, size_t size)
 513 {
 514         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 515         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 516         struct drm_dp_aux *aux = &dig_port->dp.aux;
 517         struct intel_dp *dp = &dig_port->dp;
 518         struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
 519         unsigned int offset;
 520         u8 *byte = buf;
 521         ssize_t ret, bytes_to_recv, len;
 522         const struct hdcp2_dp_msg_data *hdcp2_msg_data;
 523         ktime_t msg_end = ktime_set(0, 0);
 524         bool msg_expired;
 525         u32 dev_cnt;
 526
 527         hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
 528         if (!hdcp2_msg_data)
 529                 return -EINVAL;
 530         offset = hdcp2_msg_data->offset;
 531
 532         ret = intel_dp_hdcp2_wait_for_msg(connector, hdcp2_msg_data);
 533         if (ret < 0)
 534                 return ret;
 535
 536         hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
 537
 538         /* DP adaptation msgs has no msg_id */
 539         byte++;
 540
 541         if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
 542                 ret = get_receiver_id_list_rx_info(connector, &dev_cnt, byte);
 543                 if (ret < 0)
 544                         return ret;
 545
 546                 byte += ret;
 547                 size = sizeof(struct hdcp2_rep_send_receiverid_list) -
 548                 HDCP_2_2_RXINFO_LEN - HDCP_2_2_RECEIVER_IDS_MAX_LEN +
 549                 (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN);
 550                 offset += HDCP_2_2_RXINFO_LEN;
 551         }
 552
 553         bytes_to_recv = size - 1;
 554
 555         while (bytes_to_recv) {
 556                 len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ?
 557                       DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_recv;
 558
 559                 /* Entire msg read timeout since initiate of msg read */
 560                 if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0) {
 561                         msg_end = ktime_add_ms(ktime_get_raw(),
 562                                                hdcp2_msg_data->msg_read_timeout);
 563                 }
 564
 565                 ret = drm_dp_dpcd_read(aux, offset,
 566                                        (void *)byte, len);
 567                 if (ret < 0) {
 568                         drm_dbg_kms(&i915->drm, "msg_id %d, ret %zd\n",
 569                                     msg_id, ret);
 570                         return ret;
 571                 }
 572
 573                 bytes_to_recv -= ret;
 574                 byte += ret;
 575                 offset += ret;
 576         }
 577
 578         if (hdcp2_msg_data->msg_read_timeout > 0) {
 579                 msg_expired = ktime_after(ktime_get_raw(), msg_end);
 580                 if (msg_expired) {
 581                         drm_dbg_kms(&i915->drm, "msg_id %d, entire msg read timeout(mSec): %d\n",
 582                                     msg_id, hdcp2_msg_data->msg_read_timeout);
 583                         return -ETIMEDOUT;
 584                 }
 585         }
 586
 587         byte = buf;
 588         *byte = msg_id;
 589
 590         return size;
 591 }
 592
 593 static
 594 int intel_dp_hdcp2_config_stream_type(struct intel_connector *connector,
 595                                       bool is_repeater, u8 content_type)
 596 {
 597         int ret;
 598         struct hdcp2_dp_errata_stream_type stream_type_msg;
 599
 600         if (is_repeater)
 601                 return 0;
 602
 603         /*
 604          * Errata for DP: As Stream type is used for encryption, Receiver
 605          * should be communicated with stream type for the decryption of the
 606          * content.
 607          * Repeater will be communicated with stream type as a part of it's
 608          * auth later in time.
 609          */
 610         stream_type_msg.msg_id = HDCP_2_2_ERRATA_DP_STREAM_TYPE;
 611         stream_type_msg.stream_type = content_type;
 612
 613         ret =  intel_dp_hdcp2_write_msg(connector, &stream_type_msg,
 614                                         sizeof(stream_type_msg));
 615
 616         return ret < 0 ? ret : 0;
 617
 618 }
 619
 620 static
 621 int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
 622                               struct intel_connector *connector)
 623 {
 624         u8 rx_status;
 625         int ret;
 626
 627         ret = intel_dp_hdcp2_read_rx_status(connector,
 628                                             &rx_status);
 629         if (ret)
 630                 return ret;
 631
 632         if (HDCP_2_2_DP_RXSTATUS_REAUTH_REQ(rx_status))
 633                 ret = HDCP_REAUTH_REQUEST;
 634         else if (HDCP_2_2_DP_RXSTATUS_LINK_FAILED(rx_status))
 635                 ret = HDCP_LINK_INTEGRITY_FAILURE;
 636         else if (HDCP_2_2_DP_RXSTATUS_READY(rx_status))
 637                 ret = HDCP_TOPOLOGY_CHANGE;
 638
 639         return ret;
 640 }
 641
 642 static
 643 int _intel_dp_hdcp2_get_capability(struct drm_dp_aux *aux,
 644                                    bool *capable)
 645 {
 646         u8 rx_caps[3];
 647         int ret, i;
 648
 649         *capable = false;
 650
 651         /*
 652          * Some HDCP monitors act really shady by not giving the correct hdcp
 653          * capability on the first rx_caps read and usually take an extra read
 654          * to give the capability. We read rx_caps three times before we
 655          * declare a monitor not capable of HDCP 2.2.
 656          */
 657         for (i = 0; i < 3; i++) {
 658                 ret = drm_dp_dpcd_read(aux,
 659                                        DP_HDCP_2_2_REG_RX_CAPS_OFFSET,
 660                                        rx_caps, HDCP_2_2_RXCAPS_LEN);
 661                 if (ret != HDCP_2_2_RXCAPS_LEN)
 662                         return ret >= 0 ? -EIO : ret;
 663
 664                 if (rx_caps[0] == HDCP_2_2_RX_CAPS_VERSION_VAL &&
 665                     HDCP_2_2_DP_HDCP_CAPABLE(rx_caps[2])) {
 666                         *capable = true;
 667                         break;
 668                 }
 669         }
 670
 671         return 0;
 672 }
 673
 674 static
 675 int intel_dp_hdcp2_get_capability(struct intel_connector *connector,
 676                                   bool *capable)
 677 {
 678         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 679         struct drm_dp_aux *aux = &dig_port->dp.aux;
 680
 681         return _intel_dp_hdcp2_get_capability(aux, capable);
 682 }
 683
 684 static
 685 int intel_dp_hdcp_get_remote_capability(struct intel_connector *connector,
 686                                         bool *hdcp_capable,
 687                                         bool *hdcp2_capable)
 688 {
 689         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 690         struct drm_dp_aux *aux = &connector->port->aux;
 691         u8 bcaps;
 692         int ret;
 693
 694         *hdcp_capable = false;
 695         *hdcp2_capable = false;
 696         if (!intel_encoder_is_mst(connector->encoder))
 697                 return -EINVAL;
 698
 699         ret =  _intel_dp_hdcp2_get_capability(aux, hdcp2_capable);
 700         if (ret)
 701                 drm_dbg_kms(&i915->drm,
 702                             "HDCP2 DPCD capability read failed err: %d\n", ret);
 703
 704         ret = intel_dp_hdcp_read_bcaps(aux, i915, &bcaps);
 705         if (ret)
 706                 return ret;
 707
 708         *hdcp_capable = bcaps & DP_BCAPS_HDCP_CAPABLE;
 709
 710         return 0;
 711 }
 712
 713 static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
 714         .write_an_aksv = intel_dp_hdcp_write_an_aksv,
 715         .read_bksv = intel_dp_hdcp_read_bksv,
 716         .read_bstatus = intel_dp_hdcp_read_bstatus,
 717         .repeater_present = intel_dp_hdcp_repeater_present,
 718         .read_ri_prime = intel_dp_hdcp_read_ri_prime,
 719         .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
 720         .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
 721         .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
 722         .toggle_signalling = intel_dp_hdcp_toggle_signalling,
 723         .check_link = intel_dp_hdcp_check_link,
 724         .hdcp_get_capability = intel_dp_hdcp_get_capability,
 725         .write_2_2_msg = intel_dp_hdcp2_write_msg,
 726         .read_2_2_msg = intel_dp_hdcp2_read_msg,
 727         .config_stream_type = intel_dp_hdcp2_config_stream_type,
 728         .check_2_2_link = intel_dp_hdcp2_check_link,
 729         .hdcp_2_2_get_capability = intel_dp_hdcp2_get_capability,
 730         .protocol = HDCP_PROTOCOL_DP,
 731 };
 732
 733 static int
 734 intel_dp_mst_toggle_hdcp_stream_select(struct intel_connector *connector,
 735                                        bool enable)
 736 {
 737         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 738         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 739         struct intel_hdcp *hdcp = &connector->hdcp;
 740         int ret;
 741
 742         ret = intel_ddi_toggle_hdcp_bits(&dig_port->base,
 743                                          hdcp->stream_transcoder, enable,
 744                                          TRANS_DDI_HDCP_SELECT);
 745         if (ret)
 746                 drm_err(&i915->drm, "%s HDCP stream select failed (%d)\n",
 747                         enable ? "Enable" : "Disable", ret);
 748         return ret;
 749 }
 750
 751 static int
 752 intel_dp_mst_hdcp_stream_encryption(struct intel_connector *connector,
 753                                     bool enable)
 754 {
 755         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 756         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 757         struct intel_hdcp *hdcp = &connector->hdcp;
 758         enum port port = dig_port->base.port;
 759         enum transcoder cpu_transcoder = hdcp->stream_transcoder;
 760         u32 stream_enc_status;
 761         int ret;
 762
 763         ret = intel_dp_mst_toggle_hdcp_stream_select(connector, enable);
 764         if (ret)
 765                 return ret;
 766
 767         stream_enc_status =  transcoder_to_stream_enc_status(cpu_transcoder);
 768         if (!stream_enc_status)
 769                 return -EINVAL;
 770
 771         /* Wait for encryption confirmation */
 772         if (intel_de_wait_for_register(i915,
 773                                        HDCP_STATUS(i915, cpu_transcoder, port),
 774                                        stream_enc_status,
 775                                        enable ? stream_enc_status : 0,
 776                                        HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 777                 drm_err(&i915->drm, "Timed out waiting for transcoder: %s stream encryption %s\n",
 778                         transcoder_name(cpu_transcoder), enable ? "enabled" : "disabled");
 779                 return -ETIMEDOUT;
 780         }
 781
 782         return 0;
 783 }
 784
 785 static int
 786 intel_dp_mst_hdcp2_stream_encryption(struct intel_connector *connector,
 787                                      bool enable)
 788 {
 789         struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 790         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 791         struct hdcp_port_data *data = &dig_port->hdcp_port_data;
 792         struct intel_hdcp *hdcp = &connector->hdcp;
 793         enum transcoder cpu_transcoder = hdcp->stream_transcoder;
 794         enum pipe pipe = (enum pipe)cpu_transcoder;
 795         enum port port = dig_port->base.port;
 796         int ret;
 797
 798         drm_WARN_ON(&i915->drm, enable &&
 799                     !!(intel_de_read(i915, HDCP2_AUTH_STREAM(i915, cpu_transcoder, port))
 800                     & AUTH_STREAM_TYPE) != data->streams[0].stream_type);
 801
 802         ret = intel_dp_mst_toggle_hdcp_stream_select(connector, enable);
 803         if (ret)
 804                 return ret;
 805
 806         /* Wait for encryption confirmation */
 807         if (intel_de_wait_for_register(i915,
 808                                        HDCP2_STREAM_STATUS(i915, cpu_transcoder, pipe),
 809                                        STREAM_ENCRYPTION_STATUS,
 810                                        enable ? STREAM_ENCRYPTION_STATUS : 0,
 811                                        HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 812                 drm_err(&i915->drm, "Timed out waiting for transcoder: %s stream encryption %s\n",
 813                         transcoder_name(cpu_transcoder), enable ? "enabled" : "disabled");
 814                 return -ETIMEDOUT;
 815         }
 816
 817         return 0;
 818 }
 819
 820 static
 821 int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
 822                                   struct intel_connector *connector)
 823 {
 824         struct intel_hdcp *hdcp = &connector->hdcp;
 825         int ret;
 826
 827         /*
 828          * We do need to do the Link Check only for the connector involved with
 829          * HDCP port authentication and encryption.
 830          * We can re-use the hdcp->is_repeater flag to know that the connector
 831          * involved with HDCP port authentication and encryption.
 832          */
 833         if (hdcp->is_repeater) {
 834                 ret = intel_dp_hdcp2_check_link(dig_port, connector);
 835                 if (ret)
 836                         return ret;
 837         }
 838
 839         return 0;
 840 }
 841
 842 static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
 843         .write_an_aksv = intel_dp_hdcp_write_an_aksv,
 844         .read_bksv = intel_dp_hdcp_read_bksv,
 845         .read_bstatus = intel_dp_hdcp_read_bstatus,
 846         .repeater_present = intel_dp_hdcp_repeater_present,
 847         .read_ri_prime = intel_dp_hdcp_read_ri_prime,
 848         .read_ksv_ready = intel_dp_hdcp_read_ksv_ready,
 849         .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
 850         .read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
 851         .toggle_signalling = intel_dp_hdcp_toggle_signalling,
 852         .stream_encryption = intel_dp_mst_hdcp_stream_encryption,
 853         .check_link = intel_dp_hdcp_check_link,
 854         .hdcp_get_capability = intel_dp_hdcp_get_capability,
 855         .write_2_2_msg = intel_dp_hdcp2_write_msg,
 856         .read_2_2_msg = intel_dp_hdcp2_read_msg,
 857         .config_stream_type = intel_dp_hdcp2_config_stream_type,
 858         .stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption,
 859         .check_2_2_link = intel_dp_mst_hdcp2_check_link,
 860         .hdcp_2_2_get_capability = intel_dp_hdcp2_get_capability,
 861         .get_remote_hdcp_capability = intel_dp_hdcp_get_remote_capability,
 862         .protocol = HDCP_PROTOCOL_DP,
 863 };
 864
 865 int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
 866                        struct intel_connector *intel_connector)
 867 {
 868         struct drm_device *dev = intel_connector->base.dev;
 869         struct drm_i915_private *dev_priv = to_i915(dev);
 870         struct intel_encoder *intel_encoder = &dig_port->base;
 871         enum port port = intel_encoder->port;
 872         struct intel_dp *intel_dp = &dig_port->dp;
 873
 874         if (!is_hdcp_supported(dev_priv, port))
 875                 return 0;
 876
 877         if (intel_connector->mst_port)
 878                 return intel_hdcp_init(intel_connector, dig_port,
 879                                        &intel_dp_mst_hdcp_shim);
 880         else if (!intel_dp_is_edp(intel_dp))
 881                 return intel_hdcp_init(intel_connector, dig_port,
 882                                        &intel_dp_hdcp_shim);
 883
 884         return 0;
 885 }