2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/drm_dp_helper.h>
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
40 * DOC: Video BIOS Table (VBT)
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
61 /* Wrapper for VBT child device config */
62 struct display_device_data {
63 struct child_device_config child;
64 struct dsc_compression_parameters_entry *dsc;
65 struct list_head node;
68 #define SLAVE_ADDR1 0x70
69 #define SLAVE_ADDR2 0x72
71 /* Get BDB block size given a pointer to Block ID. */
72 static u32 _get_blocksize(const u8 *block_base)
74 /* The MIPI Sequence Block v3+ has a separate size field. */
75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 return *((const u32 *)(block_base + 4));
78 return *((const u16 *)(block_base + 1));
81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
82 static u32 get_blocksize(const void *block_data)
84 return _get_blocksize(block_data - 3);
88 find_section(const void *_bdb, enum bdb_block_id section_id)
90 const struct bdb_header *bdb = _bdb;
91 const u8 *base = _bdb;
93 u32 total, current_size;
94 enum bdb_block_id current_id;
96 /* skip to first section */
97 index += bdb->header_size;
98 total = bdb->bdb_size;
100 /* walk the sections looking for section_id */
101 while (index + 3 < total) {
102 current_id = *(base + index);
103 current_size = _get_blocksize(base + index);
106 if (index + current_size > total)
109 if (current_id == section_id)
112 index += current_size;
119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 const struct lvds_dvo_timing *dvo_timing)
122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 dvo_timing->hactive_lo;
124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 ((dvo_timing->hsync_pulse_width_hi << 8) |
128 dvo_timing->hsync_pulse_width_lo);
129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 dvo_timing->vactive_lo;
134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 ((dvo_timing->vsync_pulse_width_hi << 4) |
138 dvo_timing->vsync_pulse_width_lo);
139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 panel_fixed_mode->clock = dvo_timing->clock * 10;
142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
144 if (dvo_timing->hsync_positive)
145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
149 if (dvo_timing->vsync_positive)
150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 dvo_timing->himage_lo;
156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 dvo_timing->vimage_lo;
159 /* Some VBTs have bogus h/vtotal values */
160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
165 drm_mode_set_name(panel_fixed_mode);
168 static const struct lvds_dvo_timing *
169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
174 * the size of fp_timing varies on the different platform.
175 * So calculate the DVO timing relative offset in LVDS data
176 * entry to get the DVO timing entry
180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 int dvo_timing_offset =
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190 /* get lvds_fp_timing entry
191 * this function may return NULL if the corresponding entry is invalid
193 static const struct lvds_fp_timing *
194 get_lvds_fp_timing(const struct bdb_header *bdb,
195 const struct bdb_lvds_lfp_data *data,
196 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 if (index >= ARRAY_SIZE(ptrs->ptr))
205 ofs = ptrs->ptr[index].fp_timing_offset;
206 if (ofs < data_ofs ||
207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212 /* Parse general panel options */
214 parse_panel_options(struct drm_i915_private *i915,
215 const struct bdb_header *bdb)
217 const struct bdb_lvds_options *lvds_options;
222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
226 i915->vbt.lvds_dither = lvds_options->pixel_dither;
228 ret = intel_opregion_get_panel_type(i915);
230 drm_WARN_ON(&i915->drm, ret > 0xf);
232 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 if (lvds_options->panel_type > 0xf) {
236 drm_dbg_kms(&i915->drm,
237 "Invalid VBT panel type 0x%x\n",
238 lvds_options->panel_type);
241 panel_type = lvds_options->panel_type;
242 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
246 i915->vbt.panel_type = panel_type;
248 drrs_mode = (lvds_options->dps_panel_type_bits
249 >> (panel_type * 2)) & MODE_MASK;
251 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 * The below piece of code is required to adjust vbt.drrs_type
253 * to match the enum drrs_support_type.
257 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 drm_dbg_kms(&i915->drm,
263 "DRRS supported mode is seamless\n");
266 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 drm_dbg_kms(&i915->drm,
268 "DRRS not supported (VBT input)\n");
273 /* Try to find integrated panel timing data */
275 parse_lfp_panel_dtd(struct drm_i915_private *i915,
276 const struct bdb_header *bdb)
278 const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 const struct lvds_dvo_timing *panel_dvo_timing;
281 const struct lvds_fp_timing *fp_timing;
282 struct drm_display_mode *panel_fixed_mode;
283 int panel_type = i915->vbt.panel_type;
285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 if (!lvds_lfp_data_ptrs)
293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 if (!panel_fixed_mode)
301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
303 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
305 drm_dbg_kms(&i915->drm,
306 "Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 drm_dbg_kms(&i915->drm,
318 "VBT initial LVDS value %x\n",
319 i915->vbt.bios_lvds_val);
325 parse_generic_dtd(struct drm_i915_private *i915,
326 const struct bdb_header *bdb)
328 const struct bdb_generic_dtd *generic_dtd;
329 const struct generic_dtd_entry *dtd;
330 struct drm_display_mode *panel_fixed_mode;
333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 drm_err(&i915->drm, "GDTD size %u is too small.\n",
339 generic_dtd->gdtd_size);
341 } else if (generic_dtd->gdtd_size !=
342 sizeof(struct generic_dtd_entry)) {
343 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
344 generic_dtd->gdtd_size);
345 /* DTD has unknown fields, but keep going */
348 num_dtd = (get_blocksize(generic_dtd) -
349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 if (i915->vbt.panel_type >= num_dtd) {
352 "Panel type %d not found in table of %d DTD's\n",
353 i915->vbt.panel_type, num_dtd);
357 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 if (!panel_fixed_mode)
363 panel_fixed_mode->hdisplay = dtd->hactive;
364 panel_fixed_mode->hsync_start =
365 panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 panel_fixed_mode->hsync_end =
367 panel_fixed_mode->hsync_start + dtd->hsync;
368 panel_fixed_mode->htotal =
369 panel_fixed_mode->hdisplay + dtd->hblank;
371 panel_fixed_mode->vdisplay = dtd->vactive;
372 panel_fixed_mode->vsync_start =
373 panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 panel_fixed_mode->vsync_end =
375 panel_fixed_mode->vsync_start + dtd->vsync;
376 panel_fixed_mode->vtotal =
377 panel_fixed_mode->vdisplay + dtd->vblank;
379 panel_fixed_mode->clock = dtd->pixel_clock;
380 panel_fixed_mode->width_mm = dtd->width_mm;
381 panel_fixed_mode->height_mm = dtd->height_mm;
383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 drm_mode_set_name(panel_fixed_mode);
386 if (dtd->hsync_positive_polarity)
387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
391 if (dtd->vsync_positive_polarity)
392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
396 drm_dbg_kms(&i915->drm,
397 "Found panel mode in BIOS VBT generic dtd table:\n");
398 drm_mode_debug_printmodeline(panel_fixed_mode);
400 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
404 parse_panel_dtd(struct drm_i915_private *i915,
405 const struct bdb_header *bdb)
408 * Older VBTs provided provided DTD information for internal displays
409 * through the "LFP panel DTD" block (42). As of VBT revision 229,
410 * that block is now deprecated and DTD information should be provided
411 * via a newer "generic DTD" block (58). Just to be safe, we'll
412 * try the new generic DTD block first on VBT >= 229, but still fall
413 * back to trying the old LFP block if that fails.
415 if (bdb->version >= 229)
416 parse_generic_dtd(i915, bdb);
417 if (!i915->vbt.lfp_lvds_vbt_mode)
418 parse_lfp_panel_dtd(i915, bdb);
422 parse_lfp_backlight(struct drm_i915_private *i915,
423 const struct bdb_header *bdb)
425 const struct bdb_lfp_backlight_data *backlight_data;
426 const struct lfp_backlight_data_entry *entry;
427 int panel_type = i915->vbt.panel_type;
430 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
434 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
435 drm_dbg_kms(&i915->drm,
436 "Unsupported backlight data entry size %u\n",
437 backlight_data->entry_size);
441 entry = &backlight_data->data[panel_type];
443 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
444 if (!i915->vbt.backlight.present) {
445 drm_dbg_kms(&i915->drm,
446 "PWM backlight not present in VBT (type %u)\n",
451 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
452 if (bdb->version >= 191 &&
453 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
454 const struct lfp_backlight_control_method *method;
456 method = &backlight_data->backlight_control[panel_type];
457 i915->vbt.backlight.type = method->type;
458 i915->vbt.backlight.controller = method->controller;
461 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
462 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
464 if (bdb->version >= 234) {
468 level = backlight_data->brightness_level[panel_type].level;
469 min_level = backlight_data->brightness_min_level[panel_type].level;
471 if (bdb->version >= 236)
472 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
477 min_level = min_level / 255;
479 if (min_level > 255) {
480 drm_warn(&i915->drm, "Brightness min level > 255\n");
483 i915->vbt.backlight.min_brightness = min_level;
485 level = backlight_data->level[panel_type];
486 i915->vbt.backlight.min_brightness = entry->min_brightness;
489 drm_dbg_kms(&i915->drm,
490 "VBT backlight PWM modulation frequency %u Hz, "
491 "active %s, min brightness %u, level %u, controller %u\n",
492 i915->vbt.backlight.pwm_freq_hz,
493 i915->vbt.backlight.active_low_pwm ? "low" : "high",
494 i915->vbt.backlight.min_brightness,
496 i915->vbt.backlight.controller);
499 /* Try to find sdvo panel data */
501 parse_sdvo_panel_data(struct drm_i915_private *i915,
502 const struct bdb_header *bdb)
504 const struct bdb_sdvo_panel_dtds *dtds;
505 struct drm_display_mode *panel_fixed_mode;
508 index = i915->params.vbt_sdvo_panel_type;
510 drm_dbg_kms(&i915->drm,
511 "Ignore SDVO panel mode from BIOS VBT tables.\n");
516 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
518 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
519 if (!sdvo_lvds_options)
522 index = sdvo_lvds_options->panel_type;
525 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
529 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
530 if (!panel_fixed_mode)
533 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
535 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
537 drm_dbg_kms(&i915->drm,
538 "Found SDVO panel mode in BIOS VBT tables:\n");
539 drm_mode_debug_printmodeline(panel_fixed_mode);
542 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
545 switch (INTEL_GEN(i915)) {
547 return alternate ? 66667 : 48000;
550 return alternate ? 100000 : 96000;
552 return alternate ? 100000 : 120000;
557 parse_general_features(struct drm_i915_private *i915,
558 const struct bdb_header *bdb)
560 const struct bdb_general_features *general;
562 general = find_section(bdb, BDB_GENERAL_FEATURES);
566 i915->vbt.int_tv_support = general->int_tv_support;
567 /* int_crt_support can't be trusted on earlier platforms */
568 if (bdb->version >= 155 &&
569 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
570 i915->vbt.int_crt_support = general->int_crt_support;
571 i915->vbt.lvds_use_ssc = general->enable_ssc;
572 i915->vbt.lvds_ssc_freq =
573 intel_bios_ssc_frequency(i915, general->ssc_freq);
574 i915->vbt.display_clock_mode = general->display_clock_mode;
575 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
576 if (bdb->version >= 181) {
577 i915->vbt.orientation = general->rotate_180 ?
578 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
579 DRM_MODE_PANEL_ORIENTATION_NORMAL;
581 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
583 drm_dbg_kms(&i915->drm,
584 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
585 i915->vbt.int_tv_support,
586 i915->vbt.int_crt_support,
587 i915->vbt.lvds_use_ssc,
588 i915->vbt.lvds_ssc_freq,
589 i915->vbt.display_clock_mode,
590 i915->vbt.fdi_rx_polarity_inverted);
593 static const struct child_device_config *
594 child_device_ptr(const struct bdb_general_definitions *defs, int i)
596 return (const void *) &defs->devices[i * defs->child_dev_size];
600 parse_sdvo_device_mapping(struct drm_i915_private *i915)
602 struct sdvo_device_mapping *mapping;
603 const struct display_device_data *devdata;
604 const struct child_device_config *child;
608 * Only parse SDVO mappings on gens that could have SDVO. This isn't
609 * accurate and doesn't have to be, as long as it's not too strict.
611 if (!IS_GEN_RANGE(i915, 3, 7)) {
612 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
616 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
617 child = &devdata->child;
619 if (child->slave_addr != SLAVE_ADDR1 &&
620 child->slave_addr != SLAVE_ADDR2) {
622 * If the slave address is neither 0x70 nor 0x72,
623 * it is not a SDVO device. Skip it.
627 if (child->dvo_port != DEVICE_PORT_DVOB &&
628 child->dvo_port != DEVICE_PORT_DVOC) {
629 /* skip the incorrect SDVO port */
630 drm_dbg_kms(&i915->drm,
631 "Incorrect SDVO port. Skip it\n");
634 drm_dbg_kms(&i915->drm,
635 "the SDVO device with slave addr %2x is found on"
638 (child->dvo_port == DEVICE_PORT_DVOB) ?
640 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
641 if (!mapping->initialized) {
642 mapping->dvo_port = child->dvo_port;
643 mapping->slave_addr = child->slave_addr;
644 mapping->dvo_wiring = child->dvo_wiring;
645 mapping->ddc_pin = child->ddc_pin;
646 mapping->i2c_pin = child->i2c_pin;
647 mapping->initialized = 1;
648 drm_dbg_kms(&i915->drm,
649 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
650 mapping->dvo_port, mapping->slave_addr,
651 mapping->dvo_wiring, mapping->ddc_pin,
654 drm_dbg_kms(&i915->drm,
655 "Maybe one SDVO port is shared by "
656 "two SDVO device.\n");
658 if (child->slave2_addr) {
659 /* Maybe this is a SDVO device with multiple inputs */
660 /* And the mapping info is not added */
661 drm_dbg_kms(&i915->drm,
662 "there exists the slave2_addr. Maybe this"
663 " is a SDVO device with multiple inputs.\n");
669 /* No SDVO device info is found */
670 drm_dbg_kms(&i915->drm,
671 "No SDVO device info is found in VBT\n");
676 parse_driver_features(struct drm_i915_private *i915,
677 const struct bdb_header *bdb)
679 const struct bdb_driver_features *driver;
681 driver = find_section(bdb, BDB_DRIVER_FEATURES);
685 if (INTEL_GEN(i915) >= 5) {
687 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
688 * to mean "eDP". The VBT spec doesn't agree with that
689 * interpretation, but real world VBTs seem to.
691 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
692 i915->vbt.int_lvds_support = 0;
695 * FIXME it's not clear which BDB version has the LVDS config
696 * bits defined. Revision history in the VBT spec says:
697 * "0.92 | Add two definitions for VBT value of LVDS Active
698 * Config (00b and 11b values defined) | 06/13/2005"
699 * but does not the specify the BDB version.
701 * So far version 134 (on i945gm) is the oldest VBT observed
702 * in the wild with the bits correctly populated. Version
703 * 108 (on i85x) does not have the bits correctly populated.
705 if (bdb->version >= 134 &&
706 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
707 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
708 i915->vbt.int_lvds_support = 0;
711 if (bdb->version < 228) {
712 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
713 driver->drrs_enabled);
715 * If DRRS is not supported, drrs_type has to be set to 0.
716 * This is because, VBT is configured in such a way that
717 * static DRRS is 0 and DRRS not supported is represented by
718 * driver->drrs_enabled=false
720 if (!driver->drrs_enabled)
721 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
723 i915->vbt.psr.enable = driver->psr_enabled;
728 parse_power_conservation_features(struct drm_i915_private *i915,
729 const struct bdb_header *bdb)
731 const struct bdb_lfp_power *power;
732 u8 panel_type = i915->vbt.panel_type;
734 if (bdb->version < 228)
737 power = find_section(bdb, BDB_LFP_POWER);
741 i915->vbt.psr.enable = power->psr & BIT(panel_type);
744 * If DRRS is not supported, drrs_type has to be set to 0.
745 * This is because, VBT is configured in such a way that
746 * static DRRS is 0 and DRRS not supported is represented by
747 * power->drrs & BIT(panel_type)=false
749 if (!(power->drrs & BIT(panel_type)))
750 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
752 if (bdb->version >= 232)
753 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
757 parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
759 const struct bdb_edp *edp;
760 const struct edp_power_seq *edp_pps;
761 const struct edp_fast_link_params *edp_link_params;
762 int panel_type = i915->vbt.panel_type;
764 edp = find_section(bdb, BDB_EDP);
768 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
770 i915->vbt.edp.bpp = 18;
773 i915->vbt.edp.bpp = 24;
776 i915->vbt.edp.bpp = 30;
780 /* Get the eDP sequencing and link info */
781 edp_pps = &edp->power_seqs[panel_type];
782 edp_link_params = &edp->fast_link_params[panel_type];
784 i915->vbt.edp.pps = *edp_pps;
786 switch (edp_link_params->rate) {
788 i915->vbt.edp.rate = DP_LINK_BW_1_62;
791 i915->vbt.edp.rate = DP_LINK_BW_2_7;
794 drm_dbg_kms(&i915->drm,
795 "VBT has unknown eDP link rate value %u\n",
796 edp_link_params->rate);
800 switch (edp_link_params->lanes) {
802 i915->vbt.edp.lanes = 1;
805 i915->vbt.edp.lanes = 2;
808 i915->vbt.edp.lanes = 4;
811 drm_dbg_kms(&i915->drm,
812 "VBT has unknown eDP lane count value %u\n",
813 edp_link_params->lanes);
817 switch (edp_link_params->preemphasis) {
818 case EDP_PREEMPHASIS_NONE:
819 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
821 case EDP_PREEMPHASIS_3_5dB:
822 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
824 case EDP_PREEMPHASIS_6dB:
825 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
827 case EDP_PREEMPHASIS_9_5dB:
828 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
831 drm_dbg_kms(&i915->drm,
832 "VBT has unknown eDP pre-emphasis value %u\n",
833 edp_link_params->preemphasis);
837 switch (edp_link_params->vswing) {
838 case EDP_VSWING_0_4V:
839 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
841 case EDP_VSWING_0_6V:
842 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
844 case EDP_VSWING_0_8V:
845 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
847 case EDP_VSWING_1_2V:
848 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
851 drm_dbg_kms(&i915->drm,
852 "VBT has unknown eDP voltage swing value %u\n",
853 edp_link_params->vswing);
857 if (bdb->version >= 173) {
860 /* Don't read from VBT if module parameter has valid value*/
861 if (i915->params.edp_vswing) {
862 i915->vbt.edp.low_vswing =
863 i915->params.edp_vswing == 1;
865 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
866 i915->vbt.edp.low_vswing = vswing == 0;
872 parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
874 const struct bdb_psr *psr;
875 const struct psr_table *psr_table;
876 int panel_type = i915->vbt.panel_type;
878 psr = find_section(bdb, BDB_PSR);
880 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
884 psr_table = &psr->psr_table[panel_type];
886 i915->vbt.psr.full_link = psr_table->full_link;
887 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
889 /* Allowed VBT values goes from 0 to 15 */
890 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
891 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
893 switch (psr_table->lines_to_wait) {
895 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
898 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
901 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
904 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
907 drm_dbg_kms(&i915->drm,
908 "VBT has unknown PSR lines to wait %u\n",
909 psr_table->lines_to_wait);
914 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
915 * Old decimal value is wake up time in multiples of 100 us.
917 if (bdb->version >= 205 &&
918 (IS_GEN9_BC(i915) || IS_GEMINILAKE(i915) ||
919 INTEL_GEN(i915) >= 10)) {
920 switch (psr_table->tp1_wakeup_time) {
922 i915->vbt.psr.tp1_wakeup_time_us = 500;
925 i915->vbt.psr.tp1_wakeup_time_us = 100;
928 i915->vbt.psr.tp1_wakeup_time_us = 0;
931 drm_dbg_kms(&i915->drm,
932 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
933 psr_table->tp1_wakeup_time);
936 i915->vbt.psr.tp1_wakeup_time_us = 2500;
940 switch (psr_table->tp2_tp3_wakeup_time) {
942 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
945 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
948 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
951 drm_dbg_kms(&i915->drm,
952 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
953 psr_table->tp2_tp3_wakeup_time);
956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
960 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
961 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
964 if (bdb->version >= 226) {
965 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
967 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
968 switch (wakeup_time) {
983 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
985 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
986 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
990 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
991 u16 version, enum port port)
993 if (!i915->vbt.dsi.config->dual_link || version < 197) {
994 i915->vbt.dsi.bl_ports = BIT(port);
995 if (i915->vbt.dsi.config->cabc_supported)
996 i915->vbt.dsi.cabc_ports = BIT(port);
1001 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1003 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1006 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1009 case DL_DCS_PORT_A_AND_C:
1010 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1014 if (!i915->vbt.dsi.config->cabc_supported)
1017 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1019 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1022 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1025 case DL_DCS_PORT_A_AND_C:
1026 i915->vbt.dsi.cabc_ports =
1027 BIT(PORT_A) | BIT(PORT_C);
1033 parse_mipi_config(struct drm_i915_private *i915,
1034 const struct bdb_header *bdb)
1036 const struct bdb_mipi_config *start;
1037 const struct mipi_config *config;
1038 const struct mipi_pps_data *pps;
1039 int panel_type = i915->vbt.panel_type;
1042 /* parse MIPI blocks only if LFP type is MIPI */
1043 if (!intel_bios_is_dsi_present(i915, &port))
1046 /* Initialize this to undefined indicating no generic MIPI support */
1047 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1049 /* Block #40 is already parsed and panel_fixed_mode is
1050 * stored in i915->lfp_lvds_vbt_mode
1051 * resuse this when needed
1054 /* Parse #52 for panel index used from panel_type already
1057 start = find_section(bdb, BDB_MIPI_CONFIG);
1059 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1063 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1067 * get hold of the correct configuration block and pps data as per
1068 * the panel_type as index
1070 config = &start->config[panel_type];
1071 pps = &start->pps[panel_type];
1073 /* store as of now full data. Trim when we realise all is not needed */
1074 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1075 if (!i915->vbt.dsi.config)
1078 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1079 if (!i915->vbt.dsi.pps) {
1080 kfree(i915->vbt.dsi.config);
1084 parse_dsi_backlight_ports(i915, bdb->version, port);
1086 /* FIXME is the 90 vs. 270 correct? */
1087 switch (config->rotation) {
1088 case ENABLE_ROTATION_0:
1090 * Most (all?) VBTs claim 0 degrees despite having
1091 * an upside down panel, thus we do not trust this.
1093 i915->vbt.dsi.orientation =
1094 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1096 case ENABLE_ROTATION_90:
1097 i915->vbt.dsi.orientation =
1098 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1100 case ENABLE_ROTATION_180:
1101 i915->vbt.dsi.orientation =
1102 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1104 case ENABLE_ROTATION_270:
1105 i915->vbt.dsi.orientation =
1106 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1110 /* We have mandatory mipi config blocks. Initialize as generic panel */
1111 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1114 /* Find the sequence block and size for the given panel. */
1116 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1117 u16 panel_id, u32 *seq_size)
1119 u32 total = get_blocksize(sequence);
1120 const u8 *data = &sequence->data[0];
1123 int header_size = sequence->version >= 3 ? 5 : 3;
1127 /* skip new block size */
1128 if (sequence->version >= 3)
1131 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1132 if (index + header_size > total) {
1133 DRM_ERROR("Invalid sequence block (header)\n");
1137 current_id = *(data + index);
1138 if (sequence->version >= 3)
1139 current_size = *((const u32 *)(data + index + 1));
1141 current_size = *((const u16 *)(data + index + 1));
1143 index += header_size;
1145 if (index + current_size > total) {
1146 DRM_ERROR("Invalid sequence block\n");
1150 if (current_id == panel_id) {
1151 *seq_size = current_size;
1152 return data + index;
1155 index += current_size;
1158 DRM_ERROR("Sequence block detected but no valid configuration\n");
1163 static int goto_next_sequence(const u8 *data, int index, int total)
1167 /* Skip Sequence Byte. */
1168 for (index = index + 1; index < total; index += len) {
1169 u8 operation_byte = *(data + index);
1172 switch (operation_byte) {
1173 case MIPI_SEQ_ELEM_END:
1175 case MIPI_SEQ_ELEM_SEND_PKT:
1176 if (index + 4 > total)
1179 len = *((const u16 *)(data + index + 2)) + 4;
1181 case MIPI_SEQ_ELEM_DELAY:
1184 case MIPI_SEQ_ELEM_GPIO:
1187 case MIPI_SEQ_ELEM_I2C:
1188 if (index + 7 > total)
1190 len = *(data + index + 6) + 7;
1193 DRM_ERROR("Unknown operation byte\n");
1201 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1205 u32 size_of_sequence;
1208 * Could skip sequence based on Size of Sequence alone, but also do some
1209 * checking on the structure.
1212 DRM_ERROR("Too small sequence size\n");
1216 /* Skip Sequence Byte. */
1220 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1221 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1224 size_of_sequence = *((const u32 *)(data + index));
1227 seq_end = index + size_of_sequence;
1228 if (seq_end > total) {
1229 DRM_ERROR("Invalid sequence size\n");
1233 for (; index < total; index += len) {
1234 u8 operation_byte = *(data + index);
1237 if (operation_byte == MIPI_SEQ_ELEM_END) {
1238 if (index != seq_end) {
1239 DRM_ERROR("Invalid element structure\n");
1245 len = *(data + index);
1249 * FIXME: Would be nice to check elements like for v1/v2 in
1250 * goto_next_sequence() above.
1252 switch (operation_byte) {
1253 case MIPI_SEQ_ELEM_SEND_PKT:
1254 case MIPI_SEQ_ELEM_DELAY:
1255 case MIPI_SEQ_ELEM_GPIO:
1256 case MIPI_SEQ_ELEM_I2C:
1257 case MIPI_SEQ_ELEM_SPI:
1258 case MIPI_SEQ_ELEM_PMIC:
1261 DRM_ERROR("Unknown operation byte %u\n",
1271 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1272 * skip all delay + gpio operands and stop at the first DSI packet op.
1274 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1276 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1279 if (drm_WARN_ON(&i915->drm,
1280 !data || i915->vbt.dsi.seq_version != 1))
1283 /* index = 1 to skip sequence byte */
1284 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1285 switch (data[index]) {
1286 case MIPI_SEQ_ELEM_SEND_PKT:
1287 return index == 1 ? 0 : index;
1288 case MIPI_SEQ_ELEM_DELAY:
1289 len = 5; /* 1 byte for operand + uint32 */
1291 case MIPI_SEQ_ELEM_GPIO:
1292 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1303 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1304 * The deassert must be done before calling intel_dsi_device_ready, so for
1305 * these devices we split the init OTP sequence into a deassert sequence and
1306 * the actual init OTP part.
1308 static void fixup_mipi_sequences(struct drm_i915_private *i915)
1313 /* Limit this to VLV for now. */
1314 if (!IS_VALLEYVIEW(i915))
1317 /* Limit this to v1 vid-mode sequences */
1318 if (i915->vbt.dsi.config->is_cmd_mode ||
1319 i915->vbt.dsi.seq_version != 1)
1322 /* Only do this if there are otp and assert seqs and no deassert seq */
1323 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1324 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1325 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1328 /* The deassert-sequence ends at the first DSI packet */
1329 len = get_init_otp_deassert_fragment_len(i915);
1333 drm_dbg_kms(&i915->drm,
1334 "Using init OTP fragment to deassert reset\n");
1336 /* Copy the fragment, update seq byte and terminate it */
1337 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1338 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1339 if (!i915->vbt.dsi.deassert_seq)
1341 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1342 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1343 /* Use the copy for deassert */
1344 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1345 i915->vbt.dsi.deassert_seq;
1346 /* Replace the last byte of the fragment with init OTP seq byte */
1347 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1348 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1349 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1353 parse_mipi_sequence(struct drm_i915_private *i915,
1354 const struct bdb_header *bdb)
1356 int panel_type = i915->vbt.panel_type;
1357 const struct bdb_mipi_sequence *sequence;
1363 /* Only our generic panel driver uses the sequence block. */
1364 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1367 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1369 drm_dbg_kms(&i915->drm,
1370 "No MIPI Sequence found, parsing complete\n");
1374 /* Fail gracefully for forward incompatible sequence block. */
1375 if (sequence->version >= 4) {
1377 "Unable to parse MIPI Sequence Block v%u\n",
1382 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1385 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1389 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1393 /* Parse the sequences, store pointers to each sequence. */
1395 u8 seq_id = *(data + index);
1396 if (seq_id == MIPI_SEQ_END)
1399 if (seq_id >= MIPI_SEQ_MAX) {
1400 drm_err(&i915->drm, "Unknown sequence %u\n",
1405 /* Log about presence of sequences we won't run. */
1406 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1407 drm_dbg_kms(&i915->drm,
1408 "Unsupported sequence %u\n", seq_id);
1410 i915->vbt.dsi.sequence[seq_id] = data + index;
1412 if (sequence->version >= 3)
1413 index = goto_next_sequence_v3(data, index, seq_size);
1415 index = goto_next_sequence(data, index, seq_size);
1417 drm_err(&i915->drm, "Invalid sequence %u\n",
1423 i915->vbt.dsi.data = data;
1424 i915->vbt.dsi.size = seq_size;
1425 i915->vbt.dsi.seq_version = sequence->version;
1427 fixup_mipi_sequences(i915);
1429 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1434 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1438 parse_compression_parameters(struct drm_i915_private *i915,
1439 const struct bdb_header *bdb)
1441 const struct bdb_compression_parameters *params;
1442 struct display_device_data *devdata;
1443 const struct child_device_config *child;
1447 if (bdb->version < 198)
1450 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1453 if (params->entry_size != sizeof(params->data[0])) {
1454 drm_dbg_kms(&i915->drm,
1455 "VBT: unsupported compression param entry size\n");
1459 block_size = get_blocksize(params);
1460 if (block_size < sizeof(*params)) {
1461 drm_dbg_kms(&i915->drm,
1462 "VBT: expected 16 compression param entries\n");
1467 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1468 child = &devdata->child;
1470 if (!child->compression_enable)
1474 drm_dbg_kms(&i915->drm,
1475 "VBT: compression params not available\n");
1479 if (child->compression_method_cps) {
1480 drm_dbg_kms(&i915->drm,
1481 "VBT: CPS compression not supported\n");
1485 index = child->compression_structure_index;
1487 devdata->dsc = kmemdup(¶ms->data[index],
1488 sizeof(*devdata->dsc), GFP_KERNEL);
1492 static u8 translate_iboost(u8 val)
1494 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1496 if (val >= ARRAY_SIZE(mapping)) {
1497 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1500 return mapping[val];
1503 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1505 const struct ddi_vbt_port_info *info;
1511 for_each_port(port) {
1512 info = &i915->vbt.ddi_port_info[port];
1514 if (info->child && ddc_pin == info->alternate_ddc_pin)
1521 static void sanitize_ddc_pin(struct drm_i915_private *i915,
1524 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1527 p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1531 drm_dbg_kms(&i915->drm,
1532 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1533 "disabling port %c DVI/HDMI support\n",
1534 port_name(port), info->alternate_ddc_pin,
1535 port_name(p), port_name(p));
1538 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1539 * couldn't exist on the shared port. Otherwise they share the same ddc
1540 * pin and system couldn't communicate with them separately.
1542 * Give inverse child device order the priority, last one wins. Yes,
1543 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1544 * port A and port E with the same AUX ch and we must pick port E :(
1546 info = &i915->vbt.ddi_port_info[p];
1548 info->supports_dvi = false;
1549 info->supports_hdmi = false;
1550 info->alternate_ddc_pin = 0;
1553 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1555 const struct ddi_vbt_port_info *info;
1561 for_each_port(port) {
1562 info = &i915->vbt.ddi_port_info[port];
1564 if (info->child && aux_ch == info->alternate_aux_channel)
1571 static void sanitize_aux_ch(struct drm_i915_private *i915,
1574 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1577 p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1581 drm_dbg_kms(&i915->drm,
1582 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1583 "disabling port %c DP support\n",
1584 port_name(port), info->alternate_aux_channel,
1585 port_name(p), port_name(p));
1588 * If we have multiple ports supposedly sharing the aux channel, then DP
1589 * couldn't exist on the shared port. Otherwise they share the same aux
1590 * channel and system couldn't communicate with them separately.
1592 * Give inverse child device order the priority, last one wins. Yes,
1593 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1594 * port A and port E with the same AUX ch and we must pick port E :(
1596 info = &i915->vbt.ddi_port_info[p];
1598 info->supports_dp = false;
1599 info->alternate_aux_channel = 0;
1602 static const u8 cnp_ddc_pin_map[] = {
1604 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1605 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1606 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1607 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1610 static const u8 icp_ddc_pin_map[] = {
1611 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1612 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1613 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1614 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1615 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1616 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1617 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1618 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1619 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1622 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1623 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1624 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1625 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1626 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1629 static const u8 adls_ddc_pin_map[] = {
1630 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1631 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1632 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1633 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1634 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1637 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1638 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1639 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1640 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1643 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1645 const u8 *ddc_pin_map;
1648 if (HAS_PCH_ADP(i915)) {
1649 ddc_pin_map = adls_ddc_pin_map;
1650 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1651 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1653 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1654 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1655 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1656 } else if (HAS_PCH_TGP(i915) && IS_GEN9_BC(i915)) {
1657 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1658 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1659 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1660 ddc_pin_map = icp_ddc_pin_map;
1661 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1662 } else if (HAS_PCH_CNP(i915)) {
1663 ddc_pin_map = cnp_ddc_pin_map;
1664 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1666 /* Assuming direct map */
1670 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1671 return ddc_pin_map[vbt_pin];
1673 drm_dbg_kms(&i915->drm,
1674 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1679 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1680 const int port_mapping[][3], u8 dvo_port)
1685 for (port = PORT_A; port < n_ports; port++) {
1686 for (i = 0; i < n_dvo; i++) {
1687 if (port_mapping[port][i] == -1)
1690 if (dvo_port == port_mapping[port][i])
1698 static enum port dvo_port_to_port(struct drm_i915_private *i915,
1702 * Each DDI port can have more than one value on the "DVO Port" field,
1703 * so look for all the possible values for each port.
1705 static const int port_mapping[][3] = {
1706 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1707 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1708 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1709 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1710 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1711 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1712 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1713 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1714 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1717 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1718 * map to DDI A,B,TC1,TC2 respectively.
1720 static const int rkl_port_mapping[][3] = {
1721 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1722 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1724 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1725 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1728 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1729 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1731 static const int adls_port_mapping[][3] = {
1732 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1735 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1736 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1737 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1738 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1741 if (IS_ALDERLAKE_S(i915))
1742 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1743 ARRAY_SIZE(adls_port_mapping[0]),
1746 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1747 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1748 ARRAY_SIZE(rkl_port_mapping[0]),
1752 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1753 ARRAY_SIZE(port_mapping[0]),
1758 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1760 switch (vbt_max_link_rate) {
1762 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1764 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1766 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1768 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1770 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1772 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1774 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1776 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1781 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1783 switch (vbt_max_link_rate) {
1785 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1787 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1789 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1791 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1796 static void parse_ddi_port(struct drm_i915_private *i915,
1797 struct display_device_data *devdata)
1799 const struct child_device_config *child = &devdata->child;
1800 struct ddi_vbt_port_info *info;
1801 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1804 port = dvo_port_to_port(i915, child->dvo_port);
1805 if (port == PORT_NONE)
1808 info = &i915->vbt.ddi_port_info[port];
1811 drm_dbg_kms(&i915->drm,
1812 "More than one child device for port %c in VBT, using the first.\n",
1817 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1818 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1819 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1820 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1821 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1823 if (port == PORT_A && is_dvi && INTEL_GEN(i915) < 12) {
1824 drm_dbg_kms(&i915->drm,
1825 "VBT claims port A supports DVI%s, ignoring\n",
1826 is_hdmi ? "/HDMI" : "");
1831 info->supports_dvi = is_dvi;
1832 info->supports_hdmi = is_hdmi;
1833 info->supports_dp = is_dp;
1834 info->supports_edp = is_edp;
1836 if (i915->vbt.version >= 195)
1837 info->supports_typec_usb = child->dp_usb_type_c;
1839 if (i915->vbt.version >= 209)
1840 info->supports_tbt = child->tbt;
1842 drm_dbg_kms(&i915->drm,
1843 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1844 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1845 HAS_LSPCON(i915) && child->lspcon,
1846 info->supports_typec_usb, info->supports_tbt,
1847 devdata->dsc != NULL);
1852 ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1853 if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1854 info->alternate_ddc_pin = ddc_pin;
1855 sanitize_ddc_pin(i915, port);
1857 drm_dbg_kms(&i915->drm,
1858 "Port %c has invalid DDC pin %d, "
1859 "sticking to defaults\n",
1860 port_name(port), ddc_pin);
1865 info->alternate_aux_channel = child->aux_channel;
1867 sanitize_aux_ch(i915, port);
1870 if (i915->vbt.version >= 158) {
1871 /* The VBT HDMI level shift values match the table we have. */
1872 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1873 drm_dbg_kms(&i915->drm,
1874 "Port %c VBT HDMI level shift: %d\n",
1877 info->hdmi_level_shift = hdmi_level_shift;
1878 info->hdmi_level_shift_set = true;
1881 if (i915->vbt.version >= 204) {
1884 switch (child->hdmi_max_data_rate) {
1886 MISSING_CASE(child->hdmi_max_data_rate);
1888 case HDMI_MAX_DATA_RATE_PLATFORM:
1891 case HDMI_MAX_DATA_RATE_297:
1892 max_tmds_clock = 297000;
1894 case HDMI_MAX_DATA_RATE_165:
1895 max_tmds_clock = 165000;
1900 drm_dbg_kms(&i915->drm,
1901 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
1902 port_name(port), max_tmds_clock);
1903 info->max_tmds_clock = max_tmds_clock;
1906 /* Parse the I_boost config for SKL and above */
1907 if (i915->vbt.version >= 196 && child->iboost) {
1908 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1909 drm_dbg_kms(&i915->drm,
1910 "Port %c VBT (e)DP boost level: %d\n",
1911 port_name(port), info->dp_boost_level);
1912 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1913 drm_dbg_kms(&i915->drm,
1914 "Port %c VBT HDMI boost level: %d\n",
1915 port_name(port), info->hdmi_boost_level);
1918 /* DP max link rate for CNL+ */
1919 if (i915->vbt.version >= 216) {
1920 if (i915->vbt.version >= 230)
1921 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
1923 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
1925 drm_dbg_kms(&i915->drm,
1926 "Port %c VBT DP max link rate: %d\n",
1927 port_name(port), info->dp_max_link_rate);
1930 info->child = child;
1933 static void parse_ddi_ports(struct drm_i915_private *i915)
1935 struct display_device_data *devdata;
1937 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
1940 if (i915->vbt.version < 155)
1943 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
1944 parse_ddi_port(i915, devdata);
1948 parse_general_definitions(struct drm_i915_private *i915,
1949 const struct bdb_header *bdb)
1951 const struct bdb_general_definitions *defs;
1952 struct display_device_data *devdata;
1953 const struct child_device_config *child;
1954 int i, child_device_num;
1959 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1961 drm_dbg_kms(&i915->drm,
1962 "No general definition block is found, no devices defined.\n");
1966 block_size = get_blocksize(defs);
1967 if (block_size < sizeof(*defs)) {
1968 drm_dbg_kms(&i915->drm,
1969 "General definitions block too small (%u)\n",
1974 bus_pin = defs->crt_ddc_gmbus_pin;
1975 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1976 if (intel_gmbus_is_valid_pin(i915, bus_pin))
1977 i915->vbt.crt_ddc_pin = bus_pin;
1979 if (bdb->version < 106) {
1981 } else if (bdb->version < 111) {
1983 } else if (bdb->version < 195) {
1984 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1985 } else if (bdb->version == 195) {
1987 } else if (bdb->version <= 215) {
1989 } else if (bdb->version <= 237) {
1992 expected_size = sizeof(*child);
1993 BUILD_BUG_ON(sizeof(*child) < 39);
1995 "Expected child device config size for VBT version %u not known; assuming %u\n",
1996 bdb->version, expected_size);
1999 /* Flag an error for unexpected size, but continue anyway. */
2000 if (defs->child_dev_size != expected_size)
2002 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2003 defs->child_dev_size, expected_size, bdb->version);
2005 /* The legacy sized child device config is the minimum we need. */
2006 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2007 drm_dbg_kms(&i915->drm,
2008 "Child device config size %u is too small.\n",
2009 defs->child_dev_size);
2013 /* get the number of child device */
2014 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2016 for (i = 0; i < child_device_num; i++) {
2017 child = child_device_ptr(defs, i);
2018 if (!child->device_type)
2021 drm_dbg_kms(&i915->drm,
2022 "Found VBT child device with type 0x%x\n",
2023 child->device_type);
2025 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2030 * Copy as much as we know (sizeof) and is available
2031 * (child_dev_size) of the child device config. Accessing the
2032 * data must depend on VBT version.
2034 memcpy(&devdata->child, child,
2035 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2037 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2040 if (list_empty(&i915->vbt.display_devices))
2041 drm_dbg_kms(&i915->drm,
2042 "no child dev is parsed from VBT\n");
2045 /* Common defaults which may be overridden by VBT. */
2047 init_vbt_defaults(struct drm_i915_private *i915)
2049 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2051 /* Default to having backlight */
2052 i915->vbt.backlight.present = true;
2054 /* LFP panel data */
2055 i915->vbt.lvds_dither = 1;
2057 /* SDVO panel data */
2058 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2060 /* general features */
2061 i915->vbt.int_tv_support = 1;
2062 i915->vbt.int_crt_support = 1;
2064 /* driver features */
2065 i915->vbt.int_lvds_support = 1;
2067 /* Default to using SSC */
2068 i915->vbt.lvds_use_ssc = 1;
2070 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2073 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2074 !HAS_PCH_SPLIT(i915));
2075 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2076 i915->vbt.lvds_ssc_freq);
2079 /* Defaults to initialize only if there is no VBT. */
2081 init_vbt_missing_defaults(struct drm_i915_private *i915)
2084 int ports = PORT_A | PORT_B | PORT_C | PORT_D | PORT_E | PORT_F;
2086 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2089 for_each_port_masked(port, ports) {
2090 struct ddi_vbt_port_info *info =
2091 &i915->vbt.ddi_port_info[port];
2092 enum phy phy = intel_port_to_phy(i915, port);
2095 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2098 if (intel_phy_is_tc(i915, phy))
2101 info->supports_dvi = (port != PORT_A && port != PORT_E);
2102 info->supports_hdmi = info->supports_dvi;
2103 info->supports_dp = (port != PORT_E);
2104 info->supports_edp = (port == PORT_A);
2108 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2110 const void *_vbt = vbt;
2112 return _vbt + vbt->bdb_offset;
2116 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2117 * @buf: pointer to a buffer to validate
2118 * @size: size of the buffer
2120 * Returns true on valid VBT.
2122 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2124 const struct vbt_header *vbt = buf;
2125 const struct bdb_header *bdb;
2130 if (sizeof(struct vbt_header) > size) {
2131 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2135 if (memcmp(vbt->signature, "$VBT", 4)) {
2136 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2140 if (vbt->vbt_size > size) {
2141 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2145 size = vbt->vbt_size;
2147 if (range_overflows_t(size_t,
2149 sizeof(struct bdb_header),
2151 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2155 bdb = get_bdb_header(vbt);
2156 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2157 DRM_DEBUG_DRIVER("BDB incomplete\n");
2164 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2166 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2167 void __iomem *p = NULL, *oprom;
2168 struct vbt_header *vbt;
2172 oprom = pci_map_rom(pdev, &size);
2176 /* Scour memory looking for the VBT signature. */
2177 for (i = 0; i + 4 < size; i += 4) {
2178 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2187 goto err_unmap_oprom;
2189 if (sizeof(struct vbt_header) > size) {
2190 drm_dbg(&i915->drm, "VBT header incomplete\n");
2191 goto err_unmap_oprom;
2194 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2195 if (vbt_size > size) {
2197 "VBT incomplete (vbt_size overflows)\n");
2198 goto err_unmap_oprom;
2201 /* The rest will be validated by intel_bios_is_valid_vbt() */
2202 vbt = kmalloc(vbt_size, GFP_KERNEL);
2204 goto err_unmap_oprom;
2206 memcpy_fromio(vbt, p, vbt_size);
2208 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2211 pci_unmap_rom(pdev, oprom);
2218 pci_unmap_rom(pdev, oprom);
2224 * intel_bios_init - find VBT and initialize settings from the BIOS
2225 * @i915: i915 device instance
2227 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2228 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2229 * initialize some defaults if the VBT is not present at all.
2231 void intel_bios_init(struct drm_i915_private *i915)
2233 const struct vbt_header *vbt = i915->opregion.vbt;
2234 struct vbt_header *oprom_vbt = NULL;
2235 const struct bdb_header *bdb;
2237 INIT_LIST_HEAD(&i915->vbt.display_devices);
2239 if (!HAS_DISPLAY(i915)) {
2240 drm_dbg_kms(&i915->drm,
2241 "Skipping VBT init due to disabled display.\n");
2245 init_vbt_defaults(i915);
2247 /* If the OpRegion does not have VBT, look in PCI ROM. */
2249 oprom_vbt = oprom_get_vbt(i915);
2255 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2258 bdb = get_bdb_header(vbt);
2259 i915->vbt.version = bdb->version;
2261 drm_dbg_kms(&i915->drm,
2262 "VBT signature \"%.*s\", BDB version %d\n",
2263 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2265 /* Grab useful general definitions */
2266 parse_general_features(i915, bdb);
2267 parse_general_definitions(i915, bdb);
2268 parse_panel_options(i915, bdb);
2269 parse_panel_dtd(i915, bdb);
2270 parse_lfp_backlight(i915, bdb);
2271 parse_sdvo_panel_data(i915, bdb);
2272 parse_driver_features(i915, bdb);
2273 parse_power_conservation_features(i915, bdb);
2274 parse_edp(i915, bdb);
2275 parse_psr(i915, bdb);
2276 parse_mipi_config(i915, bdb);
2277 parse_mipi_sequence(i915, bdb);
2279 /* Depends on child device list */
2280 parse_compression_parameters(i915, bdb);
2282 /* Further processing on pre-parsed data */
2283 parse_sdvo_device_mapping(i915);
2284 parse_ddi_ports(i915);
2288 drm_info(&i915->drm,
2289 "Failed to find VBIOS tables (VBT)\n");
2290 init_vbt_missing_defaults(i915);
2297 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2298 * @i915: i915 device instance
2300 void intel_bios_driver_remove(struct drm_i915_private *i915)
2302 struct display_device_data *devdata, *n;
2304 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2305 list_del(&devdata->node);
2306 kfree(devdata->dsc);
2310 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2311 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2312 kfree(i915->vbt.lfp_lvds_vbt_mode);
2313 i915->vbt.lfp_lvds_vbt_mode = NULL;
2314 kfree(i915->vbt.dsi.data);
2315 i915->vbt.dsi.data = NULL;
2316 kfree(i915->vbt.dsi.pps);
2317 i915->vbt.dsi.pps = NULL;
2318 kfree(i915->vbt.dsi.config);
2319 i915->vbt.dsi.config = NULL;
2320 kfree(i915->vbt.dsi.deassert_seq);
2321 i915->vbt.dsi.deassert_seq = NULL;
2325 * intel_bios_is_tv_present - is integrated TV present in VBT
2326 * @i915: i915 device instance
2328 * Return true if TV is present. If no child devices were parsed from VBT,
2329 * assume TV is present.
2331 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2333 const struct display_device_data *devdata;
2334 const struct child_device_config *child;
2336 if (!i915->vbt.int_tv_support)
2339 if (list_empty(&i915->vbt.display_devices))
2342 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2343 child = &devdata->child;
2346 * If the device type is not TV, continue.
2348 switch (child->device_type) {
2349 case DEVICE_TYPE_INT_TV:
2350 case DEVICE_TYPE_TV:
2351 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2356 /* Only when the addin_offset is non-zero, it is regarded
2359 if (child->addin_offset)
2367 * intel_bios_is_lvds_present - is LVDS present in VBT
2368 * @i915: i915 device instance
2369 * @i2c_pin: i2c pin for LVDS if present
2371 * Return true if LVDS is present. If no child devices were parsed from VBT,
2372 * assume LVDS is present.
2374 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2376 const struct display_device_data *devdata;
2377 const struct child_device_config *child;
2379 if (list_empty(&i915->vbt.display_devices))
2382 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2383 child = &devdata->child;
2385 /* If the device type is not LFP, continue.
2386 * We have to check both the new identifiers as well as the
2387 * old for compatibility with some BIOSes.
2389 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2390 child->device_type != DEVICE_TYPE_LFP)
2393 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2394 *i2c_pin = child->i2c_pin;
2396 /* However, we cannot trust the BIOS writers to populate
2397 * the VBT correctly. Since LVDS requires additional
2398 * information from AIM blocks, a non-zero addin offset is
2399 * a good indicator that the LVDS is actually present.
2401 if (child->addin_offset)
2404 /* But even then some BIOS writers perform some black magic
2405 * and instantiate the device without reference to any
2406 * additional data. Trust that if the VBT was written into
2407 * the OpRegion then they have validated the LVDS's existence.
2409 if (i915->opregion.vbt)
2417 * intel_bios_is_port_present - is the specified digital port present
2418 * @i915: i915 device instance
2419 * @port: port to check
2421 * Return true if the device in %port is present.
2423 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2425 const struct display_device_data *devdata;
2426 const struct child_device_config *child;
2427 static const struct {
2429 } port_mapping[] = {
2430 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2431 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2432 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2433 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2434 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2437 if (HAS_DDI(i915)) {
2438 const struct ddi_vbt_port_info *port_info =
2439 &i915->vbt.ddi_port_info[port];
2441 return port_info->child;
2444 /* FIXME maybe deal with port A as well? */
2445 if (drm_WARN_ON(&i915->drm,
2446 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2449 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2450 child = &devdata->child;
2452 if ((child->dvo_port == port_mapping[port].dp ||
2453 child->dvo_port == port_mapping[port].hdmi) &&
2454 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2455 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2463 * intel_bios_is_port_edp - is the device in given port eDP
2464 * @i915: i915 device instance
2465 * @port: port to check
2467 * Return true if the device in %port is eDP.
2469 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2471 const struct display_device_data *devdata;
2472 const struct child_device_config *child;
2473 static const short port_mapping[] = {
2474 [PORT_B] = DVO_PORT_DPB,
2475 [PORT_C] = DVO_PORT_DPC,
2476 [PORT_D] = DVO_PORT_DPD,
2477 [PORT_E] = DVO_PORT_DPE,
2478 [PORT_F] = DVO_PORT_DPF,
2482 return i915->vbt.ddi_port_info[port].supports_edp;
2484 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2485 child = &devdata->child;
2487 if (child->dvo_port == port_mapping[port] &&
2488 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2489 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2496 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2499 static const struct {
2501 } port_mapping[] = {
2503 * Buggy VBTs may declare DP ports as having
2504 * HDMI type dvo_port :( So let's check both.
2506 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2507 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2508 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2509 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2510 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2513 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2516 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2517 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2520 if (child->dvo_port == port_mapping[port].dp)
2523 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2524 if (child->dvo_port == port_mapping[port].hdmi &&
2525 child->aux_channel != 0)
2531 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2534 const struct display_device_data *devdata;
2536 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2537 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2545 * intel_bios_is_dsi_present - is DSI present in VBT
2546 * @i915: i915 device instance
2547 * @port: port for DSI if present
2549 * Return true if DSI is present, and return the port in %port.
2551 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2554 const struct display_device_data *devdata;
2555 const struct child_device_config *child;
2558 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2559 child = &devdata->child;
2561 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2564 dvo_port = child->dvo_port;
2566 if (dvo_port == DVO_PORT_MIPIA ||
2567 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(i915) >= 11) ||
2568 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(i915) < 11)) {
2570 *port = dvo_port - DVO_PORT_MIPIA;
2572 } else if (dvo_port == DVO_PORT_MIPIB ||
2573 dvo_port == DVO_PORT_MIPIC ||
2574 dvo_port == DVO_PORT_MIPID) {
2575 drm_dbg_kms(&i915->drm,
2576 "VBT has unsupported DSI port %c\n",
2577 port_name(dvo_port - DVO_PORT_MIPIA));
2584 static void fill_dsc(struct intel_crtc_state *crtc_state,
2585 struct dsc_compression_parameters_entry *dsc,
2588 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2591 vdsc_cfg->dsc_version_major = dsc->version_major;
2592 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2594 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2596 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2598 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2601 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2604 crtc_state->pipe_bpp = bpc * 3;
2606 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2607 VBT_DSC_MAX_BPP(dsc->max_bpp));
2610 * FIXME: This is ugly, and slice count should take DSC engine
2611 * throughput etc. into account.
2613 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2615 if (dsc->slices_per_line & BIT(2)) {
2616 crtc_state->dsc.slice_count = 4;
2617 } else if (dsc->slices_per_line & BIT(1)) {
2618 crtc_state->dsc.slice_count = 2;
2621 if (!(dsc->slices_per_line & BIT(0)))
2622 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2624 crtc_state->dsc.slice_count = 1;
2627 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2628 crtc_state->dsc.slice_count != 0)
2629 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2630 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2631 crtc_state->dsc.slice_count);
2634 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2635 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2637 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2638 dsc->rc_buffer_size);
2640 /* FIXME: DSI spec says bpc + 1 for this one */
2641 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2643 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2645 vdsc_cfg->slice_height = dsc->slice_height;
2648 /* FIXME: initially DSI specific */
2649 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2650 struct intel_crtc_state *crtc_state,
2653 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2654 const struct display_device_data *devdata;
2655 const struct child_device_config *child;
2657 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2658 child = &devdata->child;
2660 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2663 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2668 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2678 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2679 * @i915: i915 device instance
2680 * @port: port to check
2682 * Return true if HPD should be inverted for %port.
2685 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2688 const struct child_device_config *child =
2689 i915->vbt.ddi_port_info[port].child;
2691 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2694 return child && child->hpd_invert;
2698 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2699 * @i915: i915 device instance
2700 * @port: port to check
2702 * Return true if LSPCON is present on this port
2705 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2708 const struct child_device_config *child =
2709 i915->vbt.ddi_port_info[port].child;
2711 return HAS_LSPCON(i915) && child && child->lspcon;
2715 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2716 * @i915: i915 device instance
2717 * @port: port to check
2719 * Return true if port requires lane reversal
2722 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2725 const struct child_device_config *child =
2726 i915->vbt.ddi_port_info[port].child;
2728 return child && child->lane_reversal;
2731 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2734 const struct ddi_vbt_port_info *info =
2735 &i915->vbt.ddi_port_info[port];
2738 if (!info->alternate_aux_channel) {
2739 aux_ch = (enum aux_ch)port;
2741 drm_dbg_kms(&i915->drm,
2742 "using AUX %c for port %c (platform default)\n",
2743 aux_ch_name(aux_ch), port_name(port));
2748 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2749 * map to DDI A,B,TC1,TC2 respectively.
2751 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2752 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2754 switch (info->alternate_aux_channel) {
2759 if (IS_ALDERLAKE_S(i915))
2760 aux_ch = AUX_CH_USBC1;
2765 if (IS_ALDERLAKE_S(i915))
2766 aux_ch = AUX_CH_USBC2;
2767 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2768 aux_ch = AUX_CH_USBC1;
2773 if (IS_ALDERLAKE_S(i915))
2774 aux_ch = AUX_CH_USBC3;
2775 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2776 aux_ch = AUX_CH_USBC2;
2781 if (IS_ALDERLAKE_S(i915))
2782 aux_ch = AUX_CH_USBC4;
2799 MISSING_CASE(info->alternate_aux_channel);
2804 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
2805 aux_ch_name(aux_ch), port_name(port));
2810 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2812 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2814 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2817 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2819 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2820 const struct ddi_vbt_port_info *info =
2821 &i915->vbt.ddi_port_info[encoder->port];
2823 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2826 int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2828 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2830 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2833 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2835 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2837 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2840 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2842 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2844 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2847 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2849 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2851 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2854 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2856 return i915->vbt.ddi_port_info[port].supports_dvi;
2859 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2861 return i915->vbt.ddi_port_info[port].supports_hdmi;
2864 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2866 return i915->vbt.ddi_port_info[port].supports_dp;
2869 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2872 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2875 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2877 return i915->vbt.ddi_port_info[port].supports_tbt;