2 * Copyright 2015 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
37 enum dce_version resource_parse_asic_id(
38 struct hw_asic_id asic_id);
40 struct resource_caps {
41 int num_timing_generator;
45 int num_stream_encoder;
51 unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
55 struct resource_straps {
56 uint32_t hdmi_disable;
57 uint32_t dc_pinstraps_audio;
58 uint32_t audio_stream_number;
61 struct resource_create_funcs {
62 void (*read_dce_straps)(
63 struct dc_context *ctx, struct resource_straps *straps);
65 struct audio *(*create_audio)(
66 struct dc_context *ctx, unsigned int inst);
68 struct stream_encoder *(*create_stream_encoder)(
69 enum engine_id eng_id, struct dc_context *ctx);
71 struct dce_hwseq *(*create_hwseq)(
72 struct dc_context *ctx);
75 bool resource_construct(
76 unsigned int num_virtual_links,
78 struct resource_pool *pool,
79 const struct resource_create_funcs *create_funcs);
81 struct resource_pool *dc_create_resource_pool(struct dc *dc,
82 const struct dc_init_data *init_data,
83 enum dce_version dc_version);
85 void dc_destroy_resource_pool(struct dc *dc);
87 enum dc_status resource_map_pool_resources(
89 struct dc_state *context,
90 struct dc_stream_state *stream);
92 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
94 enum dc_status resource_build_scaling_params_for_context(
96 struct dc_state *context);
98 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
100 void resource_unreference_clock_source(
101 struct resource_context *res_ctx,
102 const struct resource_pool *pool,
103 struct clock_source *clock_source);
105 void resource_reference_clock_source(
106 struct resource_context *res_ctx,
107 const struct resource_pool *pool,
108 struct clock_source *clock_source);
110 int resource_get_clock_source_reference(
111 struct resource_context *res_ctx,
112 const struct resource_pool *pool,
113 struct clock_source *clock_source);
115 bool resource_are_streams_timing_synchronizable(
116 struct dc_stream_state *stream1,
117 struct dc_stream_state *stream2);
119 bool resource_are_vblanks_synchronizable(
120 struct dc_stream_state *stream1,
121 struct dc_stream_state *stream2);
123 struct clock_source *resource_find_used_clk_src_for_sharing(
124 struct resource_context *res_ctx,
125 struct pipe_ctx *pipe_ctx);
127 struct clock_source *dc_resource_find_first_free_pll(
128 struct resource_context *res_ctx,
129 const struct resource_pool *pool);
131 struct pipe_ctx *resource_get_head_pipe_for_stream(
132 struct resource_context *res_ctx,
133 struct dc_stream_state *stream);
135 bool resource_attach_surfaces_to_context(
136 struct dc_plane_state *const *plane_state,
138 struct dc_stream_state *dc_stream,
139 struct dc_state *context,
140 const struct resource_pool *pool);
142 struct pipe_ctx *find_idle_secondary_pipe(
143 struct resource_context *res_ctx,
144 const struct resource_pool *pool,
145 const struct pipe_ctx *primary_pipe);
147 bool resource_validate_attach_surfaces(
148 const struct dc_validation_set set[],
150 const struct dc_state *old_context,
151 struct dc_state *context,
152 const struct resource_pool *pool);
154 void resource_validate_ctx_update_pointer_after_copy(
155 const struct dc_state *src_ctx,
156 struct dc_state *dst_ctx);
158 enum dc_status resource_map_clock_resources(
160 struct dc_state *context,
161 struct dc_stream_state *stream);
163 enum dc_status resource_map_phy_clock_resources(
165 struct dc_state *context,
166 struct dc_stream_state *stream);
168 bool pipe_need_reprogram(
169 struct pipe_ctx *pipe_ctx_old,
170 struct pipe_ctx *pipe_ctx);
172 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
173 struct bit_depth_reduction_params *fmt_bit_depth);
175 void update_audio_usage(
176 struct resource_context *res_ctx,
177 const struct resource_pool *pool,
181 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
183 void get_audio_check(struct audio_info *aud_modes,
184 struct audio_check *aud_chk);
186 int get_num_mpc_splits(struct pipe_ctx *pipe);
188 int get_num_odm_splits(struct pipe_ctx *pipe);
190 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */