1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/slab.h>
26 #include <linux/list.h>
27 #include "kfd_device_queue_manager.h"
29 #include "kfd_kernel_queue.h"
30 #include "amdgpu_amdkfd.h"
32 static inline struct process_queue_node *get_queue_by_qid(
33 struct process_queue_manager *pqm, unsigned int qid)
35 struct process_queue_node *pqn;
37 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
38 if ((pqn->q && pqn->q->properties.queue_id == qid) ||
39 (pqn->kq && pqn->kq->queue->properties.queue_id == qid))
46 static int assign_queue_slot_by_qid(struct process_queue_manager *pqm,
49 if (qid >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
52 if (__test_and_set_bit(qid, pqm->queue_slot_bitmap)) {
53 pr_err("Cannot create new queue because requested qid(%u) is in use\n", qid);
60 static int find_available_queue_slot(struct process_queue_manager *pqm,
65 found = find_first_zero_bit(pqm->queue_slot_bitmap,
66 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
68 pr_debug("The new slot id %lu\n", found);
70 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) {
71 pr_info("Cannot open more queues for process with pasid 0x%x\n",
76 set_bit(found, pqm->queue_slot_bitmap);
82 void kfd_process_dequeue_from_device(struct kfd_process_device *pdd)
84 struct kfd_node *dev = pdd->dev;
86 if (pdd->already_dequeued)
89 dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd);
90 if (dev->kfd->shared_resources.enable_mes)
91 amdgpu_mes_flush_shader_debugger(dev->adev, pdd->proc_ctx_gpu_addr);
92 pdd->already_dequeued = true;
95 int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
98 struct kfd_node *dev = NULL;
99 struct process_queue_node *pqn;
100 struct kfd_process_device *pdd;
101 struct kgd_mem *mem = NULL;
104 pqn = get_queue_by_qid(pqm, qid);
106 pr_err("Queue id does not match any known queue\n");
111 dev = pqn->q->device;
115 pdd = kfd_get_process_device_data(dev, pqm->process);
117 pr_err("Process device data doesn't exist\n");
121 /* Only allow one queue per process can have GWS assigned */
122 if (gws && pdd->qpd.num_gws)
125 if (!gws && pdd->qpd.num_gws == 0)
128 if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3) && !dev->kfd->shared_resources.enable_mes) {
130 ret = amdgpu_amdkfd_add_gws_to_process(pdd->process->kgd_process_info,
133 ret = amdgpu_amdkfd_remove_gws_from_process(pdd->process->kgd_process_info,
140 * Intentionally set GWS to a non-NULL value
141 * for devices that do not use GWS for global wave
142 * synchronization but require the formality
143 * of setting GWS for cooperative groups.
145 pqn->q->gws = gws ? ERR_PTR(-ENOMEM) : NULL;
148 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;
150 return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
154 void kfd_process_dequeue_from_all_devices(struct kfd_process *p)
158 for (i = 0; i < p->n_pdds; i++)
159 kfd_process_dequeue_from_device(p->pdds[i]);
162 int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p)
164 INIT_LIST_HEAD(&pqm->queues);
165 pqm->queue_slot_bitmap = bitmap_zalloc(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS,
167 if (!pqm->queue_slot_bitmap)
174 static void pqm_clean_queue_resource(struct process_queue_manager *pqm,
175 struct process_queue_node *pqn)
177 struct kfd_node *dev;
178 struct kfd_process_device *pdd;
180 dev = pqn->q->device;
182 pdd = kfd_get_process_device_data(dev, pqm->process);
184 pr_err("Process device data doesn't exist\n");
189 if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) &&
190 !dev->kfd->shared_resources.enable_mes)
191 amdgpu_amdkfd_remove_gws_from_process(
192 pqm->process->kgd_process_info, pqn->q->gws);
193 pdd->qpd.num_gws = 0;
196 if (dev->kfd->shared_resources.enable_mes) {
197 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo);
199 amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo);
203 void pqm_uninit(struct process_queue_manager *pqm)
205 struct process_queue_node *pqn, *next;
207 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) {
209 pqm_clean_queue_resource(pqm, pqn);
211 kfd_procfs_del_queue(pqn->q);
212 uninit_queue(pqn->q);
213 list_del(&pqn->process_queue_list);
217 bitmap_free(pqm->queue_slot_bitmap);
218 pqm->queue_slot_bitmap = NULL;
221 static int init_user_queue(struct process_queue_manager *pqm,
222 struct kfd_node *dev, struct queue **q,
223 struct queue_properties *q_properties,
224 struct file *f, struct amdgpu_bo *wptr_bo,
229 /* Doorbell initialized in user space*/
230 q_properties->doorbell_ptr = NULL;
231 q_properties->exception_status = KFD_EC_MASK(EC_QUEUE_NEW);
233 /* let DQM handle it*/
234 q_properties->vmid = 0;
235 q_properties->queue_id = qid;
237 retval = init_queue(q, q_properties);
242 (*q)->process = pqm->process;
244 if (dev->kfd->shared_resources.enable_mes) {
245 retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev,
246 AMDGPU_MES_GANG_CTX_SIZE,
248 &(*q)->gang_ctx_gpu_addr,
249 &(*q)->gang_ctx_cpu_ptr,
252 pr_err("failed to allocate gang context bo\n");
255 memset((*q)->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
256 (*q)->wptr_bo = wptr_bo;
259 pr_debug("PQM After init queue");
268 int pqm_create_queue(struct process_queue_manager *pqm,
269 struct kfd_node *dev,
271 struct queue_properties *properties,
273 struct amdgpu_bo *wptr_bo,
274 const struct kfd_criu_queue_priv_data *q_data,
275 const void *restore_mqd,
276 const void *restore_ctl_stack,
277 uint32_t *p_doorbell_offset_in_process)
280 struct kfd_process_device *pdd;
282 struct process_queue_node *pqn;
283 struct kernel_queue *kq;
284 enum kfd_queue_type type = properties->type;
285 unsigned int max_queues = 127; /* HWS limit */
288 * On GFX 9.4.3, increase the number of queues that
289 * can be created to 255. No HWS limit on GFX 9.4.3.
291 if (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3))
297 pdd = kfd_get_process_device_data(dev, pqm->process);
299 pr_err("Process device data doesn't exist\n");
304 * for debug process, verify that it is within the static queues limit
305 * currently limit is set to half of the total avail HQD slots
306 * If we are just about to create DIQ, the is_debug flag is not set yet
307 * Hence we also check the type as well
309 if ((pdd->qpd.is_debug) || (type == KFD_QUEUE_TYPE_DIQ))
310 max_queues = dev->kfd->device_info.max_no_of_hqd/2;
312 if (pdd->qpd.queue_count >= max_queues)
316 retval = assign_queue_slot_by_qid(pqm, q_data->q_id);
319 retval = find_available_queue_slot(pqm, qid);
324 if (list_empty(&pdd->qpd.queues_list) &&
325 list_empty(&pdd->qpd.priv_queue_list))
326 dev->dqm->ops.register_process(dev->dqm, &pdd->qpd);
328 pqn = kzalloc(sizeof(*pqn), GFP_KERNEL);
331 goto err_allocate_pqn;
335 case KFD_QUEUE_TYPE_SDMA:
336 case KFD_QUEUE_TYPE_SDMA_XGMI:
337 /* SDMA queues are always allocated statically no matter
338 * which scheduler mode is used. We also do not need to
339 * check whether a SDMA queue can be allocated here, because
340 * allocate_sdma_queue() in create_queue() has the
341 * corresponding check logic.
343 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid);
345 goto err_create_queue;
348 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,
349 restore_mqd, restore_ctl_stack);
353 case KFD_QUEUE_TYPE_COMPUTE:
354 /* check if there is over subscription */
355 if ((dev->dqm->sched_policy ==
356 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION) &&
357 ((dev->dqm->processes_count >= dev->vm_info.vmid_num_kfd) ||
358 (dev->dqm->active_queue_count >= get_cp_queues_num(dev->dqm)))) {
359 pr_debug("Over-subscription is not allowed when amdkfd.sched_policy == 1\n");
361 goto err_create_queue;
364 retval = init_user_queue(pqm, dev, &q, properties, f, wptr_bo, *qid);
366 goto err_create_queue;
369 retval = dev->dqm->ops.create_queue(dev->dqm, q, &pdd->qpd, q_data,
370 restore_mqd, restore_ctl_stack);
373 case KFD_QUEUE_TYPE_DIQ:
374 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_DIQ);
377 goto err_create_queue;
379 kq->queue->properties.queue_id = *qid;
382 retval = kfd_process_drain_interrupts(pdd);
386 retval = dev->dqm->ops.create_kernel_queue(dev->dqm,
390 WARN(1, "Invalid queue type %d", type);
395 pr_err("Pasid 0x%x DQM create queue type %d failed. ret %d\n",
396 pqm->process->pasid, type, retval);
397 goto err_create_queue;
400 if (q && p_doorbell_offset_in_process) {
401 /* Return the doorbell offset within the doorbell page
402 * to the caller so it can be passed up to user mode
404 * relative doorbell index = Absolute doorbell index -
405 * absolute index of first doorbell in the page.
407 uint32_t first_db_index = amdgpu_doorbell_index_on_bar(pdd->dev->adev,
408 pdd->qpd.proc_doorbells,
410 pdd->dev->kfd->device_info.doorbell_size);
412 *p_doorbell_offset_in_process = (q->properties.doorbell_off
413 - first_db_index) * sizeof(uint32_t);
416 pr_debug("PQM After DQM create queue\n");
418 list_add(&pqn->process_queue_list, &pqm->queues);
421 pr_debug("PQM done creating queue\n");
422 kfd_procfs_add_queue(q);
423 print_queue_properties(&q->properties);
431 kernel_queue_uninit(kq, false);
434 /* check if queues list is empty unregister process from device */
435 clear_bit(*qid, pqm->queue_slot_bitmap);
436 if (list_empty(&pdd->qpd.queues_list) &&
437 list_empty(&pdd->qpd.priv_queue_list))
438 dev->dqm->ops.unregister_process(dev->dqm, &pdd->qpd);
442 int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid)
444 struct process_queue_node *pqn;
445 struct kfd_process_device *pdd;
446 struct device_queue_manager *dqm;
447 struct kfd_node *dev;
454 pqn = get_queue_by_qid(pqm, qid);
456 pr_err("Queue id does not match any known queue\n");
464 dev = pqn->q->device;
468 pdd = kfd_get_process_device_data(dev, pqm->process);
470 pr_err("Process device data doesn't exist\n");
475 /* destroy kernel queue (DIQ) */
476 dqm = pqn->kq->dev->dqm;
477 dqm->ops.destroy_kernel_queue(dqm, pqn->kq, &pdd->qpd);
478 kernel_queue_uninit(pqn->kq, false);
482 kfd_procfs_del_queue(pqn->q);
483 dqm = pqn->q->device->dqm;
484 retval = dqm->ops.destroy_queue(dqm, &pdd->qpd, pqn->q);
486 pr_err("Pasid 0x%x destroy queue %d failed, ret %d\n",
488 pqn->q->properties.queue_id, retval);
489 if (retval != -ETIME)
490 goto err_destroy_queue;
493 pqm_clean_queue_resource(pqm, pqn);
494 uninit_queue(pqn->q);
497 list_del(&pqn->process_queue_list);
499 clear_bit(qid, pqm->queue_slot_bitmap);
501 if (list_empty(&pdd->qpd.queues_list) &&
502 list_empty(&pdd->qpd.priv_queue_list))
503 dqm->ops.unregister_process(dqm, &pdd->qpd);
509 int pqm_update_queue_properties(struct process_queue_manager *pqm,
510 unsigned int qid, struct queue_properties *p)
513 struct process_queue_node *pqn;
515 pqn = get_queue_by_qid(pqm, qid);
517 pr_debug("No queue %d exists for update operation\n", qid);
521 pqn->q->properties.queue_address = p->queue_address;
522 pqn->q->properties.queue_size = p->queue_size;
523 pqn->q->properties.queue_percent = p->queue_percent;
524 pqn->q->properties.priority = p->priority;
525 pqn->q->properties.pm4_target_xcc = p->pm4_target_xcc;
527 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
535 int pqm_update_mqd(struct process_queue_manager *pqm,
536 unsigned int qid, struct mqd_update_info *minfo)
539 struct process_queue_node *pqn;
541 pqn = get_queue_by_qid(pqm, qid);
543 pr_debug("No queue %d exists for update operation\n", qid);
547 /* CUs are masked for debugger requirements so deny user mask */
548 if (pqn->q->properties.is_dbg_wa && minfo && minfo->cu_mask.ptr)
551 /* ASICs that have WGPs must enforce pairwise enabled mask checks. */
552 if (minfo && minfo->cu_mask.ptr &&
553 KFD_GC_VERSION(pqn->q->device) >= IP_VERSION(10, 0, 0)) {
556 for (i = 0; i < minfo->cu_mask.count; i += 2) {
557 uint32_t cu_pair = (minfo->cu_mask.ptr[i / 32] >> (i % 32)) & 0x3;
559 if (cu_pair && cu_pair != 0x3) {
560 pr_debug("CUs must be adjacent pairwise enabled.\n");
566 retval = pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
571 if (minfo && minfo->cu_mask.ptr)
572 pqn->q->properties.is_user_cu_masked = true;
577 struct kernel_queue *pqm_get_kernel_queue(
578 struct process_queue_manager *pqm,
581 struct process_queue_node *pqn;
583 pqn = get_queue_by_qid(pqm, qid);
590 struct queue *pqm_get_user_queue(struct process_queue_manager *pqm,
593 struct process_queue_node *pqn;
595 pqn = get_queue_by_qid(pqm, qid);
596 return pqn ? pqn->q : NULL;
599 int pqm_get_wave_state(struct process_queue_manager *pqm,
601 void __user *ctl_stack,
602 u32 *ctl_stack_used_size,
603 u32 *save_area_used_size)
605 struct process_queue_node *pqn;
607 pqn = get_queue_by_qid(pqm, qid);
609 pr_debug("amdkfd: No queue %d exists for operation\n",
614 return pqn->q->device->dqm->ops.get_wave_state(pqn->q->device->dqm,
618 save_area_used_size);
621 int pqm_get_queue_snapshot(struct process_queue_manager *pqm,
622 uint64_t exception_clear_mask,
624 int *num_qss_entries,
625 uint32_t *entry_size)
627 struct process_queue_node *pqn;
628 struct kfd_queue_snapshot_entry src;
629 uint32_t tmp_entry_size = *entry_size, tmp_qss_entries = *num_qss_entries;
632 *num_qss_entries = 0;
636 *entry_size = min_t(size_t, *entry_size, sizeof(struct kfd_queue_snapshot_entry));
637 mutex_lock(&pqm->process->event_mutex);
639 memset(&src, 0, sizeof(src));
641 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
645 if (*num_qss_entries < tmp_qss_entries) {
646 set_queue_snapshot_entry(pqn->q, exception_clear_mask, &src);
648 if (copy_to_user(buf, &src, *entry_size)) {
652 buf += tmp_entry_size;
654 *num_qss_entries += 1;
657 mutex_unlock(&pqm->process->event_mutex);
661 static int get_queue_data_sizes(struct kfd_process_device *pdd,
664 uint32_t *ctl_stack_size)
668 ret = pqm_get_queue_checkpoint_info(&pdd->process->pqm,
669 q->properties.queue_id,
673 pr_err("Failed to get queue dump info (%d)\n", ret);
678 int kfd_process_get_queue_info(struct kfd_process *p,
679 uint32_t *num_queues,
680 uint64_t *priv_data_sizes)
682 uint32_t extra_data_sizes = 0;
689 /* Run over all PDDs of the process */
690 for (i = 0; i < p->n_pdds; i++) {
691 struct kfd_process_device *pdd = p->pdds[i];
693 list_for_each_entry(q, &pdd->qpd.queues_list, list) {
694 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
695 q->properties.type == KFD_QUEUE_TYPE_SDMA ||
696 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
697 uint32_t mqd_size, ctl_stack_size;
699 *num_queues = *num_queues + 1;
701 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size);
705 extra_data_sizes += mqd_size + ctl_stack_size;
707 pr_err("Unsupported queue type (%d)\n", q->properties.type);
712 *priv_data_sizes = extra_data_sizes +
713 (*num_queues * sizeof(struct kfd_criu_queue_priv_data));
718 static int pqm_checkpoint_mqd(struct process_queue_manager *pqm,
723 struct process_queue_node *pqn;
725 pqn = get_queue_by_qid(pqm, qid);
727 pr_debug("amdkfd: No queue %d exists for operation\n", qid);
731 if (!pqn->q->device->dqm->ops.checkpoint_mqd) {
732 pr_err("amdkfd: queue dumping not supported on this device\n");
736 return pqn->q->device->dqm->ops.checkpoint_mqd(pqn->q->device->dqm,
737 pqn->q, mqd, ctl_stack);
740 static int criu_checkpoint_queue(struct kfd_process_device *pdd,
742 struct kfd_criu_queue_priv_data *q_data)
744 uint8_t *mqd, *ctl_stack;
747 mqd = (void *)(q_data + 1);
748 ctl_stack = mqd + q_data->mqd_size;
750 q_data->gpu_id = pdd->user_gpu_id;
751 q_data->type = q->properties.type;
752 q_data->format = q->properties.format;
753 q_data->q_id = q->properties.queue_id;
754 q_data->q_address = q->properties.queue_address;
755 q_data->q_size = q->properties.queue_size;
756 q_data->priority = q->properties.priority;
757 q_data->q_percent = q->properties.queue_percent;
758 q_data->read_ptr_addr = (uint64_t)q->properties.read_ptr;
759 q_data->write_ptr_addr = (uint64_t)q->properties.write_ptr;
760 q_data->doorbell_id = q->doorbell_id;
762 q_data->sdma_id = q->sdma_id;
764 q_data->eop_ring_buffer_address =
765 q->properties.eop_ring_buffer_address;
767 q_data->eop_ring_buffer_size = q->properties.eop_ring_buffer_size;
769 q_data->ctx_save_restore_area_address =
770 q->properties.ctx_save_restore_area_address;
772 q_data->ctx_save_restore_area_size =
773 q->properties.ctx_save_restore_area_size;
775 q_data->gws = !!q->gws;
777 ret = pqm_checkpoint_mqd(&pdd->process->pqm, q->properties.queue_id, mqd, ctl_stack);
779 pr_err("Failed checkpoint queue_mqd (%d)\n", ret);
783 pr_debug("Dumping Queue: gpu_id:%x queue_id:%u\n", q_data->gpu_id, q_data->q_id);
787 static int criu_checkpoint_queues_device(struct kfd_process_device *pdd,
788 uint8_t __user *user_priv,
789 unsigned int *q_index,
790 uint64_t *queues_priv_data_offset)
792 unsigned int q_private_data_size = 0;
793 uint8_t *q_private_data = NULL; /* Local buffer to store individual queue private data */
797 list_for_each_entry(q, &pdd->qpd.queues_list, list) {
798 struct kfd_criu_queue_priv_data *q_data;
799 uint64_t q_data_size;
801 uint32_t ctl_stack_size;
803 if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE &&
804 q->properties.type != KFD_QUEUE_TYPE_SDMA &&
805 q->properties.type != KFD_QUEUE_TYPE_SDMA_XGMI) {
807 pr_err("Unsupported queue type (%d)\n", q->properties.type);
812 ret = get_queue_data_sizes(pdd, q, &mqd_size, &ctl_stack_size);
816 q_data_size = sizeof(*q_data) + mqd_size + ctl_stack_size;
818 /* Increase local buffer space if needed */
819 if (q_private_data_size < q_data_size) {
820 kfree(q_private_data);
822 q_private_data = kzalloc(q_data_size, GFP_KERNEL);
823 if (!q_private_data) {
827 q_private_data_size = q_data_size;
830 q_data = (struct kfd_criu_queue_priv_data *)q_private_data;
832 /* data stored in this order: priv_data, mqd, ctl_stack */
833 q_data->mqd_size = mqd_size;
834 q_data->ctl_stack_size = ctl_stack_size;
836 ret = criu_checkpoint_queue(pdd, q, q_data);
840 q_data->object_type = KFD_CRIU_OBJECT_TYPE_QUEUE;
842 ret = copy_to_user(user_priv + *queues_priv_data_offset,
843 q_data, q_data_size);
848 *queues_priv_data_offset += q_data_size;
849 *q_index = *q_index + 1;
852 kfree(q_private_data);
857 int kfd_criu_checkpoint_queues(struct kfd_process *p,
858 uint8_t __user *user_priv_data,
859 uint64_t *priv_data_offset)
861 int ret = 0, pdd_index, q_index = 0;
863 for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) {
864 struct kfd_process_device *pdd = p->pdds[pdd_index];
867 * criu_checkpoint_queues_device will copy data to user and update q_index and
868 * queues_priv_data_offset
870 ret = criu_checkpoint_queues_device(pdd, user_priv_data, &q_index,
880 static void set_queue_properties_from_criu(struct queue_properties *qp,
881 struct kfd_criu_queue_priv_data *q_data)
883 qp->is_interop = false;
884 qp->queue_percent = q_data->q_percent;
885 qp->priority = q_data->priority;
886 qp->queue_address = q_data->q_address;
887 qp->queue_size = q_data->q_size;
888 qp->read_ptr = (uint32_t *) q_data->read_ptr_addr;
889 qp->write_ptr = (uint32_t *) q_data->write_ptr_addr;
890 qp->eop_ring_buffer_address = q_data->eop_ring_buffer_address;
891 qp->eop_ring_buffer_size = q_data->eop_ring_buffer_size;
892 qp->ctx_save_restore_area_address = q_data->ctx_save_restore_area_address;
893 qp->ctx_save_restore_area_size = q_data->ctx_save_restore_area_size;
894 qp->ctl_stack_size = q_data->ctl_stack_size;
895 qp->type = q_data->type;
896 qp->format = q_data->format;
899 int kfd_criu_restore_queue(struct kfd_process *p,
900 uint8_t __user *user_priv_ptr,
901 uint64_t *priv_data_offset,
902 uint64_t max_priv_data_size)
904 uint8_t *mqd, *ctl_stack, *q_extra_data = NULL;
905 struct kfd_criu_queue_priv_data *q_data;
906 struct kfd_process_device *pdd;
907 uint64_t q_extra_data_size;
908 struct queue_properties qp;
909 unsigned int queue_id;
912 if (*priv_data_offset + sizeof(*q_data) > max_priv_data_size)
915 q_data = kmalloc(sizeof(*q_data), GFP_KERNEL);
919 ret = copy_from_user(q_data, user_priv_ptr + *priv_data_offset, sizeof(*q_data));
925 *priv_data_offset += sizeof(*q_data);
926 q_extra_data_size = (uint64_t)q_data->ctl_stack_size + q_data->mqd_size;
928 if (*priv_data_offset + q_extra_data_size > max_priv_data_size) {
933 q_extra_data = kmalloc(q_extra_data_size, GFP_KERNEL);
939 ret = copy_from_user(q_extra_data, user_priv_ptr + *priv_data_offset, q_extra_data_size);
945 *priv_data_offset += q_extra_data_size;
947 pdd = kfd_process_device_data_by_id(p, q_data->gpu_id);
949 pr_err("Failed to get pdd\n");
954 /* data stored in this order: mqd, ctl_stack */
956 ctl_stack = mqd + q_data->mqd_size;
958 memset(&qp, 0, sizeof(qp));
959 set_queue_properties_from_criu(&qp, q_data);
961 print_queue_properties(&qp);
963 ret = pqm_create_queue(&p->pqm, pdd->dev, NULL, &qp, &queue_id, NULL, q_data, mqd, ctl_stack,
966 pr_err("Failed to create new queue err:%d\n", ret);
971 ret = pqm_set_gws(&p->pqm, q_data->q_id, pdd->dev->gws);
975 pr_err("Failed to restore queue (%d)\n", ret);
977 pr_debug("Queue id %d was restored successfully\n", queue_id);
984 int pqm_get_queue_checkpoint_info(struct process_queue_manager *pqm,
987 uint32_t *ctl_stack_size)
989 struct process_queue_node *pqn;
991 pqn = get_queue_by_qid(pqm, qid);
993 pr_debug("amdkfd: No queue %d exists for operation\n", qid);
997 if (!pqn->q->device->dqm->ops.get_queue_checkpoint_info) {
998 pr_err("amdkfd: queue dumping not supported on this device\n");
1002 pqn->q->device->dqm->ops.get_queue_checkpoint_info(pqn->q->device->dqm,
1008 #if defined(CONFIG_DEBUG_FS)
1010 int pqm_debugfs_mqds(struct seq_file *m, void *data)
1012 struct process_queue_manager *pqm = data;
1013 struct process_queue_node *pqn;
1015 enum KFD_MQD_TYPE mqd_type;
1016 struct mqd_manager *mqd_mgr;
1017 int r = 0, xcc, num_xccs = 1;
1021 list_for_each_entry(pqn, &pqm->queues, process_queue_list) {
1024 switch (q->properties.type) {
1025 case KFD_QUEUE_TYPE_SDMA:
1026 case KFD_QUEUE_TYPE_SDMA_XGMI:
1027 seq_printf(m, " SDMA queue on device %x\n",
1029 mqd_type = KFD_MQD_TYPE_SDMA;
1031 case KFD_QUEUE_TYPE_COMPUTE:
1032 seq_printf(m, " Compute queue on device %x\n",
1034 mqd_type = KFD_MQD_TYPE_CP;
1035 num_xccs = NUM_XCC(q->device->xcc_mask);
1039 " Bad user queue type %d on device %x\n",
1040 q->properties.type, q->device->id);
1043 mqd_mgr = q->device->dqm->mqd_mgrs[mqd_type];
1044 size = mqd_mgr->mqd_stride(mqd_mgr,
1046 } else if (pqn->kq) {
1048 mqd_mgr = pqn->kq->mqd_mgr;
1049 switch (q->properties.type) {
1050 case KFD_QUEUE_TYPE_DIQ:
1051 seq_printf(m, " DIQ on device %x\n",
1056 " Bad kernel queue type %d on device %x\n",
1063 " Weird: Queue node with neither kernel nor user queue\n");
1067 for (xcc = 0; xcc < num_xccs; xcc++) {
1068 mqd = q->mqd + size * xcc;
1069 r = mqd_mgr->debugfs_show_mqd(m, mqd);