Merge tag 'amd-drm-next-5.13-2021-04-12' of https://gitlab.freedesktop.org/agd5f...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_test.c
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Copyright 2009 VMware, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: Michel Dänzer
24  */
25
26 #include <drm/amdgpu_drm.h>
27 #include "amdgpu.h"
28 #include "amdgpu_uvd.h"
29 #include "amdgpu_vce.h"
30
31 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
32 static void amdgpu_do_test_moves(struct amdgpu_device *adev)
33 {
34         struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
35         struct amdgpu_bo *vram_obj = NULL;
36         struct amdgpu_bo **gtt_obj = NULL;
37         struct amdgpu_bo_param bp;
38         uint64_t gart_addr, vram_addr;
39         unsigned n, size;
40         int i, r;
41
42         size = 1024 * 1024;
43
44         /* Number of tests =
45          * (Total GTT - gart_pin_size - (2 transfer windows for buffer moves)) / test size
46          */
47         n = adev->gmc.gart_size - atomic64_read(&adev->gart_pin_size);
48         n -= AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS *
49                 AMDGPU_GPU_PAGE_SIZE;
50         n /= size;
51
52         gtt_obj = kcalloc(n, sizeof(*gtt_obj), GFP_KERNEL);
53         if (!gtt_obj) {
54                 DRM_ERROR("Failed to allocate %d pointers\n", n);
55                 r = 1;
56                 goto out_cleanup;
57         }
58         memset(&bp, 0, sizeof(bp));
59         bp.size = size;
60         bp.byte_align = PAGE_SIZE;
61         bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
62         bp.flags = 0;
63         bp.type = ttm_bo_type_kernel;
64         bp.resv = NULL;
65         bp.bo_ptr_size = sizeof(struct amdgpu_bo);
66
67         r = amdgpu_bo_create(adev, &bp, &vram_obj);
68         if (r) {
69                 DRM_ERROR("Failed to create VRAM object\n");
70                 goto out_cleanup;
71         }
72         r = amdgpu_bo_reserve(vram_obj, false);
73         if (unlikely(r != 0))
74                 goto out_unref;
75         r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM);
76         if (r) {
77                 DRM_ERROR("Failed to pin VRAM object\n");
78                 goto out_unres;
79         }
80         vram_addr = amdgpu_bo_gpu_offset(vram_obj);
81         for (i = 0; i < n; i++) {
82                 void *gtt_map, *vram_map;
83                 void **gart_start, **gart_end;
84                 void **vram_start, **vram_end;
85                 struct dma_fence *fence = NULL;
86
87                 bp.domain = AMDGPU_GEM_DOMAIN_GTT;
88                 r = amdgpu_bo_create(adev, &bp, gtt_obj + i);
89                 if (r) {
90                         DRM_ERROR("Failed to create GTT object %d\n", i);
91                         goto out_lclean;
92                 }
93
94                 r = amdgpu_bo_reserve(gtt_obj[i], false);
95                 if (unlikely(r != 0))
96                         goto out_lclean_unref;
97                 r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT);
98                 if (r) {
99                         DRM_ERROR("Failed to pin GTT object %d\n", i);
100                         goto out_lclean_unres;
101                 }
102                 r = amdgpu_ttm_alloc_gart(&gtt_obj[i]->tbo);
103                 if (r) {
104                         DRM_ERROR("%p bind failed\n", gtt_obj[i]);
105                         goto out_lclean_unpin;
106                 }
107                 gart_addr = amdgpu_bo_gpu_offset(gtt_obj[i]);
108
109                 r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
110                 if (r) {
111                         DRM_ERROR("Failed to map GTT object %d\n", i);
112                         goto out_lclean_unpin;
113                 }
114
115                 for (gart_start = gtt_map, gart_end = gtt_map + size;
116                      gart_start < gart_end;
117                      gart_start++)
118                         *gart_start = gart_start;
119
120                 amdgpu_bo_kunmap(gtt_obj[i]);
121
122                 r = amdgpu_copy_buffer(ring, gart_addr, vram_addr,
123                                        size, NULL, &fence, false, false, false);
124
125                 if (r) {
126                         DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
127                         goto out_lclean_unpin;
128                 }
129
130                 r = dma_fence_wait(fence, false);
131                 if (r) {
132                         DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
133                         goto out_lclean_unpin;
134                 }
135
136                 dma_fence_put(fence);
137                 fence = NULL;
138
139                 r = amdgpu_bo_kmap(vram_obj, &vram_map);
140                 if (r) {
141                         DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
142                         goto out_lclean_unpin;
143                 }
144
145                 for (gart_start = gtt_map, gart_end = gtt_map + size,
146                      vram_start = vram_map, vram_end = vram_map + size;
147                      vram_start < vram_end;
148                      gart_start++, vram_start++) {
149                         if (*vram_start != gart_start) {
150                                 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
151                                           "expected 0x%p (GTT/VRAM offset "
152                                           "0x%16llx/0x%16llx)\n",
153                                           i, *vram_start, gart_start,
154                                           (unsigned long long)
155                                           (gart_addr - adev->gmc.gart_start +
156                                            (void *)gart_start - gtt_map),
157                                           (unsigned long long)
158                                           (vram_addr - adev->gmc.vram_start +
159                                            (void *)gart_start - gtt_map));
160                                 amdgpu_bo_kunmap(vram_obj);
161                                 goto out_lclean_unpin;
162                         }
163                         *vram_start = vram_start;
164                 }
165
166                 amdgpu_bo_kunmap(vram_obj);
167
168                 r = amdgpu_copy_buffer(ring, vram_addr, gart_addr,
169                                        size, NULL, &fence, false, false, false);
170
171                 if (r) {
172                         DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
173                         goto out_lclean_unpin;
174                 }
175
176                 r = dma_fence_wait(fence, false);
177                 if (r) {
178                         DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
179                         goto out_lclean_unpin;
180                 }
181
182                 dma_fence_put(fence);
183                 fence = NULL;
184
185                 r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
186                 if (r) {
187                         DRM_ERROR("Failed to map GTT object after copy %d\n", i);
188                         goto out_lclean_unpin;
189                 }
190
191                 for (gart_start = gtt_map, gart_end = gtt_map + size,
192                      vram_start = vram_map, vram_end = vram_map + size;
193                      gart_start < gart_end;
194                      gart_start++, vram_start++) {
195                         if (*gart_start != vram_start) {
196                                 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
197                                           "expected 0x%p (VRAM/GTT offset "
198                                           "0x%16llx/0x%16llx)\n",
199                                           i, *gart_start, vram_start,
200                                           (unsigned long long)
201                                           (vram_addr - adev->gmc.vram_start +
202                                            (void *)vram_start - vram_map),
203                                           (unsigned long long)
204                                           (gart_addr - adev->gmc.gart_start +
205                                            (void *)vram_start - vram_map));
206                                 amdgpu_bo_kunmap(gtt_obj[i]);
207                                 goto out_lclean_unpin;
208                         }
209                 }
210
211                 amdgpu_bo_kunmap(gtt_obj[i]);
212
213                 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
214                          gart_addr - adev->gmc.gart_start);
215                 continue;
216
217 out_lclean_unpin:
218                 amdgpu_bo_unpin(gtt_obj[i]);
219 out_lclean_unres:
220                 amdgpu_bo_unreserve(gtt_obj[i]);
221 out_lclean_unref:
222                 amdgpu_bo_unref(&gtt_obj[i]);
223 out_lclean:
224                 for (--i; i >= 0; --i) {
225                         amdgpu_bo_unpin(gtt_obj[i]);
226                         amdgpu_bo_unreserve(gtt_obj[i]);
227                         amdgpu_bo_unref(&gtt_obj[i]);
228                 }
229                 if (fence)
230                         dma_fence_put(fence);
231                 break;
232         }
233
234         amdgpu_bo_unpin(vram_obj);
235 out_unres:
236         amdgpu_bo_unreserve(vram_obj);
237 out_unref:
238         amdgpu_bo_unref(&vram_obj);
239 out_cleanup:
240         kfree(gtt_obj);
241         if (r) {
242                 pr_warn("Error while testing BO move\n");
243         }
244 }
245
246 void amdgpu_test_moves(struct amdgpu_device *adev)
247 {
248         if (adev->mman.buffer_funcs)
249                 amdgpu_do_test_moves(adev);
250 }