drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Christian König <christian.koenig@amd.com>
  29  */
  30
  31 #include <drm/drmP.h>
  32 #include "amdgpu.h"
  33 #include "amdgpu_trace.h"
  34 #include "amdgpu_amdkfd.h"
  35
  36 struct amdgpu_sync_entry {
  37         struct hlist_node       node;
  38         struct dma_fence        *fence;
  39         bool    explicit;
  40 };
  41
  42 static struct kmem_cache *amdgpu_sync_slab;
  43
  44 /**
  45  * amdgpu_sync_create - zero init sync object
  46  *
  47  * @sync: sync object to initialize
  48  *
  49  * Just clear the sync object for now.
  50  */
  51 void amdgpu_sync_create(struct amdgpu_sync *sync)
  52 {
  53         hash_init(sync->fences);
  54         sync->last_vm_update = NULL;
  55 }
  56
  57 /**
  58  * amdgpu_sync_same_dev - test if fence belong to us
  59  *
  60  * @adev: amdgpu device to use for the test
  61  * @f: fence to test
  62  *
  63  * Test if the fence was issued by us.
  64  */
  65 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev,
  66                                  struct dma_fence *f)
  67 {
  68         struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
  69
  70         if (s_fence) {
  71                 struct amdgpu_ring *ring;
  72
  73                 ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
  74                 return ring->adev == adev;
  75         }
  76
  77         return false;
  78 }
  79
  80 /**
  81  * amdgpu_sync_get_owner - extract the owner of a fence
  82  *
  83  * @fence: fence get the owner from
  84  *
  85  * Extract who originally created the fence.
  86  */
  87 static void *amdgpu_sync_get_owner(struct dma_fence *f)
  88 {
  89         struct drm_sched_fence *s_fence;
  90         struct amdgpu_amdkfd_fence *kfd_fence;
  91
  92         if (!f)
  93                 return AMDGPU_FENCE_OWNER_UNDEFINED;
  94
  95         s_fence = to_drm_sched_fence(f);
  96         if (s_fence)
  97                 return s_fence->owner;
  98
  99         kfd_fence = to_amdgpu_amdkfd_fence(f);
 100         if (kfd_fence)
 101                 return AMDGPU_FENCE_OWNER_KFD;
 102
 103         return AMDGPU_FENCE_OWNER_UNDEFINED;
 104 }
 105
 106 /**
 107  * amdgpu_sync_keep_later - Keep the later fence
 108  *
 109  * @keep: existing fence to test
 110  * @fence: new fence
 111  *
 112  * Either keep the existing fence or the new one, depending which one is later.
 113  */
 114 static void amdgpu_sync_keep_later(struct dma_fence **keep,
 115                                    struct dma_fence *fence)
 116 {
 117         if (*keep && dma_fence_is_later(*keep, fence))
 118                 return;
 119
 120         dma_fence_put(*keep);
 121         *keep = dma_fence_get(fence);
 122 }
 123
 124 /**
 125  * amdgpu_sync_add_later - add the fence to the hash
 126  *
 127  * @sync: sync object to add the fence to
 128  * @f: fence to add
 129  *
 130  * Tries to add the fence to an existing hash entry. Returns true when an entry
 131  * was found, false otherwise.
 132  */
 133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f, bool explicit)
 134 {
 135         struct amdgpu_sync_entry *e;
 136
 137         hash_for_each_possible(sync->fences, e, node, f->context) {
 138                 if (unlikely(e->fence->context != f->context))
 139                         continue;
 140
 141                 amdgpu_sync_keep_later(&e->fence, f);
 142
 143                 /* Preserve eplicit flag to not loose pipe line sync */
 144                 e->explicit |= explicit;
 145
 146                 return true;
 147         }
 148         return false;
 149 }
 150
 151 /**
 152  * amdgpu_sync_fence - remember to sync to this fence
 153  *
 154  * @sync: sync object to add fence to
 155  * @fence: fence to sync to
 156  *
 157  */
 158 int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
 159                       struct dma_fence *f, bool explicit)
 160 {
 161         struct amdgpu_sync_entry *e;
 162
 163         if (!f)
 164                 return 0;
 165         if (amdgpu_sync_same_dev(adev, f) &&
 166             amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
 167                 amdgpu_sync_keep_later(&sync->last_vm_update, f);
 168
 169         if (amdgpu_sync_add_later(sync, f, explicit))
 170                 return 0;
 171
 172         e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
 173         if (!e)
 174                 return -ENOMEM;
 175
 176         e->explicit = explicit;
 177
 178         hash_add(sync->fences, &e->node, f->context);
 179         e->fence = dma_fence_get(f);
 180         return 0;
 181 }
 182
 183 /**
 184  * amdgpu_sync_resv - sync to a reservation object
 185  *
 186  * @sync: sync object to add fences from reservation object to
 187  * @resv: reservation object with embedded fence
 188  * @explicit_sync: true if we should only sync to the exclusive fence
 189  *
 190  * Sync to the fence
 191  */
 192 int amdgpu_sync_resv(struct amdgpu_device *adev,
 193                      struct amdgpu_sync *sync,
 194                      struct reservation_object *resv,
 195                      void *owner, bool explicit_sync)
 196 {
 197         struct reservation_object_list *flist;
 198         struct dma_fence *f;
 199         void *fence_owner;
 200         unsigned i;
 201         int r = 0;
 202
 203         if (resv == NULL)
 204                 return -EINVAL;
 205
 206         /* always sync to the exclusive fence */
 207         f = reservation_object_get_excl(resv);
 208         r = amdgpu_sync_fence(adev, sync, f, false);
 209
 210         flist = reservation_object_get_list(resv);
 211         if (!flist || r)
 212                 return r;
 213
 214         for (i = 0; i < flist->shared_count; ++i) {
 215                 f = rcu_dereference_protected(flist->shared[i],
 216                                               reservation_object_held(resv));
 217                 /* We only want to trigger KFD eviction fences on
 218                  * evict or move jobs. Skip KFD fences otherwise.
 219                  */
 220                 fence_owner = amdgpu_sync_get_owner(f);
 221                 if (fence_owner == AMDGPU_FENCE_OWNER_KFD &&
 222                     owner != AMDGPU_FENCE_OWNER_UNDEFINED)
 223                         continue;
 224
 225                 if (amdgpu_sync_same_dev(adev, f)) {
 226                         /* VM updates are only interesting
 227                          * for other VM updates and moves.
 228                          */
 229                         if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
 230                             (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
 231                             ((owner == AMDGPU_FENCE_OWNER_VM) !=
 232                              (fence_owner == AMDGPU_FENCE_OWNER_VM)))
 233                                 continue;
 234
 235                         /* Ignore fence from the same owner and explicit one as
 236                          * long as it isn't undefined.
 237                          */
 238                         if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
 239                             (fence_owner == owner || explicit_sync))
 240                                 continue;
 241                 }
 242
 243                 r = amdgpu_sync_fence(adev, sync, f, false);
 244                 if (r)
 245                         break;
 246         }
 247         return r;
 248 }
 249
 250 /**
 251  * amdgpu_sync_peek_fence - get the next fence not signaled yet
 252  *
 253  * @sync: the sync object
 254  * @ring: optional ring to use for test
 255  *
 256  * Returns the next fence not signaled yet without removing it from the sync
 257  * object.
 258  */
 259 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
 260                                          struct amdgpu_ring *ring)
 261 {
 262         struct amdgpu_sync_entry *e;
 263         struct hlist_node *tmp;
 264         int i;
 265
 266         hash_for_each_safe(sync->fences, i, tmp, e, node) {
 267                 struct dma_fence *f = e->fence;
 268                 struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
 269
 270                 if (dma_fence_is_signaled(f)) {
 271                         hash_del(&e->node);
 272                         dma_fence_put(f);
 273                         kmem_cache_free(amdgpu_sync_slab, e);
 274                         continue;
 275                 }
 276                 if (ring && s_fence) {
 277                         /* For fences from the same ring it is sufficient
 278                          * when they are scheduled.
 279                          */
 280                         if (s_fence->sched == &ring->sched) {
 281                                 if (dma_fence_is_signaled(&s_fence->scheduled))
 282                                         continue;
 283
 284                                 return &s_fence->scheduled;
 285                         }
 286                 }
 287
 288                 return f;
 289         }
 290
 291         return NULL;
 292 }
 293
 294 /**
 295  * amdgpu_sync_get_fence - get the next fence from the sync object
 296  *
 297  * @sync: sync object to use
 298  * @explicit: true if the next fence is explicit
 299  *
 300  * Get and removes the next fence from the sync object not signaled yet.
 301  */
 302 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync, bool *explicit)
 303 {
 304         struct amdgpu_sync_entry *e;
 305         struct hlist_node *tmp;
 306         struct dma_fence *f;
 307         int i;
 308         hash_for_each_safe(sync->fences, i, tmp, e, node) {
 309
 310                 f = e->fence;
 311                 if (explicit)
 312                         *explicit = e->explicit;
 313
 314                 hash_del(&e->node);
 315                 kmem_cache_free(amdgpu_sync_slab, e);
 316
 317                 if (!dma_fence_is_signaled(f))
 318                         return f;
 319
 320                 dma_fence_put(f);
 321         }
 322         return NULL;
 323 }
 324
 325 /**
 326  * amdgpu_sync_clone - clone a sync object
 327  *
 328  * @source: sync object to clone
 329  * @clone: pointer to destination sync object
 330  *
 331  * Adds references to all unsignaled fences in @source to @clone. Also
 332  * removes signaled fences from @source while at it.
 333  */
 334 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
 335 {
 336         struct amdgpu_sync_entry *e;
 337         struct hlist_node *tmp;
 338         struct dma_fence *f;
 339         int i, r;
 340
 341         hash_for_each_safe(source->fences, i, tmp, e, node) {
 342                 f = e->fence;
 343                 if (!dma_fence_is_signaled(f)) {
 344                         r = amdgpu_sync_fence(NULL, clone, f, e->explicit);
 345                         if (r)
 346                                 return r;
 347                 } else {
 348                         hash_del(&e->node);
 349                         dma_fence_put(f);
 350                         kmem_cache_free(amdgpu_sync_slab, e);
 351                 }
 352         }
 353
 354         dma_fence_put(clone->last_vm_update);
 355         clone->last_vm_update = dma_fence_get(source->last_vm_update);
 356
 357         return 0;
 358 }
 359
 360 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
 361 {
 362         struct amdgpu_sync_entry *e;
 363         struct hlist_node *tmp;
 364         int i, r;
 365
 366         hash_for_each_safe(sync->fences, i, tmp, e, node) {
 367                 r = dma_fence_wait(e->fence, intr);
 368                 if (r)
 369                         return r;
 370
 371                 hash_del(&e->node);
 372                 dma_fence_put(e->fence);
 373                 kmem_cache_free(amdgpu_sync_slab, e);
 374         }
 375
 376         return 0;
 377 }
 378
 379 /**
 380  * amdgpu_sync_free - free the sync object
 381  *
 382  * @sync: sync object to use
 383  *
 384  * Free the sync object.
 385  */
 386 void amdgpu_sync_free(struct amdgpu_sync *sync)
 387 {
 388         struct amdgpu_sync_entry *e;
 389         struct hlist_node *tmp;
 390         unsigned i;
 391
 392         hash_for_each_safe(sync->fences, i, tmp, e, node) {
 393                 hash_del(&e->node);
 394                 dma_fence_put(e->fence);
 395                 kmem_cache_free(amdgpu_sync_slab, e);
 396         }
 397
 398         dma_fence_put(sync->last_vm_update);
 399 }
 400
 401 /**
 402  * amdgpu_sync_init - init sync object subsystem
 403  *
 404  * Allocate the slab allocator.
 405  */
 406 int amdgpu_sync_init(void)
 407 {
 408         amdgpu_sync_slab = kmem_cache_create(
 409                 "amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
 410                 SLAB_HWCACHE_ALIGN, NULL);
 411         if (!amdgpu_sync_slab)
 412                 return -ENOMEM;
 413
 414         return 0;
 415 }
 416
 417 /**
 418  * amdgpu_sync_fini - fini sync object subsystem
 419  *
 420  * Free the slab allocator.
 421  */
 422 void amdgpu_sync_fini(void)
 423 {
 424         kmem_cache_destroy(amdgpu_sync_slab);
 425 }