drivers/cxl/core/trace.h

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2022 Intel Corporation. All rights reserved. */
   3 #undef TRACE_SYSTEM
   4 #define TRACE_SYSTEM cxl
   5
   6 #if !defined(_CXL_EVENTS_H) || defined(TRACE_HEADER_MULTI_READ)
   7 #define _CXL_EVENTS_H
   8
   9 #include <linux/tracepoint.h>
  10 #include <linux/pci.h>
  11 #include <asm-generic/unaligned.h>
  12
  13 #include <cxl.h>
  14 #include <cxlmem.h>
  15 #include "core.h"
  16
  17 #define CXL_RAS_UC_CACHE_DATA_PARITY    BIT(0)
  18 #define CXL_RAS_UC_CACHE_ADDR_PARITY    BIT(1)
  19 #define CXL_RAS_UC_CACHE_BE_PARITY      BIT(2)
  20 #define CXL_RAS_UC_CACHE_DATA_ECC       BIT(3)
  21 #define CXL_RAS_UC_MEM_DATA_PARITY      BIT(4)
  22 #define CXL_RAS_UC_MEM_ADDR_PARITY      BIT(5)
  23 #define CXL_RAS_UC_MEM_BE_PARITY        BIT(6)
  24 #define CXL_RAS_UC_MEM_DATA_ECC         BIT(7)
  25 #define CXL_RAS_UC_REINIT_THRESH        BIT(8)
  26 #define CXL_RAS_UC_RSVD_ENCODE          BIT(9)
  27 #define CXL_RAS_UC_POISON               BIT(10)
  28 #define CXL_RAS_UC_RECV_OVERFLOW        BIT(11)
  29 #define CXL_RAS_UC_INTERNAL_ERR         BIT(14)
  30 #define CXL_RAS_UC_IDE_TX_ERR           BIT(15)
  31 #define CXL_RAS_UC_IDE_RX_ERR           BIT(16)
  32
  33 #define show_uc_errs(status)    __print_flags(status, " | ",              \
  34         { CXL_RAS_UC_CACHE_DATA_PARITY, "Cache Data Parity Error" },      \
  35         { CXL_RAS_UC_CACHE_ADDR_PARITY, "Cache Address Parity Error" },   \
  36         { CXL_RAS_UC_CACHE_BE_PARITY, "Cache Byte Enable Parity Error" }, \
  37         { CXL_RAS_UC_CACHE_DATA_ECC, "Cache Data ECC Error" },            \
  38         { CXL_RAS_UC_MEM_DATA_PARITY, "Memory Data Parity Error" },       \
  39         { CXL_RAS_UC_MEM_ADDR_PARITY, "Memory Address Parity Error" },    \
  40         { CXL_RAS_UC_MEM_BE_PARITY, "Memory Byte Enable Parity Error" },  \
  41         { CXL_RAS_UC_MEM_DATA_ECC, "Memory Data ECC Error" },             \
  42         { CXL_RAS_UC_REINIT_THRESH, "REINIT Threshold Hit" },             \
  43         { CXL_RAS_UC_RSVD_ENCODE, "Received Unrecognized Encoding" },     \
  44         { CXL_RAS_UC_POISON, "Received Poison From Peer" },               \
  45         { CXL_RAS_UC_RECV_OVERFLOW, "Receiver Overflow" },                \
  46         { CXL_RAS_UC_INTERNAL_ERR, "Component Specific Error" },          \
  47         { CXL_RAS_UC_IDE_TX_ERR, "IDE Tx Error" },                        \
  48         { CXL_RAS_UC_IDE_RX_ERR, "IDE Rx Error" }                         \
  49 )
  50
  51 TRACE_EVENT(cxl_aer_uncorrectable_error,
  52         TP_PROTO(const struct cxl_memdev *cxlmd, u32 status, u32 fe, u32 *hl),
  53         TP_ARGS(cxlmd, status, fe, hl),
  54         TP_STRUCT__entry(
  55                 __string(memdev, dev_name(&cxlmd->dev))
  56                 __string(host, dev_name(cxlmd->dev.parent))
  57                 __field(u64, serial)
  58                 __field(u32, status)
  59                 __field(u32, first_error)
  60                 __array(u32, header_log, CXL_HEADERLOG_SIZE_U32)
  61         ),
  62         TP_fast_assign(
  63                 __assign_str(memdev, dev_name(&cxlmd->dev));
  64                 __assign_str(host, dev_name(cxlmd->dev.parent));
  65                 __entry->serial = cxlmd->cxlds->serial;
  66                 __entry->status = status;
  67                 __entry->first_error = fe;
  68                 /*
  69                  * Embed the 512B headerlog data for user app retrieval and
  70                  * parsing, but no need to print this in the trace buffer.
  71                  */
  72                 memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE);
  73         ),
  74         TP_printk("memdev=%s host=%s serial=%lld: status: '%s' first_error: '%s'",
  75                   __get_str(memdev), __get_str(host), __entry->serial,
  76                   show_uc_errs(__entry->status),
  77                   show_uc_errs(__entry->first_error)
  78         )
  79 );
  80
  81 #define CXL_RAS_CE_CACHE_DATA_ECC       BIT(0)
  82 #define CXL_RAS_CE_MEM_DATA_ECC         BIT(1)
  83 #define CXL_RAS_CE_CRC_THRESH           BIT(2)
  84 #define CLX_RAS_CE_RETRY_THRESH         BIT(3)
  85 #define CXL_RAS_CE_CACHE_POISON         BIT(4)
  86 #define CXL_RAS_CE_MEM_POISON           BIT(5)
  87 #define CXL_RAS_CE_PHYS_LAYER_ERR       BIT(6)
  88
  89 #define show_ce_errs(status)    __print_flags(status, " | ",                    \
  90         { CXL_RAS_CE_CACHE_DATA_ECC, "Cache Data ECC Error" },                  \
  91         { CXL_RAS_CE_MEM_DATA_ECC, "Memory Data ECC Error" },                   \
  92         { CXL_RAS_CE_CRC_THRESH, "CRC Threshold Hit" },                         \
  93         { CLX_RAS_CE_RETRY_THRESH, "Retry Threshold" },                         \
  94         { CXL_RAS_CE_CACHE_POISON, "Received Cache Poison From Peer" },         \
  95         { CXL_RAS_CE_MEM_POISON, "Received Memory Poison From Peer" },          \
  96         { CXL_RAS_CE_PHYS_LAYER_ERR, "Received Error From Physical Layer" }     \
  97 )
  98
  99 TRACE_EVENT(cxl_aer_correctable_error,
 100         TP_PROTO(const struct cxl_memdev *cxlmd, u32 status),
 101         TP_ARGS(cxlmd, status),
 102         TP_STRUCT__entry(
 103                 __string(memdev, dev_name(&cxlmd->dev))
 104                 __string(host, dev_name(cxlmd->dev.parent))
 105                 __field(u64, serial)
 106                 __field(u32, status)
 107         ),
 108         TP_fast_assign(
 109                 __assign_str(memdev, dev_name(&cxlmd->dev));
 110                 __assign_str(host, dev_name(cxlmd->dev.parent));
 111                 __entry->serial = cxlmd->cxlds->serial;
 112                 __entry->status = status;
 113         ),
 114         TP_printk("memdev=%s host=%s serial=%lld: status: '%s'",
 115                   __get_str(memdev), __get_str(host), __entry->serial,
 116                   show_ce_errs(__entry->status)
 117         )
 118 );
 119
 120 #define cxl_event_log_type_str(type)                            \
 121         __print_symbolic(type,                                  \
 122                 { CXL_EVENT_TYPE_INFO, "Informational" },       \
 123                 { CXL_EVENT_TYPE_WARN, "Warning" },             \
 124                 { CXL_EVENT_TYPE_FAIL, "Failure" },             \
 125                 { CXL_EVENT_TYPE_FATAL, "Fatal" })
 126
 127 TRACE_EVENT(cxl_overflow,
 128
 129         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 130                  struct cxl_get_event_payload *payload),
 131
 132         TP_ARGS(cxlmd, log, payload),
 133
 134         TP_STRUCT__entry(
 135                 __string(memdev, dev_name(&cxlmd->dev))
 136                 __string(host, dev_name(cxlmd->dev.parent))
 137                 __field(int, log)
 138                 __field(u64, serial)
 139                 __field(u64, first_ts)
 140                 __field(u64, last_ts)
 141                 __field(u16, count)
 142         ),
 143
 144         TP_fast_assign(
 145                 __assign_str(memdev, dev_name(&cxlmd->dev));
 146                 __assign_str(host, dev_name(cxlmd->dev.parent));
 147                 __entry->serial = cxlmd->cxlds->serial;
 148                 __entry->log = log;
 149                 __entry->count = le16_to_cpu(payload->overflow_err_count);
 150                 __entry->first_ts = le64_to_cpu(payload->first_overflow_timestamp);
 151                 __entry->last_ts = le64_to_cpu(payload->last_overflow_timestamp);
 152         ),
 153
 154         TP_printk("memdev=%s host=%s serial=%lld: log=%s : %u records from %llu to %llu",
 155                 __get_str(memdev), __get_str(host), __entry->serial,
 156                 cxl_event_log_type_str(__entry->log), __entry->count,
 157                 __entry->first_ts, __entry->last_ts)
 158
 159 );
 160
 161 /*
 162  * Common Event Record Format
 163  * CXL 3.0 section 8.2.9.2.1; Table 8-42
 164  */
 165 #define CXL_EVENT_RECORD_FLAG_PERMANENT         BIT(2)
 166 #define CXL_EVENT_RECORD_FLAG_MAINT_NEEDED      BIT(3)
 167 #define CXL_EVENT_RECORD_FLAG_PERF_DEGRADED     BIT(4)
 168 #define CXL_EVENT_RECORD_FLAG_HW_REPLACE        BIT(5)
 169 #define show_hdr_flags(flags)   __print_flags(flags, " | ",                        \
 170         { CXL_EVENT_RECORD_FLAG_PERMANENT,      "PERMANENT_CONDITION"           }, \
 171         { CXL_EVENT_RECORD_FLAG_MAINT_NEEDED,   "MAINTENANCE_NEEDED"            }, \
 172         { CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,  "PERFORMANCE_DEGRADED"          }, \
 173         { CXL_EVENT_RECORD_FLAG_HW_REPLACE,     "HARDWARE_REPLACEMENT_NEEDED"   }  \
 174 )
 175
 176 /*
 177  * Define macros for the common header of each CXL event.
 178  *
 179  * Tracepoints using these macros must do 3 things:
 180  *
 181  *      1) Add CXL_EVT_TP_entry to TP_STRUCT__entry
 182  *      2) Use CXL_EVT_TP_fast_assign within TP_fast_assign;
 183  *         pass the dev, log, and CXL event header
 184  *         NOTE: The uuid must be assigned by the specific trace event
 185  *      3) Use CXL_EVT_TP_printk() instead of TP_printk()
 186  *
 187  * See the generic_event tracepoint as an example.
 188  */
 189 #define CXL_EVT_TP_entry                                        \
 190         __string(memdev, dev_name(&cxlmd->dev))                 \
 191         __string(host, dev_name(cxlmd->dev.parent))             \
 192         __field(int, log)                                       \
 193         __field_struct(uuid_t, hdr_uuid)                        \
 194         __field(u64, serial)                                    \
 195         __field(u32, hdr_flags)                                 \
 196         __field(u16, hdr_handle)                                \
 197         __field(u16, hdr_related_handle)                        \
 198         __field(u64, hdr_timestamp)                             \
 199         __field(u8, hdr_length)                                 \
 200         __field(u8, hdr_maint_op_class)
 201
 202 #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr)                                   \
 203         __assign_str(memdev, dev_name(&(cxlmd)->dev));                          \
 204         __assign_str(host, dev_name((cxlmd)->dev.parent));                      \
 205         __entry->log = (l);                                                     \
 206         __entry->serial = (cxlmd)->cxlds->serial;                               \
 207         __entry->hdr_length = (hdr).length;                                     \
 208         __entry->hdr_flags = get_unaligned_le24((hdr).flags);                   \
 209         __entry->hdr_handle = le16_to_cpu((hdr).handle);                        \
 210         __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle);        \
 211         __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp);                  \
 212         __entry->hdr_maint_op_class = (hdr).maint_op_class
 213
 214 #define CXL_EVT_TP_printk(fmt, ...) \
 215         TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb " \
 216                 "len=%d flags='%s' handle=%x related_handle=%x "                \
 217                 "maint_op_class=%u : " fmt,                                     \
 218                 __get_str(memdev), __get_str(host), __entry->serial,            \
 219                 cxl_event_log_type_str(__entry->log),                           \
 220                 __entry->hdr_timestamp, &__entry->hdr_uuid, __entry->hdr_length,\
 221                 show_hdr_flags(__entry->hdr_flags), __entry->hdr_handle,        \
 222                 __entry->hdr_related_handle, __entry->hdr_maint_op_class,       \
 223                 ##__VA_ARGS__)
 224
 225 TRACE_EVENT(cxl_generic_event,
 226
 227         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 228                  const uuid_t *uuid, struct cxl_event_generic *gen_rec),
 229
 230         TP_ARGS(cxlmd, log, uuid, gen_rec),
 231
 232         TP_STRUCT__entry(
 233                 CXL_EVT_TP_entry
 234                 __array(u8, data, CXL_EVENT_RECORD_DATA_LENGTH)
 235         ),
 236
 237         TP_fast_assign(
 238                 CXL_EVT_TP_fast_assign(cxlmd, log, gen_rec->hdr);
 239                 memcpy(&__entry->hdr_uuid, uuid, sizeof(uuid_t));
 240                 memcpy(__entry->data, gen_rec->data, CXL_EVENT_RECORD_DATA_LENGTH);
 241         ),
 242
 243         CXL_EVT_TP_printk("%s",
 244                 __print_hex(__entry->data, CXL_EVENT_RECORD_DATA_LENGTH))
 245 );
 246
 247 /*
 248  * Physical Address field masks
 249  *
 250  * General Media Event Record
 251  * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
 252  *
 253  * DRAM Event Record
 254  * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
 255  */
 256 #define CXL_DPA_FLAGS_MASK                      0x3F
 257 #define CXL_DPA_MASK                            (~CXL_DPA_FLAGS_MASK)
 258
 259 #define CXL_DPA_VOLATILE                        BIT(0)
 260 #define CXL_DPA_NOT_REPAIRABLE                  BIT(1)
 261 #define show_dpa_flags(flags)   __print_flags(flags, "|",                  \
 262         { CXL_DPA_VOLATILE,                     "VOLATILE"              }, \
 263         { CXL_DPA_NOT_REPAIRABLE,               "NOT_REPAIRABLE"        }  \
 264 )
 265
 266 /*
 267  * General Media Event Record - GMER
 268  * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
 269  */
 270 #define CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT            BIT(0)
 271 #define CXL_GMER_EVT_DESC_THRESHOLD_EVENT               BIT(1)
 272 #define CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW          BIT(2)
 273 #define show_event_desc_flags(flags)    __print_flags(flags, "|",                  \
 274         { CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,         "UNCORRECTABLE_EVENT"   }, \
 275         { CXL_GMER_EVT_DESC_THRESHOLD_EVENT,            "THRESHOLD_EVENT"       }, \
 276         { CXL_GMER_EVT_DESC_POISON_LIST_OVERFLOW,       "POISON_LIST_OVERFLOW"  }  \
 277 )
 278
 279 #define CXL_GMER_MEM_EVT_TYPE_ECC_ERROR                 0x00
 280 #define CXL_GMER_MEM_EVT_TYPE_INV_ADDR                  0x01
 281 #define CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR           0x02
 282 #define show_mem_event_type(type)       __print_symbolic(type,                  \
 283         { CXL_GMER_MEM_EVT_TYPE_ECC_ERROR,              "ECC Error" },          \
 284         { CXL_GMER_MEM_EVT_TYPE_INV_ADDR,               "Invalid Address" },    \
 285         { CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,        "Data Path Error" }     \
 286 )
 287
 288 #define CXL_GMER_TRANS_UNKNOWN                          0x00
 289 #define CXL_GMER_TRANS_HOST_READ                        0x01
 290 #define CXL_GMER_TRANS_HOST_WRITE                       0x02
 291 #define CXL_GMER_TRANS_HOST_SCAN_MEDIA                  0x03
 292 #define CXL_GMER_TRANS_HOST_INJECT_POISON               0x04
 293 #define CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB             0x05
 294 #define CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT        0x06
 295 #define show_trans_type(type)   __print_symbolic(type,                                  \
 296         { CXL_GMER_TRANS_UNKNOWN,                       "Unknown" },                    \
 297         { CXL_GMER_TRANS_HOST_READ,                     "Host Read" },                  \
 298         { CXL_GMER_TRANS_HOST_WRITE,                    "Host Write" },                 \
 299         { CXL_GMER_TRANS_HOST_SCAN_MEDIA,               "Host Scan Media" },            \
 300         { CXL_GMER_TRANS_HOST_INJECT_POISON,            "Host Inject Poison" },         \
 301         { CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,          "Internal Media Scrub" },       \
 302         { CXL_GMER_TRANS_INTERNAL_MEDIA_MANAGEMENT,     "Internal Media Management" }   \
 303 )
 304
 305 #define CXL_GMER_VALID_CHANNEL                          BIT(0)
 306 #define CXL_GMER_VALID_RANK                             BIT(1)
 307 #define CXL_GMER_VALID_DEVICE                           BIT(2)
 308 #define CXL_GMER_VALID_COMPONENT                        BIT(3)
 309 #define show_valid_flags(flags) __print_flags(flags, "|",                  \
 310         { CXL_GMER_VALID_CHANNEL,                       "CHANNEL"       }, \
 311         { CXL_GMER_VALID_RANK,                          "RANK"          }, \
 312         { CXL_GMER_VALID_DEVICE,                        "DEVICE"        }, \
 313         { CXL_GMER_VALID_COMPONENT,                     "COMPONENT"     }  \
 314 )
 315
 316 TRACE_EVENT(cxl_general_media,
 317
 318         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 319                  struct cxl_event_gen_media *rec),
 320
 321         TP_ARGS(cxlmd, log, rec),
 322
 323         TP_STRUCT__entry(
 324                 CXL_EVT_TP_entry
 325                 /* General Media */
 326                 __field(u64, dpa)
 327                 __field(u8, descriptor)
 328                 __field(u8, type)
 329                 __field(u8, transaction_type)
 330                 __field(u8, channel)
 331                 __field(u32, device)
 332                 __array(u8, comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE)
 333                 __field(u16, validity_flags)
 334                 /* Following are out of order to pack trace record */
 335                 __field(u8, rank)
 336                 __field(u8, dpa_flags)
 337         ),
 338
 339         TP_fast_assign(
 340                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
 341                 __entry->hdr_uuid = CXL_EVENT_GEN_MEDIA_UUID;
 342
 343                 /* General Media */
 344                 __entry->dpa = le64_to_cpu(rec->phys_addr);
 345                 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
 346                 /* Mask after flags have been parsed */
 347                 __entry->dpa &= CXL_DPA_MASK;
 348                 __entry->descriptor = rec->descriptor;
 349                 __entry->type = rec->type;
 350                 __entry->transaction_type = rec->transaction_type;
 351                 __entry->channel = rec->channel;
 352                 __entry->rank = rec->rank;
 353                 __entry->device = get_unaligned_le24(rec->device);
 354                 memcpy(__entry->comp_id, &rec->component_id,
 355                         CXL_EVENT_GEN_MED_COMP_ID_SIZE);
 356                 __entry->validity_flags = get_unaligned_le16(&rec->validity_flags);
 357         ),
 358
 359         CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' " \
 360                 "descriptor='%s' type='%s' transaction_type='%s' channel=%u rank=%u " \
 361                 "device=%x comp_id=%s validity_flags='%s'",
 362                 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
 363                 show_event_desc_flags(__entry->descriptor),
 364                 show_mem_event_type(__entry->type),
 365                 show_trans_type(__entry->transaction_type),
 366                 __entry->channel, __entry->rank, __entry->device,
 367                 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
 368                 show_valid_flags(__entry->validity_flags)
 369         )
 370 );
 371
 372 /*
 373  * DRAM Event Record - DER
 374  *
 375  * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
 376  */
 377 /*
 378  * DRAM Event Record defines many fields the same as the General Media Event
 379  * Record.  Reuse those definitions as appropriate.
 380  */
 381 #define CXL_DER_VALID_CHANNEL                           BIT(0)
 382 #define CXL_DER_VALID_RANK                              BIT(1)
 383 #define CXL_DER_VALID_NIBBLE                            BIT(2)
 384 #define CXL_DER_VALID_BANK_GROUP                        BIT(3)
 385 #define CXL_DER_VALID_BANK                              BIT(4)
 386 #define CXL_DER_VALID_ROW                               BIT(5)
 387 #define CXL_DER_VALID_COLUMN                            BIT(6)
 388 #define CXL_DER_VALID_CORRECTION_MASK                   BIT(7)
 389 #define show_dram_valid_flags(flags)    __print_flags(flags, "|",                          \
 390         { CXL_DER_VALID_CHANNEL,                        "CHANNEL"               }, \
 391         { CXL_DER_VALID_RANK,                           "RANK"                  }, \
 392         { CXL_DER_VALID_NIBBLE,                         "NIBBLE"                }, \
 393         { CXL_DER_VALID_BANK_GROUP,                     "BANK GROUP"            }, \
 394         { CXL_DER_VALID_BANK,                           "BANK"                  }, \
 395         { CXL_DER_VALID_ROW,                            "ROW"                   }, \
 396         { CXL_DER_VALID_COLUMN,                         "COLUMN"                }, \
 397         { CXL_DER_VALID_CORRECTION_MASK,                "CORRECTION MASK"       }  \
 398 )
 399
 400 TRACE_EVENT(cxl_dram,
 401
 402         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 403                  struct cxl_event_dram *rec),
 404
 405         TP_ARGS(cxlmd, log, rec),
 406
 407         TP_STRUCT__entry(
 408                 CXL_EVT_TP_entry
 409                 /* DRAM */
 410                 __field(u64, dpa)
 411                 __field(u8, descriptor)
 412                 __field(u8, type)
 413                 __field(u8, transaction_type)
 414                 __field(u8, channel)
 415                 __field(u16, validity_flags)
 416                 __field(u16, column)    /* Out of order to pack trace record */
 417                 __field(u32, nibble_mask)
 418                 __field(u32, row)
 419                 __array(u8, cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE)
 420                 __field(u8, rank)       /* Out of order to pack trace record */
 421                 __field(u8, bank_group) /* Out of order to pack trace record */
 422                 __field(u8, bank)       /* Out of order to pack trace record */
 423                 __field(u8, dpa_flags)  /* Out of order to pack trace record */
 424         ),
 425
 426         TP_fast_assign(
 427                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
 428                 __entry->hdr_uuid = CXL_EVENT_DRAM_UUID;
 429
 430                 /* DRAM */
 431                 __entry->dpa = le64_to_cpu(rec->phys_addr);
 432                 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
 433                 __entry->dpa &= CXL_DPA_MASK;
 434                 __entry->descriptor = rec->descriptor;
 435                 __entry->type = rec->type;
 436                 __entry->transaction_type = rec->transaction_type;
 437                 __entry->validity_flags = get_unaligned_le16(rec->validity_flags);
 438                 __entry->channel = rec->channel;
 439                 __entry->rank = rec->rank;
 440                 __entry->nibble_mask = get_unaligned_le24(rec->nibble_mask);
 441                 __entry->bank_group = rec->bank_group;
 442                 __entry->bank = rec->bank;
 443                 __entry->row = get_unaligned_le24(rec->row);
 444                 __entry->column = get_unaligned_le16(rec->column);
 445                 memcpy(__entry->cor_mask, &rec->correction_mask,
 446                         CXL_EVENT_DER_CORRECTION_MASK_SIZE);
 447         ),
 448
 449         CXL_EVT_TP_printk("dpa=%llx dpa_flags='%s' descriptor='%s' type='%s' " \
 450                 "transaction_type='%s' channel=%u rank=%u nibble_mask=%x " \
 451                 "bank_group=%u bank=%u row=%u column=%u cor_mask=%s " \
 452                 "validity_flags='%s'",
 453                 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
 454                 show_event_desc_flags(__entry->descriptor),
 455                 show_mem_event_type(__entry->type),
 456                 show_trans_type(__entry->transaction_type),
 457                 __entry->channel, __entry->rank, __entry->nibble_mask,
 458                 __entry->bank_group, __entry->bank,
 459                 __entry->row, __entry->column,
 460                 __print_hex(__entry->cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE),
 461                 show_dram_valid_flags(__entry->validity_flags)
 462         )
 463 );
 464
 465 /*
 466  * Memory Module Event Record - MMER
 467  *
 468  * CXL res 3.0 section 8.2.9.2.1.3; Table 8-45
 469  */
 470 #define CXL_MMER_HEALTH_STATUS_CHANGE           0x00
 471 #define CXL_MMER_MEDIA_STATUS_CHANGE            0x01
 472 #define CXL_MMER_LIFE_USED_CHANGE               0x02
 473 #define CXL_MMER_TEMP_CHANGE                    0x03
 474 #define CXL_MMER_DATA_PATH_ERROR                0x04
 475 #define CXL_MMER_LSA_ERROR                      0x05
 476 #define show_dev_evt_type(type) __print_symbolic(type,                     \
 477         { CXL_MMER_HEALTH_STATUS_CHANGE,        "Health Status Change"  }, \
 478         { CXL_MMER_MEDIA_STATUS_CHANGE,         "Media Status Change"   }, \
 479         { CXL_MMER_LIFE_USED_CHANGE,            "Life Used Change"      }, \
 480         { CXL_MMER_TEMP_CHANGE,                 "Temperature Change"    }, \
 481         { CXL_MMER_DATA_PATH_ERROR,             "Data Path Error"       }, \
 482         { CXL_MMER_LSA_ERROR,                   "LSA Error"             }  \
 483 )
 484
 485 /*
 486  * Device Health Information - DHI
 487  *
 488  * CXL res 3.0 section 8.2.9.8.3.1; Table 8-100
 489  */
 490 #define CXL_DHI_HS_MAINTENANCE_NEEDED                           BIT(0)
 491 #define CXL_DHI_HS_PERFORMANCE_DEGRADED                         BIT(1)
 492 #define CXL_DHI_HS_HW_REPLACEMENT_NEEDED                        BIT(2)
 493 #define show_health_status_flags(flags) __print_flags(flags, "|",          \
 494         { CXL_DHI_HS_MAINTENANCE_NEEDED,        "MAINTENANCE_NEEDED"    }, \
 495         { CXL_DHI_HS_PERFORMANCE_DEGRADED,      "PERFORMANCE_DEGRADED"  }, \
 496         { CXL_DHI_HS_HW_REPLACEMENT_NEEDED,     "REPLACEMENT_NEEDED"    }  \
 497 )
 498
 499 #define CXL_DHI_MS_NORMAL                                                       0x00
 500 #define CXL_DHI_MS_NOT_READY                                                    0x01
 501 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOST                                       0x02
 502 #define CXL_DHI_MS_ALL_DATA_LOST                                                0x03
 503 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS                      0x04
 504 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN                        0x05
 505 #define CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT                              0x06
 506 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS                         0x07
 507 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN                           0x08
 508 #define CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT                                 0x09
 509 #define show_media_status(ms)   __print_symbolic(ms,                       \
 510         { CXL_DHI_MS_NORMAL,                                               \
 511                 "Normal"                                                }, \
 512         { CXL_DHI_MS_NOT_READY,                                            \
 513                 "Not Ready"                                             }, \
 514         { CXL_DHI_MS_WRITE_PERSISTENCY_LOST,                               \
 515                 "Write Persistency Lost"                                }, \
 516         { CXL_DHI_MS_ALL_DATA_LOST,                                        \
 517                 "All Data Lost"                                         }, \
 518         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_POWER_LOSS,              \
 519                 "Write Persistency Loss in the Event of Power Loss"     }, \
 520         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_EVENT_SHUTDOWN,                \
 521                 "Write Persistency Loss in Event of Shutdown"           }, \
 522         { CXL_DHI_MS_WRITE_PERSISTENCY_LOSS_IMMINENT,                      \
 523                 "Write Persistency Loss Imminent"                       }, \
 524         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_POWER_LOSS,                 \
 525                 "All Data Loss in Event of Power Loss"                  }, \
 526         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_EVENT_SHUTDOWN,                   \
 527                 "All Data loss in the Event of Shutdown"                }, \
 528         { CXL_DHI_MS_WRITE_ALL_DATA_LOSS_IMMINENT,                         \
 529                 "All Data Loss Imminent"                                }  \
 530 )
 531
 532 #define CXL_DHI_AS_NORMAL               0x0
 533 #define CXL_DHI_AS_WARNING              0x1
 534 #define CXL_DHI_AS_CRITICAL             0x2
 535 #define show_two_bit_status(as) __print_symbolic(as,       \
 536         { CXL_DHI_AS_NORMAL,            "Normal"        }, \
 537         { CXL_DHI_AS_WARNING,           "Warning"       }, \
 538         { CXL_DHI_AS_CRITICAL,          "Critical"      }  \
 539 )
 540 #define show_one_bit_status(as) __print_symbolic(as,       \
 541         { CXL_DHI_AS_NORMAL,            "Normal"        }, \
 542         { CXL_DHI_AS_WARNING,           "Warning"       }  \
 543 )
 544
 545 #define CXL_DHI_AS_LIFE_USED(as)                        (as & 0x3)
 546 #define CXL_DHI_AS_DEV_TEMP(as)                         ((as & 0xC) >> 2)
 547 #define CXL_DHI_AS_COR_VOL_ERR_CNT(as)                  ((as & 0x10) >> 4)
 548 #define CXL_DHI_AS_COR_PER_ERR_CNT(as)                  ((as & 0x20) >> 5)
 549
 550 TRACE_EVENT(cxl_memory_module,
 551
 552         TP_PROTO(const struct cxl_memdev *cxlmd, enum cxl_event_log_type log,
 553                  struct cxl_event_mem_module *rec),
 554
 555         TP_ARGS(cxlmd, log, rec),
 556
 557         TP_STRUCT__entry(
 558                 CXL_EVT_TP_entry
 559
 560                 /* Memory Module Event */
 561                 __field(u8, event_type)
 562
 563                 /* Device Health Info */
 564                 __field(u8, health_status)
 565                 __field(u8, media_status)
 566                 __field(u8, life_used)
 567                 __field(u32, dirty_shutdown_cnt)
 568                 __field(u32, cor_vol_err_cnt)
 569                 __field(u32, cor_per_err_cnt)
 570                 __field(s16, device_temp)
 571                 __field(u8, add_status)
 572         ),
 573
 574         TP_fast_assign(
 575                 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
 576                 __entry->hdr_uuid = CXL_EVENT_MEM_MODULE_UUID;
 577
 578                 /* Memory Module Event */
 579                 __entry->event_type = rec->event_type;
 580
 581                 /* Device Health Info */
 582                 __entry->health_status = rec->info.health_status;
 583                 __entry->media_status = rec->info.media_status;
 584                 __entry->life_used = rec->info.life_used;
 585                 __entry->dirty_shutdown_cnt = get_unaligned_le32(rec->info.dirty_shutdown_cnt);
 586                 __entry->cor_vol_err_cnt = get_unaligned_le32(rec->info.cor_vol_err_cnt);
 587                 __entry->cor_per_err_cnt = get_unaligned_le32(rec->info.cor_per_err_cnt);
 588                 __entry->device_temp = get_unaligned_le16(rec->info.device_temp);
 589                 __entry->add_status = rec->info.add_status;
 590         ),
 591
 592         CXL_EVT_TP_printk("event_type='%s' health_status='%s' media_status='%s' " \
 593                 "as_life_used=%s as_dev_temp=%s as_cor_vol_err_cnt=%s " \
 594                 "as_cor_per_err_cnt=%s life_used=%u device_temp=%d " \
 595                 "dirty_shutdown_cnt=%u cor_vol_err_cnt=%u cor_per_err_cnt=%u",
 596                 show_dev_evt_type(__entry->event_type),
 597                 show_health_status_flags(__entry->health_status),
 598                 show_media_status(__entry->media_status),
 599                 show_two_bit_status(CXL_DHI_AS_LIFE_USED(__entry->add_status)),
 600                 show_two_bit_status(CXL_DHI_AS_DEV_TEMP(__entry->add_status)),
 601                 show_one_bit_status(CXL_DHI_AS_COR_VOL_ERR_CNT(__entry->add_status)),
 602                 show_one_bit_status(CXL_DHI_AS_COR_PER_ERR_CNT(__entry->add_status)),
 603                 __entry->life_used, __entry->device_temp,
 604                 __entry->dirty_shutdown_cnt, __entry->cor_vol_err_cnt,
 605                 __entry->cor_per_err_cnt
 606         )
 607 );
 608
 609 #define show_poison_trace_type(type)                    \
 610         __print_symbolic(type,                          \
 611         { CXL_POISON_TRACE_LIST,        "List"   },     \
 612         { CXL_POISON_TRACE_INJECT,      "Inject" },     \
 613         { CXL_POISON_TRACE_CLEAR,       "Clear"  })
 614
 615 #define __show_poison_source(source)                          \
 616         __print_symbolic(source,                              \
 617                 { CXL_POISON_SOURCE_UNKNOWN,   "Unknown"  },  \
 618                 { CXL_POISON_SOURCE_EXTERNAL,  "External" },  \
 619                 { CXL_POISON_SOURCE_INTERNAL,  "Internal" },  \
 620                 { CXL_POISON_SOURCE_INJECTED,  "Injected" },  \
 621                 { CXL_POISON_SOURCE_VENDOR,    "Vendor"   })
 622
 623 #define show_poison_source(source)                           \
 624         (((source > CXL_POISON_SOURCE_INJECTED) &&           \
 625          (source != CXL_POISON_SOURCE_VENDOR)) ? "Reserved"  \
 626          : __show_poison_source(source))
 627
 628 #define show_poison_flags(flags)                             \
 629         __print_flags(flags, "|",                            \
 630                 { CXL_POISON_FLAG_MORE,      "More"     },   \
 631                 { CXL_POISON_FLAG_OVERFLOW,  "Overflow"  },  \
 632                 { CXL_POISON_FLAG_SCANNING,  "Scanning"  })
 633
 634 #define __cxl_poison_addr(record)                                       \
 635         (le64_to_cpu(record->address))
 636 #define cxl_poison_record_dpa(record)                                   \
 637         (__cxl_poison_addr(record) & CXL_POISON_START_MASK)
 638 #define cxl_poison_record_source(record)                                \
 639         (__cxl_poison_addr(record)  & CXL_POISON_SOURCE_MASK)
 640 #define cxl_poison_record_dpa_length(record)                            \
 641         (le32_to_cpu(record->length) * CXL_POISON_LEN_MULT)
 642 #define cxl_poison_overflow(flags, time)                                \
 643         (flags & CXL_POISON_FLAG_OVERFLOW ? le64_to_cpu(time) : 0)
 644
 645 u64 cxl_trace_hpa(struct cxl_region *cxlr, struct cxl_memdev *memdev, u64 dpa);
 646
 647 TRACE_EVENT(cxl_poison,
 648
 649         TP_PROTO(struct cxl_memdev *cxlmd, struct cxl_region *region,
 650                  const struct cxl_poison_record *record, u8 flags,
 651                  __le64 overflow_ts, enum cxl_poison_trace_type trace_type),
 652
 653         TP_ARGS(cxlmd, region, record, flags, overflow_ts, trace_type),
 654
 655         TP_STRUCT__entry(
 656                 __string(memdev, dev_name(&cxlmd->dev))
 657                 __string(host, dev_name(cxlmd->dev.parent))
 658                 __field(u64, serial)
 659                 __field(u8, trace_type)
 660                 __string(region, region)
 661                 __field(u64, overflow_ts)
 662                 __field(u64, hpa)
 663                 __field(u64, dpa)
 664                 __field(u32, dpa_length)
 665                 __array(char, uuid, 16)
 666                 __field(u8, source)
 667                 __field(u8, flags)
 668             ),
 669
 670         TP_fast_assign(
 671                 __assign_str(memdev, dev_name(&cxlmd->dev));
 672                 __assign_str(host, dev_name(cxlmd->dev.parent));
 673                 __entry->serial = cxlmd->cxlds->serial;
 674                 __entry->overflow_ts = cxl_poison_overflow(flags, overflow_ts);
 675                 __entry->dpa = cxl_poison_record_dpa(record);
 676                 __entry->dpa_length = cxl_poison_record_dpa_length(record);
 677                 __entry->source = cxl_poison_record_source(record);
 678                 __entry->trace_type = trace_type;
 679                 __entry->flags = flags;
 680                 if (region) {
 681                         __assign_str(region, dev_name(&region->dev));
 682                         memcpy(__entry->uuid, &region->params.uuid, 16);
 683                         __entry->hpa = cxl_trace_hpa(region, cxlmd,
 684                                                      __entry->dpa);
 685                 } else {
 686                         __assign_str(region, "");
 687                         memset(__entry->uuid, 0, 16);
 688                         __entry->hpa = ULLONG_MAX;
 689                 }
 690             ),
 691
 692         TP_printk("memdev=%s host=%s serial=%lld trace_type=%s region=%s "  \
 693                 "region_uuid=%pU hpa=0x%llx dpa=0x%llx dpa_length=0x%x "    \
 694                 "source=%s flags=%s overflow_time=%llu",
 695                 __get_str(memdev),
 696                 __get_str(host),
 697                 __entry->serial,
 698                 show_poison_trace_type(__entry->trace_type),
 699                 __get_str(region),
 700                 __entry->uuid,
 701                 __entry->hpa,
 702                 __entry->dpa,
 703                 __entry->dpa_length,
 704                 show_poison_source(__entry->source),
 705                 show_poison_flags(__entry->flags),
 706                 __entry->overflow_ts
 707         )
 708 );
 709
 710 #endif /* _CXL_EVENTS_H */
 711
 712 #define TRACE_INCLUDE_FILE trace
 713 #include <trace/define_trace.h>