2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
36 unsigned long numpages;
39 unsigned force_split : 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
59 void update_page_count(int level, unsigned long pages)
61 /* Protect against CPA */
63 direct_pages_count[level] += pages;
64 spin_unlock(&pgd_lock);
67 static void split_page_count(int level)
69 if (direct_pages_count[level] == 0)
72 direct_pages_count[level]--;
73 direct_pages_count[level - 1] += PTRS_PER_PTE;
76 void arch_report_meminfo(struct seq_file *m)
78 seq_printf(m, "DirectMap4k: %8lu kB\n",
79 direct_pages_count[PG_LEVEL_4K] << 2);
80 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
81 seq_printf(m, "DirectMap2M: %8lu kB\n",
82 direct_pages_count[PG_LEVEL_2M] << 11);
84 seq_printf(m, "DirectMap4M: %8lu kB\n",
85 direct_pages_count[PG_LEVEL_2M] << 12);
88 seq_printf(m, "DirectMap1G: %8lu kB\n",
89 direct_pages_count[PG_LEVEL_1G] << 20);
92 static inline void split_page_count(int level) { }
97 static inline unsigned long highmap_start_pfn(void)
99 return __pa_symbol(_text) >> PAGE_SHIFT;
102 static inline unsigned long highmap_end_pfn(void)
104 /* Do not reference physical address outside the kernel. */
105 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
111 within(unsigned long addr, unsigned long start, unsigned long end)
113 return addr >= start && addr < end;
117 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
119 return addr >= start && addr <= end;
127 * clflush_cache_range - flush a cache range with clflush
128 * @vaddr: virtual start address
129 * @size: number of bytes to flush
131 * clflushopt is an unordered instruction which needs fencing with mfence or
132 * sfence to avoid ordering issues.
134 void clflush_cache_range(void *vaddr, unsigned int size)
136 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
137 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
138 void *vend = vaddr + size;
145 for (; p < vend; p += clflush_size)
150 EXPORT_SYMBOL_GPL(clflush_cache_range);
152 static void __cpa_flush_all(void *arg)
154 unsigned long cache = (unsigned long)arg;
157 * Flush all to work around Errata in early athlons regarding
158 * large page flushing.
162 if (cache && boot_cpu_data.x86 >= 4)
166 static void cpa_flush_all(unsigned long cache)
168 BUG_ON(irqs_disabled());
170 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
173 static void __cpa_flush_range(void *arg)
176 * We could optimize that further and do individual per page
177 * tlb invalidates for a low number of pages. Caveat: we must
178 * flush the high aliases on 64bit as well.
183 static void cpa_flush_range(unsigned long start, int numpages, int cache)
185 unsigned int i, level;
188 BUG_ON(irqs_disabled());
189 WARN_ON(PAGE_ALIGN(start) != start);
191 on_each_cpu(__cpa_flush_range, NULL, 1);
197 * We only need to flush on one CPU,
198 * clflush is a MESI-coherent instruction that
199 * will cause all other CPUs to flush the same
202 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
203 pte_t *pte = lookup_address(addr, &level);
206 * Only flush present addresses:
208 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
209 clflush_cache_range((void *) addr, PAGE_SIZE);
213 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
214 int in_flags, struct page **pages)
216 unsigned int i, level;
217 #ifdef CONFIG_PREEMPT
219 * Avoid wbinvd() because it causes latencies on all CPUs,
220 * regardless of any CPU isolation that may be in effect.
222 * This should be extended for CAT enabled systems independent of
223 * PREEMPT because wbinvd() does not respect the CAT partitions and
224 * this is exposed to unpriviledged users through the graphics
227 unsigned long do_wbinvd = 0;
229 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
232 BUG_ON(irqs_disabled());
234 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
236 if (!cache || do_wbinvd)
240 * We only need to flush on one CPU,
241 * clflush is a MESI-coherent instruction that
242 * will cause all other CPUs to flush the same
245 for (i = 0; i < numpages; i++) {
249 if (in_flags & CPA_PAGES_ARRAY)
250 addr = (unsigned long)page_address(pages[i]);
254 pte = lookup_address(addr, &level);
257 * Only flush present addresses:
259 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
260 clflush_cache_range((void *)addr, PAGE_SIZE);
265 * Certain areas of memory on x86 require very specific protection flags,
266 * for example the BIOS area or kernel text. Callers don't always get this
267 * right (again, ioremap() on BIOS memory is not uncommon) so this function
268 * checks and fixes these known static required protection bits.
270 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
273 pgprot_t forbidden = __pgprot(0);
276 * The BIOS area between 640k and 1Mb needs to be executable for
277 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
279 #ifdef CONFIG_PCI_BIOS
280 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
281 pgprot_val(forbidden) |= _PAGE_NX;
285 * The kernel text needs to be executable for obvious reasons
286 * Does not cover __inittext since that is gone later on. On
287 * 64bit we do not enforce !NX on the low mapping
289 if (within(address, (unsigned long)_text, (unsigned long)_etext))
290 pgprot_val(forbidden) |= _PAGE_NX;
293 * The .rodata section needs to be read-only. Using the pfn
294 * catches all aliases.
296 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
297 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
298 pgprot_val(forbidden) |= _PAGE_RW;
300 #if defined(CONFIG_X86_64)
302 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
303 * kernel text mappings for the large page aligned text, rodata sections
304 * will be always read-only. For the kernel identity mappings covering
305 * the holes caused by this alignment can be anything that user asks.
307 * This will preserve the large page mappings for kernel text/data
310 if (kernel_set_to_readonly &&
311 within(address, (unsigned long)_text,
312 (unsigned long)__end_rodata_hpage_align)) {
316 * Don't enforce the !RW mapping for the kernel text mapping,
317 * if the current mapping is already using small page mapping.
318 * No need to work hard to preserve large page mappings in this
321 * This also fixes the Linux Xen paravirt guest boot failure
322 * (because of unexpected read-only mappings for kernel identity
323 * mappings). In this paravirt guest case, the kernel text
324 * mapping and the kernel identity mapping share the same
325 * page-table pages. Thus we can't really use different
326 * protections for the kernel text and identity mappings. Also,
327 * these shared mappings are made of small page mappings.
328 * Thus this don't enforce !RW mapping for small page kernel
329 * text mapping logic will help Linux Xen parvirt guest boot
332 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
333 pgprot_val(forbidden) |= _PAGE_RW;
337 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
343 * Lookup the page table entry for a virtual address in a specific pgd.
344 * Return a pointer to the entry and the level of the mapping.
346 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
353 *level = PG_LEVEL_NONE;
358 p4d = p4d_offset(pgd, address);
362 *level = PG_LEVEL_512G;
363 if (p4d_large(*p4d) || !p4d_present(*p4d))
366 pud = pud_offset(p4d, address);
370 *level = PG_LEVEL_1G;
371 if (pud_large(*pud) || !pud_present(*pud))
374 pmd = pmd_offset(pud, address);
378 *level = PG_LEVEL_2M;
379 if (pmd_large(*pmd) || !pmd_present(*pmd))
382 *level = PG_LEVEL_4K;
384 return pte_offset_kernel(pmd, address);
388 * Lookup the page table entry for a virtual address. Return a pointer
389 * to the entry and the level of the mapping.
391 * Note: We return pud and pmd either when the entry is marked large
392 * or when the present bit is not set. Otherwise we would return a
393 * pointer to a nonexisting mapping.
395 pte_t *lookup_address(unsigned long address, unsigned int *level)
397 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
399 EXPORT_SYMBOL_GPL(lookup_address);
401 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
405 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
408 return lookup_address(address, level);
412 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
413 * or NULL if not present.
415 pmd_t *lookup_pmd_address(unsigned long address)
421 pgd = pgd_offset_k(address);
425 p4d = p4d_offset(pgd, address);
426 if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
429 pud = pud_offset(p4d, address);
430 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
433 return pmd_offset(pud, address);
437 * This is necessary because __pa() does not work on some
438 * kinds of memory, like vmalloc() or the alloc_remap()
439 * areas on 32-bit NUMA systems. The percpu areas can
440 * end up in this kind of memory, for instance.
442 * This could be optimized, but it is only intended to be
443 * used at inititalization time, and keeping it
444 * unoptimized should increase the testing coverage for
445 * the more obscure platforms.
447 phys_addr_t slow_virt_to_phys(void *__virt_addr)
449 unsigned long virt_addr = (unsigned long)__virt_addr;
450 phys_addr_t phys_addr;
451 unsigned long offset;
455 pte = lookup_address(virt_addr, &level);
459 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
460 * before being left-shifted PAGE_SHIFT bits -- this trick is to
461 * make 32-PAE kernel work correctly.
465 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
466 offset = virt_addr & ~PUD_PAGE_MASK;
469 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
470 offset = virt_addr & ~PMD_PAGE_MASK;
473 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
474 offset = virt_addr & ~PAGE_MASK;
477 return (phys_addr_t)(phys_addr | offset);
479 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
482 * Set the new pmd in all the pgds we know about:
484 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
487 set_pte_atomic(kpte, pte);
489 if (!SHARED_KERNEL_PMD) {
492 list_for_each_entry(page, &pgd_list, lru) {
498 pgd = (pgd_t *)page_address(page) + pgd_index(address);
499 p4d = p4d_offset(pgd, address);
500 pud = pud_offset(p4d, address);
501 pmd = pmd_offset(pud, address);
502 set_pte_atomic((pte_t *)pmd, pte);
509 try_preserve_large_page(pte_t *kpte, unsigned long address,
510 struct cpa_data *cpa)
512 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
513 pte_t new_pte, old_pte, *tmp;
514 pgprot_t old_prot, new_prot, req_prot;
518 if (cpa->force_split)
521 spin_lock(&pgd_lock);
523 * Check for races, another CPU might have split this page
526 tmp = _lookup_address_cpa(cpa, address, &level);
532 old_prot = pmd_pgprot(*(pmd_t *)kpte);
533 old_pfn = pmd_pfn(*(pmd_t *)kpte);
536 old_prot = pud_pgprot(*(pud_t *)kpte);
537 old_pfn = pud_pfn(*(pud_t *)kpte);
544 psize = page_level_size(level);
545 pmask = page_level_mask(level);
548 * Calculate the number of pages, which fit into this large
549 * page starting at address:
551 nextpage_addr = (address + psize) & pmask;
552 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
553 if (numpages < cpa->numpages)
554 cpa->numpages = numpages;
557 * We are safe now. Check whether the new pgprot is the same:
558 * Convert protection attributes to 4k-format, as cpa->mask* are set
562 req_prot = pgprot_large_2_4k(old_prot);
564 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
565 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
568 * req_prot is in format of 4k pages. It must be converted to large
569 * page format: the caching mode includes the PAT bit located at
570 * different bit positions in the two formats.
572 req_prot = pgprot_4k_2_large(req_prot);
575 * Set the PSE and GLOBAL flags only if the PRESENT flag is
576 * set otherwise pmd_present/pmd_huge will return true even on
577 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
578 * for the ancient hardware that doesn't support it.
580 if (pgprot_val(req_prot) & _PAGE_PRESENT)
581 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
583 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
585 req_prot = canon_pgprot(req_prot);
588 * old_pfn points to the large page base pfn. So we need
589 * to add the offset of the virtual address:
591 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
594 new_prot = static_protections(req_prot, address, pfn);
597 * We need to check the full range, whether
598 * static_protection() requires a different pgprot for one of
599 * the pages in the range we try to preserve:
601 addr = address & pmask;
603 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
604 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
606 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
611 * If there are no changes, return. maxpages has been updated
614 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
620 * We need to change the attributes. Check, whether we can
621 * change the large page in one go. We request a split, when
622 * the address is not aligned and the number of pages is
623 * smaller than the number of pages in the large page. Note
624 * that we limited the number of possible pages already to
625 * the number of pages in the large page.
627 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
629 * The address is aligned and the number of pages
630 * covers the full page.
632 new_pte = pfn_pte(old_pfn, new_prot);
633 __set_pmd_pte(kpte, address, new_pte);
634 cpa->flags |= CPA_FLUSHTLB;
639 spin_unlock(&pgd_lock);
645 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
648 pte_t *pbase = (pte_t *)page_address(base);
649 unsigned long ref_pfn, pfn, pfninc = 1;
650 unsigned int i, level;
654 spin_lock(&pgd_lock);
656 * Check for races, another CPU might have split this page
659 tmp = _lookup_address_cpa(cpa, address, &level);
661 spin_unlock(&pgd_lock);
665 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
669 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
670 /* clear PSE and promote PAT bit to correct position */
671 ref_prot = pgprot_large_2_4k(ref_prot);
672 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
676 ref_prot = pud_pgprot(*(pud_t *)kpte);
677 ref_pfn = pud_pfn(*(pud_t *)kpte);
678 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
681 * Clear the PSE flags if the PRESENT flag is not set
682 * otherwise pmd_present/pmd_huge will return true
683 * even on a non present pmd.
685 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
686 pgprot_val(ref_prot) &= ~_PAGE_PSE;
690 spin_unlock(&pgd_lock);
695 * Set the GLOBAL flags only if the PRESENT flag is set
696 * otherwise pmd/pte_present will return true even on a non
697 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
698 * for the ancient hardware that doesn't support it.
700 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
701 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
703 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
706 * Get the target pfn from the original entry:
709 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
710 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
712 if (virt_addr_valid(address)) {
713 unsigned long pfn = PFN_DOWN(__pa(address));
715 if (pfn_range_is_mapped(pfn, pfn + 1))
716 split_page_count(level);
720 * Install the new, split up pagetable.
722 * We use the standard kernel pagetable protections for the new
723 * pagetable protections, the actual ptes set above control the
724 * primary protection behavior:
726 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
729 * Intel Atom errata AAH41 workaround.
731 * The real fix should be in hw or in a microcode update, but
732 * we also probabilistically try to reduce the window of having
733 * a large TLB mixed with 4K TLBs while instruction fetches are
737 spin_unlock(&pgd_lock);
742 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
743 unsigned long address)
747 if (!debug_pagealloc_enabled())
748 spin_unlock(&cpa_lock);
749 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
750 if (!debug_pagealloc_enabled())
751 spin_lock(&cpa_lock);
755 if (__split_large_page(cpa, kpte, address, base))
761 static bool try_to_free_pte_page(pte_t *pte)
765 for (i = 0; i < PTRS_PER_PTE; i++)
766 if (!pte_none(pte[i]))
769 free_page((unsigned long)pte);
773 static bool try_to_free_pmd_page(pmd_t *pmd)
777 for (i = 0; i < PTRS_PER_PMD; i++)
778 if (!pmd_none(pmd[i]))
781 free_page((unsigned long)pmd);
785 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
787 pte_t *pte = pte_offset_kernel(pmd, start);
789 while (start < end) {
790 set_pte(pte, __pte(0));
796 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
803 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
804 unsigned long start, unsigned long end)
806 if (unmap_pte_range(pmd, start, end))
807 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
811 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
813 pmd_t *pmd = pmd_offset(pud, start);
816 * Not on a 2MB page boundary?
818 if (start & (PMD_SIZE - 1)) {
819 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
820 unsigned long pre_end = min_t(unsigned long, end, next_page);
822 __unmap_pmd_range(pud, pmd, start, pre_end);
829 * Try to unmap in 2M chunks.
831 while (end - start >= PMD_SIZE) {
835 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
845 return __unmap_pmd_range(pud, pmd, start, end);
848 * Try again to free the PMD page if haven't succeeded above.
851 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
855 static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
857 pud_t *pud = pud_offset(p4d, start);
860 * Not on a GB page boundary?
862 if (start & (PUD_SIZE - 1)) {
863 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
864 unsigned long pre_end = min_t(unsigned long, end, next_page);
866 unmap_pmd_range(pud, start, pre_end);
873 * Try to unmap in 1G chunks?
875 while (end - start >= PUD_SIZE) {
880 unmap_pmd_range(pud, start, start + PUD_SIZE);
890 unmap_pmd_range(pud, start, end);
893 * No need to try to free the PUD page because we'll free it in
894 * populate_pgd's error path
898 static int alloc_pte_page(pmd_t *pmd)
900 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
904 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
908 static int alloc_pmd_page(pud_t *pud)
910 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
914 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
918 static void populate_pte(struct cpa_data *cpa,
919 unsigned long start, unsigned long end,
920 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
924 pte = pte_offset_kernel(pmd, start);
927 * Set the GLOBAL flags only if the PRESENT flag is
928 * set otherwise pte_present will return true even on
929 * a non present pte. The canon_pgprot will clear
930 * _PAGE_GLOBAL for the ancient hardware that doesn't
933 if (pgprot_val(pgprot) & _PAGE_PRESENT)
934 pgprot_val(pgprot) |= _PAGE_GLOBAL;
936 pgprot_val(pgprot) &= ~_PAGE_GLOBAL;
938 pgprot = canon_pgprot(pgprot);
940 while (num_pages-- && start < end) {
941 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
949 static long populate_pmd(struct cpa_data *cpa,
950 unsigned long start, unsigned long end,
951 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
958 * Not on a 2M boundary?
960 if (start & (PMD_SIZE - 1)) {
961 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
962 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
964 pre_end = min_t(unsigned long, pre_end, next_page);
965 cur_pages = (pre_end - start) >> PAGE_SHIFT;
966 cur_pages = min_t(unsigned int, num_pages, cur_pages);
971 pmd = pmd_offset(pud, start);
973 if (alloc_pte_page(pmd))
976 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
982 * We mapped them all?
984 if (num_pages == cur_pages)
987 pmd_pgprot = pgprot_4k_2_large(pgprot);
989 while (end - start >= PMD_SIZE) {
992 * We cannot use a 1G page so allocate a PMD page if needed.
995 if (alloc_pmd_page(pud))
998 pmd = pmd_offset(pud, start);
1000 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1001 massage_pgprot(pmd_pgprot)));
1004 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1005 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1009 * Map trailing 4K pages.
1012 pmd = pmd_offset(pud, start);
1014 if (alloc_pte_page(pmd))
1017 populate_pte(cpa, start, end, num_pages - cur_pages,
1023 static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1029 pgprot_t pud_pgprot;
1031 end = start + (cpa->numpages << PAGE_SHIFT);
1034 * Not on a Gb page boundary? => map everything up to it with
1037 if (start & (PUD_SIZE - 1)) {
1038 unsigned long pre_end;
1039 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1041 pre_end = min_t(unsigned long, end, next_page);
1042 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1043 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1045 pud = pud_offset(p4d, start);
1051 if (alloc_pmd_page(pud))
1054 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1062 /* We mapped them all? */
1063 if (cpa->numpages == cur_pages)
1066 pud = pud_offset(p4d, start);
1067 pud_pgprot = pgprot_4k_2_large(pgprot);
1070 * Map everything starting from the Gb boundary, possibly with 1G pages
1072 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1073 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1074 massage_pgprot(pud_pgprot)));
1077 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1078 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1082 /* Map trailing leftover */
1086 pud = pud_offset(p4d, start);
1088 if (alloc_pmd_page(pud))
1091 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1102 * Restrictions for kernel page table do not necessarily apply when mapping in
1105 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1107 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1108 pud_t *pud = NULL; /* shut up gcc */
1113 pgd_entry = cpa->pgd + pgd_index(addr);
1115 if (pgd_none(*pgd_entry)) {
1116 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1120 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1124 * Allocate a PUD page and hand it down for mapping.
1126 p4d = p4d_offset(pgd_entry, addr);
1127 if (p4d_none(*p4d)) {
1128 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1132 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1135 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1136 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1138 ret = populate_pud(cpa, addr, p4d, pgprot);
1141 * Leave the PUD page in place in case some other CPU or thread
1142 * already found it, but remove any useless entries we just
1145 unmap_pud_range(p4d, addr,
1146 addr + (cpa->numpages << PAGE_SHIFT));
1150 cpa->numpages = ret;
1154 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1159 * Right now, we only execute this code path when mapping
1160 * the EFI virtual memory map regions, no other users
1161 * provide a ->pgd value. This may change in the future.
1163 return populate_pgd(cpa, vaddr);
1167 * Ignore all non primary paths.
1175 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1177 * Also set numpages to '1' indicating that we processed cpa req for
1178 * one virtual address page and its pfn. TBD: numpages can be set based
1179 * on the initial value and the level returned by lookup_address().
1181 if (within(vaddr, PAGE_OFFSET,
1182 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1184 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1187 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1188 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1195 static int __change_page_attr(struct cpa_data *cpa, int primary)
1197 unsigned long address;
1200 pte_t *kpte, old_pte;
1202 if (cpa->flags & CPA_PAGES_ARRAY) {
1203 struct page *page = cpa->pages[cpa->curpage];
1204 if (unlikely(PageHighMem(page)))
1206 address = (unsigned long)page_address(page);
1207 } else if (cpa->flags & CPA_ARRAY)
1208 address = cpa->vaddr[cpa->curpage];
1210 address = *cpa->vaddr;
1212 kpte = _lookup_address_cpa(cpa, address, &level);
1214 return __cpa_process_fault(cpa, address, primary);
1217 if (pte_none(old_pte))
1218 return __cpa_process_fault(cpa, address, primary);
1220 if (level == PG_LEVEL_4K) {
1222 pgprot_t new_prot = pte_pgprot(old_pte);
1223 unsigned long pfn = pte_pfn(old_pte);
1225 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1226 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1228 new_prot = static_protections(new_prot, address, pfn);
1231 * Set the GLOBAL flags only if the PRESENT flag is
1232 * set otherwise pte_present will return true even on
1233 * a non present pte. The canon_pgprot will clear
1234 * _PAGE_GLOBAL for the ancient hardware that doesn't
1237 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1238 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1240 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1243 * We need to keep the pfn from the existing PTE,
1244 * after all we're only going to change it's attributes
1245 * not the memory it points to
1247 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1250 * Do we really change anything ?
1252 if (pte_val(old_pte) != pte_val(new_pte)) {
1253 set_pte_atomic(kpte, new_pte);
1254 cpa->flags |= CPA_FLUSHTLB;
1261 * Check, whether we can keep the large page intact
1262 * and just change the pte:
1264 do_split = try_preserve_large_page(kpte, address, cpa);
1266 * When the range fits into the existing large page,
1267 * return. cp->numpages and cpa->tlbflush have been updated in
1274 * We have to split the large page:
1276 err = split_large_page(cpa, kpte, address);
1279 * Do a global flush tlb after splitting the large page
1280 * and before we do the actual change page attribute in the PTE.
1282 * With out this, we violate the TLB application note, that says
1283 * "The TLBs may contain both ordinary and large-page
1284 * translations for a 4-KByte range of linear addresses. This
1285 * may occur if software modifies the paging structures so that
1286 * the page size used for the address range changes. If the two
1287 * translations differ with respect to page frame or attributes
1288 * (e.g., permissions), processor behavior is undefined and may
1289 * be implementation-specific."
1291 * We do this global tlb flush inside the cpa_lock, so that we
1292 * don't allow any other cpu, with stale tlb entries change the
1293 * page attribute in parallel, that also falls into the
1294 * just split large page entry.
1303 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1305 static int cpa_process_alias(struct cpa_data *cpa)
1307 struct cpa_data alias_cpa;
1308 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1309 unsigned long vaddr;
1312 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1316 * No need to redo, when the primary call touched the direct
1319 if (cpa->flags & CPA_PAGES_ARRAY) {
1320 struct page *page = cpa->pages[cpa->curpage];
1321 if (unlikely(PageHighMem(page)))
1323 vaddr = (unsigned long)page_address(page);
1324 } else if (cpa->flags & CPA_ARRAY)
1325 vaddr = cpa->vaddr[cpa->curpage];
1327 vaddr = *cpa->vaddr;
1329 if (!(within(vaddr, PAGE_OFFSET,
1330 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1333 alias_cpa.vaddr = &laddr;
1334 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1336 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1341 #ifdef CONFIG_X86_64
1343 * If the primary call didn't touch the high mapping already
1344 * and the physical address is inside the kernel map, we need
1345 * to touch the high mapped kernel as well:
1347 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1348 within_inclusive(cpa->pfn, highmap_start_pfn(),
1349 highmap_end_pfn())) {
1350 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1351 __START_KERNEL_map - phys_base;
1353 alias_cpa.vaddr = &temp_cpa_vaddr;
1354 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1357 * The high mapping range is imprecise, so ignore the
1360 __change_page_attr_set_clr(&alias_cpa, 0);
1367 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1369 unsigned long numpages = cpa->numpages;
1374 * Store the remaining nr of pages for the large page
1375 * preservation check.
1377 cpa->numpages = numpages;
1378 /* for array changes, we can't use large page */
1379 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1382 if (!debug_pagealloc_enabled())
1383 spin_lock(&cpa_lock);
1384 ret = __change_page_attr(cpa, checkalias);
1385 if (!debug_pagealloc_enabled())
1386 spin_unlock(&cpa_lock);
1391 ret = cpa_process_alias(cpa);
1397 * Adjust the number of pages with the result of the
1398 * CPA operation. Either a large page has been
1399 * preserved or a single page update happened.
1401 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1402 numpages -= cpa->numpages;
1403 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1406 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1412 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1413 pgprot_t mask_set, pgprot_t mask_clr,
1414 int force_split, int in_flag,
1415 struct page **pages)
1417 struct cpa_data cpa;
1418 int ret, cache, checkalias;
1419 unsigned long baddr = 0;
1421 memset(&cpa, 0, sizeof(cpa));
1424 * Check, if we are requested to change a not supported
1427 mask_set = canon_pgprot(mask_set);
1428 mask_clr = canon_pgprot(mask_clr);
1429 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1432 /* Ensure we are PAGE_SIZE aligned */
1433 if (in_flag & CPA_ARRAY) {
1435 for (i = 0; i < numpages; i++) {
1436 if (addr[i] & ~PAGE_MASK) {
1437 addr[i] &= PAGE_MASK;
1441 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1443 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1444 * No need to cehck in that case
1446 if (*addr & ~PAGE_MASK) {
1449 * People should not be passing in unaligned addresses:
1454 * Save address for cache flush. *addr is modified in the call
1455 * to __change_page_attr_set_clr() below.
1460 /* Must avoid aliasing mappings in the highmem code */
1461 kmap_flush_unused();
1467 cpa.numpages = numpages;
1468 cpa.mask_set = mask_set;
1469 cpa.mask_clr = mask_clr;
1472 cpa.force_split = force_split;
1474 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1475 cpa.flags |= in_flag;
1477 /* No alias checking for _NX bit modifications */
1478 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1480 ret = __change_page_attr_set_clr(&cpa, checkalias);
1483 * Check whether we really changed something:
1485 if (!(cpa.flags & CPA_FLUSHTLB))
1489 * No need to flush, when we did not set any of the caching
1492 cache = !!pgprot2cachemode(mask_set);
1495 * On success we use CLFLUSH, when the CPU supports it to
1496 * avoid the WBINVD. If the CPU does not support it and in the
1497 * error case we fall back to cpa_flush_all (which uses
1500 if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1501 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1502 cpa_flush_array(addr, numpages, cache,
1505 cpa_flush_range(baddr, numpages, cache);
1507 cpa_flush_all(cache);
1513 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1514 pgprot_t mask, int array)
1516 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1517 (array ? CPA_ARRAY : 0), NULL);
1520 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1521 pgprot_t mask, int array)
1523 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1524 (array ? CPA_ARRAY : 0), NULL);
1527 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1530 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1531 CPA_PAGES_ARRAY, pages);
1534 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1537 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1538 CPA_PAGES_ARRAY, pages);
1541 int _set_memory_uc(unsigned long addr, int numpages)
1544 * for now UC MINUS. see comments in ioremap_nocache()
1545 * If you really need strong UC use ioremap_uc(), but note
1546 * that you cannot override IO areas with set_memory_*() as
1547 * these helpers cannot work with IO memory.
1549 return change_page_attr_set(&addr, numpages,
1550 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1554 int set_memory_uc(unsigned long addr, int numpages)
1559 * for now UC MINUS. see comments in ioremap_nocache()
1561 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1562 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1566 ret = _set_memory_uc(addr, numpages);
1573 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1577 EXPORT_SYMBOL(set_memory_uc);
1579 static int _set_memory_array(unsigned long *addr, int addrinarray,
1580 enum page_cache_mode new_type)
1582 enum page_cache_mode set_type;
1586 for (i = 0; i < addrinarray; i++) {
1587 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1593 /* If WC, set to UC- first and then WC */
1594 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1595 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1597 ret = change_page_attr_set(addr, addrinarray,
1598 cachemode2pgprot(set_type), 1);
1600 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1601 ret = change_page_attr_set_clr(addr, addrinarray,
1603 _PAGE_CACHE_MODE_WC),
1604 __pgprot(_PAGE_CACHE_MASK),
1605 0, CPA_ARRAY, NULL);
1612 for (j = 0; j < i; j++)
1613 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1618 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1620 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1622 EXPORT_SYMBOL(set_memory_array_uc);
1624 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1626 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1628 EXPORT_SYMBOL(set_memory_array_wc);
1630 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1632 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1634 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1636 int _set_memory_wc(unsigned long addr, int numpages)
1639 unsigned long addr_copy = addr;
1641 ret = change_page_attr_set(&addr, numpages,
1642 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1645 ret = change_page_attr_set_clr(&addr_copy, numpages,
1647 _PAGE_CACHE_MODE_WC),
1648 __pgprot(_PAGE_CACHE_MASK),
1654 int set_memory_wc(unsigned long addr, int numpages)
1658 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1659 _PAGE_CACHE_MODE_WC, NULL);
1663 ret = _set_memory_wc(addr, numpages);
1665 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1669 EXPORT_SYMBOL(set_memory_wc);
1671 int _set_memory_wt(unsigned long addr, int numpages)
1673 return change_page_attr_set(&addr, numpages,
1674 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1677 int set_memory_wt(unsigned long addr, int numpages)
1681 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1682 _PAGE_CACHE_MODE_WT, NULL);
1686 ret = _set_memory_wt(addr, numpages);
1688 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1692 EXPORT_SYMBOL_GPL(set_memory_wt);
1694 int _set_memory_wb(unsigned long addr, int numpages)
1696 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1697 return change_page_attr_clear(&addr, numpages,
1698 __pgprot(_PAGE_CACHE_MASK), 0);
1701 int set_memory_wb(unsigned long addr, int numpages)
1705 ret = _set_memory_wb(addr, numpages);
1709 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1712 EXPORT_SYMBOL(set_memory_wb);
1714 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1719 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1720 ret = change_page_attr_clear(addr, addrinarray,
1721 __pgprot(_PAGE_CACHE_MASK), 1);
1725 for (i = 0; i < addrinarray; i++)
1726 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1730 EXPORT_SYMBOL(set_memory_array_wb);
1732 int set_memory_x(unsigned long addr, int numpages)
1734 if (!(__supported_pte_mask & _PAGE_NX))
1737 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1739 EXPORT_SYMBOL(set_memory_x);
1741 int set_memory_nx(unsigned long addr, int numpages)
1743 if (!(__supported_pte_mask & _PAGE_NX))
1746 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1748 EXPORT_SYMBOL(set_memory_nx);
1750 int set_memory_ro(unsigned long addr, int numpages)
1752 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1755 int set_memory_rw(unsigned long addr, int numpages)
1757 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1760 int set_memory_np(unsigned long addr, int numpages)
1762 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1765 int set_memory_4k(unsigned long addr, int numpages)
1767 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1768 __pgprot(0), 1, 0, NULL);
1771 int set_pages_uc(struct page *page, int numpages)
1773 unsigned long addr = (unsigned long)page_address(page);
1775 return set_memory_uc(addr, numpages);
1777 EXPORT_SYMBOL(set_pages_uc);
1779 static int _set_pages_array(struct page **pages, int addrinarray,
1780 enum page_cache_mode new_type)
1782 unsigned long start;
1784 enum page_cache_mode set_type;
1789 for (i = 0; i < addrinarray; i++) {
1790 if (PageHighMem(pages[i]))
1792 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1793 end = start + PAGE_SIZE;
1794 if (reserve_memtype(start, end, new_type, NULL))
1798 /* If WC, set to UC- first and then WC */
1799 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1800 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1802 ret = cpa_set_pages_array(pages, addrinarray,
1803 cachemode2pgprot(set_type));
1804 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1805 ret = change_page_attr_set_clr(NULL, addrinarray,
1807 _PAGE_CACHE_MODE_WC),
1808 __pgprot(_PAGE_CACHE_MASK),
1809 0, CPA_PAGES_ARRAY, pages);
1812 return 0; /* Success */
1815 for (i = 0; i < free_idx; i++) {
1816 if (PageHighMem(pages[i]))
1818 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1819 end = start + PAGE_SIZE;
1820 free_memtype(start, end);
1825 int set_pages_array_uc(struct page **pages, int addrinarray)
1827 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1829 EXPORT_SYMBOL(set_pages_array_uc);
1831 int set_pages_array_wc(struct page **pages, int addrinarray)
1833 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1835 EXPORT_SYMBOL(set_pages_array_wc);
1837 int set_pages_array_wt(struct page **pages, int addrinarray)
1839 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1841 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1843 int set_pages_wb(struct page *page, int numpages)
1845 unsigned long addr = (unsigned long)page_address(page);
1847 return set_memory_wb(addr, numpages);
1849 EXPORT_SYMBOL(set_pages_wb);
1851 int set_pages_array_wb(struct page **pages, int addrinarray)
1854 unsigned long start;
1858 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1859 retval = cpa_clear_pages_array(pages, addrinarray,
1860 __pgprot(_PAGE_CACHE_MASK));
1864 for (i = 0; i < addrinarray; i++) {
1865 if (PageHighMem(pages[i]))
1867 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1868 end = start + PAGE_SIZE;
1869 free_memtype(start, end);
1874 EXPORT_SYMBOL(set_pages_array_wb);
1876 int set_pages_x(struct page *page, int numpages)
1878 unsigned long addr = (unsigned long)page_address(page);
1880 return set_memory_x(addr, numpages);
1882 EXPORT_SYMBOL(set_pages_x);
1884 int set_pages_nx(struct page *page, int numpages)
1886 unsigned long addr = (unsigned long)page_address(page);
1888 return set_memory_nx(addr, numpages);
1890 EXPORT_SYMBOL(set_pages_nx);
1892 int set_pages_ro(struct page *page, int numpages)
1894 unsigned long addr = (unsigned long)page_address(page);
1896 return set_memory_ro(addr, numpages);
1899 int set_pages_rw(struct page *page, int numpages)
1901 unsigned long addr = (unsigned long)page_address(page);
1903 return set_memory_rw(addr, numpages);
1906 #ifdef CONFIG_DEBUG_PAGEALLOC
1908 static int __set_pages_p(struct page *page, int numpages)
1910 unsigned long tempaddr = (unsigned long) page_address(page);
1911 struct cpa_data cpa = { .vaddr = &tempaddr,
1913 .numpages = numpages,
1914 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1915 .mask_clr = __pgprot(0),
1919 * No alias checking needed for setting present flag. otherwise,
1920 * we may need to break large pages for 64-bit kernel text
1921 * mappings (this adds to complexity if we want to do this from
1922 * atomic context especially). Let's keep it simple!
1924 return __change_page_attr_set_clr(&cpa, 0);
1927 static int __set_pages_np(struct page *page, int numpages)
1929 unsigned long tempaddr = (unsigned long) page_address(page);
1930 struct cpa_data cpa = { .vaddr = &tempaddr,
1932 .numpages = numpages,
1933 .mask_set = __pgprot(0),
1934 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1938 * No alias checking needed for setting not present flag. otherwise,
1939 * we may need to break large pages for 64-bit kernel text
1940 * mappings (this adds to complexity if we want to do this from
1941 * atomic context especially). Let's keep it simple!
1943 return __change_page_attr_set_clr(&cpa, 0);
1946 void __kernel_map_pages(struct page *page, int numpages, int enable)
1948 if (PageHighMem(page))
1951 debug_check_no_locks_freed(page_address(page),
1952 numpages * PAGE_SIZE);
1956 * The return value is ignored as the calls cannot fail.
1957 * Large pages for identity mappings are not used at boot time
1958 * and hence no memory allocations during large page split.
1961 __set_pages_p(page, numpages);
1963 __set_pages_np(page, numpages);
1966 * We should perform an IPI and flush all tlbs,
1967 * but that can deadlock->flush only current cpu:
1971 arch_flush_lazy_mmu_mode();
1974 #ifdef CONFIG_HIBERNATION
1976 bool kernel_page_present(struct page *page)
1981 if (PageHighMem(page))
1984 pte = lookup_address((unsigned long)page_address(page), &level);
1985 return (pte_val(*pte) & _PAGE_PRESENT);
1988 #endif /* CONFIG_HIBERNATION */
1990 #endif /* CONFIG_DEBUG_PAGEALLOC */
1992 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1993 unsigned numpages, unsigned long page_flags)
1995 int retval = -EINVAL;
1997 struct cpa_data cpa = {
2001 .numpages = numpages,
2002 .mask_set = __pgprot(0),
2003 .mask_clr = __pgprot(0),
2007 if (!(__supported_pte_mask & _PAGE_NX))
2010 if (!(page_flags & _PAGE_NX))
2011 cpa.mask_clr = __pgprot(_PAGE_NX);
2013 if (!(page_flags & _PAGE_RW))
2014 cpa.mask_clr = __pgprot(_PAGE_RW);
2016 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2018 retval = __change_page_attr_set_clr(&cpa, 0);
2026 * The testcases use internal knowledge of the implementation that shouldn't
2027 * be exposed to the rest of the kernel. Include these directly here.
2029 #ifdef CONFIG_CPA_DEBUG
2030 #include "pageattr-test.c"