arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define emul_to_vcpu(ctxt) \
  94         ((struct kvm_vcpu *)(ctxt)->vcpu)
  95
  96 /* EFER defaults:
  97  * - enable syscall per default because its emulated by KVM
  98  * - enable LME and LMA per default on 64 bit KVM
  99  */
 100 #ifdef CONFIG_X86_64
 101 static
 102 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 103 #else
 104 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 105 #endif
 106
 107 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 108
 109 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 110
 111 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 112                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 113
 114 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 115 static void process_nmi(struct kvm_vcpu *vcpu);
 116 static void process_smi(struct kvm_vcpu *vcpu);
 117 static void enter_smm(struct kvm_vcpu *vcpu);
 118 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 119 static void store_regs(struct kvm_vcpu *vcpu);
 120 static int sync_regs(struct kvm_vcpu *vcpu);
 121
 122 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 123 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 124
 125 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 126 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 127
 128 #define KVM_X86_OP(func)                                             \
 129         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 130                                 *(((struct kvm_x86_ops *)0)->func));
 131 #define KVM_X86_OP_NULL KVM_X86_OP
 132 #include <asm/kvm-x86-ops.h>
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 134 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 135 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 136
 137 static bool __read_mostly ignore_msrs = 0;
 138 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 139
 140 bool __read_mostly report_ignored_msrs = true;
 141 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 142 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 143
 144 unsigned int min_timer_period_us = 200;
 145 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly kvmclock_periodic_sync = true;
 148 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 149
 150 bool __read_mostly kvm_has_tsc_control;
 151 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 152 u32  __read_mostly kvm_max_guest_tsc_khz;
 153 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 154 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 155 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 156 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 158 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 159 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 160 bool __read_mostly kvm_has_bus_lock_exit;
 161 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 162
 163 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 164 static u32 __read_mostly tsc_tolerance_ppm = 250;
 165 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 166
 167 /*
 168  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 169  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 170  * advancement entirely.  Any other value is used as-is and disables adaptive
 171  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 172  */
 173 static int __read_mostly lapic_timer_advance_ns = -1;
 174 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 175
 176 static bool __read_mostly vector_hashing = true;
 177 module_param(vector_hashing, bool, S_IRUGO);
 178
 179 bool __read_mostly enable_vmware_backdoor = false;
 180 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 181 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 182
 183 static bool __read_mostly force_emulation_prefix = false;
 184 module_param(force_emulation_prefix, bool, S_IRUGO);
 185
 186 int __read_mostly pi_inject_timer = -1;
 187 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 188
 189 /*
 190  * Restoring the host value for MSRs that are only consumed when running in
 191  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 192  * returns to userspace, i.e. the kernel can run with the guest's value.
 193  */
 194 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 195
 196 struct kvm_user_return_msrs {
 197         struct user_return_notifier urn;
 198         bool registered;
 199         struct kvm_user_return_msr_values {
 200                 u64 host;
 201                 u64 curr;
 202         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 203 };
 204
 205 u32 __read_mostly kvm_nr_uret_msrs;
 206 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 207 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 208 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 209
 210 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 211                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 212                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 213                                 | XFEATURE_MASK_PKRU)
 214
 215 u64 __read_mostly host_efer;
 216 EXPORT_SYMBOL_GPL(host_efer);
 217
 218 bool __read_mostly allow_smaller_maxphyaddr = 0;
 219 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 220
 221 bool __read_mostly enable_apicv = true;
 222 EXPORT_SYMBOL_GPL(enable_apicv);
 223
 224 u64 __read_mostly host_xss;
 225 EXPORT_SYMBOL_GPL(host_xss);
 226 u64 __read_mostly supported_xss;
 227 EXPORT_SYMBOL_GPL(supported_xss);
 228
 229 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 230         KVM_GENERIC_VM_STATS(),
 231         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_pte_write),
 233         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 234         STATS_DESC_COUNTER(VM, mmu_flooded),
 235         STATS_DESC_COUNTER(VM, mmu_recycled),
 236         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 237         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 238         STATS_DESC_ICOUNTER(VM, pages_4k),
 239         STATS_DESC_ICOUNTER(VM, pages_2m),
 240         STATS_DESC_ICOUNTER(VM, pages_1g),
 241         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 242         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 243         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 244 };
 245
 246 const struct kvm_stats_header kvm_vm_stats_header = {
 247         .name_size = KVM_STATS_NAME_SIZE,
 248         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 249         .id_offset = sizeof(struct kvm_stats_header),
 250         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 251         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 252                        sizeof(kvm_vm_stats_desc),
 253 };
 254
 255 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 256         KVM_GENERIC_VCPU_STATS(),
 257         STATS_DESC_COUNTER(VCPU, pf_fixed),
 258         STATS_DESC_COUNTER(VCPU, pf_guest),
 259         STATS_DESC_COUNTER(VCPU, tlb_flush),
 260         STATS_DESC_COUNTER(VCPU, invlpg),
 261         STATS_DESC_COUNTER(VCPU, exits),
 262         STATS_DESC_COUNTER(VCPU, io_exits),
 263         STATS_DESC_COUNTER(VCPU, mmio_exits),
 264         STATS_DESC_COUNTER(VCPU, signal_exits),
 265         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 266         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 267         STATS_DESC_COUNTER(VCPU, l1d_flush),
 268         STATS_DESC_COUNTER(VCPU, halt_exits),
 269         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 270         STATS_DESC_COUNTER(VCPU, irq_exits),
 271         STATS_DESC_COUNTER(VCPU, host_state_reload),
 272         STATS_DESC_COUNTER(VCPU, fpu_reload),
 273         STATS_DESC_COUNTER(VCPU, insn_emulation),
 274         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 275         STATS_DESC_COUNTER(VCPU, hypercalls),
 276         STATS_DESC_COUNTER(VCPU, irq_injections),
 277         STATS_DESC_COUNTER(VCPU, nmi_injections),
 278         STATS_DESC_COUNTER(VCPU, req_event),
 279         STATS_DESC_COUNTER(VCPU, nested_run),
 280         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 281         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 282         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 283 };
 284
 285 const struct kvm_stats_header kvm_vcpu_stats_header = {
 286         .name_size = KVM_STATS_NAME_SIZE,
 287         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 288         .id_offset = sizeof(struct kvm_stats_header),
 289         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 290         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 291                        sizeof(kvm_vcpu_stats_desc),
 292 };
 293
 294 u64 __read_mostly host_xcr0;
 295 u64 __read_mostly supported_xcr0;
 296 EXPORT_SYMBOL_GPL(supported_xcr0);
 297
 298 static struct kmem_cache *x86_emulator_cache;
 299
 300 /*
 301  * When called, it means the previous get/set msr reached an invalid msr.
 302  * Return true if we want to ignore/silent this failed msr access.
 303  */
 304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 305 {
 306         const char *op = write ? "wrmsr" : "rdmsr";
 307
 308         if (ignore_msrs) {
 309                 if (report_ignored_msrs)
 310                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 311                                       op, msr, data);
 312                 /* Mask the error */
 313                 return true;
 314         } else {
 315                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 return false;
 318         }
 319 }
 320
 321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 322 {
 323         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 324         unsigned int size = sizeof(struct x86_emulate_ctxt);
 325
 326         return kmem_cache_create_usercopy("x86_emulator", size,
 327                                           __alignof__(struct x86_emulate_ctxt),
 328                                           SLAB_ACCOUNT, useroffset,
 329                                           size - useroffset, NULL);
 330 }
 331
 332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 333
 334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 335 {
 336         int i;
 337         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 338                 vcpu->arch.apf.gfns[i] = ~0;
 339 }
 340
 341 static void kvm_on_user_return(struct user_return_notifier *urn)
 342 {
 343         unsigned slot;
 344         struct kvm_user_return_msrs *msrs
 345                 = container_of(urn, struct kvm_user_return_msrs, urn);
 346         struct kvm_user_return_msr_values *values;
 347         unsigned long flags;
 348
 349         /*
 350          * Disabling irqs at this point since the following code could be
 351          * interrupted and executed through kvm_arch_hardware_disable()
 352          */
 353         local_irq_save(flags);
 354         if (msrs->registered) {
 355                 msrs->registered = false;
 356                 user_return_notifier_unregister(urn);
 357         }
 358         local_irq_restore(flags);
 359         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 360                 values = &msrs->values[slot];
 361                 if (values->host != values->curr) {
 362                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 363                         values->curr = values->host;
 364                 }
 365         }
 366 }
 367
 368 static int kvm_probe_user_return_msr(u32 msr)
 369 {
 370         u64 val;
 371         int ret;
 372
 373         preempt_disable();
 374         ret = rdmsrl_safe(msr, &val);
 375         if (ret)
 376                 goto out;
 377         ret = wrmsrl_safe(msr, val);
 378 out:
 379         preempt_enable();
 380         return ret;
 381 }
 382
 383 int kvm_add_user_return_msr(u32 msr)
 384 {
 385         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 386
 387         if (kvm_probe_user_return_msr(msr))
 388                 return -1;
 389
 390         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 391         return kvm_nr_uret_msrs++;
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 394
 395 int kvm_find_user_return_msr(u32 msr)
 396 {
 397         int i;
 398
 399         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 400                 if (kvm_uret_msrs_list[i] == msr)
 401                         return i;
 402         }
 403         return -1;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 406
 407 static void kvm_user_return_msr_cpu_online(void)
 408 {
 409         unsigned int cpu = smp_processor_id();
 410         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 411         u64 value;
 412         int i;
 413
 414         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 415                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 416                 msrs->values[i].host = value;
 417                 msrs->values[i].curr = value;
 418         }
 419 }
 420
 421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 422 {
 423         unsigned int cpu = smp_processor_id();
 424         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 425         int err;
 426
 427         value = (value & mask) | (msrs->values[slot].host & ~mask);
 428         if (value == msrs->values[slot].curr)
 429                 return 0;
 430         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 431         if (err)
 432                 return 1;
 433
 434         msrs->values[slot].curr = value;
 435         if (!msrs->registered) {
 436                 msrs->urn.on_user_return = kvm_on_user_return;
 437                 user_return_notifier_register(&msrs->urn);
 438                 msrs->registered = true;
 439         }
 440         return 0;
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 443
 444 static void drop_user_return_notifiers(void)
 445 {
 446         unsigned int cpu = smp_processor_id();
 447         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 448
 449         if (msrs->registered)
 450                 kvm_on_user_return(&msrs->urn);
 451 }
 452
 453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 454 {
 455         return vcpu->arch.apic_base;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 458
 459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 460 {
 461         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 464
 465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 466 {
 467         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 468         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 469         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 470                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 471
 472         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 473                 return 1;
 474         if (!msr_info->host_initiated) {
 475                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 476                         return 1;
 477                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 478                         return 1;
 479         }
 480
 481         kvm_lapic_set_base(vcpu, msr_info->data);
 482         kvm_recalculate_apic_map(vcpu->kvm);
 483         return 0;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 486
 487 /*
 488  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 489  *
 490  * Hardware virtualization extension instructions may fault if a reboot turns
 491  * off virtualization while processes are running.  Usually after catching the
 492  * fault we just panic; during reboot instead the instruction is ignored.
 493  */
 494 noinstr void kvm_spurious_fault(void)
 495 {
 496         /* Fault while not rebooting.  We want the trace. */
 497         BUG_ON(!kvm_rebooting);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 500
 501 #define EXCPT_BENIGN            0
 502 #define EXCPT_CONTRIBUTORY      1
 503 #define EXCPT_PF                2
 504
 505 static int exception_class(int vector)
 506 {
 507         switch (vector) {
 508         case PF_VECTOR:
 509                 return EXCPT_PF;
 510         case DE_VECTOR:
 511         case TS_VECTOR:
 512         case NP_VECTOR:
 513         case SS_VECTOR:
 514         case GP_VECTOR:
 515                 return EXCPT_CONTRIBUTORY;
 516         default:
 517                 break;
 518         }
 519         return EXCPT_BENIGN;
 520 }
 521
 522 #define EXCPT_FAULT             0
 523 #define EXCPT_TRAP              1
 524 #define EXCPT_ABORT             2
 525 #define EXCPT_INTERRUPT         3
 526
 527 static int exception_type(int vector)
 528 {
 529         unsigned int mask;
 530
 531         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 532                 return EXCPT_INTERRUPT;
 533
 534         mask = 1 << vector;
 535
 536         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 537         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 538                 return EXCPT_TRAP;
 539
 540         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 541                 return EXCPT_ABORT;
 542
 543         /* Reserved exceptions will result in fault */
 544         return EXCPT_FAULT;
 545 }
 546
 547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 548 {
 549         unsigned nr = vcpu->arch.exception.nr;
 550         bool has_payload = vcpu->arch.exception.has_payload;
 551         unsigned long payload = vcpu->arch.exception.payload;
 552
 553         if (!has_payload)
 554                 return;
 555
 556         switch (nr) {
 557         case DB_VECTOR:
 558                 /*
 559                  * "Certain debug exceptions may clear bit 0-3.  The
 560                  * remaining contents of the DR6 register are never
 561                  * cleared by the processor".
 562                  */
 563                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 564                 /*
 565                  * In order to reflect the #DB exception payload in guest
 566                  * dr6, three components need to be considered: active low
 567                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 568                  * DR6_BS and DR6_BT)
 569                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 570                  * In the target guest dr6:
 571                  * FIXED_1 bits should always be set.
 572                  * Active low bits should be cleared if 1-setting in payload.
 573                  * Active high bits should be set if 1-setting in payload.
 574                  *
 575                  * Note, the payload is compatible with the pending debug
 576                  * exceptions/exit qualification under VMX, that active_low bits
 577                  * are active high in payload.
 578                  * So they need to be flipped for DR6.
 579                  */
 580                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 581                 vcpu->arch.dr6 |= payload;
 582                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 583
 584                 /*
 585                  * The #DB payload is defined as compatible with the 'pending
 586                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 587                  * defined in the 'pending debug exceptions' field (enabled
 588                  * breakpoint), it is reserved and must be zero in DR6.
 589                  */
 590                 vcpu->arch.dr6 &= ~BIT(12);
 591                 break;
 592         case PF_VECTOR:
 593                 vcpu->arch.cr2 = payload;
 594                 break;
 595         }
 596
 597         vcpu->arch.exception.has_payload = false;
 598         vcpu->arch.exception.payload = 0;
 599 }
 600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 601
 602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 603                 unsigned nr, bool has_error, u32 error_code,
 604                 bool has_payload, unsigned long payload, bool reinject)
 605 {
 606         u32 prev_nr;
 607         int class1, class2;
 608
 609         kvm_make_request(KVM_REQ_EVENT, vcpu);
 610
 611         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 612         queue:
 613                 if (reinject) {
 614                         /*
 615                          * On vmentry, vcpu->arch.exception.pending is only
 616                          * true if an event injection was blocked by
 617                          * nested_run_pending.  In that case, however,
 618                          * vcpu_enter_guest requests an immediate exit,
 619                          * and the guest shouldn't proceed far enough to
 620                          * need reinjection.
 621                          */
 622                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 623                         vcpu->arch.exception.injected = true;
 624                         if (WARN_ON_ONCE(has_payload)) {
 625                                 /*
 626                                  * A reinjected event has already
 627                                  * delivered its payload.
 628                                  */
 629                                 has_payload = false;
 630                                 payload = 0;
 631                         }
 632                 } else {
 633                         vcpu->arch.exception.pending = true;
 634                         vcpu->arch.exception.injected = false;
 635                 }
 636                 vcpu->arch.exception.has_error_code = has_error;
 637                 vcpu->arch.exception.nr = nr;
 638                 vcpu->arch.exception.error_code = error_code;
 639                 vcpu->arch.exception.has_payload = has_payload;
 640                 vcpu->arch.exception.payload = payload;
 641                 if (!is_guest_mode(vcpu))
 642                         kvm_deliver_exception_payload(vcpu);
 643                 return;
 644         }
 645
 646         /* to check exception */
 647         prev_nr = vcpu->arch.exception.nr;
 648         if (prev_nr == DF_VECTOR) {
 649                 /* triple fault -> shutdown */
 650                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 651                 return;
 652         }
 653         class1 = exception_class(prev_nr);
 654         class2 = exception_class(nr);
 655         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 656                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 657                 /*
 658                  * Generate double fault per SDM Table 5-5.  Set
 659                  * exception.pending = true so that the double fault
 660                  * can trigger a nested vmexit.
 661                  */
 662                 vcpu->arch.exception.pending = true;
 663                 vcpu->arch.exception.injected = false;
 664                 vcpu->arch.exception.has_error_code = true;
 665                 vcpu->arch.exception.nr = DF_VECTOR;
 666                 vcpu->arch.exception.error_code = 0;
 667                 vcpu->arch.exception.has_payload = false;
 668                 vcpu->arch.exception.payload = 0;
 669         } else
 670                 /* replace previous exception with a new one in a hope
 671                    that instruction re-execution will regenerate lost
 672                    exception */
 673                 goto queue;
 674 }
 675
 676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 677 {
 678         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 681
 682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 687
 688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 689                            unsigned long payload)
 690 {
 691         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 694
 695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 696                                     u32 error_code, unsigned long payload)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code,
 699                                true, payload, false);
 700 }
 701
 702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 703 {
 704         if (err)
 705                 kvm_inject_gp(vcpu, 0);
 706         else
 707                 return kvm_skip_emulated_instruction(vcpu);
 708
 709         return 1;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 712
 713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 714 {
 715         ++vcpu->stat.pf_guest;
 716         vcpu->arch.exception.nested_apf =
 717                 is_guest_mode(vcpu) && fault->async_page_fault;
 718         if (vcpu->arch.exception.nested_apf) {
 719                 vcpu->arch.apf.nested_apf_token = fault->address;
 720                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 721         } else {
 722                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 723                                         fault->address);
 724         }
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 727
 728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 729                                     struct x86_exception *fault)
 730 {
 731         struct kvm_mmu *fault_mmu;
 732         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 733
 734         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 735                                                vcpu->arch.walk_mmu;
 736
 737         /*
 738          * Invalidate the TLB entry for the faulting address, if it exists,
 739          * else the access will fault indefinitely (and to emulate hardware).
 740          */
 741         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 742             !(fault->error_code & PFERR_RSVD_MASK))
 743                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 744                                        fault_mmu->root_hpa);
 745
 746         fault_mmu->inject_page_fault(vcpu, fault);
 747         return fault->nested_page_fault;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 750
 751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 752 {
 753         atomic_inc(&vcpu->arch.nmi_queued);
 754         kvm_make_request(KVM_REQ_NMI, vcpu);
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 757
 758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 759 {
 760         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 763
 764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 765 {
 766         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 769
 770 /*
 771  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 772  * a #GP and return false.
 773  */
 774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 775 {
 776         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 777                 return true;
 778         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 779         return false;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 782
 783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 784 {
 785         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                 return true;
 787
 788         kvm_queue_exception(vcpu, UD_VECTOR);
 789         return false;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_require_dr);
 792
 793 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 794 {
 795         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 796 }
 797
 798 /*
 799  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 800  */
 801 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 802 {
 803         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 804         gpa_t real_gpa;
 805         int i;
 806         int ret;
 807         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 808
 809         /*
 810          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 811          * to an L1 GPA.
 812          */
 813         real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(pdpt_gfn),
 814                                       PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 815         if (real_gpa == UNMAPPED_GVA)
 816                 return 0;
 817
 818         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 819         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 820                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 821         if (ret < 0)
 822                 return 0;
 823
 824         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 825                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 826                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 827                         return 0;
 828                 }
 829         }
 830
 831         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 832         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 833         vcpu->arch.pdptrs_from_userspace = false;
 834
 835         return 1;
 836 }
 837 EXPORT_SYMBOL_GPL(load_pdptrs);
 838
 839 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 840 {
 841         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 842                 kvm_clear_async_pf_completion_queue(vcpu);
 843                 kvm_async_pf_hash_reset(vcpu);
 844         }
 845
 846         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 850             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 851             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 852                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 853 }
 854 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 855
 856 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 857 {
 858         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 859         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 860
 861         cr0 |= X86_CR0_ET;
 862
 863 #ifdef CONFIG_X86_64
 864         if (cr0 & 0xffffffff00000000UL)
 865                 return 1;
 866 #endif
 867
 868         cr0 &= ~CR0_RESERVED_BITS;
 869
 870         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 871                 return 1;
 872
 873         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 874                 return 1;
 875
 876 #ifdef CONFIG_X86_64
 877         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 878             (cr0 & X86_CR0_PG)) {
 879                 int cs_db, cs_l;
 880
 881                 if (!is_pae(vcpu))
 882                         return 1;
 883                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 884                 if (cs_l)
 885                         return 1;
 886         }
 887 #endif
 888         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 889             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 890             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 891                 return 1;
 892
 893         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 894                 return 1;
 895
 896         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 897
 898         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 899
 900         return 0;
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 903
 904 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 905 {
 906         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_lmsw);
 909
 910 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 911 {
 912         if (vcpu->arch.guest_state_protected)
 913                 return;
 914
 915         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 916
 917                 if (vcpu->arch.xcr0 != host_xcr0)
 918                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 919
 920                 if (vcpu->arch.xsaves_enabled &&
 921                     vcpu->arch.ia32_xss != host_xss)
 922                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 923         }
 924
 925         if (static_cpu_has(X86_FEATURE_PKU) &&
 926             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 927              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 928             vcpu->arch.pkru != vcpu->arch.host_pkru)
 929                 write_pkru(vcpu->arch.pkru);
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 932
 933 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 934 {
 935         if (vcpu->arch.guest_state_protected)
 936                 return;
 937
 938         if (static_cpu_has(X86_FEATURE_PKU) &&
 939             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 940              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 941                 vcpu->arch.pkru = rdpkru();
 942                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 943                         write_pkru(vcpu->arch.host_pkru);
 944         }
 945
 946         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 947
 948                 if (vcpu->arch.xcr0 != host_xcr0)
 949                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 950
 951                 if (vcpu->arch.xsaves_enabled &&
 952                     vcpu->arch.ia32_xss != host_xss)
 953                         wrmsrl(MSR_IA32_XSS, host_xss);
 954         }
 955
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 958
 959 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 960 {
 961         u64 xcr0 = xcr;
 962         u64 old_xcr0 = vcpu->arch.xcr0;
 963         u64 valid_bits;
 964
 965         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 966         if (index != XCR_XFEATURE_ENABLED_MASK)
 967                 return 1;
 968         if (!(xcr0 & XFEATURE_MASK_FP))
 969                 return 1;
 970         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 971                 return 1;
 972
 973         /*
 974          * Do not allow the guest to set bits that we do not support
 975          * saving.  However, xcr0 bit 0 is always set, even if the
 976          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
 977          */
 978         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 979         if (xcr0 & ~valid_bits)
 980                 return 1;
 981
 982         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 983             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 984                 return 1;
 985
 986         if (xcr0 & XFEATURE_MASK_AVX512) {
 987                 if (!(xcr0 & XFEATURE_MASK_YMM))
 988                         return 1;
 989                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 990                         return 1;
 991         }
 992         vcpu->arch.xcr0 = xcr0;
 993
 994         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 995                 kvm_update_cpuid_runtime(vcpu);
 996         return 0;
 997 }
 998
 999 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1000 {
1001         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1002             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1003                 kvm_inject_gp(vcpu, 0);
1004                 return 1;
1005         }
1006
1007         return kvm_skip_emulated_instruction(vcpu);
1008 }
1009 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1010
1011 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1012 {
1013         if (cr4 & cr4_reserved_bits)
1014                 return false;
1015
1016         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1017                 return false;
1018
1019         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1022
1023 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1024 {
1025         /*
1026          * If any role bit is changed, the MMU needs to be reset.
1027          *
1028          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1029          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1030          * according to the SDM; however, stale prev_roots could be reused
1031          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1032          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1033          * is slow, but changing CR4.PCIDE is a rare case.
1034          *
1035          * If CR4.PGE is changed, the guest TLB must be flushed.
1036          *
1037          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1038          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1039          * the usage of "else if".
1040          */
1041         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1042                 kvm_mmu_reset_context(vcpu);
1043         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1044                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1045         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1046                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1088 {
1089         struct kvm_mmu *mmu = vcpu->arch.mmu;
1090         unsigned long roots_to_free = 0;
1091         int i;
1092
1093         /*
1094          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1095          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1096          * also via the emulator.  KVM's TDP page tables are not in the scope of
1097          * the invalidation, but the guest's TLB entries need to be flushed as
1098          * the CPU may have cached entries in its TLB for the target PCID.
1099          */
1100         if (unlikely(tdp_enabled)) {
1101                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1102                 return;
1103         }
1104
1105         /*
1106          * If neither the current CR3 nor any of the prev_roots use the given
1107          * PCID, then nothing needs to be done here because a resync will
1108          * happen anyway before switching to any other CR3.
1109          */
1110         if (kvm_get_active_pcid(vcpu) == pcid) {
1111                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1112                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1113         }
1114
1115         /*
1116          * If PCID is disabled, there is no need to free prev_roots even if the
1117          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1118          * with PCIDE=0.
1119          */
1120         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1121                 return;
1122
1123         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1124                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1125                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1126
1127         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1128 }
1129
1130 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1131 {
1132         bool skip_tlb_flush = false;
1133         unsigned long pcid = 0;
1134 #ifdef CONFIG_X86_64
1135         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1136
1137         if (pcid_enabled) {
1138                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1139                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1140                 pcid = cr3 & X86_CR3_PCID_MASK;
1141         }
1142 #endif
1143
1144         /* PDPTRs are always reloaded for PAE paging. */
1145         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1146                 goto handle_tlb_flush;
1147
1148         /*
1149          * Do not condition the GPA check on long mode, this helper is used to
1150          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1151          * the current vCPU mode is accurate.
1152          */
1153         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1154                 return 1;
1155
1156         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1157                 return 1;
1158
1159         if (cr3 != kvm_read_cr3(vcpu))
1160                 kvm_mmu_new_pgd(vcpu, cr3);
1161
1162         vcpu->arch.cr3 = cr3;
1163         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1164
1165 handle_tlb_flush:
1166         /*
1167          * A load of CR3 that flushes the TLB flushes only the current PCID,
1168          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1169          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1170          * and it's impossible to use a non-zero PCID when PCID is disabled,
1171          * i.e. only PCID=0 can be relevant.
1172          */
1173         if (!skip_tlb_flush)
1174                 kvm_invalidate_pcid(vcpu, pcid);
1175
1176         return 0;
1177 }
1178 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1179
1180 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1181 {
1182         if (cr8 & CR8_RESERVED_BITS)
1183                 return 1;
1184         if (lapic_in_kernel(vcpu))
1185                 kvm_lapic_set_tpr(vcpu, cr8);
1186         else
1187                 vcpu->arch.cr8 = cr8;
1188         return 0;
1189 }
1190 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1191
1192 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1193 {
1194         if (lapic_in_kernel(vcpu))
1195                 return kvm_lapic_get_cr8(vcpu);
1196         else
1197                 return vcpu->arch.cr8;
1198 }
1199 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1200
1201 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1202 {
1203         int i;
1204
1205         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1206                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1207                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1208         }
1209 }
1210
1211 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1212 {
1213         unsigned long dr7;
1214
1215         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1216                 dr7 = vcpu->arch.guest_debug_dr7;
1217         else
1218                 dr7 = vcpu->arch.dr7;
1219         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1220         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1221         if (dr7 & DR7_BP_EN_MASK)
1222                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1223 }
1224 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1225
1226 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1227 {
1228         u64 fixed = DR6_FIXED_1;
1229
1230         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1231                 fixed |= DR6_RTM;
1232
1233         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1234                 fixed |= DR6_BUS_LOCK;
1235         return fixed;
1236 }
1237
1238 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1239 {
1240         size_t size = ARRAY_SIZE(vcpu->arch.db);
1241
1242         switch (dr) {
1243         case 0 ... 3:
1244                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1245                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1246                         vcpu->arch.eff_db[dr] = val;
1247                 break;
1248         case 4:
1249         case 6:
1250                 if (!kvm_dr6_valid(val))
1251                         return 1; /* #GP */
1252                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1253                 break;
1254         case 5:
1255         default: /* 7 */
1256                 if (!kvm_dr7_valid(val))
1257                         return 1; /* #GP */
1258                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1259                 kvm_update_dr7(vcpu);
1260                 break;
1261         }
1262
1263         return 0;
1264 }
1265 EXPORT_SYMBOL_GPL(kvm_set_dr);
1266
1267 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1268 {
1269         size_t size = ARRAY_SIZE(vcpu->arch.db);
1270
1271         switch (dr) {
1272         case 0 ... 3:
1273                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1274                 break;
1275         case 4:
1276         case 6:
1277                 *val = vcpu->arch.dr6;
1278                 break;
1279         case 5:
1280         default: /* 7 */
1281                 *val = vcpu->arch.dr7;
1282                 break;
1283         }
1284 }
1285 EXPORT_SYMBOL_GPL(kvm_get_dr);
1286
1287 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1288 {
1289         u32 ecx = kvm_rcx_read(vcpu);
1290         u64 data;
1291
1292         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1293                 kvm_inject_gp(vcpu, 0);
1294                 return 1;
1295         }
1296
1297         kvm_rax_write(vcpu, (u32)data);
1298         kvm_rdx_write(vcpu, data >> 32);
1299         return kvm_skip_emulated_instruction(vcpu);
1300 }
1301 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1302
1303 /*
1304  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1305  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1306  *
1307  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1308  * extract the supported MSRs from the related const lists.
1309  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1310  * capabilities of the host cpu. This capabilities test skips MSRs that are
1311  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1312  * may depend on host virtualization features rather than host cpu features.
1313  */
1314
1315 static const u32 msrs_to_save_all[] = {
1316         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1317         MSR_STAR,
1318 #ifdef CONFIG_X86_64
1319         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1320 #endif
1321         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1322         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1323         MSR_IA32_SPEC_CTRL,
1324         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1325         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1326         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1327         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1328         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1329         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1330         MSR_IA32_UMWAIT_CONTROL,
1331
1332         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1333         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1334         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1335         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1336         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1337         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1338         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1339         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1340         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1341         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1342         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1343         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1344         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1345         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1346         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1347         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1348         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1349         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1350         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1351         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1352         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1353         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1354
1355         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1356         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1357         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1358         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1359         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1360         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1361 };
1362
1363 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1364 static unsigned num_msrs_to_save;
1365
1366 static const u32 emulated_msrs_all[] = {
1367         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1368         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1369         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1370         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1371         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1372         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1373         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1374         HV_X64_MSR_RESET,
1375         HV_X64_MSR_VP_INDEX,
1376         HV_X64_MSR_VP_RUNTIME,
1377         HV_X64_MSR_SCONTROL,
1378         HV_X64_MSR_STIMER0_CONFIG,
1379         HV_X64_MSR_VP_ASSIST_PAGE,
1380         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1381         HV_X64_MSR_TSC_EMULATION_STATUS,
1382         HV_X64_MSR_SYNDBG_OPTIONS,
1383         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1384         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1385         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1386
1387         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1388         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1389
1390         MSR_IA32_TSC_ADJUST,
1391         MSR_IA32_TSC_DEADLINE,
1392         MSR_IA32_ARCH_CAPABILITIES,
1393         MSR_IA32_PERF_CAPABILITIES,
1394         MSR_IA32_MISC_ENABLE,
1395         MSR_IA32_MCG_STATUS,
1396         MSR_IA32_MCG_CTL,
1397         MSR_IA32_MCG_EXT_CTL,
1398         MSR_IA32_SMBASE,
1399         MSR_SMI_COUNT,
1400         MSR_PLATFORM_INFO,
1401         MSR_MISC_FEATURES_ENABLES,
1402         MSR_AMD64_VIRT_SPEC_CTRL,
1403         MSR_AMD64_TSC_RATIO,
1404         MSR_IA32_POWER_CTL,
1405         MSR_IA32_UCODE_REV,
1406
1407         /*
1408          * The following list leaves out MSRs whose values are determined
1409          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1410          * We always support the "true" VMX control MSRs, even if the host
1411          * processor does not, so I am putting these registers here rather
1412          * than in msrs_to_save_all.
1413          */
1414         MSR_IA32_VMX_BASIC,
1415         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1416         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1417         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1418         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1419         MSR_IA32_VMX_MISC,
1420         MSR_IA32_VMX_CR0_FIXED0,
1421         MSR_IA32_VMX_CR4_FIXED0,
1422         MSR_IA32_VMX_VMCS_ENUM,
1423         MSR_IA32_VMX_PROCBASED_CTLS2,
1424         MSR_IA32_VMX_EPT_VPID_CAP,
1425         MSR_IA32_VMX_VMFUNC,
1426
1427         MSR_K7_HWCR,
1428         MSR_KVM_POLL_CONTROL,
1429 };
1430
1431 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1432 static unsigned num_emulated_msrs;
1433
1434 /*
1435  * List of msr numbers which are used to expose MSR-based features that
1436  * can be used by a hypervisor to validate requested CPU features.
1437  */
1438 static const u32 msr_based_features_all[] = {
1439         MSR_IA32_VMX_BASIC,
1440         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1441         MSR_IA32_VMX_PINBASED_CTLS,
1442         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1443         MSR_IA32_VMX_PROCBASED_CTLS,
1444         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1445         MSR_IA32_VMX_EXIT_CTLS,
1446         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1447         MSR_IA32_VMX_ENTRY_CTLS,
1448         MSR_IA32_VMX_MISC,
1449         MSR_IA32_VMX_CR0_FIXED0,
1450         MSR_IA32_VMX_CR0_FIXED1,
1451         MSR_IA32_VMX_CR4_FIXED0,
1452         MSR_IA32_VMX_CR4_FIXED1,
1453         MSR_IA32_VMX_VMCS_ENUM,
1454         MSR_IA32_VMX_PROCBASED_CTLS2,
1455         MSR_IA32_VMX_EPT_VPID_CAP,
1456         MSR_IA32_VMX_VMFUNC,
1457
1458         MSR_F10H_DECFG,
1459         MSR_IA32_UCODE_REV,
1460         MSR_IA32_ARCH_CAPABILITIES,
1461         MSR_IA32_PERF_CAPABILITIES,
1462 };
1463
1464 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1465 static unsigned int num_msr_based_features;
1466
1467 static u64 kvm_get_arch_capabilities(void)
1468 {
1469         u64 data = 0;
1470
1471         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1472                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1473
1474         /*
1475          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1476          * the nested hypervisor runs with NX huge pages.  If it is not,
1477          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1478          * L1 guests, so it need not worry about its own (L2) guests.
1479          */
1480         data |= ARCH_CAP_PSCHANGE_MC_NO;
1481
1482         /*
1483          * If we're doing cache flushes (either "always" or "cond")
1484          * we will do one whenever the guest does a vmlaunch/vmresume.
1485          * If an outer hypervisor is doing the cache flush for us
1486          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1487          * capability to the guest too, and if EPT is disabled we're not
1488          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1489          * require a nested hypervisor to do a flush of its own.
1490          */
1491         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1492                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1493
1494         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1495                 data |= ARCH_CAP_RDCL_NO;
1496         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1497                 data |= ARCH_CAP_SSB_NO;
1498         if (!boot_cpu_has_bug(X86_BUG_MDS))
1499                 data |= ARCH_CAP_MDS_NO;
1500
1501         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1502                 /*
1503                  * If RTM=0 because the kernel has disabled TSX, the host might
1504                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1505                  * and therefore knows that there cannot be TAA) but keep
1506                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1507                  * and we want to allow migrating those guests to tsx=off hosts.
1508                  */
1509                 data &= ~ARCH_CAP_TAA_NO;
1510         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1511                 data |= ARCH_CAP_TAA_NO;
1512         } else {
1513                 /*
1514                  * Nothing to do here; we emulate TSX_CTRL if present on the
1515                  * host so the guest can choose between disabling TSX or
1516                  * using VERW to clear CPU buffers.
1517                  */
1518         }
1519
1520         return data;
1521 }
1522
1523 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1524 {
1525         switch (msr->index) {
1526         case MSR_IA32_ARCH_CAPABILITIES:
1527                 msr->data = kvm_get_arch_capabilities();
1528                 break;
1529         case MSR_IA32_UCODE_REV:
1530                 rdmsrl_safe(msr->index, &msr->data);
1531                 break;
1532         default:
1533                 return static_call(kvm_x86_get_msr_feature)(msr);
1534         }
1535         return 0;
1536 }
1537
1538 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1539 {
1540         struct kvm_msr_entry msr;
1541         int r;
1542
1543         msr.index = index;
1544         r = kvm_get_msr_feature(&msr);
1545
1546         if (r == KVM_MSR_RET_INVALID) {
1547                 /* Unconditionally clear the output for simplicity */
1548                 *data = 0;
1549                 if (kvm_msr_ignored_check(index, 0, false))
1550                         r = 0;
1551         }
1552
1553         if (r)
1554                 return r;
1555
1556         *data = msr.data;
1557
1558         return 0;
1559 }
1560
1561 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1562 {
1563         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1564                 return false;
1565
1566         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1567                 return false;
1568
1569         if (efer & (EFER_LME | EFER_LMA) &&
1570             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1571                 return false;
1572
1573         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1574                 return false;
1575
1576         return true;
1577
1578 }
1579 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1580 {
1581         if (efer & efer_reserved_bits)
1582                 return false;
1583
1584         return __kvm_valid_efer(vcpu, efer);
1585 }
1586 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1587
1588 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1589 {
1590         u64 old_efer = vcpu->arch.efer;
1591         u64 efer = msr_info->data;
1592         int r;
1593
1594         if (efer & efer_reserved_bits)
1595                 return 1;
1596
1597         if (!msr_info->host_initiated) {
1598                 if (!__kvm_valid_efer(vcpu, efer))
1599                         return 1;
1600
1601                 if (is_paging(vcpu) &&
1602                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1603                         return 1;
1604         }
1605
1606         efer &= ~EFER_LMA;
1607         efer |= vcpu->arch.efer & EFER_LMA;
1608
1609         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1610         if (r) {
1611                 WARN_ON(r > 0);
1612                 return r;
1613         }
1614
1615         /* Update reserved bits */
1616         if ((efer ^ old_efer) & EFER_NX)
1617                 kvm_mmu_reset_context(vcpu);
1618
1619         return 0;
1620 }
1621
1622 void kvm_enable_efer_bits(u64 mask)
1623 {
1624        efer_reserved_bits &= ~mask;
1625 }
1626 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1627
1628 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1629 {
1630         struct kvm_x86_msr_filter *msr_filter;
1631         struct msr_bitmap_range *ranges;
1632         struct kvm *kvm = vcpu->kvm;
1633         bool allowed;
1634         int idx;
1635         u32 i;
1636
1637         /* x2APIC MSRs do not support filtering. */
1638         if (index >= 0x800 && index <= 0x8ff)
1639                 return true;
1640
1641         idx = srcu_read_lock(&kvm->srcu);
1642
1643         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1644         if (!msr_filter) {
1645                 allowed = true;
1646                 goto out;
1647         }
1648
1649         allowed = msr_filter->default_allow;
1650         ranges = msr_filter->ranges;
1651
1652         for (i = 0; i < msr_filter->count; i++) {
1653                 u32 start = ranges[i].base;
1654                 u32 end = start + ranges[i].nmsrs;
1655                 u32 flags = ranges[i].flags;
1656                 unsigned long *bitmap = ranges[i].bitmap;
1657
1658                 if ((index >= start) && (index < end) && (flags & type)) {
1659                         allowed = !!test_bit(index - start, bitmap);
1660                         break;
1661                 }
1662         }
1663
1664 out:
1665         srcu_read_unlock(&kvm->srcu, idx);
1666
1667         return allowed;
1668 }
1669 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1670
1671 /*
1672  * Write @data into the MSR specified by @index.  Select MSR specific fault
1673  * checks are bypassed if @host_initiated is %true.
1674  * Returns 0 on success, non-0 otherwise.
1675  * Assumes vcpu_load() was already called.
1676  */
1677 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1678                          bool host_initiated)
1679 {
1680         struct msr_data msr;
1681
1682         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1683                 return KVM_MSR_RET_FILTERED;
1684
1685         switch (index) {
1686         case MSR_FS_BASE:
1687         case MSR_GS_BASE:
1688         case MSR_KERNEL_GS_BASE:
1689         case MSR_CSTAR:
1690         case MSR_LSTAR:
1691                 if (is_noncanonical_address(data, vcpu))
1692                         return 1;
1693                 break;
1694         case MSR_IA32_SYSENTER_EIP:
1695         case MSR_IA32_SYSENTER_ESP:
1696                 /*
1697                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1698                  * non-canonical address is written on Intel but not on
1699                  * AMD (which ignores the top 32-bits, because it does
1700                  * not implement 64-bit SYSENTER).
1701                  *
1702                  * 64-bit code should hence be able to write a non-canonical
1703                  * value on AMD.  Making the address canonical ensures that
1704                  * vmentry does not fail on Intel after writing a non-canonical
1705                  * value, and that something deterministic happens if the guest
1706                  * invokes 64-bit SYSENTER.
1707                  */
1708                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1709                 break;
1710         case MSR_TSC_AUX:
1711                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1712                         return 1;
1713
1714                 if (!host_initiated &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1716                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1717                         return 1;
1718
1719                 /*
1720                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1721                  * incomplete and conflicting architectural behavior.  Current
1722                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1723                  * reserved and always read as zeros.  Enforce Intel's reserved
1724                  * bits check if and only if the guest CPU is Intel, and clear
1725                  * the bits in all other cases.  This ensures cross-vendor
1726                  * migration will provide consistent behavior for the guest.
1727                  */
1728                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1729                         return 1;
1730
1731                 data = (u32)data;
1732                 break;
1733         }
1734
1735         msr.data = data;
1736         msr.index = index;
1737         msr.host_initiated = host_initiated;
1738
1739         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1740 }
1741
1742 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1743                                      u32 index, u64 data, bool host_initiated)
1744 {
1745         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1746
1747         if (ret == KVM_MSR_RET_INVALID)
1748                 if (kvm_msr_ignored_check(index, data, true))
1749                         ret = 0;
1750
1751         return ret;
1752 }
1753
1754 /*
1755  * Read the MSR specified by @index into @data.  Select MSR specific fault
1756  * checks are bypassed if @host_initiated is %true.
1757  * Returns 0 on success, non-0 otherwise.
1758  * Assumes vcpu_load() was already called.
1759  */
1760 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1761                   bool host_initiated)
1762 {
1763         struct msr_data msr;
1764         int ret;
1765
1766         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1767                 return KVM_MSR_RET_FILTERED;
1768
1769         switch (index) {
1770         case MSR_TSC_AUX:
1771                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1772                         return 1;
1773
1774                 if (!host_initiated &&
1775                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1776                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1777                         return 1;
1778                 break;
1779         }
1780
1781         msr.index = index;
1782         msr.host_initiated = host_initiated;
1783
1784         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1785         if (!ret)
1786                 *data = msr.data;
1787         return ret;
1788 }
1789
1790 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1791                                      u32 index, u64 *data, bool host_initiated)
1792 {
1793         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1794
1795         if (ret == KVM_MSR_RET_INVALID) {
1796                 /* Unconditionally clear *data for simplicity */
1797                 *data = 0;
1798                 if (kvm_msr_ignored_check(index, 0, false))
1799                         ret = 0;
1800         }
1801
1802         return ret;
1803 }
1804
1805 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1806 {
1807         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1808 }
1809 EXPORT_SYMBOL_GPL(kvm_get_msr);
1810
1811 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1812 {
1813         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1814 }
1815 EXPORT_SYMBOL_GPL(kvm_set_msr);
1816
1817 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1818 {
1819         int err = vcpu->run->msr.error;
1820         if (!err) {
1821                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1822                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1823         }
1824
1825         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1826 }
1827
1828 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1829 {
1830         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1831 }
1832
1833 static u64 kvm_msr_reason(int r)
1834 {
1835         switch (r) {
1836         case KVM_MSR_RET_INVALID:
1837                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1838         case KVM_MSR_RET_FILTERED:
1839                 return KVM_MSR_EXIT_REASON_FILTER;
1840         default:
1841                 return KVM_MSR_EXIT_REASON_INVAL;
1842         }
1843 }
1844
1845 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1846                               u32 exit_reason, u64 data,
1847                               int (*completion)(struct kvm_vcpu *vcpu),
1848                               int r)
1849 {
1850         u64 msr_reason = kvm_msr_reason(r);
1851
1852         /* Check if the user wanted to know about this MSR fault */
1853         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1854                 return 0;
1855
1856         vcpu->run->exit_reason = exit_reason;
1857         vcpu->run->msr.error = 0;
1858         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1859         vcpu->run->msr.reason = msr_reason;
1860         vcpu->run->msr.index = index;
1861         vcpu->run->msr.data = data;
1862         vcpu->arch.complete_userspace_io = completion;
1863
1864         return 1;
1865 }
1866
1867 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1868 {
1869         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1870                                    complete_emulated_rdmsr, r);
1871 }
1872
1873 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1874 {
1875         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1876                                    complete_emulated_wrmsr, r);
1877 }
1878
1879 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1880 {
1881         u32 ecx = kvm_rcx_read(vcpu);
1882         u64 data;
1883         int r;
1884
1885         r = kvm_get_msr(vcpu, ecx, &data);
1886
1887         /* MSR read failed? See if we should ask user space */
1888         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1889                 /* Bounce to user space */
1890                 return 0;
1891         }
1892
1893         if (!r) {
1894                 trace_kvm_msr_read(ecx, data);
1895
1896                 kvm_rax_write(vcpu, data & -1u);
1897                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1898         } else {
1899                 trace_kvm_msr_read_ex(ecx);
1900         }
1901
1902         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1903 }
1904 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1905
1906 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1907 {
1908         u32 ecx = kvm_rcx_read(vcpu);
1909         u64 data = kvm_read_edx_eax(vcpu);
1910         int r;
1911
1912         r = kvm_set_msr(vcpu, ecx, data);
1913
1914         /* MSR write failed? See if we should ask user space */
1915         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1916                 /* Bounce to user space */
1917                 return 0;
1918
1919         /* Signal all other negative errors to userspace */
1920         if (r < 0)
1921                 return r;
1922
1923         if (!r)
1924                 trace_kvm_msr_write(ecx, data);
1925         else
1926                 trace_kvm_msr_write_ex(ecx, data);
1927
1928         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1929 }
1930 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1931
1932 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1933 {
1934         return kvm_skip_emulated_instruction(vcpu);
1935 }
1936 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1937
1938 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1939 {
1940         /* Treat an INVD instruction as a NOP and just skip it. */
1941         return kvm_emulate_as_nop(vcpu);
1942 }
1943 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1944
1945 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1946 {
1947         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1948         return kvm_emulate_as_nop(vcpu);
1949 }
1950 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1951
1952 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1953 {
1954         kvm_queue_exception(vcpu, UD_VECTOR);
1955         return 1;
1956 }
1957 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1958
1959 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1960 {
1961         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1962         return kvm_emulate_as_nop(vcpu);
1963 }
1964 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1965
1966 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1967 {
1968         xfer_to_guest_mode_prepare();
1969         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1970                 xfer_to_guest_mode_work_pending();
1971 }
1972
1973 /*
1974  * The fast path for frequent and performance sensitive wrmsr emulation,
1975  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1976  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1977  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1978  * other cases which must be called after interrupts are enabled on the host.
1979  */
1980 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1981 {
1982         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1983                 return 1;
1984
1985         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1986                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1987                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1988                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1989
1990                 data &= ~(1 << 12);
1991                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1992                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1993                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1994                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1995                 return 0;
1996         }
1997
1998         return 1;
1999 }
2000
2001 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2002 {
2003         if (!kvm_can_use_hv_timer(vcpu))
2004                 return 1;
2005
2006         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2007         return 0;
2008 }
2009
2010 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2011 {
2012         u32 msr = kvm_rcx_read(vcpu);
2013         u64 data;
2014         fastpath_t ret = EXIT_FASTPATH_NONE;
2015
2016         switch (msr) {
2017         case APIC_BASE_MSR + (APIC_ICR >> 4):
2018                 data = kvm_read_edx_eax(vcpu);
2019                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2020                         kvm_skip_emulated_instruction(vcpu);
2021                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2022                 }
2023                 break;
2024         case MSR_IA32_TSC_DEADLINE:
2025                 data = kvm_read_edx_eax(vcpu);
2026                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2027                         kvm_skip_emulated_instruction(vcpu);
2028                         ret = EXIT_FASTPATH_REENTER_GUEST;
2029                 }
2030                 break;
2031         default:
2032                 break;
2033         }
2034
2035         if (ret != EXIT_FASTPATH_NONE)
2036                 trace_kvm_msr_write(msr, data);
2037
2038         return ret;
2039 }
2040 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2041
2042 /*
2043  * Adapt set_msr() to msr_io()'s calling convention
2044  */
2045 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2046 {
2047         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2048 }
2049
2050 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2051 {
2052         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2053 }
2054
2055 #ifdef CONFIG_X86_64
2056 struct pvclock_clock {
2057         int vclock_mode;
2058         u64 cycle_last;
2059         u64 mask;
2060         u32 mult;
2061         u32 shift;
2062         u64 base_cycles;
2063         u64 offset;
2064 };
2065
2066 struct pvclock_gtod_data {
2067         seqcount_t      seq;
2068
2069         struct pvclock_clock clock; /* extract of a clocksource struct */
2070         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2071
2072         ktime_t         offs_boot;
2073         u64             wall_time_sec;
2074 };
2075
2076 static struct pvclock_gtod_data pvclock_gtod_data;
2077
2078 static void update_pvclock_gtod(struct timekeeper *tk)
2079 {
2080         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2081
2082         write_seqcount_begin(&vdata->seq);
2083
2084         /* copy pvclock gtod data */
2085         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2086         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2087         vdata->clock.mask               = tk->tkr_mono.mask;
2088         vdata->clock.mult               = tk->tkr_mono.mult;
2089         vdata->clock.shift              = tk->tkr_mono.shift;
2090         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2091         vdata->clock.offset             = tk->tkr_mono.base;
2092
2093         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2094         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2095         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2096         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2097         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2098         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2099         vdata->raw_clock.offset         = tk->tkr_raw.base;
2100
2101         vdata->wall_time_sec            = tk->xtime_sec;
2102
2103         vdata->offs_boot                = tk->offs_boot;
2104
2105         write_seqcount_end(&vdata->seq);
2106 }
2107
2108 static s64 get_kvmclock_base_ns(void)
2109 {
2110         /* Count up from boot time, but with the frequency of the raw clock.  */
2111         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2112 }
2113 #else
2114 static s64 get_kvmclock_base_ns(void)
2115 {
2116         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2117         return ktime_get_boottime_ns();
2118 }
2119 #endif
2120
2121 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2122 {
2123         int version;
2124         int r;
2125         struct pvclock_wall_clock wc;
2126         u32 wc_sec_hi;
2127         u64 wall_nsec;
2128
2129         if (!wall_clock)
2130                 return;
2131
2132         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2133         if (r)
2134                 return;
2135
2136         if (version & 1)
2137                 ++version;  /* first time write, random junk */
2138
2139         ++version;
2140
2141         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2142                 return;
2143
2144         /*
2145          * The guest calculates current wall clock time by adding
2146          * system time (updated by kvm_guest_time_update below) to the
2147          * wall clock specified here.  We do the reverse here.
2148          */
2149         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2150
2151         wc.nsec = do_div(wall_nsec, 1000000000);
2152         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2153         wc.version = version;
2154
2155         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2156
2157         if (sec_hi_ofs) {
2158                 wc_sec_hi = wall_nsec >> 32;
2159                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2160                                 &wc_sec_hi, sizeof(wc_sec_hi));
2161         }
2162
2163         version++;
2164         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2165 }
2166
2167 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2168                                   bool old_msr, bool host_initiated)
2169 {
2170         struct kvm_arch *ka = &vcpu->kvm->arch;
2171
2172         if (vcpu->vcpu_id == 0 && !host_initiated) {
2173                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2174                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2175
2176                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2177         }
2178
2179         vcpu->arch.time = system_time;
2180         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2181
2182         /* we verify if the enable bit is set... */
2183         vcpu->arch.pv_time_enabled = false;
2184         if (!(system_time & 1))
2185                 return;
2186
2187         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2188                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2189                                        sizeof(struct pvclock_vcpu_time_info)))
2190                 vcpu->arch.pv_time_enabled = true;
2191
2192         return;
2193 }
2194
2195 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2196 {
2197         do_shl32_div32(dividend, divisor);
2198         return dividend;
2199 }
2200
2201 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2202                                s8 *pshift, u32 *pmultiplier)
2203 {
2204         uint64_t scaled64;
2205         int32_t  shift = 0;
2206         uint64_t tps64;
2207         uint32_t tps32;
2208
2209         tps64 = base_hz;
2210         scaled64 = scaled_hz;
2211         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2212                 tps64 >>= 1;
2213                 shift--;
2214         }
2215
2216         tps32 = (uint32_t)tps64;
2217         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2218                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2219                         scaled64 >>= 1;
2220                 else
2221                         tps32 <<= 1;
2222                 shift++;
2223         }
2224
2225         *pshift = shift;
2226         *pmultiplier = div_frac(scaled64, tps32);
2227 }
2228
2229 #ifdef CONFIG_X86_64
2230 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2231 #endif
2232
2233 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2234 static unsigned long max_tsc_khz;
2235
2236 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2237 {
2238         u64 v = (u64)khz * (1000000 + ppm);
2239         do_div(v, 1000000);
2240         return v;
2241 }
2242
2243 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2244
2245 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2246 {
2247         u64 ratio;
2248
2249         /* Guest TSC same frequency as host TSC? */
2250         if (!scale) {
2251                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2252                 return 0;
2253         }
2254
2255         /* TSC scaling supported? */
2256         if (!kvm_has_tsc_control) {
2257                 if (user_tsc_khz > tsc_khz) {
2258                         vcpu->arch.tsc_catchup = 1;
2259                         vcpu->arch.tsc_always_catchup = 1;
2260                         return 0;
2261                 } else {
2262                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2263                         return -1;
2264                 }
2265         }
2266
2267         /* TSC scaling required  - calculate ratio */
2268         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2269                                 user_tsc_khz, tsc_khz);
2270
2271         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2272                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2273                                     user_tsc_khz);
2274                 return -1;
2275         }
2276
2277         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2278         return 0;
2279 }
2280
2281 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2282 {
2283         u32 thresh_lo, thresh_hi;
2284         int use_scaling = 0;
2285
2286         /* tsc_khz can be zero if TSC calibration fails */
2287         if (user_tsc_khz == 0) {
2288                 /* set tsc_scaling_ratio to a safe value */
2289                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2290                 return -1;
2291         }
2292
2293         /* Compute a scale to convert nanoseconds in TSC cycles */
2294         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2295                            &vcpu->arch.virtual_tsc_shift,
2296                            &vcpu->arch.virtual_tsc_mult);
2297         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2298
2299         /*
2300          * Compute the variation in TSC rate which is acceptable
2301          * within the range of tolerance and decide if the
2302          * rate being applied is within that bounds of the hardware
2303          * rate.  If so, no scaling or compensation need be done.
2304          */
2305         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2306         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2307         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2308                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2309                 use_scaling = 1;
2310         }
2311         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2312 }
2313
2314 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2315 {
2316         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2317                                       vcpu->arch.virtual_tsc_mult,
2318                                       vcpu->arch.virtual_tsc_shift);
2319         tsc += vcpu->arch.this_tsc_write;
2320         return tsc;
2321 }
2322
2323 static inline int gtod_is_based_on_tsc(int mode)
2324 {
2325         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2326 }
2327
2328 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2329 {
2330 #ifdef CONFIG_X86_64
2331         bool vcpus_matched;
2332         struct kvm_arch *ka = &vcpu->kvm->arch;
2333         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2334
2335         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2336                          atomic_read(&vcpu->kvm->online_vcpus));
2337
2338         /*
2339          * Once the masterclock is enabled, always perform request in
2340          * order to update it.
2341          *
2342          * In order to enable masterclock, the host clocksource must be TSC
2343          * and the vcpus need to have matched TSCs.  When that happens,
2344          * perform request to enable masterclock.
2345          */
2346         if (ka->use_master_clock ||
2347             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2348                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2349
2350         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2351                             atomic_read(&vcpu->kvm->online_vcpus),
2352                             ka->use_master_clock, gtod->clock.vclock_mode);
2353 #endif
2354 }
2355
2356 /*
2357  * Multiply tsc by a fixed point number represented by ratio.
2358  *
2359  * The most significant 64-N bits (mult) of ratio represent the
2360  * integral part of the fixed point number; the remaining N bits
2361  * (frac) represent the fractional part, ie. ratio represents a fixed
2362  * point number (mult + frac * 2^(-N)).
2363  *
2364  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2365  */
2366 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2367 {
2368         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2369 }
2370
2371 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2372 {
2373         u64 _tsc = tsc;
2374
2375         if (ratio != kvm_default_tsc_scaling_ratio)
2376                 _tsc = __scale_tsc(ratio, tsc);
2377
2378         return _tsc;
2379 }
2380 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2381
2382 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2383 {
2384         u64 tsc;
2385
2386         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2387
2388         return target_tsc - tsc;
2389 }
2390
2391 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2392 {
2393         return vcpu->arch.l1_tsc_offset +
2394                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2395 }
2396 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2397
2398 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2399 {
2400         u64 nested_offset;
2401
2402         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2403                 nested_offset = l1_offset;
2404         else
2405                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2406                                                 kvm_tsc_scaling_ratio_frac_bits);
2407
2408         nested_offset += l2_offset;
2409         return nested_offset;
2410 }
2411 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2412
2413 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2414 {
2415         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2416                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2417                                        kvm_tsc_scaling_ratio_frac_bits);
2418
2419         return l1_multiplier;
2420 }
2421 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2422
2423 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2424 {
2425         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2426                                    vcpu->arch.l1_tsc_offset,
2427                                    l1_offset);
2428
2429         vcpu->arch.l1_tsc_offset = l1_offset;
2430
2431         /*
2432          * If we are here because L1 chose not to trap WRMSR to TSC then
2433          * according to the spec this should set L1's TSC (as opposed to
2434          * setting L1's offset for L2).
2435          */
2436         if (is_guest_mode(vcpu))
2437                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2438                         l1_offset,
2439                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2440                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2441         else
2442                 vcpu->arch.tsc_offset = l1_offset;
2443
2444         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2445 }
2446
2447 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2448 {
2449         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2450
2451         /* Userspace is changing the multiplier while L2 is active */
2452         if (is_guest_mode(vcpu))
2453                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2454                         l1_multiplier,
2455                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2456         else
2457                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2458
2459         if (kvm_has_tsc_control)
2460                 static_call(kvm_x86_write_tsc_multiplier)(
2461                         vcpu, vcpu->arch.tsc_scaling_ratio);
2462 }
2463
2464 static inline bool kvm_check_tsc_unstable(void)
2465 {
2466 #ifdef CONFIG_X86_64
2467         /*
2468          * TSC is marked unstable when we're running on Hyper-V,
2469          * 'TSC page' clocksource is good.
2470          */
2471         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2472                 return false;
2473 #endif
2474         return check_tsc_unstable();
2475 }
2476
2477 /*
2478  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2479  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2480  * participates in.
2481  */
2482 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2483                                   u64 ns, bool matched)
2484 {
2485         struct kvm *kvm = vcpu->kvm;
2486
2487         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2488
2489         /*
2490          * We also track th most recent recorded KHZ, write and time to
2491          * allow the matching interval to be extended at each write.
2492          */
2493         kvm->arch.last_tsc_nsec = ns;
2494         kvm->arch.last_tsc_write = tsc;
2495         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2496         kvm->arch.last_tsc_offset = offset;
2497
2498         vcpu->arch.last_guest_tsc = tsc;
2499
2500         kvm_vcpu_write_tsc_offset(vcpu, offset);
2501
2502         if (!matched) {
2503                 /*
2504                  * We split periods of matched TSC writes into generations.
2505                  * For each generation, we track the original measured
2506                  * nanosecond time, offset, and write, so if TSCs are in
2507                  * sync, we can match exact offset, and if not, we can match
2508                  * exact software computation in compute_guest_tsc()
2509                  *
2510                  * These values are tracked in kvm->arch.cur_xxx variables.
2511                  */
2512                 kvm->arch.cur_tsc_generation++;
2513                 kvm->arch.cur_tsc_nsec = ns;
2514                 kvm->arch.cur_tsc_write = tsc;
2515                 kvm->arch.cur_tsc_offset = offset;
2516                 kvm->arch.nr_vcpus_matched_tsc = 0;
2517         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2518                 kvm->arch.nr_vcpus_matched_tsc++;
2519         }
2520
2521         /* Keep track of which generation this VCPU has synchronized to */
2522         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2523         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2524         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2525
2526         kvm_track_tsc_matching(vcpu);
2527 }
2528
2529 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2530 {
2531         struct kvm *kvm = vcpu->kvm;
2532         u64 offset, ns, elapsed;
2533         unsigned long flags;
2534         bool matched = false;
2535         bool synchronizing = false;
2536
2537         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2538         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2539         ns = get_kvmclock_base_ns();
2540         elapsed = ns - kvm->arch.last_tsc_nsec;
2541
2542         if (vcpu->arch.virtual_tsc_khz) {
2543                 if (data == 0) {
2544                         /*
2545                          * detection of vcpu initialization -- need to sync
2546                          * with other vCPUs. This particularly helps to keep
2547                          * kvm_clock stable after CPU hotplug
2548                          */
2549                         synchronizing = true;
2550                 } else {
2551                         u64 tsc_exp = kvm->arch.last_tsc_write +
2552                                                 nsec_to_cycles(vcpu, elapsed);
2553                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2554                         /*
2555                          * Special case: TSC write with a small delta (1 second)
2556                          * of virtual cycle time against real time is
2557                          * interpreted as an attempt to synchronize the CPU.
2558                          */
2559                         synchronizing = data < tsc_exp + tsc_hz &&
2560                                         data + tsc_hz > tsc_exp;
2561                 }
2562         }
2563
2564         /*
2565          * For a reliable TSC, we can match TSC offsets, and for an unstable
2566          * TSC, we add elapsed time in this computation.  We could let the
2567          * compensation code attempt to catch up if we fall behind, but
2568          * it's better to try to match offsets from the beginning.
2569          */
2570         if (synchronizing &&
2571             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2572                 if (!kvm_check_tsc_unstable()) {
2573                         offset = kvm->arch.cur_tsc_offset;
2574                 } else {
2575                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2576                         data += delta;
2577                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2578                 }
2579                 matched = true;
2580         }
2581
2582         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2583         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2584 }
2585
2586 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2587                                            s64 adjustment)
2588 {
2589         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2590         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2591 }
2592
2593 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2594 {
2595         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2596                 WARN_ON(adjustment < 0);
2597         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2598                                    vcpu->arch.l1_tsc_scaling_ratio);
2599         adjust_tsc_offset_guest(vcpu, adjustment);
2600 }
2601
2602 #ifdef CONFIG_X86_64
2603
2604 static u64 read_tsc(void)
2605 {
2606         u64 ret = (u64)rdtsc_ordered();
2607         u64 last = pvclock_gtod_data.clock.cycle_last;
2608
2609         if (likely(ret >= last))
2610                 return ret;
2611
2612         /*
2613          * GCC likes to generate cmov here, but this branch is extremely
2614          * predictable (it's just a function of time and the likely is
2615          * very likely) and there's a data dependence, so force GCC
2616          * to generate a branch instead.  I don't barrier() because
2617          * we don't actually need a barrier, and if this function
2618          * ever gets inlined it will generate worse code.
2619          */
2620         asm volatile ("");
2621         return last;
2622 }
2623
2624 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2625                           int *mode)
2626 {
2627         long v;
2628         u64 tsc_pg_val;
2629
2630         switch (clock->vclock_mode) {
2631         case VDSO_CLOCKMODE_HVCLOCK:
2632                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2633                                                   tsc_timestamp);
2634                 if (tsc_pg_val != U64_MAX) {
2635                         /* TSC page valid */
2636                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2637                         v = (tsc_pg_val - clock->cycle_last) &
2638                                 clock->mask;
2639                 } else {
2640                         /* TSC page invalid */
2641                         *mode = VDSO_CLOCKMODE_NONE;
2642                 }
2643                 break;
2644         case VDSO_CLOCKMODE_TSC:
2645                 *mode = VDSO_CLOCKMODE_TSC;
2646                 *tsc_timestamp = read_tsc();
2647                 v = (*tsc_timestamp - clock->cycle_last) &
2648                         clock->mask;
2649                 break;
2650         default:
2651                 *mode = VDSO_CLOCKMODE_NONE;
2652         }
2653
2654         if (*mode == VDSO_CLOCKMODE_NONE)
2655                 *tsc_timestamp = v = 0;
2656
2657         return v * clock->mult;
2658 }
2659
2660 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2661 {
2662         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2663         unsigned long seq;
2664         int mode;
2665         u64 ns;
2666
2667         do {
2668                 seq = read_seqcount_begin(&gtod->seq);
2669                 ns = gtod->raw_clock.base_cycles;
2670                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2671                 ns >>= gtod->raw_clock.shift;
2672                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2673         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2674         *t = ns;
2675
2676         return mode;
2677 }
2678
2679 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2680 {
2681         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2682         unsigned long seq;
2683         int mode;
2684         u64 ns;
2685
2686         do {
2687                 seq = read_seqcount_begin(&gtod->seq);
2688                 ts->tv_sec = gtod->wall_time_sec;
2689                 ns = gtod->clock.base_cycles;
2690                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2691                 ns >>= gtod->clock.shift;
2692         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2693
2694         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2695         ts->tv_nsec = ns;
2696
2697         return mode;
2698 }
2699
2700 /* returns true if host is using TSC based clocksource */
2701 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2702 {
2703         /* checked again under seqlock below */
2704         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2705                 return false;
2706
2707         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2708                                                       tsc_timestamp));
2709 }
2710
2711 /* returns true if host is using TSC based clocksource */
2712 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2713                                            u64 *tsc_timestamp)
2714 {
2715         /* checked again under seqlock below */
2716         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2717                 return false;
2718
2719         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2720 }
2721 #endif
2722
2723 /*
2724  *
2725  * Assuming a stable TSC across physical CPUS, and a stable TSC
2726  * across virtual CPUs, the following condition is possible.
2727  * Each numbered line represents an event visible to both
2728  * CPUs at the next numbered event.
2729  *
2730  * "timespecX" represents host monotonic time. "tscX" represents
2731  * RDTSC value.
2732  *
2733  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2734  *
2735  * 1.  read timespec0,tsc0
2736  * 2.                                   | timespec1 = timespec0 + N
2737  *                                      | tsc1 = tsc0 + M
2738  * 3. transition to guest               | transition to guest
2739  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2740  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2741  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2742  *
2743  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2744  *
2745  *      - ret0 < ret1
2746  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2747  *              ...
2748  *      - 0 < N - M => M < N
2749  *
2750  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2751  * always the case (the difference between two distinct xtime instances
2752  * might be smaller then the difference between corresponding TSC reads,
2753  * when updating guest vcpus pvclock areas).
2754  *
2755  * To avoid that problem, do not allow visibility of distinct
2756  * system_timestamp/tsc_timestamp values simultaneously: use a master
2757  * copy of host monotonic time values. Update that master copy
2758  * in lockstep.
2759  *
2760  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2761  *
2762  */
2763
2764 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2765 {
2766 #ifdef CONFIG_X86_64
2767         struct kvm_arch *ka = &kvm->arch;
2768         int vclock_mode;
2769         bool host_tsc_clocksource, vcpus_matched;
2770
2771         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2772         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2773                         atomic_read(&kvm->online_vcpus));
2774
2775         /*
2776          * If the host uses TSC clock, then passthrough TSC as stable
2777          * to the guest.
2778          */
2779         host_tsc_clocksource = kvm_get_time_and_clockread(
2780                                         &ka->master_kernel_ns,
2781                                         &ka->master_cycle_now);
2782
2783         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2784                                 && !ka->backwards_tsc_observed
2785                                 && !ka->boot_vcpu_runs_old_kvmclock;
2786
2787         if (ka->use_master_clock)
2788                 atomic_set(&kvm_guest_has_master_clock, 1);
2789
2790         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2791         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2792                                         vcpus_matched);
2793 #endif
2794 }
2795
2796 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2797 {
2798         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2799 }
2800
2801 static void __kvm_start_pvclock_update(struct kvm *kvm)
2802 {
2803         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2804         write_seqcount_begin(&kvm->arch.pvclock_sc);
2805 }
2806
2807 static void kvm_start_pvclock_update(struct kvm *kvm)
2808 {
2809         kvm_make_mclock_inprogress_request(kvm);
2810
2811         /* no guest entries from this point */
2812         __kvm_start_pvclock_update(kvm);
2813 }
2814
2815 static void kvm_end_pvclock_update(struct kvm *kvm)
2816 {
2817         struct kvm_arch *ka = &kvm->arch;
2818         struct kvm_vcpu *vcpu;
2819         int i;
2820
2821         write_seqcount_end(&ka->pvclock_sc);
2822         raw_spin_unlock_irq(&ka->tsc_write_lock);
2823         kvm_for_each_vcpu(i, vcpu, kvm)
2824                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2825
2826         /* guest entries allowed */
2827         kvm_for_each_vcpu(i, vcpu, kvm)
2828                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2829 }
2830
2831 static void kvm_update_masterclock(struct kvm *kvm)
2832 {
2833         kvm_hv_invalidate_tsc_page(kvm);
2834         kvm_start_pvclock_update(kvm);
2835         pvclock_update_vm_gtod_copy(kvm);
2836         kvm_end_pvclock_update(kvm);
2837 }
2838
2839 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2840 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2841 {
2842         struct kvm_arch *ka = &kvm->arch;
2843         struct pvclock_vcpu_time_info hv_clock;
2844
2845         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2846         get_cpu();
2847
2848         data->flags = 0;
2849         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2850 #ifdef CONFIG_X86_64
2851                 struct timespec64 ts;
2852
2853                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2854                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2855                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2856                 } else
2857 #endif
2858                 data->host_tsc = rdtsc();
2859
2860                 data->flags |= KVM_CLOCK_TSC_STABLE;
2861                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2862                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2863                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2864                                    &hv_clock.tsc_shift,
2865                                    &hv_clock.tsc_to_system_mul);
2866                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2867         } else {
2868                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2869         }
2870
2871         put_cpu();
2872 }
2873
2874 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2875 {
2876         struct kvm_arch *ka = &kvm->arch;
2877         unsigned seq;
2878
2879         do {
2880                 seq = read_seqcount_begin(&ka->pvclock_sc);
2881                 __get_kvmclock(kvm, data);
2882         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2883 }
2884
2885 u64 get_kvmclock_ns(struct kvm *kvm)
2886 {
2887         struct kvm_clock_data data;
2888
2889         get_kvmclock(kvm, &data);
2890         return data.clock;
2891 }
2892
2893 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2894                                    struct gfn_to_hva_cache *cache,
2895                                    unsigned int offset)
2896 {
2897         struct kvm_vcpu_arch *vcpu = &v->arch;
2898         struct pvclock_vcpu_time_info guest_hv_clock;
2899
2900         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2901                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2902                 return;
2903
2904         /* This VCPU is paused, but it's legal for a guest to read another
2905          * VCPU's kvmclock, so we really have to follow the specification where
2906          * it says that version is odd if data is being modified, and even after
2907          * it is consistent.
2908          *
2909          * Version field updates must be kept separate.  This is because
2910          * kvm_write_guest_cached might use a "rep movs" instruction, and
2911          * writes within a string instruction are weakly ordered.  So there
2912          * are three writes overall.
2913          *
2914          * As a small optimization, only write the version field in the first
2915          * and third write.  The vcpu->pv_time cache is still valid, because the
2916          * version field is the first in the struct.
2917          */
2918         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2919
2920         if (guest_hv_clock.version & 1)
2921                 ++guest_hv_clock.version;  /* first time write, random junk */
2922
2923         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2924         kvm_write_guest_offset_cached(v->kvm, cache,
2925                                       &vcpu->hv_clock, offset,
2926                                       sizeof(vcpu->hv_clock.version));
2927
2928         smp_wmb();
2929
2930         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2931         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2932
2933         if (vcpu->pvclock_set_guest_stopped_request) {
2934                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2935                 vcpu->pvclock_set_guest_stopped_request = false;
2936         }
2937
2938         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2939
2940         kvm_write_guest_offset_cached(v->kvm, cache,
2941                                       &vcpu->hv_clock, offset,
2942                                       sizeof(vcpu->hv_clock));
2943
2944         smp_wmb();
2945
2946         vcpu->hv_clock.version++;
2947         kvm_write_guest_offset_cached(v->kvm, cache,
2948                                      &vcpu->hv_clock, offset,
2949                                      sizeof(vcpu->hv_clock.version));
2950 }
2951
2952 static int kvm_guest_time_update(struct kvm_vcpu *v)
2953 {
2954         unsigned long flags, tgt_tsc_khz;
2955         unsigned seq;
2956         struct kvm_vcpu_arch *vcpu = &v->arch;
2957         struct kvm_arch *ka = &v->kvm->arch;
2958         s64 kernel_ns;
2959         u64 tsc_timestamp, host_tsc;
2960         u8 pvclock_flags;
2961         bool use_master_clock;
2962
2963         kernel_ns = 0;
2964         host_tsc = 0;
2965
2966         /*
2967          * If the host uses TSC clock, then passthrough TSC as stable
2968          * to the guest.
2969          */
2970         do {
2971                 seq = read_seqcount_begin(&ka->pvclock_sc);
2972                 use_master_clock = ka->use_master_clock;
2973                 if (use_master_clock) {
2974                         host_tsc = ka->master_cycle_now;
2975                         kernel_ns = ka->master_kernel_ns;
2976                 }
2977         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2978
2979         /* Keep irq disabled to prevent changes to the clock */
2980         local_irq_save(flags);
2981         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2982         if (unlikely(tgt_tsc_khz == 0)) {
2983                 local_irq_restore(flags);
2984                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2985                 return 1;
2986         }
2987         if (!use_master_clock) {
2988                 host_tsc = rdtsc();
2989                 kernel_ns = get_kvmclock_base_ns();
2990         }
2991
2992         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2993
2994         /*
2995          * We may have to catch up the TSC to match elapsed wall clock
2996          * time for two reasons, even if kvmclock is used.
2997          *   1) CPU could have been running below the maximum TSC rate
2998          *   2) Broken TSC compensation resets the base at each VCPU
2999          *      entry to avoid unknown leaps of TSC even when running
3000          *      again on the same CPU.  This may cause apparent elapsed
3001          *      time to disappear, and the guest to stand still or run
3002          *      very slowly.
3003          */
3004         if (vcpu->tsc_catchup) {
3005                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3006                 if (tsc > tsc_timestamp) {
3007                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3008                         tsc_timestamp = tsc;
3009                 }
3010         }
3011
3012         local_irq_restore(flags);
3013
3014         /* With all the info we got, fill in the values */
3015
3016         if (kvm_has_tsc_control)
3017                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3018                                             v->arch.l1_tsc_scaling_ratio);
3019
3020         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3021                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3022                                    &vcpu->hv_clock.tsc_shift,
3023                                    &vcpu->hv_clock.tsc_to_system_mul);
3024                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3025         }
3026
3027         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3028         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3029         vcpu->last_guest_tsc = tsc_timestamp;
3030
3031         /* If the host uses TSC clocksource, then it is stable */
3032         pvclock_flags = 0;
3033         if (use_master_clock)
3034                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3035
3036         vcpu->hv_clock.flags = pvclock_flags;
3037
3038         if (vcpu->pv_time_enabled)
3039                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3040         if (vcpu->xen.vcpu_info_set)
3041                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3042                                        offsetof(struct compat_vcpu_info, time));
3043         if (vcpu->xen.vcpu_time_info_set)
3044                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3045         if (!v->vcpu_idx)
3046                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3047         return 0;
3048 }
3049
3050 /*
3051  * kvmclock updates which are isolated to a given vcpu, such as
3052  * vcpu->cpu migration, should not allow system_timestamp from
3053  * the rest of the vcpus to remain static. Otherwise ntp frequency
3054  * correction applies to one vcpu's system_timestamp but not
3055  * the others.
3056  *
3057  * So in those cases, request a kvmclock update for all vcpus.
3058  * We need to rate-limit these requests though, as they can
3059  * considerably slow guests that have a large number of vcpus.
3060  * The time for a remote vcpu to update its kvmclock is bound
3061  * by the delay we use to rate-limit the updates.
3062  */
3063
3064 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3065
3066 static void kvmclock_update_fn(struct work_struct *work)
3067 {
3068         int i;
3069         struct delayed_work *dwork = to_delayed_work(work);
3070         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3071                                            kvmclock_update_work);
3072         struct kvm *kvm = container_of(ka, struct kvm, arch);
3073         struct kvm_vcpu *vcpu;
3074
3075         kvm_for_each_vcpu(i, vcpu, kvm) {
3076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3077                 kvm_vcpu_kick(vcpu);
3078         }
3079 }
3080
3081 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3082 {
3083         struct kvm *kvm = v->kvm;
3084
3085         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3086         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3087                                         KVMCLOCK_UPDATE_DELAY);
3088 }
3089
3090 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3091
3092 static void kvmclock_sync_fn(struct work_struct *work)
3093 {
3094         struct delayed_work *dwork = to_delayed_work(work);
3095         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3096                                            kvmclock_sync_work);
3097         struct kvm *kvm = container_of(ka, struct kvm, arch);
3098
3099         if (!kvmclock_periodic_sync)
3100                 return;
3101
3102         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3103         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3104                                         KVMCLOCK_SYNC_PERIOD);
3105 }
3106
3107 /*
3108  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3109  */
3110 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3111 {
3112         /* McStatusWrEn enabled? */
3113         if (guest_cpuid_is_amd_or_hygon(vcpu))
3114                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3115
3116         return false;
3117 }
3118
3119 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3120 {
3121         u64 mcg_cap = vcpu->arch.mcg_cap;
3122         unsigned bank_num = mcg_cap & 0xff;
3123         u32 msr = msr_info->index;
3124         u64 data = msr_info->data;
3125
3126         switch (msr) {
3127         case MSR_IA32_MCG_STATUS:
3128                 vcpu->arch.mcg_status = data;
3129                 break;
3130         case MSR_IA32_MCG_CTL:
3131                 if (!(mcg_cap & MCG_CTL_P) &&
3132                     (data || !msr_info->host_initiated))
3133                         return 1;
3134                 if (data != 0 && data != ~(u64)0)
3135                         return 1;
3136                 vcpu->arch.mcg_ctl = data;
3137                 break;
3138         default:
3139                 if (msr >= MSR_IA32_MC0_CTL &&
3140                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3141                         u32 offset = array_index_nospec(
3142                                 msr - MSR_IA32_MC0_CTL,
3143                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3144
3145                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3146                          * some Linux kernels though clear bit 10 in bank 4 to
3147                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3148                          * this to avoid an uncatched #GP in the guest
3149                          */
3150                         if ((offset & 0x3) == 0 &&
3151                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3152                                 return -1;
3153
3154                         /* MCi_STATUS */
3155                         if (!msr_info->host_initiated &&
3156                             (offset & 0x3) == 1 && data != 0) {
3157                                 if (!can_set_mci_status(vcpu))
3158                                         return -1;
3159                         }
3160
3161                         vcpu->arch.mce_banks[offset] = data;
3162                         break;
3163                 }
3164                 return 1;
3165         }
3166         return 0;
3167 }
3168
3169 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3170 {
3171         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3172
3173         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3174 }
3175
3176 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3177 {
3178         gpa_t gpa = data & ~0x3f;
3179
3180         /* Bits 4:5 are reserved, Should be zero */
3181         if (data & 0x30)
3182                 return 1;
3183
3184         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3185             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3186                 return 1;
3187
3188         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3189             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3190                 return 1;
3191
3192         if (!lapic_in_kernel(vcpu))
3193                 return data ? 1 : 0;
3194
3195         vcpu->arch.apf.msr_en_val = data;
3196
3197         if (!kvm_pv_async_pf_enabled(vcpu)) {
3198                 kvm_clear_async_pf_completion_queue(vcpu);
3199                 kvm_async_pf_hash_reset(vcpu);
3200                 return 0;
3201         }
3202
3203         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3204                                         sizeof(u64)))
3205                 return 1;
3206
3207         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3208         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3209
3210         kvm_async_pf_wakeup_all(vcpu);
3211
3212         return 0;
3213 }
3214
3215 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3216 {
3217         /* Bits 8-63 are reserved */
3218         if (data >> 8)
3219                 return 1;
3220
3221         if (!lapic_in_kernel(vcpu))
3222                 return 1;
3223
3224         vcpu->arch.apf.msr_int_val = data;
3225
3226         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3227
3228         return 0;
3229 }
3230
3231 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3232 {
3233         vcpu->arch.pv_time_enabled = false;
3234         vcpu->arch.time = 0;
3235 }
3236
3237 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3238 {
3239         ++vcpu->stat.tlb_flush;
3240         static_call(kvm_x86_tlb_flush_all)(vcpu);
3241 }
3242
3243 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3244 {
3245         ++vcpu->stat.tlb_flush;
3246
3247         if (!tdp_enabled) {
3248                 /*
3249                  * A TLB flush on behalf of the guest is equivalent to
3250                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3251                  * a forced sync of the shadow page tables.  Ensure all the
3252                  * roots are synced and the guest TLB in hardware is clean.
3253                  */
3254                 kvm_mmu_sync_roots(vcpu);
3255                 kvm_mmu_sync_prev_roots(vcpu);
3256         }
3257
3258         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3259 }
3260
3261 static void record_steal_time(struct kvm_vcpu *vcpu)
3262 {
3263         struct kvm_host_map map;
3264         struct kvm_steal_time *st;
3265
3266         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3267                 kvm_xen_runstate_set_running(vcpu);
3268                 return;
3269         }
3270
3271         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3272                 return;
3273
3274         /* -EAGAIN is returned in atomic context so we can just return. */
3275         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3276                         &map, &vcpu->arch.st.cache, false))
3277                 return;
3278
3279         st = map.hva +
3280                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3281
3282         /*
3283          * Doing a TLB flush here, on the guest's behalf, can avoid
3284          * expensive IPIs.
3285          */
3286         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3287                 u8 st_preempted = xchg(&st->preempted, 0);
3288
3289                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3290                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3291                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3292                         kvm_vcpu_flush_tlb_guest(vcpu);
3293         } else {
3294                 st->preempted = 0;
3295         }
3296
3297         vcpu->arch.st.preempted = 0;
3298
3299         if (st->version & 1)
3300                 st->version += 1;  /* first time write, random junk */
3301
3302         st->version += 1;
3303
3304         smp_wmb();
3305
3306         st->steal += current->sched_info.run_delay -
3307                 vcpu->arch.st.last_steal;
3308         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3309
3310         smp_wmb();
3311
3312         st->version += 1;
3313
3314         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3315 }
3316
3317 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3318 {
3319         bool pr = false;
3320         u32 msr = msr_info->index;
3321         u64 data = msr_info->data;
3322
3323         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3324                 return kvm_xen_write_hypercall_page(vcpu, data);
3325
3326         switch (msr) {
3327         case MSR_AMD64_NB_CFG:
3328         case MSR_IA32_UCODE_WRITE:
3329         case MSR_VM_HSAVE_PA:
3330         case MSR_AMD64_PATCH_LOADER:
3331         case MSR_AMD64_BU_CFG2:
3332         case MSR_AMD64_DC_CFG:
3333         case MSR_F15H_EX_CFG:
3334                 break;
3335
3336         case MSR_IA32_UCODE_REV:
3337                 if (msr_info->host_initiated)
3338                         vcpu->arch.microcode_version = data;
3339                 break;
3340         case MSR_IA32_ARCH_CAPABILITIES:
3341                 if (!msr_info->host_initiated)
3342                         return 1;
3343                 vcpu->arch.arch_capabilities = data;
3344                 break;
3345         case MSR_IA32_PERF_CAPABILITIES: {
3346                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3347
3348                 if (!msr_info->host_initiated)
3349                         return 1;
3350                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3351                         return 1;
3352                 if (data & ~msr_ent.data)
3353                         return 1;
3354
3355                 vcpu->arch.perf_capabilities = data;
3356
3357                 return 0;
3358                 }
3359         case MSR_EFER:
3360                 return set_efer(vcpu, msr_info);
3361         case MSR_K7_HWCR:
3362                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3363                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3364                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3365
3366                 /* Handle McStatusWrEn */
3367                 if (data == BIT_ULL(18)) {
3368                         vcpu->arch.msr_hwcr = data;
3369                 } else if (data != 0) {
3370                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3371                                     data);
3372                         return 1;
3373                 }
3374                 break;
3375         case MSR_FAM10H_MMIO_CONF_BASE:
3376                 if (data != 0) {
3377                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3378                                     "0x%llx\n", data);
3379                         return 1;
3380                 }
3381                 break;
3382         case 0x200 ... 0x2ff:
3383                 return kvm_mtrr_set_msr(vcpu, msr, data);
3384         case MSR_IA32_APICBASE:
3385                 return kvm_set_apic_base(vcpu, msr_info);
3386         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3387                 return kvm_x2apic_msr_write(vcpu, msr, data);
3388         case MSR_IA32_TSC_DEADLINE:
3389                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3390                 break;
3391         case MSR_IA32_TSC_ADJUST:
3392                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3393                         if (!msr_info->host_initiated) {
3394                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3395                                 adjust_tsc_offset_guest(vcpu, adj);
3396                                 /* Before back to guest, tsc_timestamp must be adjusted
3397                                  * as well, otherwise guest's percpu pvclock time could jump.
3398                                  */
3399                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3400                         }
3401                         vcpu->arch.ia32_tsc_adjust_msr = data;
3402                 }
3403                 break;
3404         case MSR_IA32_MISC_ENABLE:
3405                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3406                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3407                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3408                                 return 1;
3409                         vcpu->arch.ia32_misc_enable_msr = data;
3410                         kvm_update_cpuid_runtime(vcpu);
3411                 } else {
3412                         vcpu->arch.ia32_misc_enable_msr = data;
3413                 }
3414                 break;
3415         case MSR_IA32_SMBASE:
3416                 if (!msr_info->host_initiated)
3417                         return 1;
3418                 vcpu->arch.smbase = data;
3419                 break;
3420         case MSR_IA32_POWER_CTL:
3421                 vcpu->arch.msr_ia32_power_ctl = data;
3422                 break;
3423         case MSR_IA32_TSC:
3424                 if (msr_info->host_initiated) {
3425                         kvm_synchronize_tsc(vcpu, data);
3426                 } else {
3427                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3428                         adjust_tsc_offset_guest(vcpu, adj);
3429                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3430                 }
3431                 break;
3432         case MSR_IA32_XSS:
3433                 if (!msr_info->host_initiated &&
3434                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3435                         return 1;
3436                 /*
3437                  * KVM supports exposing PT to the guest, but does not support
3438                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3439                  * XSAVES/XRSTORS to save/restore PT MSRs.
3440                  */
3441                 if (data & ~supported_xss)
3442                         return 1;
3443                 vcpu->arch.ia32_xss = data;
3444                 break;
3445         case MSR_SMI_COUNT:
3446                 if (!msr_info->host_initiated)
3447                         return 1;
3448                 vcpu->arch.smi_count = data;
3449                 break;
3450         case MSR_KVM_WALL_CLOCK_NEW:
3451                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3452                         return 1;
3453
3454                 vcpu->kvm->arch.wall_clock = data;
3455                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3456                 break;
3457         case MSR_KVM_WALL_CLOCK:
3458                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3459                         return 1;
3460
3461                 vcpu->kvm->arch.wall_clock = data;
3462                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3463                 break;
3464         case MSR_KVM_SYSTEM_TIME_NEW:
3465                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3466                         return 1;
3467
3468                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3469                 break;
3470         case MSR_KVM_SYSTEM_TIME:
3471                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3472                         return 1;
3473
3474                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3475                 break;
3476         case MSR_KVM_ASYNC_PF_EN:
3477                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3478                         return 1;
3479
3480                 if (kvm_pv_enable_async_pf(vcpu, data))
3481                         return 1;
3482                 break;
3483         case MSR_KVM_ASYNC_PF_INT:
3484                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3485                         return 1;
3486
3487                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3488                         return 1;
3489                 break;
3490         case MSR_KVM_ASYNC_PF_ACK:
3491                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3492                         return 1;
3493                 if (data & 0x1) {
3494                         vcpu->arch.apf.pageready_pending = false;
3495                         kvm_check_async_pf_completion(vcpu);
3496                 }
3497                 break;
3498         case MSR_KVM_STEAL_TIME:
3499                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3500                         return 1;
3501
3502                 if (unlikely(!sched_info_on()))
3503                         return 1;
3504
3505                 if (data & KVM_STEAL_RESERVED_MASK)
3506                         return 1;
3507
3508                 vcpu->arch.st.msr_val = data;
3509
3510                 if (!(data & KVM_MSR_ENABLED))
3511                         break;
3512
3513                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3514
3515                 break;
3516         case MSR_KVM_PV_EOI_EN:
3517                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3518                         return 1;
3519
3520                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3521                         return 1;
3522                 break;
3523
3524         case MSR_KVM_POLL_CONTROL:
3525                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3526                         return 1;
3527
3528                 /* only enable bit supported */
3529                 if (data & (-1ULL << 1))
3530                         return 1;
3531
3532                 vcpu->arch.msr_kvm_poll_control = data;
3533                 break;
3534
3535         case MSR_IA32_MCG_CTL:
3536         case MSR_IA32_MCG_STATUS:
3537         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3538                 return set_msr_mce(vcpu, msr_info);
3539
3540         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3541         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3542                 pr = true;
3543                 fallthrough;
3544         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3545         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3546                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3547                         return kvm_pmu_set_msr(vcpu, msr_info);
3548
3549                 if (pr || data != 0)
3550                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3551                                     "0x%x data 0x%llx\n", msr, data);
3552                 break;
3553         case MSR_K7_CLK_CTL:
3554                 /*
3555                  * Ignore all writes to this no longer documented MSR.
3556                  * Writes are only relevant for old K7 processors,
3557                  * all pre-dating SVM, but a recommended workaround from
3558                  * AMD for these chips. It is possible to specify the
3559                  * affected processor models on the command line, hence
3560                  * the need to ignore the workaround.
3561                  */
3562                 break;
3563         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3564         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3565         case HV_X64_MSR_SYNDBG_OPTIONS:
3566         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3567         case HV_X64_MSR_CRASH_CTL:
3568         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3569         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3570         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3571         case HV_X64_MSR_TSC_EMULATION_STATUS:
3572                 return kvm_hv_set_msr_common(vcpu, msr, data,
3573                                              msr_info->host_initiated);
3574         case MSR_IA32_BBL_CR_CTL3:
3575                 /* Drop writes to this legacy MSR -- see rdmsr
3576                  * counterpart for further detail.
3577                  */
3578                 if (report_ignored_msrs)
3579                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3580                                 msr, data);
3581                 break;
3582         case MSR_AMD64_OSVW_ID_LENGTH:
3583                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3584                         return 1;
3585                 vcpu->arch.osvw.length = data;
3586                 break;
3587         case MSR_AMD64_OSVW_STATUS:
3588                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3589                         return 1;
3590                 vcpu->arch.osvw.status = data;
3591                 break;
3592         case MSR_PLATFORM_INFO:
3593                 if (!msr_info->host_initiated ||
3594                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3595                      cpuid_fault_enabled(vcpu)))
3596                         return 1;
3597                 vcpu->arch.msr_platform_info = data;
3598                 break;
3599         case MSR_MISC_FEATURES_ENABLES:
3600                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3601                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3602                      !supports_cpuid_fault(vcpu)))
3603                         return 1;
3604                 vcpu->arch.msr_misc_features_enables = data;
3605                 break;
3606         default:
3607                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3608                         return kvm_pmu_set_msr(vcpu, msr_info);
3609                 return KVM_MSR_RET_INVALID;
3610         }
3611         return 0;
3612 }
3613 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3614
3615 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3616 {
3617         u64 data;
3618         u64 mcg_cap = vcpu->arch.mcg_cap;
3619         unsigned bank_num = mcg_cap & 0xff;
3620
3621         switch (msr) {
3622         case MSR_IA32_P5_MC_ADDR:
3623         case MSR_IA32_P5_MC_TYPE:
3624                 data = 0;
3625                 break;
3626         case MSR_IA32_MCG_CAP:
3627                 data = vcpu->arch.mcg_cap;
3628                 break;
3629         case MSR_IA32_MCG_CTL:
3630                 if (!(mcg_cap & MCG_CTL_P) && !host)
3631                         return 1;
3632                 data = vcpu->arch.mcg_ctl;
3633                 break;
3634         case MSR_IA32_MCG_STATUS:
3635                 data = vcpu->arch.mcg_status;
3636                 break;
3637         default:
3638                 if (msr >= MSR_IA32_MC0_CTL &&
3639                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3640                         u32 offset = array_index_nospec(
3641                                 msr - MSR_IA32_MC0_CTL,
3642                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3643
3644                         data = vcpu->arch.mce_banks[offset];
3645                         break;
3646                 }
3647                 return 1;
3648         }
3649         *pdata = data;
3650         return 0;
3651 }
3652
3653 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3654 {
3655         switch (msr_info->index) {
3656         case MSR_IA32_PLATFORM_ID:
3657         case MSR_IA32_EBL_CR_POWERON:
3658         case MSR_IA32_LASTBRANCHFROMIP:
3659         case MSR_IA32_LASTBRANCHTOIP:
3660         case MSR_IA32_LASTINTFROMIP:
3661         case MSR_IA32_LASTINTTOIP:
3662         case MSR_AMD64_SYSCFG:
3663         case MSR_K8_TSEG_ADDR:
3664         case MSR_K8_TSEG_MASK:
3665         case MSR_VM_HSAVE_PA:
3666         case MSR_K8_INT_PENDING_MSG:
3667         case MSR_AMD64_NB_CFG:
3668         case MSR_FAM10H_MMIO_CONF_BASE:
3669         case MSR_AMD64_BU_CFG2:
3670         case MSR_IA32_PERF_CTL:
3671         case MSR_AMD64_DC_CFG:
3672         case MSR_F15H_EX_CFG:
3673         /*
3674          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3675          * limit) MSRs. Just return 0, as we do not want to expose the host
3676          * data here. Do not conditionalize this on CPUID, as KVM does not do
3677          * so for existing CPU-specific MSRs.
3678          */
3679         case MSR_RAPL_POWER_UNIT:
3680         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3681         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3682         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3683         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3684                 msr_info->data = 0;
3685                 break;
3686         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3687                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3688                         return kvm_pmu_get_msr(vcpu, msr_info);
3689                 if (!msr_info->host_initiated)
3690                         return 1;
3691                 msr_info->data = 0;
3692                 break;
3693         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3694         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3695         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3696         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3697                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3698                         return kvm_pmu_get_msr(vcpu, msr_info);
3699                 msr_info->data = 0;
3700                 break;
3701         case MSR_IA32_UCODE_REV:
3702                 msr_info->data = vcpu->arch.microcode_version;
3703                 break;
3704         case MSR_IA32_ARCH_CAPABILITIES:
3705                 if (!msr_info->host_initiated &&
3706                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3707                         return 1;
3708                 msr_info->data = vcpu->arch.arch_capabilities;
3709                 break;
3710         case MSR_IA32_PERF_CAPABILITIES:
3711                 if (!msr_info->host_initiated &&
3712                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3713                         return 1;
3714                 msr_info->data = vcpu->arch.perf_capabilities;
3715                 break;
3716         case MSR_IA32_POWER_CTL:
3717                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3718                 break;
3719         case MSR_IA32_TSC: {
3720                 /*
3721                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3722                  * even when not intercepted. AMD manual doesn't explicitly
3723                  * state this but appears to behave the same.
3724                  *
3725                  * On userspace reads and writes, however, we unconditionally
3726                  * return L1's TSC value to ensure backwards-compatible
3727                  * behavior for migration.
3728                  */
3729                 u64 offset, ratio;
3730
3731                 if (msr_info->host_initiated) {
3732                         offset = vcpu->arch.l1_tsc_offset;
3733                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3734                 } else {
3735                         offset = vcpu->arch.tsc_offset;
3736                         ratio = vcpu->arch.tsc_scaling_ratio;
3737                 }
3738
3739                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3740                 break;
3741         }
3742         case MSR_MTRRcap:
3743         case 0x200 ... 0x2ff:
3744                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3745         case 0xcd: /* fsb frequency */
3746                 msr_info->data = 3;
3747                 break;
3748                 /*
3749                  * MSR_EBC_FREQUENCY_ID
3750                  * Conservative value valid for even the basic CPU models.
3751                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3752                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3753                  * and 266MHz for model 3, or 4. Set Core Clock
3754                  * Frequency to System Bus Frequency Ratio to 1 (bits
3755                  * 31:24) even though these are only valid for CPU
3756                  * models > 2, however guests may end up dividing or
3757                  * multiplying by zero otherwise.
3758                  */
3759         case MSR_EBC_FREQUENCY_ID:
3760                 msr_info->data = 1 << 24;
3761                 break;
3762         case MSR_IA32_APICBASE:
3763                 msr_info->data = kvm_get_apic_base(vcpu);
3764                 break;
3765         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3766                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3767         case MSR_IA32_TSC_DEADLINE:
3768                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3769                 break;
3770         case MSR_IA32_TSC_ADJUST:
3771                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3772                 break;
3773         case MSR_IA32_MISC_ENABLE:
3774                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3775                 break;
3776         case MSR_IA32_SMBASE:
3777                 if (!msr_info->host_initiated)
3778                         return 1;
3779                 msr_info->data = vcpu->arch.smbase;
3780                 break;
3781         case MSR_SMI_COUNT:
3782                 msr_info->data = vcpu->arch.smi_count;
3783                 break;
3784         case MSR_IA32_PERF_STATUS:
3785                 /* TSC increment by tick */
3786                 msr_info->data = 1000ULL;
3787                 /* CPU multiplier */
3788                 msr_info->data |= (((uint64_t)4ULL) << 40);
3789                 break;
3790         case MSR_EFER:
3791                 msr_info->data = vcpu->arch.efer;
3792                 break;
3793         case MSR_KVM_WALL_CLOCK:
3794                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3795                         return 1;
3796
3797                 msr_info->data = vcpu->kvm->arch.wall_clock;
3798                 break;
3799         case MSR_KVM_WALL_CLOCK_NEW:
3800                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3801                         return 1;
3802
3803                 msr_info->data = vcpu->kvm->arch.wall_clock;
3804                 break;
3805         case MSR_KVM_SYSTEM_TIME:
3806                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3807                         return 1;
3808
3809                 msr_info->data = vcpu->arch.time;
3810                 break;
3811         case MSR_KVM_SYSTEM_TIME_NEW:
3812                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3813                         return 1;
3814
3815                 msr_info->data = vcpu->arch.time;
3816                 break;
3817         case MSR_KVM_ASYNC_PF_EN:
3818                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3819                         return 1;
3820
3821                 msr_info->data = vcpu->arch.apf.msr_en_val;
3822                 break;
3823         case MSR_KVM_ASYNC_PF_INT:
3824                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3825                         return 1;
3826
3827                 msr_info->data = vcpu->arch.apf.msr_int_val;
3828                 break;
3829         case MSR_KVM_ASYNC_PF_ACK:
3830                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3831                         return 1;
3832
3833                 msr_info->data = 0;
3834                 break;
3835         case MSR_KVM_STEAL_TIME:
3836                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3837                         return 1;
3838
3839                 msr_info->data = vcpu->arch.st.msr_val;
3840                 break;
3841         case MSR_KVM_PV_EOI_EN:
3842                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3843                         return 1;
3844
3845                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3846                 break;
3847         case MSR_KVM_POLL_CONTROL:
3848                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3849                         return 1;
3850
3851                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3852                 break;
3853         case MSR_IA32_P5_MC_ADDR:
3854         case MSR_IA32_P5_MC_TYPE:
3855         case MSR_IA32_MCG_CAP:
3856         case MSR_IA32_MCG_CTL:
3857         case MSR_IA32_MCG_STATUS:
3858         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3859                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3860                                    msr_info->host_initiated);
3861         case MSR_IA32_XSS:
3862                 if (!msr_info->host_initiated &&
3863                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3864                         return 1;
3865                 msr_info->data = vcpu->arch.ia32_xss;
3866                 break;
3867         case MSR_K7_CLK_CTL:
3868                 /*
3869                  * Provide expected ramp-up count for K7. All other
3870                  * are set to zero, indicating minimum divisors for
3871                  * every field.
3872                  *
3873                  * This prevents guest kernels on AMD host with CPU
3874                  * type 6, model 8 and higher from exploding due to
3875                  * the rdmsr failing.
3876                  */
3877                 msr_info->data = 0x20000000;
3878                 break;
3879         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3880         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3881         case HV_X64_MSR_SYNDBG_OPTIONS:
3882         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3883         case HV_X64_MSR_CRASH_CTL:
3884         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3885         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3886         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3887         case HV_X64_MSR_TSC_EMULATION_STATUS:
3888                 return kvm_hv_get_msr_common(vcpu,
3889                                              msr_info->index, &msr_info->data,
3890                                              msr_info->host_initiated);
3891         case MSR_IA32_BBL_CR_CTL3:
3892                 /* This legacy MSR exists but isn't fully documented in current
3893                  * silicon.  It is however accessed by winxp in very narrow
3894                  * scenarios where it sets bit #19, itself documented as
3895                  * a "reserved" bit.  Best effort attempt to source coherent
3896                  * read data here should the balance of the register be
3897                  * interpreted by the guest:
3898                  *
3899                  * L2 cache control register 3: 64GB range, 256KB size,
3900                  * enabled, latency 0x1, configured
3901                  */
3902                 msr_info->data = 0xbe702111;
3903                 break;
3904         case MSR_AMD64_OSVW_ID_LENGTH:
3905                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3906                         return 1;
3907                 msr_info->data = vcpu->arch.osvw.length;
3908                 break;
3909         case MSR_AMD64_OSVW_STATUS:
3910                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3911                         return 1;
3912                 msr_info->data = vcpu->arch.osvw.status;
3913                 break;
3914         case MSR_PLATFORM_INFO:
3915                 if (!msr_info->host_initiated &&
3916                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3917                         return 1;
3918                 msr_info->data = vcpu->arch.msr_platform_info;
3919                 break;
3920         case MSR_MISC_FEATURES_ENABLES:
3921                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3922                 break;
3923         case MSR_K7_HWCR:
3924                 msr_info->data = vcpu->arch.msr_hwcr;
3925                 break;
3926         default:
3927                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3928                         return kvm_pmu_get_msr(vcpu, msr_info);
3929                 return KVM_MSR_RET_INVALID;
3930         }
3931         return 0;
3932 }
3933 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3934
3935 /*
3936  * Read or write a bunch of msrs. All parameters are kernel addresses.
3937  *
3938  * @return number of msrs set successfully.
3939  */
3940 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3941                     struct kvm_msr_entry *entries,
3942                     int (*do_msr)(struct kvm_vcpu *vcpu,
3943                                   unsigned index, u64 *data))
3944 {
3945         int i;
3946
3947         for (i = 0; i < msrs->nmsrs; ++i)
3948                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3949                         break;
3950
3951         return i;
3952 }
3953
3954 /*
3955  * Read or write a bunch of msrs. Parameters are user addresses.
3956  *
3957  * @return number of msrs set successfully.
3958  */
3959 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3960                   int (*do_msr)(struct kvm_vcpu *vcpu,
3961                                 unsigned index, u64 *data),
3962                   int writeback)
3963 {
3964         struct kvm_msrs msrs;
3965         struct kvm_msr_entry *entries;
3966         int r, n;
3967         unsigned size;
3968
3969         r = -EFAULT;
3970         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3971                 goto out;
3972
3973         r = -E2BIG;
3974         if (msrs.nmsrs >= MAX_IO_MSRS)
3975                 goto out;
3976
3977         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3978         entries = memdup_user(user_msrs->entries, size);
3979         if (IS_ERR(entries)) {
3980                 r = PTR_ERR(entries);
3981                 goto out;
3982         }
3983
3984         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3985         if (r < 0)
3986                 goto out_free;
3987
3988         r = -EFAULT;
3989         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3990                 goto out_free;
3991
3992         r = n;
3993
3994 out_free:
3995         kfree(entries);
3996 out:
3997         return r;
3998 }
3999
4000 static inline bool kvm_can_mwait_in_guest(void)
4001 {
4002         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4003                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4004                 boot_cpu_has(X86_FEATURE_ARAT);
4005 }
4006
4007 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4008                                             struct kvm_cpuid2 __user *cpuid_arg)
4009 {
4010         struct kvm_cpuid2 cpuid;
4011         int r;
4012
4013         r = -EFAULT;
4014         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4015                 return r;
4016
4017         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4018         if (r)
4019                 return r;
4020
4021         r = -EFAULT;
4022         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4023                 return r;
4024
4025         return 0;
4026 }
4027
4028 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4029 {
4030         int r = 0;
4031
4032         switch (ext) {
4033         case KVM_CAP_IRQCHIP:
4034         case KVM_CAP_HLT:
4035         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4036         case KVM_CAP_SET_TSS_ADDR:
4037         case KVM_CAP_EXT_CPUID:
4038         case KVM_CAP_EXT_EMUL_CPUID:
4039         case KVM_CAP_CLOCKSOURCE:
4040         case KVM_CAP_PIT:
4041         case KVM_CAP_NOP_IO_DELAY:
4042         case KVM_CAP_MP_STATE:
4043         case KVM_CAP_SYNC_MMU:
4044         case KVM_CAP_USER_NMI:
4045         case KVM_CAP_REINJECT_CONTROL:
4046         case KVM_CAP_IRQ_INJECT_STATUS:
4047         case KVM_CAP_IOEVENTFD:
4048         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4049         case KVM_CAP_PIT2:
4050         case KVM_CAP_PIT_STATE2:
4051         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4052         case KVM_CAP_VCPU_EVENTS:
4053         case KVM_CAP_HYPERV:
4054         case KVM_CAP_HYPERV_VAPIC:
4055         case KVM_CAP_HYPERV_SPIN:
4056         case KVM_CAP_HYPERV_SYNIC:
4057         case KVM_CAP_HYPERV_SYNIC2:
4058         case KVM_CAP_HYPERV_VP_INDEX:
4059         case KVM_CAP_HYPERV_EVENTFD:
4060         case KVM_CAP_HYPERV_TLBFLUSH:
4061         case KVM_CAP_HYPERV_SEND_IPI:
4062         case KVM_CAP_HYPERV_CPUID:
4063         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4064         case KVM_CAP_SYS_HYPERV_CPUID:
4065         case KVM_CAP_PCI_SEGMENT:
4066         case KVM_CAP_DEBUGREGS:
4067         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4068         case KVM_CAP_XSAVE:
4069         case KVM_CAP_ASYNC_PF:
4070         case KVM_CAP_ASYNC_PF_INT:
4071         case KVM_CAP_GET_TSC_KHZ:
4072         case KVM_CAP_KVMCLOCK_CTRL:
4073         case KVM_CAP_READONLY_MEM:
4074         case KVM_CAP_HYPERV_TIME:
4075         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4076         case KVM_CAP_TSC_DEADLINE_TIMER:
4077         case KVM_CAP_DISABLE_QUIRKS:
4078         case KVM_CAP_SET_BOOT_CPU_ID:
4079         case KVM_CAP_SPLIT_IRQCHIP:
4080         case KVM_CAP_IMMEDIATE_EXIT:
4081         case KVM_CAP_PMU_EVENT_FILTER:
4082         case KVM_CAP_GET_MSR_FEATURES:
4083         case KVM_CAP_MSR_PLATFORM_INFO:
4084         case KVM_CAP_EXCEPTION_PAYLOAD:
4085         case KVM_CAP_SET_GUEST_DEBUG:
4086         case KVM_CAP_LAST_CPU:
4087         case KVM_CAP_X86_USER_SPACE_MSR:
4088         case KVM_CAP_X86_MSR_FILTER:
4089         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4090 #ifdef CONFIG_X86_SGX_KVM
4091         case KVM_CAP_SGX_ATTRIBUTE:
4092 #endif
4093         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4094         case KVM_CAP_SREGS2:
4095         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4096         case KVM_CAP_VCPU_ATTRIBUTES:
4097                 r = 1;
4098                 break;
4099         case KVM_CAP_EXIT_HYPERCALL:
4100                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4101                 break;
4102         case KVM_CAP_SET_GUEST_DEBUG2:
4103                 return KVM_GUESTDBG_VALID_MASK;
4104 #ifdef CONFIG_KVM_XEN
4105         case KVM_CAP_XEN_HVM:
4106                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4107                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4108                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4109                 if (sched_info_on())
4110                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4111                 break;
4112 #endif
4113         case KVM_CAP_SYNC_REGS:
4114                 r = KVM_SYNC_X86_VALID_FIELDS;
4115                 break;
4116         case KVM_CAP_ADJUST_CLOCK:
4117                 r = KVM_CLOCK_VALID_FLAGS;
4118                 break;
4119         case KVM_CAP_X86_DISABLE_EXITS:
4120                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4121                       KVM_X86_DISABLE_EXITS_CSTATE;
4122                 if(kvm_can_mwait_in_guest())
4123                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4124                 break;
4125         case KVM_CAP_X86_SMM:
4126                 /* SMBASE is usually relocated above 1M on modern chipsets,
4127                  * and SMM handlers might indeed rely on 4G segment limits,
4128                  * so do not report SMM to be available if real mode is
4129                  * emulated via vm86 mode.  Still, do not go to great lengths
4130                  * to avoid userspace's usage of the feature, because it is a
4131                  * fringe case that is not enabled except via specific settings
4132                  * of the module parameters.
4133                  */
4134                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4135                 break;
4136         case KVM_CAP_VAPIC:
4137                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4138                 break;
4139         case KVM_CAP_NR_VCPUS:
4140                 r = KVM_SOFT_MAX_VCPUS;
4141                 break;
4142         case KVM_CAP_MAX_VCPUS:
4143                 r = KVM_MAX_VCPUS;
4144                 break;
4145         case KVM_CAP_MAX_VCPU_ID:
4146                 r = KVM_MAX_VCPU_IDS;
4147                 break;
4148         case KVM_CAP_PV_MMU:    /* obsolete */
4149                 r = 0;
4150                 break;
4151         case KVM_CAP_MCE:
4152                 r = KVM_MAX_MCE_BANKS;
4153                 break;
4154         case KVM_CAP_XCRS:
4155                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4156                 break;
4157         case KVM_CAP_TSC_CONTROL:
4158                 r = kvm_has_tsc_control;
4159                 break;
4160         case KVM_CAP_X2APIC_API:
4161                 r = KVM_X2APIC_API_VALID_FLAGS;
4162                 break;
4163         case KVM_CAP_NESTED_STATE:
4164                 r = kvm_x86_ops.nested_ops->get_state ?
4165                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4166                 break;
4167         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4168                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4169                 break;
4170         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4171                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4172                 break;
4173         case KVM_CAP_SMALLER_MAXPHYADDR:
4174                 r = (int) allow_smaller_maxphyaddr;
4175                 break;
4176         case KVM_CAP_STEAL_TIME:
4177                 r = sched_info_on();
4178                 break;
4179         case KVM_CAP_X86_BUS_LOCK_EXIT:
4180                 if (kvm_has_bus_lock_exit)
4181                         r = KVM_BUS_LOCK_DETECTION_OFF |
4182                             KVM_BUS_LOCK_DETECTION_EXIT;
4183                 else
4184                         r = 0;
4185                 break;
4186         default:
4187                 break;
4188         }
4189         return r;
4190
4191 }
4192
4193 long kvm_arch_dev_ioctl(struct file *filp,
4194                         unsigned int ioctl, unsigned long arg)
4195 {
4196         void __user *argp = (void __user *)arg;
4197         long r;
4198
4199         switch (ioctl) {
4200         case KVM_GET_MSR_INDEX_LIST: {
4201                 struct kvm_msr_list __user *user_msr_list = argp;
4202                 struct kvm_msr_list msr_list;
4203                 unsigned n;
4204
4205                 r = -EFAULT;
4206                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4207                         goto out;
4208                 n = msr_list.nmsrs;
4209                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4210                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4211                         goto out;
4212                 r = -E2BIG;
4213                 if (n < msr_list.nmsrs)
4214                         goto out;
4215                 r = -EFAULT;
4216                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4217                                  num_msrs_to_save * sizeof(u32)))
4218                         goto out;
4219                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4220                                  &emulated_msrs,
4221                                  num_emulated_msrs * sizeof(u32)))
4222                         goto out;
4223                 r = 0;
4224                 break;
4225         }
4226         case KVM_GET_SUPPORTED_CPUID:
4227         case KVM_GET_EMULATED_CPUID: {
4228                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4229                 struct kvm_cpuid2 cpuid;
4230
4231                 r = -EFAULT;
4232                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4233                         goto out;
4234
4235                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4236                                             ioctl);
4237                 if (r)
4238                         goto out;
4239
4240                 r = -EFAULT;
4241                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4242                         goto out;
4243                 r = 0;
4244                 break;
4245         }
4246         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4247                 r = -EFAULT;
4248                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4249                                  sizeof(kvm_mce_cap_supported)))
4250                         goto out;
4251                 r = 0;
4252                 break;
4253         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4254                 struct kvm_msr_list __user *user_msr_list = argp;
4255                 struct kvm_msr_list msr_list;
4256                 unsigned int n;
4257
4258                 r = -EFAULT;
4259                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4260                         goto out;
4261                 n = msr_list.nmsrs;
4262                 msr_list.nmsrs = num_msr_based_features;
4263                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4264                         goto out;
4265                 r = -E2BIG;
4266                 if (n < msr_list.nmsrs)
4267                         goto out;
4268                 r = -EFAULT;
4269                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4270                                  num_msr_based_features * sizeof(u32)))
4271                         goto out;
4272                 r = 0;
4273                 break;
4274         }
4275         case KVM_GET_MSRS:
4276                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4277                 break;
4278         case KVM_GET_SUPPORTED_HV_CPUID:
4279                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4280                 break;
4281         default:
4282                 r = -EINVAL;
4283                 break;
4284         }
4285 out:
4286         return r;
4287 }
4288
4289 static void wbinvd_ipi(void *garbage)
4290 {
4291         wbinvd();
4292 }
4293
4294 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4295 {
4296         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4297 }
4298
4299 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4300 {
4301         /* Address WBINVD may be executed by guest */
4302         if (need_emulate_wbinvd(vcpu)) {
4303                 if (static_call(kvm_x86_has_wbinvd_exit)())
4304                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4305                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4306                         smp_call_function_single(vcpu->cpu,
4307                                         wbinvd_ipi, NULL, 1);
4308         }
4309
4310         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4311
4312         /* Save host pkru register if supported */
4313         vcpu->arch.host_pkru = read_pkru();
4314
4315         /* Apply any externally detected TSC adjustments (due to suspend) */
4316         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4317                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4318                 vcpu->arch.tsc_offset_adjustment = 0;
4319                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4320         }
4321
4322         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4323                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4324                                 rdtsc() - vcpu->arch.last_host_tsc;
4325                 if (tsc_delta < 0)
4326                         mark_tsc_unstable("KVM discovered backwards TSC");
4327
4328                 if (kvm_check_tsc_unstable()) {
4329                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4330                                                 vcpu->arch.last_guest_tsc);
4331                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4332                         vcpu->arch.tsc_catchup = 1;
4333                 }
4334
4335                 if (kvm_lapic_hv_timer_in_use(vcpu))
4336                         kvm_lapic_restart_hv_timer(vcpu);
4337
4338                 /*
4339                  * On a host with synchronized TSC, there is no need to update
4340                  * kvmclock on vcpu->cpu migration
4341                  */
4342                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4343                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4344                 if (vcpu->cpu != cpu)
4345                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4346                 vcpu->cpu = cpu;
4347         }
4348
4349         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4350 }
4351
4352 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4353 {
4354         struct kvm_host_map map;
4355         struct kvm_steal_time *st;
4356
4357         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4358                 return;
4359
4360         if (vcpu->arch.st.preempted)
4361                 return;
4362
4363         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4364                         &vcpu->arch.st.cache, true))
4365                 return;
4366
4367         st = map.hva +
4368                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4369
4370         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4371
4372         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4373 }
4374
4375 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4376 {
4377         int idx;
4378
4379         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4380                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4381
4382         /*
4383          * Take the srcu lock as memslots will be accessed to check the gfn
4384          * cache generation against the memslots generation.
4385          */
4386         idx = srcu_read_lock(&vcpu->kvm->srcu);
4387         if (kvm_xen_msr_enabled(vcpu->kvm))
4388                 kvm_xen_runstate_set_preempted(vcpu);
4389         else
4390                 kvm_steal_time_set_preempted(vcpu);
4391         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4392
4393         static_call(kvm_x86_vcpu_put)(vcpu);
4394         vcpu->arch.last_host_tsc = rdtsc();
4395 }
4396
4397 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4398                                     struct kvm_lapic_state *s)
4399 {
4400         if (vcpu->arch.apicv_active)
4401                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4402
4403         return kvm_apic_get_state(vcpu, s);
4404 }
4405
4406 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4407                                     struct kvm_lapic_state *s)
4408 {
4409         int r;
4410
4411         r = kvm_apic_set_state(vcpu, s);
4412         if (r)
4413                 return r;
4414         update_cr8_intercept(vcpu);
4415
4416         return 0;
4417 }
4418
4419 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4420 {
4421         /*
4422          * We can accept userspace's request for interrupt injection
4423          * as long as we have a place to store the interrupt number.
4424          * The actual injection will happen when the CPU is able to
4425          * deliver the interrupt.
4426          */
4427         if (kvm_cpu_has_extint(vcpu))
4428                 return false;
4429
4430         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4431         return (!lapic_in_kernel(vcpu) ||
4432                 kvm_apic_accept_pic_intr(vcpu));
4433 }
4434
4435 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4436 {
4437         /*
4438          * Do not cause an interrupt window exit if an exception
4439          * is pending or an event needs reinjection; userspace
4440          * might want to inject the interrupt manually using KVM_SET_REGS
4441          * or KVM_SET_SREGS.  For that to work, we must be at an
4442          * instruction boundary and with no events half-injected.
4443          */
4444         return (kvm_arch_interrupt_allowed(vcpu) &&
4445                 kvm_cpu_accept_dm_intr(vcpu) &&
4446                 !kvm_event_needs_reinjection(vcpu) &&
4447                 !vcpu->arch.exception.pending);
4448 }
4449
4450 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4451                                     struct kvm_interrupt *irq)
4452 {
4453         if (irq->irq >= KVM_NR_INTERRUPTS)
4454                 return -EINVAL;
4455
4456         if (!irqchip_in_kernel(vcpu->kvm)) {
4457                 kvm_queue_interrupt(vcpu, irq->irq, false);
4458                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4459                 return 0;
4460         }
4461
4462         /*
4463          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4464          * fail for in-kernel 8259.
4465          */
4466         if (pic_in_kernel(vcpu->kvm))
4467                 return -ENXIO;
4468
4469         if (vcpu->arch.pending_external_vector != -1)
4470                 return -EEXIST;
4471
4472         vcpu->arch.pending_external_vector = irq->irq;
4473         kvm_make_request(KVM_REQ_EVENT, vcpu);
4474         return 0;
4475 }
4476
4477 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4478 {
4479         kvm_inject_nmi(vcpu);
4480
4481         return 0;
4482 }
4483
4484 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4485 {
4486         kvm_make_request(KVM_REQ_SMI, vcpu);
4487
4488         return 0;
4489 }
4490
4491 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4492                                            struct kvm_tpr_access_ctl *tac)
4493 {
4494         if (tac->flags)
4495                 return -EINVAL;
4496         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4497         return 0;
4498 }
4499
4500 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4501                                         u64 mcg_cap)
4502 {
4503         int r;
4504         unsigned bank_num = mcg_cap & 0xff, bank;
4505
4506         r = -EINVAL;
4507         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4508                 goto out;
4509         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4510                 goto out;
4511         r = 0;
4512         vcpu->arch.mcg_cap = mcg_cap;
4513         /* Init IA32_MCG_CTL to all 1s */
4514         if (mcg_cap & MCG_CTL_P)
4515                 vcpu->arch.mcg_ctl = ~(u64)0;
4516         /* Init IA32_MCi_CTL to all 1s */
4517         for (bank = 0; bank < bank_num; bank++)
4518                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4519
4520         static_call(kvm_x86_setup_mce)(vcpu);
4521 out:
4522         return r;
4523 }
4524
4525 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4526                                       struct kvm_x86_mce *mce)
4527 {
4528         u64 mcg_cap = vcpu->arch.mcg_cap;
4529         unsigned bank_num = mcg_cap & 0xff;
4530         u64 *banks = vcpu->arch.mce_banks;
4531
4532         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4533                 return -EINVAL;
4534         /*
4535          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4536          * reporting is disabled
4537          */
4538         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4539             vcpu->arch.mcg_ctl != ~(u64)0)
4540                 return 0;
4541         banks += 4 * mce->bank;
4542         /*
4543          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4544          * reporting is disabled for the bank
4545          */
4546         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4547                 return 0;
4548         if (mce->status & MCI_STATUS_UC) {
4549                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4550                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4551                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4552                         return 0;
4553                 }
4554                 if (banks[1] & MCI_STATUS_VAL)
4555                         mce->status |= MCI_STATUS_OVER;
4556                 banks[2] = mce->addr;
4557                 banks[3] = mce->misc;
4558                 vcpu->arch.mcg_status = mce->mcg_status;
4559                 banks[1] = mce->status;
4560                 kvm_queue_exception(vcpu, MC_VECTOR);
4561         } else if (!(banks[1] & MCI_STATUS_VAL)
4562                    || !(banks[1] & MCI_STATUS_UC)) {
4563                 if (banks[1] & MCI_STATUS_VAL)
4564                         mce->status |= MCI_STATUS_OVER;
4565                 banks[2] = mce->addr;
4566                 banks[3] = mce->misc;
4567                 banks[1] = mce->status;
4568         } else
4569                 banks[1] |= MCI_STATUS_OVER;
4570         return 0;
4571 }
4572
4573 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4574                                                struct kvm_vcpu_events *events)
4575 {
4576         process_nmi(vcpu);
4577
4578         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4579                 process_smi(vcpu);
4580
4581         /*
4582          * In guest mode, payload delivery should be deferred,
4583          * so that the L1 hypervisor can intercept #PF before
4584          * CR2 is modified (or intercept #DB before DR6 is
4585          * modified under nVMX). Unless the per-VM capability,
4586          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4587          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4588          * opportunistically defer the exception payload, deliver it if the
4589          * capability hasn't been requested before processing a
4590          * KVM_GET_VCPU_EVENTS.
4591          */
4592         if (!vcpu->kvm->arch.exception_payload_enabled &&
4593             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4594                 kvm_deliver_exception_payload(vcpu);
4595
4596         /*
4597          * The API doesn't provide the instruction length for software
4598          * exceptions, so don't report them. As long as the guest RIP
4599          * isn't advanced, we should expect to encounter the exception
4600          * again.
4601          */
4602         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4603                 events->exception.injected = 0;
4604                 events->exception.pending = 0;
4605         } else {
4606                 events->exception.injected = vcpu->arch.exception.injected;
4607                 events->exception.pending = vcpu->arch.exception.pending;
4608                 /*
4609                  * For ABI compatibility, deliberately conflate
4610                  * pending and injected exceptions when
4611                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4612                  */
4613                 if (!vcpu->kvm->arch.exception_payload_enabled)
4614                         events->exception.injected |=
4615                                 vcpu->arch.exception.pending;
4616         }
4617         events->exception.nr = vcpu->arch.exception.nr;
4618         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4619         events->exception.error_code = vcpu->arch.exception.error_code;
4620         events->exception_has_payload = vcpu->arch.exception.has_payload;
4621         events->exception_payload = vcpu->arch.exception.payload;
4622
4623         events->interrupt.injected =
4624                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4625         events->interrupt.nr = vcpu->arch.interrupt.nr;
4626         events->interrupt.soft = 0;
4627         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4628
4629         events->nmi.injected = vcpu->arch.nmi_injected;
4630         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4631         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4632         events->nmi.pad = 0;
4633
4634         events->sipi_vector = 0; /* never valid when reporting to user space */
4635
4636         events->smi.smm = is_smm(vcpu);
4637         events->smi.pending = vcpu->arch.smi_pending;
4638         events->smi.smm_inside_nmi =
4639                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4640         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4641
4642         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4643                          | KVM_VCPUEVENT_VALID_SHADOW
4644                          | KVM_VCPUEVENT_VALID_SMM);
4645         if (vcpu->kvm->arch.exception_payload_enabled)
4646                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4647
4648         memset(&events->reserved, 0, sizeof(events->reserved));
4649 }
4650
4651 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4652
4653 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4654                                               struct kvm_vcpu_events *events)
4655 {
4656         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4657                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4658                               | KVM_VCPUEVENT_VALID_SHADOW
4659                               | KVM_VCPUEVENT_VALID_SMM
4660                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4661                 return -EINVAL;
4662
4663         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4664                 if (!vcpu->kvm->arch.exception_payload_enabled)
4665                         return -EINVAL;
4666                 if (events->exception.pending)
4667                         events->exception.injected = 0;
4668                 else
4669                         events->exception_has_payload = 0;
4670         } else {
4671                 events->exception.pending = 0;
4672                 events->exception_has_payload = 0;
4673         }
4674
4675         if ((events->exception.injected || events->exception.pending) &&
4676             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4677                 return -EINVAL;
4678
4679         /* INITs are latched while in SMM */
4680         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4681             (events->smi.smm || events->smi.pending) &&
4682             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4683                 return -EINVAL;
4684
4685         process_nmi(vcpu);
4686         vcpu->arch.exception.injected = events->exception.injected;
4687         vcpu->arch.exception.pending = events->exception.pending;
4688         vcpu->arch.exception.nr = events->exception.nr;
4689         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4690         vcpu->arch.exception.error_code = events->exception.error_code;
4691         vcpu->arch.exception.has_payload = events->exception_has_payload;
4692         vcpu->arch.exception.payload = events->exception_payload;
4693
4694         vcpu->arch.interrupt.injected = events->interrupt.injected;
4695         vcpu->arch.interrupt.nr = events->interrupt.nr;
4696         vcpu->arch.interrupt.soft = events->interrupt.soft;
4697         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4698                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4699                                                 events->interrupt.shadow);
4700
4701         vcpu->arch.nmi_injected = events->nmi.injected;
4702         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4703                 vcpu->arch.nmi_pending = events->nmi.pending;
4704         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4705
4706         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4707             lapic_in_kernel(vcpu))
4708                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4709
4710         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4711                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4712                         kvm_smm_changed(vcpu, events->smi.smm);
4713
4714                 vcpu->arch.smi_pending = events->smi.pending;
4715
4716                 if (events->smi.smm) {
4717                         if (events->smi.smm_inside_nmi)
4718                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4719                         else
4720                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4721                 }
4722
4723                 if (lapic_in_kernel(vcpu)) {
4724                         if (events->smi.latched_init)
4725                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4726                         else
4727                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4728                 }
4729         }
4730
4731         kvm_make_request(KVM_REQ_EVENT, vcpu);
4732
4733         return 0;
4734 }
4735
4736 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4737                                              struct kvm_debugregs *dbgregs)
4738 {
4739         unsigned long val;
4740
4741         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4742         kvm_get_dr(vcpu, 6, &val);
4743         dbgregs->dr6 = val;
4744         dbgregs->dr7 = vcpu->arch.dr7;
4745         dbgregs->flags = 0;
4746         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4747 }
4748
4749 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4750                                             struct kvm_debugregs *dbgregs)
4751 {
4752         if (dbgregs->flags)
4753                 return -EINVAL;
4754
4755         if (!kvm_dr6_valid(dbgregs->dr6))
4756                 return -EINVAL;
4757         if (!kvm_dr7_valid(dbgregs->dr7))
4758                 return -EINVAL;
4759
4760         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4761         kvm_update_dr0123(vcpu);
4762         vcpu->arch.dr6 = dbgregs->dr6;
4763         vcpu->arch.dr7 = dbgregs->dr7;
4764         kvm_update_dr7(vcpu);
4765
4766         return 0;
4767 }
4768
4769 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4770                                          struct kvm_xsave *guest_xsave)
4771 {
4772         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4773                 return;
4774
4775         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4776                                        guest_xsave->region,
4777                                        sizeof(guest_xsave->region),
4778                                        vcpu->arch.pkru);
4779 }
4780
4781 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4782                                         struct kvm_xsave *guest_xsave)
4783 {
4784         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4785                 return 0;
4786
4787         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
4788                                               guest_xsave->region,
4789                                               supported_xcr0, &vcpu->arch.pkru);
4790 }
4791
4792 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4793                                         struct kvm_xcrs *guest_xcrs)
4794 {
4795         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4796                 guest_xcrs->nr_xcrs = 0;
4797                 return;
4798         }
4799
4800         guest_xcrs->nr_xcrs = 1;
4801         guest_xcrs->flags = 0;
4802         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4803         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4804 }
4805
4806 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4807                                        struct kvm_xcrs *guest_xcrs)
4808 {
4809         int i, r = 0;
4810
4811         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4812                 return -EINVAL;
4813
4814         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4815                 return -EINVAL;
4816
4817         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4818                 /* Only support XCR0 currently */
4819                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4820                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4821                                 guest_xcrs->xcrs[i].value);
4822                         break;
4823                 }
4824         if (r)
4825                 r = -EINVAL;
4826         return r;
4827 }
4828
4829 /*
4830  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4831  * stopped by the hypervisor.  This function will be called from the host only.
4832  * EINVAL is returned when the host attempts to set the flag for a guest that
4833  * does not support pv clocks.
4834  */
4835 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4836 {
4837         if (!vcpu->arch.pv_time_enabled)
4838                 return -EINVAL;
4839         vcpu->arch.pvclock_set_guest_stopped_request = true;
4840         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4841         return 0;
4842 }
4843
4844 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
4845                                  struct kvm_device_attr *attr)
4846 {
4847         int r;
4848
4849         switch (attr->attr) {
4850         case KVM_VCPU_TSC_OFFSET:
4851                 r = 0;
4852                 break;
4853         default:
4854                 r = -ENXIO;
4855         }
4856
4857         return r;
4858 }
4859
4860 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
4861                                  struct kvm_device_attr *attr)
4862 {
4863         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
4864         int r;
4865
4866         if ((u64)(unsigned long)uaddr != attr->addr)
4867                 return -EFAULT;
4868
4869         switch (attr->attr) {
4870         case KVM_VCPU_TSC_OFFSET:
4871                 r = -EFAULT;
4872                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
4873                         break;
4874                 r = 0;
4875                 break;
4876         default:
4877                 r = -ENXIO;
4878         }
4879
4880         return r;
4881 }
4882
4883 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
4884                                  struct kvm_device_attr *attr)
4885 {
4886         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
4887         struct kvm *kvm = vcpu->kvm;
4888         int r;
4889
4890         if ((u64)(unsigned long)uaddr != attr->addr)
4891                 return -EFAULT;
4892
4893         switch (attr->attr) {
4894         case KVM_VCPU_TSC_OFFSET: {
4895                 u64 offset, tsc, ns;
4896                 unsigned long flags;
4897                 bool matched;
4898
4899                 r = -EFAULT;
4900                 if (get_user(offset, uaddr))
4901                         break;
4902
4903                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
4904
4905                 matched = (vcpu->arch.virtual_tsc_khz &&
4906                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
4907                            kvm->arch.last_tsc_offset == offset);
4908
4909                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
4910                 ns = get_kvmclock_base_ns();
4911
4912                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
4913                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
4914
4915                 r = 0;
4916                 break;
4917         }
4918         default:
4919                 r = -ENXIO;
4920         }
4921
4922         return r;
4923 }
4924
4925 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
4926                                       unsigned int ioctl,
4927                                       void __user *argp)
4928 {
4929         struct kvm_device_attr attr;
4930         int r;
4931
4932         if (copy_from_user(&attr, argp, sizeof(attr)))
4933                 return -EFAULT;
4934
4935         if (attr.group != KVM_VCPU_TSC_CTRL)
4936                 return -ENXIO;
4937
4938         switch (ioctl) {
4939         case KVM_HAS_DEVICE_ATTR:
4940                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
4941                 break;
4942         case KVM_GET_DEVICE_ATTR:
4943                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
4944                 break;
4945         case KVM_SET_DEVICE_ATTR:
4946                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
4947                 break;
4948         }
4949
4950         return r;
4951 }
4952
4953 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4954                                      struct kvm_enable_cap *cap)
4955 {
4956         int r;
4957         uint16_t vmcs_version;
4958         void __user *user_ptr;
4959
4960         if (cap->flags)
4961                 return -EINVAL;
4962
4963         switch (cap->cap) {
4964         case KVM_CAP_HYPERV_SYNIC2:
4965                 if (cap->args[0])
4966                         return -EINVAL;
4967                 fallthrough;
4968
4969         case KVM_CAP_HYPERV_SYNIC:
4970                 if (!irqchip_in_kernel(vcpu->kvm))
4971                         return -EINVAL;
4972                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4973                                              KVM_CAP_HYPERV_SYNIC2);
4974         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4975                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4976                         return -ENOTTY;
4977                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4978                 if (!r) {
4979                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4980                         if (copy_to_user(user_ptr, &vmcs_version,
4981                                          sizeof(vmcs_version)))
4982                                 r = -EFAULT;
4983                 }
4984                 return r;
4985         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4986                 if (!kvm_x86_ops.enable_direct_tlbflush)
4987                         return -ENOTTY;
4988
4989                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4990
4991         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4992                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
4993
4994         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4995                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4996                 if (vcpu->arch.pv_cpuid.enforce)
4997                         kvm_update_pv_runtime(vcpu);
4998
4999                 return 0;
5000         default:
5001                 return -EINVAL;
5002         }
5003 }
5004
5005 long kvm_arch_vcpu_ioctl(struct file *filp,
5006                          unsigned int ioctl, unsigned long arg)
5007 {
5008         struct kvm_vcpu *vcpu = filp->private_data;
5009         void __user *argp = (void __user *)arg;
5010         int r;
5011         union {
5012                 struct kvm_sregs2 *sregs2;
5013                 struct kvm_lapic_state *lapic;
5014                 struct kvm_xsave *xsave;
5015                 struct kvm_xcrs *xcrs;
5016                 void *buffer;
5017         } u;
5018
5019         vcpu_load(vcpu);
5020
5021         u.buffer = NULL;
5022         switch (ioctl) {
5023         case KVM_GET_LAPIC: {
5024                 r = -EINVAL;
5025                 if (!lapic_in_kernel(vcpu))
5026                         goto out;
5027                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5028                                 GFP_KERNEL_ACCOUNT);
5029
5030                 r = -ENOMEM;
5031                 if (!u.lapic)
5032                         goto out;
5033                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5034                 if (r)
5035                         goto out;
5036                 r = -EFAULT;
5037                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5038                         goto out;
5039                 r = 0;
5040                 break;
5041         }
5042         case KVM_SET_LAPIC: {
5043                 r = -EINVAL;
5044                 if (!lapic_in_kernel(vcpu))
5045                         goto out;
5046                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5047                 if (IS_ERR(u.lapic)) {
5048                         r = PTR_ERR(u.lapic);
5049                         goto out_nofree;
5050                 }
5051
5052                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5053                 break;
5054         }
5055         case KVM_INTERRUPT: {
5056                 struct kvm_interrupt irq;
5057
5058                 r = -EFAULT;
5059                 if (copy_from_user(&irq, argp, sizeof(irq)))
5060                         goto out;
5061                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5062                 break;
5063         }
5064         case KVM_NMI: {
5065                 r = kvm_vcpu_ioctl_nmi(vcpu);
5066                 break;
5067         }
5068         case KVM_SMI: {
5069                 r = kvm_vcpu_ioctl_smi(vcpu);
5070                 break;
5071         }
5072         case KVM_SET_CPUID: {
5073                 struct kvm_cpuid __user *cpuid_arg = argp;
5074                 struct kvm_cpuid cpuid;
5075
5076                 r = -EFAULT;
5077                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5078                         goto out;
5079                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5080                 break;
5081         }
5082         case KVM_SET_CPUID2: {
5083                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5084                 struct kvm_cpuid2 cpuid;
5085
5086                 r = -EFAULT;
5087                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5088                         goto out;
5089                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5090                                               cpuid_arg->entries);
5091                 break;
5092         }
5093         case KVM_GET_CPUID2: {
5094                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5095                 struct kvm_cpuid2 cpuid;
5096
5097                 r = -EFAULT;
5098                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5099                         goto out;
5100                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5101                                               cpuid_arg->entries);
5102                 if (r)
5103                         goto out;
5104                 r = -EFAULT;
5105                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5106                         goto out;
5107                 r = 0;
5108                 break;
5109         }
5110         case KVM_GET_MSRS: {
5111                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5112                 r = msr_io(vcpu, argp, do_get_msr, 1);
5113                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5114                 break;
5115         }
5116         case KVM_SET_MSRS: {
5117                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5118                 r = msr_io(vcpu, argp, do_set_msr, 0);
5119                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5120                 break;
5121         }
5122         case KVM_TPR_ACCESS_REPORTING: {
5123                 struct kvm_tpr_access_ctl tac;
5124
5125                 r = -EFAULT;
5126                 if (copy_from_user(&tac, argp, sizeof(tac)))
5127                         goto out;
5128                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5129                 if (r)
5130                         goto out;
5131                 r = -EFAULT;
5132                 if (copy_to_user(argp, &tac, sizeof(tac)))
5133                         goto out;
5134                 r = 0;
5135                 break;
5136         };
5137         case KVM_SET_VAPIC_ADDR: {
5138                 struct kvm_vapic_addr va;
5139                 int idx;
5140
5141                 r = -EINVAL;
5142                 if (!lapic_in_kernel(vcpu))
5143                         goto out;
5144                 r = -EFAULT;
5145                 if (copy_from_user(&va, argp, sizeof(va)))
5146                         goto out;
5147                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5148                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5149                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5150                 break;
5151         }
5152         case KVM_X86_SETUP_MCE: {
5153                 u64 mcg_cap;
5154
5155                 r = -EFAULT;
5156                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5157                         goto out;
5158                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5159                 break;
5160         }
5161         case KVM_X86_SET_MCE: {
5162                 struct kvm_x86_mce mce;
5163
5164                 r = -EFAULT;
5165                 if (copy_from_user(&mce, argp, sizeof(mce)))
5166                         goto out;
5167                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5168                 break;
5169         }
5170         case KVM_GET_VCPU_EVENTS: {
5171                 struct kvm_vcpu_events events;
5172
5173                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5174
5175                 r = -EFAULT;
5176                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5177                         break;
5178                 r = 0;
5179                 break;
5180         }
5181         case KVM_SET_VCPU_EVENTS: {
5182                 struct kvm_vcpu_events events;
5183
5184                 r = -EFAULT;
5185                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5186                         break;
5187
5188                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5189                 break;
5190         }
5191         case KVM_GET_DEBUGREGS: {
5192                 struct kvm_debugregs dbgregs;
5193
5194                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5195
5196                 r = -EFAULT;
5197                 if (copy_to_user(argp, &dbgregs,
5198                                  sizeof(struct kvm_debugregs)))
5199                         break;
5200                 r = 0;
5201                 break;
5202         }
5203         case KVM_SET_DEBUGREGS: {
5204                 struct kvm_debugregs dbgregs;
5205
5206                 r = -EFAULT;
5207                 if (copy_from_user(&dbgregs, argp,
5208                                    sizeof(struct kvm_debugregs)))
5209                         break;
5210
5211                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5212                 break;
5213         }
5214         case KVM_GET_XSAVE: {
5215                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5216                 r = -ENOMEM;
5217                 if (!u.xsave)
5218                         break;
5219
5220                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5221
5222                 r = -EFAULT;
5223                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5224                         break;
5225                 r = 0;
5226                 break;
5227         }
5228         case KVM_SET_XSAVE: {
5229                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5230                 if (IS_ERR(u.xsave)) {
5231                         r = PTR_ERR(u.xsave);
5232                         goto out_nofree;
5233                 }
5234
5235                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5236                 break;
5237         }
5238         case KVM_GET_XCRS: {
5239                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5240                 r = -ENOMEM;
5241                 if (!u.xcrs)
5242                         break;
5243
5244                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5245
5246                 r = -EFAULT;
5247                 if (copy_to_user(argp, u.xcrs,
5248                                  sizeof(struct kvm_xcrs)))
5249                         break;
5250                 r = 0;
5251                 break;
5252         }
5253         case KVM_SET_XCRS: {
5254                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5255                 if (IS_ERR(u.xcrs)) {
5256                         r = PTR_ERR(u.xcrs);
5257                         goto out_nofree;
5258                 }
5259
5260                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5261                 break;
5262         }
5263         case KVM_SET_TSC_KHZ: {
5264                 u32 user_tsc_khz;
5265
5266                 r = -EINVAL;
5267                 user_tsc_khz = (u32)arg;
5268
5269                 if (kvm_has_tsc_control &&
5270                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5271                         goto out;
5272
5273                 if (user_tsc_khz == 0)
5274                         user_tsc_khz = tsc_khz;
5275
5276                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5277                         r = 0;
5278
5279                 goto out;
5280         }
5281         case KVM_GET_TSC_KHZ: {
5282                 r = vcpu->arch.virtual_tsc_khz;
5283                 goto out;
5284         }
5285         case KVM_KVMCLOCK_CTRL: {
5286                 r = kvm_set_guest_paused(vcpu);
5287                 goto out;
5288         }
5289         case KVM_ENABLE_CAP: {
5290                 struct kvm_enable_cap cap;
5291
5292                 r = -EFAULT;
5293                 if (copy_from_user(&cap, argp, sizeof(cap)))
5294                         goto out;
5295                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5296                 break;
5297         }
5298         case KVM_GET_NESTED_STATE: {
5299                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5300                 u32 user_data_size;
5301
5302                 r = -EINVAL;
5303                 if (!kvm_x86_ops.nested_ops->get_state)
5304                         break;
5305
5306                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5307                 r = -EFAULT;
5308                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5309                         break;
5310
5311                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5312                                                      user_data_size);
5313                 if (r < 0)
5314                         break;
5315
5316                 if (r > user_data_size) {
5317                         if (put_user(r, &user_kvm_nested_state->size))
5318                                 r = -EFAULT;
5319                         else
5320                                 r = -E2BIG;
5321                         break;
5322                 }
5323
5324                 r = 0;
5325                 break;
5326         }
5327         case KVM_SET_NESTED_STATE: {
5328                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5329                 struct kvm_nested_state kvm_state;
5330                 int idx;
5331
5332                 r = -EINVAL;
5333                 if (!kvm_x86_ops.nested_ops->set_state)
5334                         break;
5335
5336                 r = -EFAULT;
5337                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5338                         break;
5339
5340                 r = -EINVAL;
5341                 if (kvm_state.size < sizeof(kvm_state))
5342                         break;
5343
5344                 if (kvm_state.flags &
5345                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5346                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5347                       | KVM_STATE_NESTED_GIF_SET))
5348                         break;
5349
5350                 /* nested_run_pending implies guest_mode.  */
5351                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5352                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5353                         break;
5354
5355                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5356                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5357                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5358                 break;
5359         }
5360         case KVM_GET_SUPPORTED_HV_CPUID:
5361                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5362                 break;
5363 #ifdef CONFIG_KVM_XEN
5364         case KVM_XEN_VCPU_GET_ATTR: {
5365                 struct kvm_xen_vcpu_attr xva;
5366
5367                 r = -EFAULT;
5368                 if (copy_from_user(&xva, argp, sizeof(xva)))
5369                         goto out;
5370                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5371                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5372                         r = -EFAULT;
5373                 break;
5374         }
5375         case KVM_XEN_VCPU_SET_ATTR: {
5376                 struct kvm_xen_vcpu_attr xva;
5377
5378                 r = -EFAULT;
5379                 if (copy_from_user(&xva, argp, sizeof(xva)))
5380                         goto out;
5381                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5382                 break;
5383         }
5384 #endif
5385         case KVM_GET_SREGS2: {
5386                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5387                 r = -ENOMEM;
5388                 if (!u.sregs2)
5389                         goto out;
5390                 __get_sregs2(vcpu, u.sregs2);
5391                 r = -EFAULT;
5392                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5393                         goto out;
5394                 r = 0;
5395                 break;
5396         }
5397         case KVM_SET_SREGS2: {
5398                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5399                 if (IS_ERR(u.sregs2)) {
5400                         r = PTR_ERR(u.sregs2);
5401                         u.sregs2 = NULL;
5402                         goto out;
5403                 }
5404                 r = __set_sregs2(vcpu, u.sregs2);
5405                 break;
5406         }
5407         case KVM_HAS_DEVICE_ATTR:
5408         case KVM_GET_DEVICE_ATTR:
5409         case KVM_SET_DEVICE_ATTR:
5410                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5411                 break;
5412         default:
5413                 r = -EINVAL;
5414         }
5415 out:
5416         kfree(u.buffer);
5417 out_nofree:
5418         vcpu_put(vcpu);
5419         return r;
5420 }
5421
5422 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5423 {
5424         return VM_FAULT_SIGBUS;
5425 }
5426
5427 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5428 {
5429         int ret;
5430
5431         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5432                 return -EINVAL;
5433         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5434         return ret;
5435 }
5436
5437 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5438                                               u64 ident_addr)
5439 {
5440         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5441 }
5442
5443 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5444                                          unsigned long kvm_nr_mmu_pages)
5445 {
5446         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5447                 return -EINVAL;
5448
5449         mutex_lock(&kvm->slots_lock);
5450
5451         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5452         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5453
5454         mutex_unlock(&kvm->slots_lock);
5455         return 0;
5456 }
5457
5458 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5459 {
5460         return kvm->arch.n_max_mmu_pages;
5461 }
5462
5463 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5464 {
5465         struct kvm_pic *pic = kvm->arch.vpic;
5466         int r;
5467
5468         r = 0;
5469         switch (chip->chip_id) {
5470         case KVM_IRQCHIP_PIC_MASTER:
5471                 memcpy(&chip->chip.pic, &pic->pics[0],
5472                         sizeof(struct kvm_pic_state));
5473                 break;
5474         case KVM_IRQCHIP_PIC_SLAVE:
5475                 memcpy(&chip->chip.pic, &pic->pics[1],
5476                         sizeof(struct kvm_pic_state));
5477                 break;
5478         case KVM_IRQCHIP_IOAPIC:
5479                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5480                 break;
5481         default:
5482                 r = -EINVAL;
5483                 break;
5484         }
5485         return r;
5486 }
5487
5488 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5489 {
5490         struct kvm_pic *pic = kvm->arch.vpic;
5491         int r;
5492
5493         r = 0;
5494         switch (chip->chip_id) {
5495         case KVM_IRQCHIP_PIC_MASTER:
5496                 spin_lock(&pic->lock);
5497                 memcpy(&pic->pics[0], &chip->chip.pic,
5498                         sizeof(struct kvm_pic_state));
5499                 spin_unlock(&pic->lock);
5500                 break;
5501         case KVM_IRQCHIP_PIC_SLAVE:
5502                 spin_lock(&pic->lock);
5503                 memcpy(&pic->pics[1], &chip->chip.pic,
5504                         sizeof(struct kvm_pic_state));
5505                 spin_unlock(&pic->lock);
5506                 break;
5507         case KVM_IRQCHIP_IOAPIC:
5508                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5509                 break;
5510         default:
5511                 r = -EINVAL;
5512                 break;
5513         }
5514         kvm_pic_update_irq(pic);
5515         return r;
5516 }
5517
5518 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5519 {
5520         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5521
5522         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5523
5524         mutex_lock(&kps->lock);
5525         memcpy(ps, &kps->channels, sizeof(*ps));
5526         mutex_unlock(&kps->lock);
5527         return 0;
5528 }
5529
5530 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5531 {
5532         int i;
5533         struct kvm_pit *pit = kvm->arch.vpit;
5534
5535         mutex_lock(&pit->pit_state.lock);
5536         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5537         for (i = 0; i < 3; i++)
5538                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5539         mutex_unlock(&pit->pit_state.lock);
5540         return 0;
5541 }
5542
5543 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5544 {
5545         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5546         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5547                 sizeof(ps->channels));
5548         ps->flags = kvm->arch.vpit->pit_state.flags;
5549         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5550         memset(&ps->reserved, 0, sizeof(ps->reserved));
5551         return 0;
5552 }
5553
5554 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5555 {
5556         int start = 0;
5557         int i;
5558         u32 prev_legacy, cur_legacy;
5559         struct kvm_pit *pit = kvm->arch.vpit;
5560
5561         mutex_lock(&pit->pit_state.lock);
5562         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5563         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5564         if (!prev_legacy && cur_legacy)
5565                 start = 1;
5566         memcpy(&pit->pit_state.channels, &ps->channels,
5567                sizeof(pit->pit_state.channels));
5568         pit->pit_state.flags = ps->flags;
5569         for (i = 0; i < 3; i++)
5570                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5571                                    start && i == 0);
5572         mutex_unlock(&pit->pit_state.lock);
5573         return 0;
5574 }
5575
5576 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5577                                  struct kvm_reinject_control *control)
5578 {
5579         struct kvm_pit *pit = kvm->arch.vpit;
5580
5581         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5582          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5583          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5584          */
5585         mutex_lock(&pit->pit_state.lock);
5586         kvm_pit_set_reinject(pit, control->pit_reinject);
5587         mutex_unlock(&pit->pit_state.lock);
5588
5589         return 0;
5590 }
5591
5592 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5593 {
5594
5595         /*
5596          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5597          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5598          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5599          * VM-Exit.
5600          */
5601         struct kvm_vcpu *vcpu;
5602         int i;
5603
5604         kvm_for_each_vcpu(i, vcpu, kvm)
5605                 kvm_vcpu_kick(vcpu);
5606 }
5607
5608 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5609                         bool line_status)
5610 {
5611         if (!irqchip_in_kernel(kvm))
5612                 return -ENXIO;
5613
5614         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5615                                         irq_event->irq, irq_event->level,
5616                                         line_status);
5617         return 0;
5618 }
5619
5620 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5621                             struct kvm_enable_cap *cap)
5622 {
5623         int r;
5624
5625         if (cap->flags)
5626                 return -EINVAL;
5627
5628         switch (cap->cap) {
5629         case KVM_CAP_DISABLE_QUIRKS:
5630                 kvm->arch.disabled_quirks = cap->args[0];
5631                 r = 0;
5632                 break;
5633         case KVM_CAP_SPLIT_IRQCHIP: {
5634                 mutex_lock(&kvm->lock);
5635                 r = -EINVAL;
5636                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5637                         goto split_irqchip_unlock;
5638                 r = -EEXIST;
5639                 if (irqchip_in_kernel(kvm))
5640                         goto split_irqchip_unlock;
5641                 if (kvm->created_vcpus)
5642                         goto split_irqchip_unlock;
5643                 r = kvm_setup_empty_irq_routing(kvm);
5644                 if (r)
5645                         goto split_irqchip_unlock;
5646                 /* Pairs with irqchip_in_kernel. */
5647                 smp_wmb();
5648                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5649                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5650                 r = 0;
5651 split_irqchip_unlock:
5652                 mutex_unlock(&kvm->lock);
5653                 break;
5654         }
5655         case KVM_CAP_X2APIC_API:
5656                 r = -EINVAL;
5657                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5658                         break;
5659
5660                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5661                         kvm->arch.x2apic_format = true;
5662                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5663                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5664
5665                 r = 0;
5666                 break;
5667         case KVM_CAP_X86_DISABLE_EXITS:
5668                 r = -EINVAL;
5669                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5670                         break;
5671
5672                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5673                         kvm_can_mwait_in_guest())
5674                         kvm->arch.mwait_in_guest = true;
5675                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5676                         kvm->arch.hlt_in_guest = true;
5677                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5678                         kvm->arch.pause_in_guest = true;
5679                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5680                         kvm->arch.cstate_in_guest = true;
5681                 r = 0;
5682                 break;
5683         case KVM_CAP_MSR_PLATFORM_INFO:
5684                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5685                 r = 0;
5686                 break;
5687         case KVM_CAP_EXCEPTION_PAYLOAD:
5688                 kvm->arch.exception_payload_enabled = cap->args[0];
5689                 r = 0;
5690                 break;
5691         case KVM_CAP_X86_USER_SPACE_MSR:
5692                 kvm->arch.user_space_msr_mask = cap->args[0];
5693                 r = 0;
5694                 break;
5695         case KVM_CAP_X86_BUS_LOCK_EXIT:
5696                 r = -EINVAL;
5697                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5698                         break;
5699
5700                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5701                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5702                         break;
5703
5704                 if (kvm_has_bus_lock_exit &&
5705                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5706                         kvm->arch.bus_lock_detection_enabled = true;
5707                 r = 0;
5708                 break;
5709 #ifdef CONFIG_X86_SGX_KVM
5710         case KVM_CAP_SGX_ATTRIBUTE: {
5711                 unsigned long allowed_attributes = 0;
5712
5713                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5714                 if (r)
5715                         break;
5716
5717                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5718                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5719                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5720                         kvm->arch.sgx_provisioning_allowed = true;
5721                 else
5722                         r = -EINVAL;
5723                 break;
5724         }
5725 #endif
5726         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5727                 r = -EINVAL;
5728                 if (kvm_x86_ops.vm_copy_enc_context_from)
5729                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5730                 return r;
5731         case KVM_CAP_EXIT_HYPERCALL:
5732                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5733                         r = -EINVAL;
5734                         break;
5735                 }
5736                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5737                 r = 0;
5738                 break;
5739         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5740                 r = -EINVAL;
5741                 if (cap->args[0] & ~1)
5742                         break;
5743                 kvm->arch.exit_on_emulation_error = cap->args[0];
5744                 r = 0;
5745                 break;
5746         default:
5747                 r = -EINVAL;
5748                 break;
5749         }
5750         return r;
5751 }
5752
5753 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5754 {
5755         struct kvm_x86_msr_filter *msr_filter;
5756
5757         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5758         if (!msr_filter)
5759                 return NULL;
5760
5761         msr_filter->default_allow = default_allow;
5762         return msr_filter;
5763 }
5764
5765 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5766 {
5767         u32 i;
5768
5769         if (!msr_filter)
5770                 return;
5771
5772         for (i = 0; i < msr_filter->count; i++)
5773                 kfree(msr_filter->ranges[i].bitmap);
5774
5775         kfree(msr_filter);
5776 }
5777
5778 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5779                               struct kvm_msr_filter_range *user_range)
5780 {
5781         unsigned long *bitmap = NULL;
5782         size_t bitmap_size;
5783
5784         if (!user_range->nmsrs)
5785                 return 0;
5786
5787         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5788                 return -EINVAL;
5789
5790         if (!user_range->flags)
5791                 return -EINVAL;
5792
5793         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5794         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5795                 return -EINVAL;
5796
5797         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5798         if (IS_ERR(bitmap))
5799                 return PTR_ERR(bitmap);
5800
5801         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5802                 .flags = user_range->flags,
5803                 .base = user_range->base,
5804                 .nmsrs = user_range->nmsrs,
5805                 .bitmap = bitmap,
5806         };
5807
5808         msr_filter->count++;
5809         return 0;
5810 }
5811
5812 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5813 {
5814         struct kvm_msr_filter __user *user_msr_filter = argp;
5815         struct kvm_x86_msr_filter *new_filter, *old_filter;
5816         struct kvm_msr_filter filter;
5817         bool default_allow;
5818         bool empty = true;
5819         int r = 0;
5820         u32 i;
5821
5822         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5823                 return -EFAULT;
5824
5825         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5826                 empty &= !filter.ranges[i].nmsrs;
5827
5828         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5829         if (empty && !default_allow)
5830                 return -EINVAL;
5831
5832         new_filter = kvm_alloc_msr_filter(default_allow);
5833         if (!new_filter)
5834                 return -ENOMEM;
5835
5836         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5837                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5838                 if (r) {
5839                         kvm_free_msr_filter(new_filter);
5840                         return r;
5841                 }
5842         }
5843
5844         mutex_lock(&kvm->lock);
5845
5846         /* The per-VM filter is protected by kvm->lock... */
5847         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5848
5849         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5850         synchronize_srcu(&kvm->srcu);
5851
5852         kvm_free_msr_filter(old_filter);
5853
5854         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5855         mutex_unlock(&kvm->lock);
5856
5857         return 0;
5858 }
5859
5860 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5861 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5862 {
5863         struct kvm_vcpu *vcpu;
5864         int i, ret = 0;
5865
5866         mutex_lock(&kvm->lock);
5867         kvm_for_each_vcpu(i, vcpu, kvm) {
5868                 if (!vcpu->arch.pv_time_enabled)
5869                         continue;
5870
5871                 ret = kvm_set_guest_paused(vcpu);
5872                 if (ret) {
5873                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5874                                 vcpu->vcpu_id, ret);
5875                         break;
5876                 }
5877         }
5878         mutex_unlock(&kvm->lock);
5879
5880         return ret ? NOTIFY_BAD : NOTIFY_DONE;
5881 }
5882
5883 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
5884 {
5885         switch (state) {
5886         case PM_HIBERNATION_PREPARE:
5887         case PM_SUSPEND_PREPARE:
5888                 return kvm_arch_suspend_notifier(kvm);
5889         }
5890
5891         return NOTIFY_DONE;
5892 }
5893 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
5894
5895 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
5896 {
5897         struct kvm_clock_data data = { 0 };
5898
5899         get_kvmclock(kvm, &data);
5900         if (copy_to_user(argp, &data, sizeof(data)))
5901                 return -EFAULT;
5902
5903         return 0;
5904 }
5905
5906 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
5907 {
5908         struct kvm_arch *ka = &kvm->arch;
5909         struct kvm_clock_data data;
5910         u64 now_raw_ns;
5911
5912         if (copy_from_user(&data, argp, sizeof(data)))
5913                 return -EFAULT;
5914
5915         /*
5916          * Only KVM_CLOCK_REALTIME is used, but allow passing the
5917          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
5918          */
5919         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
5920                 return -EINVAL;
5921
5922         kvm_hv_invalidate_tsc_page(kvm);
5923         kvm_start_pvclock_update(kvm);
5924         pvclock_update_vm_gtod_copy(kvm);
5925
5926         /*
5927          * This pairs with kvm_guest_time_update(): when masterclock is
5928          * in use, we use master_kernel_ns + kvmclock_offset to set
5929          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5930          * is slightly ahead) here we risk going negative on unsigned
5931          * 'system_time' when 'data.clock' is very small.
5932          */
5933         if (data.flags & KVM_CLOCK_REALTIME) {
5934                 u64 now_real_ns = ktime_get_real_ns();
5935
5936                 /*
5937                  * Avoid stepping the kvmclock backwards.
5938                  */
5939                 if (now_real_ns > data.realtime)
5940                         data.clock += now_real_ns - data.realtime;
5941         }
5942
5943         if (ka->use_master_clock)
5944                 now_raw_ns = ka->master_kernel_ns;
5945         else
5946                 now_raw_ns = get_kvmclock_base_ns();
5947         ka->kvmclock_offset = data.clock - now_raw_ns;
5948         kvm_end_pvclock_update(kvm);
5949         return 0;
5950 }
5951
5952 long kvm_arch_vm_ioctl(struct file *filp,
5953                        unsigned int ioctl, unsigned long arg)
5954 {
5955         struct kvm *kvm = filp->private_data;
5956         void __user *argp = (void __user *)arg;
5957         int r = -ENOTTY;
5958         /*
5959          * This union makes it completely explicit to gcc-3.x
5960          * that these two variables' stack usage should be
5961          * combined, not added together.
5962          */
5963         union {
5964                 struct kvm_pit_state ps;
5965                 struct kvm_pit_state2 ps2;
5966                 struct kvm_pit_config pit_config;
5967         } u;
5968
5969         switch (ioctl) {
5970         case KVM_SET_TSS_ADDR:
5971                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5972                 break;
5973         case KVM_SET_IDENTITY_MAP_ADDR: {
5974                 u64 ident_addr;
5975
5976                 mutex_lock(&kvm->lock);
5977                 r = -EINVAL;
5978                 if (kvm->created_vcpus)
5979                         goto set_identity_unlock;
5980                 r = -EFAULT;
5981                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5982                         goto set_identity_unlock;
5983                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5984 set_identity_unlock:
5985                 mutex_unlock(&kvm->lock);
5986                 break;
5987         }
5988         case KVM_SET_NR_MMU_PAGES:
5989                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5990                 break;
5991         case KVM_GET_NR_MMU_PAGES:
5992                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5993                 break;
5994         case KVM_CREATE_IRQCHIP: {
5995                 mutex_lock(&kvm->lock);
5996
5997                 r = -EEXIST;
5998                 if (irqchip_in_kernel(kvm))
5999                         goto create_irqchip_unlock;
6000
6001                 r = -EINVAL;
6002                 if (kvm->created_vcpus)
6003                         goto create_irqchip_unlock;
6004
6005                 r = kvm_pic_init(kvm);
6006                 if (r)
6007                         goto create_irqchip_unlock;
6008
6009                 r = kvm_ioapic_init(kvm);
6010                 if (r) {
6011                         kvm_pic_destroy(kvm);
6012                         goto create_irqchip_unlock;
6013                 }
6014
6015                 r = kvm_setup_default_irq_routing(kvm);
6016                 if (r) {
6017                         kvm_ioapic_destroy(kvm);
6018                         kvm_pic_destroy(kvm);
6019                         goto create_irqchip_unlock;
6020                 }
6021                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6022                 smp_wmb();
6023                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6024         create_irqchip_unlock:
6025                 mutex_unlock(&kvm->lock);
6026                 break;
6027         }
6028         case KVM_CREATE_PIT:
6029                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6030                 goto create_pit;
6031         case KVM_CREATE_PIT2:
6032                 r = -EFAULT;
6033                 if (copy_from_user(&u.pit_config, argp,
6034                                    sizeof(struct kvm_pit_config)))
6035                         goto out;
6036         create_pit:
6037                 mutex_lock(&kvm->lock);
6038                 r = -EEXIST;
6039                 if (kvm->arch.vpit)
6040                         goto create_pit_unlock;
6041                 r = -ENOMEM;
6042                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6043                 if (kvm->arch.vpit)
6044                         r = 0;
6045         create_pit_unlock:
6046                 mutex_unlock(&kvm->lock);
6047                 break;
6048         case KVM_GET_IRQCHIP: {
6049                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6050                 struct kvm_irqchip *chip;
6051
6052                 chip = memdup_user(argp, sizeof(*chip));
6053                 if (IS_ERR(chip)) {
6054                         r = PTR_ERR(chip);
6055                         goto out;
6056                 }
6057
6058                 r = -ENXIO;
6059                 if (!irqchip_kernel(kvm))
6060                         goto get_irqchip_out;
6061                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6062                 if (r)
6063                         goto get_irqchip_out;
6064                 r = -EFAULT;
6065                 if (copy_to_user(argp, chip, sizeof(*chip)))
6066                         goto get_irqchip_out;
6067                 r = 0;
6068         get_irqchip_out:
6069                 kfree(chip);
6070                 break;
6071         }
6072         case KVM_SET_IRQCHIP: {
6073                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6074                 struct kvm_irqchip *chip;
6075
6076                 chip = memdup_user(argp, sizeof(*chip));
6077                 if (IS_ERR(chip)) {
6078                         r = PTR_ERR(chip);
6079                         goto out;
6080                 }
6081
6082                 r = -ENXIO;
6083                 if (!irqchip_kernel(kvm))
6084                         goto set_irqchip_out;
6085                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6086         set_irqchip_out:
6087                 kfree(chip);
6088                 break;
6089         }
6090         case KVM_GET_PIT: {
6091                 r = -EFAULT;
6092                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6093                         goto out;
6094                 r = -ENXIO;
6095                 if (!kvm->arch.vpit)
6096                         goto out;
6097                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6098                 if (r)
6099                         goto out;
6100                 r = -EFAULT;
6101                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6102                         goto out;
6103                 r = 0;
6104                 break;
6105         }
6106         case KVM_SET_PIT: {
6107                 r = -EFAULT;
6108                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6109                         goto out;
6110                 mutex_lock(&kvm->lock);
6111                 r = -ENXIO;
6112                 if (!kvm->arch.vpit)
6113                         goto set_pit_out;
6114                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6115 set_pit_out:
6116                 mutex_unlock(&kvm->lock);
6117                 break;
6118         }
6119         case KVM_GET_PIT2: {
6120                 r = -ENXIO;
6121                 if (!kvm->arch.vpit)
6122                         goto out;
6123                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6124                 if (r)
6125                         goto out;
6126                 r = -EFAULT;
6127                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6128                         goto out;
6129                 r = 0;
6130                 break;
6131         }
6132         case KVM_SET_PIT2: {
6133                 r = -EFAULT;
6134                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6135                         goto out;
6136                 mutex_lock(&kvm->lock);
6137                 r = -ENXIO;
6138                 if (!kvm->arch.vpit)
6139                         goto set_pit2_out;
6140                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6141 set_pit2_out:
6142                 mutex_unlock(&kvm->lock);
6143                 break;
6144         }
6145         case KVM_REINJECT_CONTROL: {
6146                 struct kvm_reinject_control control;
6147                 r =  -EFAULT;
6148                 if (copy_from_user(&control, argp, sizeof(control)))
6149                         goto out;
6150                 r = -ENXIO;
6151                 if (!kvm->arch.vpit)
6152                         goto out;
6153                 r = kvm_vm_ioctl_reinject(kvm, &control);
6154                 break;
6155         }
6156         case KVM_SET_BOOT_CPU_ID:
6157                 r = 0;
6158                 mutex_lock(&kvm->lock);
6159                 if (kvm->created_vcpus)
6160                         r = -EBUSY;
6161                 else
6162                         kvm->arch.bsp_vcpu_id = arg;
6163                 mutex_unlock(&kvm->lock);
6164                 break;
6165 #ifdef CONFIG_KVM_XEN
6166         case KVM_XEN_HVM_CONFIG: {
6167                 struct kvm_xen_hvm_config xhc;
6168                 r = -EFAULT;
6169                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6170                         goto out;
6171                 r = kvm_xen_hvm_config(kvm, &xhc);
6172                 break;
6173         }
6174         case KVM_XEN_HVM_GET_ATTR: {
6175                 struct kvm_xen_hvm_attr xha;
6176
6177                 r = -EFAULT;
6178                 if (copy_from_user(&xha, argp, sizeof(xha)))
6179                         goto out;
6180                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6181                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6182                         r = -EFAULT;
6183                 break;
6184         }
6185         case KVM_XEN_HVM_SET_ATTR: {
6186                 struct kvm_xen_hvm_attr xha;
6187
6188                 r = -EFAULT;
6189                 if (copy_from_user(&xha, argp, sizeof(xha)))
6190                         goto out;
6191                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6192                 break;
6193         }
6194 #endif
6195         case KVM_SET_CLOCK:
6196                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6197                 break;
6198         case KVM_GET_CLOCK:
6199                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6200                 break;
6201         case KVM_MEMORY_ENCRYPT_OP: {
6202                 r = -ENOTTY;
6203                 if (kvm_x86_ops.mem_enc_op)
6204                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6205                 break;
6206         }
6207         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6208                 struct kvm_enc_region region;
6209
6210                 r = -EFAULT;
6211                 if (copy_from_user(&region, argp, sizeof(region)))
6212                         goto out;
6213
6214                 r = -ENOTTY;
6215                 if (kvm_x86_ops.mem_enc_reg_region)
6216                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6217                 break;
6218         }
6219         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6220                 struct kvm_enc_region region;
6221
6222                 r = -EFAULT;
6223                 if (copy_from_user(&region, argp, sizeof(region)))
6224                         goto out;
6225
6226                 r = -ENOTTY;
6227                 if (kvm_x86_ops.mem_enc_unreg_region)
6228                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6229                 break;
6230         }
6231         case KVM_HYPERV_EVENTFD: {
6232                 struct kvm_hyperv_eventfd hvevfd;
6233
6234                 r = -EFAULT;
6235                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6236                         goto out;
6237                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6238                 break;
6239         }
6240         case KVM_SET_PMU_EVENT_FILTER:
6241                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6242                 break;
6243         case KVM_X86_SET_MSR_FILTER:
6244                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6245                 break;
6246         default:
6247                 r = -ENOTTY;
6248         }
6249 out:
6250         return r;
6251 }
6252
6253 static void kvm_init_msr_list(void)
6254 {
6255         struct x86_pmu_capability x86_pmu;
6256         u32 dummy[2];
6257         unsigned i;
6258
6259         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6260                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6261
6262         perf_get_x86_pmu_capability(&x86_pmu);
6263
6264         num_msrs_to_save = 0;
6265         num_emulated_msrs = 0;
6266         num_msr_based_features = 0;
6267
6268         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6269                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6270                         continue;
6271
6272                 /*
6273                  * Even MSRs that are valid in the host may not be exposed
6274                  * to the guests in some cases.
6275                  */
6276                 switch (msrs_to_save_all[i]) {
6277                 case MSR_IA32_BNDCFGS:
6278                         if (!kvm_mpx_supported())
6279                                 continue;
6280                         break;
6281                 case MSR_TSC_AUX:
6282                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6283                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6284                                 continue;
6285                         break;
6286                 case MSR_IA32_UMWAIT_CONTROL:
6287                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6288                                 continue;
6289                         break;
6290                 case MSR_IA32_RTIT_CTL:
6291                 case MSR_IA32_RTIT_STATUS:
6292                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6293                                 continue;
6294                         break;
6295                 case MSR_IA32_RTIT_CR3_MATCH:
6296                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6297                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6298                                 continue;
6299                         break;
6300                 case MSR_IA32_RTIT_OUTPUT_BASE:
6301                 case MSR_IA32_RTIT_OUTPUT_MASK:
6302                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6303                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6304                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6305                                 continue;
6306                         break;
6307                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6308                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6309                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6310                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6311                                 continue;
6312                         break;
6313                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6314                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6315                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6316                                 continue;
6317                         break;
6318                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6319                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6320                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6321                                 continue;
6322                         break;
6323                 default:
6324                         break;
6325                 }
6326
6327                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6328         }
6329
6330         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6331                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6332                         continue;
6333
6334                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6335         }
6336
6337         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6338                 struct kvm_msr_entry msr;
6339
6340                 msr.index = msr_based_features_all[i];
6341                 if (kvm_get_msr_feature(&msr))
6342                         continue;
6343
6344                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6345         }
6346 }
6347
6348 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6349                            const void *v)
6350 {
6351         int handled = 0;
6352         int n;
6353
6354         do {
6355                 n = min(len, 8);
6356                 if (!(lapic_in_kernel(vcpu) &&
6357                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6358                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6359                         break;
6360                 handled += n;
6361                 addr += n;
6362                 len -= n;
6363                 v += n;
6364         } while (len);
6365
6366         return handled;
6367 }
6368
6369 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6370 {
6371         int handled = 0;
6372         int n;
6373
6374         do {
6375                 n = min(len, 8);
6376                 if (!(lapic_in_kernel(vcpu) &&
6377                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6378                                          addr, n, v))
6379                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6380                         break;
6381                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6382                 handled += n;
6383                 addr += n;
6384                 len -= n;
6385                 v += n;
6386         } while (len);
6387
6388         return handled;
6389 }
6390
6391 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6392                         struct kvm_segment *var, int seg)
6393 {
6394         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6395 }
6396
6397 void kvm_get_segment(struct kvm_vcpu *vcpu,
6398                      struct kvm_segment *var, int seg)
6399 {
6400         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6401 }
6402
6403 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6404                            struct x86_exception *exception)
6405 {
6406         gpa_t t_gpa;
6407
6408         BUG_ON(!mmu_is_nested(vcpu));
6409
6410         /* NPT walks are always user-walks */
6411         access |= PFERR_USER_MASK;
6412         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6413
6414         return t_gpa;
6415 }
6416
6417 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6418                               struct x86_exception *exception)
6419 {
6420         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6421         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6422 }
6423 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6424
6425  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6426                                 struct x86_exception *exception)
6427 {
6428         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6429         access |= PFERR_FETCH_MASK;
6430         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6431 }
6432
6433 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6434                                struct x86_exception *exception)
6435 {
6436         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6437         access |= PFERR_WRITE_MASK;
6438         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6439 }
6440 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6441
6442 /* uses this to access any guest's mapped memory without checking CPL */
6443 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6444                                 struct x86_exception *exception)
6445 {
6446         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6447 }
6448
6449 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6450                                       struct kvm_vcpu *vcpu, u32 access,
6451                                       struct x86_exception *exception)
6452 {
6453         void *data = val;
6454         int r = X86EMUL_CONTINUE;
6455
6456         while (bytes) {
6457                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6458                                                             exception);
6459                 unsigned offset = addr & (PAGE_SIZE-1);
6460                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6461                 int ret;
6462
6463                 if (gpa == UNMAPPED_GVA)
6464                         return X86EMUL_PROPAGATE_FAULT;
6465                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6466                                                offset, toread);
6467                 if (ret < 0) {
6468                         r = X86EMUL_IO_NEEDED;
6469                         goto out;
6470                 }
6471
6472                 bytes -= toread;
6473                 data += toread;
6474                 addr += toread;
6475         }
6476 out:
6477         return r;
6478 }
6479
6480 /* used for instruction fetching */
6481 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6482                                 gva_t addr, void *val, unsigned int bytes,
6483                                 struct x86_exception *exception)
6484 {
6485         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6486         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6487         unsigned offset;
6488         int ret;
6489
6490         /* Inline kvm_read_guest_virt_helper for speed.  */
6491         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6492                                                     exception);
6493         if (unlikely(gpa == UNMAPPED_GVA))
6494                 return X86EMUL_PROPAGATE_FAULT;
6495
6496         offset = addr & (PAGE_SIZE-1);
6497         if (WARN_ON(offset + bytes > PAGE_SIZE))
6498                 bytes = (unsigned)PAGE_SIZE - offset;
6499         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6500                                        offset, bytes);
6501         if (unlikely(ret < 0))
6502                 return X86EMUL_IO_NEEDED;
6503
6504         return X86EMUL_CONTINUE;
6505 }
6506
6507 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6508                                gva_t addr, void *val, unsigned int bytes,
6509                                struct x86_exception *exception)
6510 {
6511         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6512
6513         /*
6514          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6515          * is returned, but our callers are not ready for that and they blindly
6516          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6517          * uninitialized kernel stack memory into cr2 and error code.
6518          */
6519         memset(exception, 0, sizeof(*exception));
6520         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6521                                           exception);
6522 }
6523 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6524
6525 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6526                              gva_t addr, void *val, unsigned int bytes,
6527                              struct x86_exception *exception, bool system)
6528 {
6529         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6530         u32 access = 0;
6531
6532         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6533                 access |= PFERR_USER_MASK;
6534
6535         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6536 }
6537
6538 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6539                 unsigned long addr, void *val, unsigned int bytes)
6540 {
6541         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6542         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6543
6544         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6545 }
6546
6547 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6548                                       struct kvm_vcpu *vcpu, u32 access,
6549                                       struct x86_exception *exception)
6550 {
6551         void *data = val;
6552         int r = X86EMUL_CONTINUE;
6553
6554         while (bytes) {
6555                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6556                                                              access,
6557                                                              exception);
6558                 unsigned offset = addr & (PAGE_SIZE-1);
6559                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6560                 int ret;
6561
6562                 if (gpa == UNMAPPED_GVA)
6563                         return X86EMUL_PROPAGATE_FAULT;
6564                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6565                 if (ret < 0) {
6566                         r = X86EMUL_IO_NEEDED;
6567                         goto out;
6568                 }
6569
6570                 bytes -= towrite;
6571                 data += towrite;
6572                 addr += towrite;
6573         }
6574 out:
6575         return r;
6576 }
6577
6578 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6579                               unsigned int bytes, struct x86_exception *exception,
6580                               bool system)
6581 {
6582         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6583         u32 access = PFERR_WRITE_MASK;
6584
6585         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6586                 access |= PFERR_USER_MASK;
6587
6588         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6589                                            access, exception);
6590 }
6591
6592 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6593                                 unsigned int bytes, struct x86_exception *exception)
6594 {
6595         /* kvm_write_guest_virt_system can pull in tons of pages. */
6596         vcpu->arch.l1tf_flush_l1d = true;
6597
6598         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6599                                            PFERR_WRITE_MASK, exception);
6600 }
6601 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6602
6603 int handle_ud(struct kvm_vcpu *vcpu)
6604 {
6605         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6606         int emul_type = EMULTYPE_TRAP_UD;
6607         char sig[5]; /* ud2; .ascii "kvm" */
6608         struct x86_exception e;
6609
6610         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6611                 return 1;
6612
6613         if (force_emulation_prefix &&
6614             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6615                                 sig, sizeof(sig), &e) == 0 &&
6616             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6617                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6618                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6619         }
6620
6621         return kvm_emulate_instruction(vcpu, emul_type);
6622 }
6623 EXPORT_SYMBOL_GPL(handle_ud);
6624
6625 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6626                             gpa_t gpa, bool write)
6627 {
6628         /* For APIC access vmexit */
6629         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6630                 return 1;
6631
6632         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6633                 trace_vcpu_match_mmio(gva, gpa, write, true);
6634                 return 1;
6635         }
6636
6637         return 0;
6638 }
6639
6640 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6641                                 gpa_t *gpa, struct x86_exception *exception,
6642                                 bool write)
6643 {
6644         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6645                 | (write ? PFERR_WRITE_MASK : 0);
6646
6647         /*
6648          * currently PKRU is only applied to ept enabled guest so
6649          * there is no pkey in EPT page table for L1 guest or EPT
6650          * shadow page table for L2 guest.
6651          */
6652         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6653             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6654                               vcpu->arch.mmio_access, 0, access))) {
6655                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6656                                         (gva & (PAGE_SIZE - 1));
6657                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6658                 return 1;
6659         }
6660
6661         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6662
6663         if (*gpa == UNMAPPED_GVA)
6664                 return -1;
6665
6666         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6667 }
6668
6669 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6670                         const void *val, int bytes)
6671 {
6672         int ret;
6673
6674         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6675         if (ret < 0)
6676                 return 0;
6677         kvm_page_track_write(vcpu, gpa, val, bytes);
6678         return 1;
6679 }
6680
6681 struct read_write_emulator_ops {
6682         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6683                                   int bytes);
6684         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6685                                   void *val, int bytes);
6686         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6687                                int bytes, void *val);
6688         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6689                                     void *val, int bytes);
6690         bool write;
6691 };
6692
6693 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6694 {
6695         if (vcpu->mmio_read_completed) {
6696                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6697                                vcpu->mmio_fragments[0].gpa, val);
6698                 vcpu->mmio_read_completed = 0;
6699                 return 1;
6700         }
6701
6702         return 0;
6703 }
6704
6705 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6706                         void *val, int bytes)
6707 {
6708         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6709 }
6710
6711 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6712                          void *val, int bytes)
6713 {
6714         return emulator_write_phys(vcpu, gpa, val, bytes);
6715 }
6716
6717 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6718 {
6719         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6720         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6721 }
6722
6723 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6724                           void *val, int bytes)
6725 {
6726         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6727         return X86EMUL_IO_NEEDED;
6728 }
6729
6730 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6731                            void *val, int bytes)
6732 {
6733         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6734
6735         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6736         return X86EMUL_CONTINUE;
6737 }
6738
6739 static const struct read_write_emulator_ops read_emultor = {
6740         .read_write_prepare = read_prepare,
6741         .read_write_emulate = read_emulate,
6742         .read_write_mmio = vcpu_mmio_read,
6743         .read_write_exit_mmio = read_exit_mmio,
6744 };
6745
6746 static const struct read_write_emulator_ops write_emultor = {
6747         .read_write_emulate = write_emulate,
6748         .read_write_mmio = write_mmio,
6749         .read_write_exit_mmio = write_exit_mmio,
6750         .write = true,
6751 };
6752
6753 static int emulator_read_write_onepage(unsigned long addr, void *val,
6754                                        unsigned int bytes,
6755                                        struct x86_exception *exception,
6756                                        struct kvm_vcpu *vcpu,
6757                                        const struct read_write_emulator_ops *ops)
6758 {
6759         gpa_t gpa;
6760         int handled, ret;
6761         bool write = ops->write;
6762         struct kvm_mmio_fragment *frag;
6763         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6764
6765         /*
6766          * If the exit was due to a NPF we may already have a GPA.
6767          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6768          * Note, this cannot be used on string operations since string
6769          * operation using rep will only have the initial GPA from the NPF
6770          * occurred.
6771          */
6772         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6773             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6774                 gpa = ctxt->gpa_val;
6775                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6776         } else {
6777                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6778                 if (ret < 0)
6779                         return X86EMUL_PROPAGATE_FAULT;
6780         }
6781
6782         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6783                 return X86EMUL_CONTINUE;
6784
6785         /*
6786          * Is this MMIO handled locally?
6787          */
6788         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6789         if (handled == bytes)
6790                 return X86EMUL_CONTINUE;
6791
6792         gpa += handled;
6793         bytes -= handled;
6794         val += handled;
6795
6796         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6797         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6798         frag->gpa = gpa;
6799         frag->data = val;
6800         frag->len = bytes;
6801         return X86EMUL_CONTINUE;
6802 }
6803
6804 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6805                         unsigned long addr,
6806                         void *val, unsigned int bytes,
6807                         struct x86_exception *exception,
6808                         const struct read_write_emulator_ops *ops)
6809 {
6810         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6811         gpa_t gpa;
6812         int rc;
6813
6814         if (ops->read_write_prepare &&
6815                   ops->read_write_prepare(vcpu, val, bytes))
6816                 return X86EMUL_CONTINUE;
6817
6818         vcpu->mmio_nr_fragments = 0;
6819
6820         /* Crossing a page boundary? */
6821         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6822                 int now;
6823
6824                 now = -addr & ~PAGE_MASK;
6825                 rc = emulator_read_write_onepage(addr, val, now, exception,
6826                                                  vcpu, ops);
6827
6828                 if (rc != X86EMUL_CONTINUE)
6829                         return rc;
6830                 addr += now;
6831                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6832                         addr = (u32)addr;
6833                 val += now;
6834                 bytes -= now;
6835         }
6836
6837         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6838                                          vcpu, ops);
6839         if (rc != X86EMUL_CONTINUE)
6840                 return rc;
6841
6842         if (!vcpu->mmio_nr_fragments)
6843                 return rc;
6844
6845         gpa = vcpu->mmio_fragments[0].gpa;
6846
6847         vcpu->mmio_needed = 1;
6848         vcpu->mmio_cur_fragment = 0;
6849
6850         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6851         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6852         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6853         vcpu->run->mmio.phys_addr = gpa;
6854
6855         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6856 }
6857
6858 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6859                                   unsigned long addr,
6860                                   void *val,
6861                                   unsigned int bytes,
6862                                   struct x86_exception *exception)
6863 {
6864         return emulator_read_write(ctxt, addr, val, bytes,
6865                                    exception, &read_emultor);
6866 }
6867
6868 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6869                             unsigned long addr,
6870                             const void *val,
6871                             unsigned int bytes,
6872                             struct x86_exception *exception)
6873 {
6874         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6875                                    exception, &write_emultor);
6876 }
6877
6878 #define CMPXCHG_TYPE(t, ptr, old, new) \
6879         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6880
6881 #ifdef CONFIG_X86_64
6882 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6883 #else
6884 #  define CMPXCHG64(ptr, old, new) \
6885         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6886 #endif
6887
6888 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6889                                      unsigned long addr,
6890                                      const void *old,
6891                                      const void *new,
6892                                      unsigned int bytes,
6893                                      struct x86_exception *exception)
6894 {
6895         struct kvm_host_map map;
6896         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6897         u64 page_line_mask;
6898         gpa_t gpa;
6899         char *kaddr;
6900         bool exchanged;
6901
6902         /* guests cmpxchg8b have to be emulated atomically */
6903         if (bytes > 8 || (bytes & (bytes - 1)))
6904                 goto emul_write;
6905
6906         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6907
6908         if (gpa == UNMAPPED_GVA ||
6909             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6910                 goto emul_write;
6911
6912         /*
6913          * Emulate the atomic as a straight write to avoid #AC if SLD is
6914          * enabled in the host and the access splits a cache line.
6915          */
6916         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6917                 page_line_mask = ~(cache_line_size() - 1);
6918         else
6919                 page_line_mask = PAGE_MASK;
6920
6921         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6922                 goto emul_write;
6923
6924         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6925                 goto emul_write;
6926
6927         kaddr = map.hva + offset_in_page(gpa);
6928
6929         switch (bytes) {
6930         case 1:
6931                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6932                 break;
6933         case 2:
6934                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6935                 break;
6936         case 4:
6937                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6938                 break;
6939         case 8:
6940                 exchanged = CMPXCHG64(kaddr, old, new);
6941                 break;
6942         default:
6943                 BUG();
6944         }
6945
6946         kvm_vcpu_unmap(vcpu, &map, true);
6947
6948         if (!exchanged)
6949                 return X86EMUL_CMPXCHG_FAILED;
6950
6951         kvm_page_track_write(vcpu, gpa, new, bytes);
6952
6953         return X86EMUL_CONTINUE;
6954
6955 emul_write:
6956         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6957
6958         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6959 }
6960
6961 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6962 {
6963         int r = 0, i;
6964
6965         for (i = 0; i < vcpu->arch.pio.count; i++) {
6966                 if (vcpu->arch.pio.in)
6967                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6968                                             vcpu->arch.pio.size, pd);
6969                 else
6970                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6971                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6972                                              pd);
6973                 if (r)
6974                         break;
6975                 pd += vcpu->arch.pio.size;
6976         }
6977         return r;
6978 }
6979
6980 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6981                                unsigned short port,
6982                                unsigned int count, bool in)
6983 {
6984         vcpu->arch.pio.port = port;
6985         vcpu->arch.pio.in = in;
6986         vcpu->arch.pio.count  = count;
6987         vcpu->arch.pio.size = size;
6988
6989         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
6990                 return 1;
6991
6992         vcpu->run->exit_reason = KVM_EXIT_IO;
6993         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6994         vcpu->run->io.size = size;
6995         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6996         vcpu->run->io.count = count;
6997         vcpu->run->io.port = port;
6998
6999         return 0;
7000 }
7001
7002 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7003                              unsigned short port, unsigned int count)
7004 {
7005         WARN_ON(vcpu->arch.pio.count);
7006         memset(vcpu->arch.pio_data, 0, size * count);
7007         return emulator_pio_in_out(vcpu, size, port, count, true);
7008 }
7009
7010 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7011 {
7012         int size = vcpu->arch.pio.size;
7013         unsigned count = vcpu->arch.pio.count;
7014         memcpy(val, vcpu->arch.pio_data, size * count);
7015         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7016         vcpu->arch.pio.count = 0;
7017 }
7018
7019 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7020                            unsigned short port, void *val, unsigned int count)
7021 {
7022         if (vcpu->arch.pio.count) {
7023                 /* Complete previous iteration.  */
7024         } else {
7025                 int r = __emulator_pio_in(vcpu, size, port, count);
7026                 if (!r)
7027                         return r;
7028
7029                 /* Results already available, fall through.  */
7030         }
7031
7032         WARN_ON(count != vcpu->arch.pio.count);
7033         complete_emulator_pio_in(vcpu, val);
7034         return 1;
7035 }
7036
7037 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7038                                     int size, unsigned short port, void *val,
7039                                     unsigned int count)
7040 {
7041         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7042
7043 }
7044
7045 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7046                             unsigned short port, const void *val,
7047                             unsigned int count)
7048 {
7049         int ret;
7050
7051         memcpy(vcpu->arch.pio_data, val, size * count);
7052         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7053         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7054         if (ret)
7055                 vcpu->arch.pio.count = 0;
7056
7057         return ret;
7058 }
7059
7060 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7061                                      int size, unsigned short port,
7062                                      const void *val, unsigned int count)
7063 {
7064         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7065 }
7066
7067 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7068 {
7069         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7070 }
7071
7072 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7073 {
7074         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7075 }
7076
7077 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7078 {
7079         if (!need_emulate_wbinvd(vcpu))
7080                 return X86EMUL_CONTINUE;
7081
7082         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7083                 int cpu = get_cpu();
7084
7085                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7086                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7087                                 wbinvd_ipi, NULL, 1);
7088                 put_cpu();
7089                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7090         } else
7091                 wbinvd();
7092         return X86EMUL_CONTINUE;
7093 }
7094
7095 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7096 {
7097         kvm_emulate_wbinvd_noskip(vcpu);
7098         return kvm_skip_emulated_instruction(vcpu);
7099 }
7100 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7101
7102
7103
7104 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7105 {
7106         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7107 }
7108
7109 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7110                             unsigned long *dest)
7111 {
7112         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7113 }
7114
7115 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7116                            unsigned long value)
7117 {
7118
7119         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7120 }
7121
7122 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7123 {
7124         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7125 }
7126
7127 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7128 {
7129         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7130         unsigned long value;
7131
7132         switch (cr) {
7133         case 0:
7134                 value = kvm_read_cr0(vcpu);
7135                 break;
7136         case 2:
7137                 value = vcpu->arch.cr2;
7138                 break;
7139         case 3:
7140                 value = kvm_read_cr3(vcpu);
7141                 break;
7142         case 4:
7143                 value = kvm_read_cr4(vcpu);
7144                 break;
7145         case 8:
7146                 value = kvm_get_cr8(vcpu);
7147                 break;
7148         default:
7149                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7150                 return 0;
7151         }
7152
7153         return value;
7154 }
7155
7156 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7157 {
7158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7159         int res = 0;
7160
7161         switch (cr) {
7162         case 0:
7163                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7164                 break;
7165         case 2:
7166                 vcpu->arch.cr2 = val;
7167                 break;
7168         case 3:
7169                 res = kvm_set_cr3(vcpu, val);
7170                 break;
7171         case 4:
7172                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7173                 break;
7174         case 8:
7175                 res = kvm_set_cr8(vcpu, val);
7176                 break;
7177         default:
7178                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7179                 res = -1;
7180         }
7181
7182         return res;
7183 }
7184
7185 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7186 {
7187         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7188 }
7189
7190 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7191 {
7192         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7193 }
7194
7195 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7196 {
7197         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7198 }
7199
7200 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7201 {
7202         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7203 }
7204
7205 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7206 {
7207         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7208 }
7209
7210 static unsigned long emulator_get_cached_segment_base(
7211         struct x86_emulate_ctxt *ctxt, int seg)
7212 {
7213         return get_segment_base(emul_to_vcpu(ctxt), seg);
7214 }
7215
7216 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7217                                  struct desc_struct *desc, u32 *base3,
7218                                  int seg)
7219 {
7220         struct kvm_segment var;
7221
7222         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7223         *selector = var.selector;
7224
7225         if (var.unusable) {
7226                 memset(desc, 0, sizeof(*desc));
7227                 if (base3)
7228                         *base3 = 0;
7229                 return false;
7230         }
7231
7232         if (var.g)
7233                 var.limit >>= 12;
7234         set_desc_limit(desc, var.limit);
7235         set_desc_base(desc, (unsigned long)var.base);
7236 #ifdef CONFIG_X86_64
7237         if (base3)
7238                 *base3 = var.base >> 32;
7239 #endif
7240         desc->type = var.type;
7241         desc->s = var.s;
7242         desc->dpl = var.dpl;
7243         desc->p = var.present;
7244         desc->avl = var.avl;
7245         desc->l = var.l;
7246         desc->d = var.db;
7247         desc->g = var.g;
7248
7249         return true;
7250 }
7251
7252 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7253                                  struct desc_struct *desc, u32 base3,
7254                                  int seg)
7255 {
7256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7257         struct kvm_segment var;
7258
7259         var.selector = selector;
7260         var.base = get_desc_base(desc);
7261 #ifdef CONFIG_X86_64
7262         var.base |= ((u64)base3) << 32;
7263 #endif
7264         var.limit = get_desc_limit(desc);
7265         if (desc->g)
7266                 var.limit = (var.limit << 12) | 0xfff;
7267         var.type = desc->type;
7268         var.dpl = desc->dpl;
7269         var.db = desc->d;
7270         var.s = desc->s;
7271         var.l = desc->l;
7272         var.g = desc->g;
7273         var.avl = desc->avl;
7274         var.present = desc->p;
7275         var.unusable = !var.present;
7276         var.padding = 0;
7277
7278         kvm_set_segment(vcpu, &var, seg);
7279         return;
7280 }
7281
7282 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7283                             u32 msr_index, u64 *pdata)
7284 {
7285         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7286         int r;
7287
7288         r = kvm_get_msr(vcpu, msr_index, pdata);
7289
7290         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7291                 /* Bounce to user space */
7292                 return X86EMUL_IO_NEEDED;
7293         }
7294
7295         return r;
7296 }
7297
7298 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7299                             u32 msr_index, u64 data)
7300 {
7301         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7302         int r;
7303
7304         r = kvm_set_msr(vcpu, msr_index, data);
7305
7306         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7307                 /* Bounce to user space */
7308                 return X86EMUL_IO_NEEDED;
7309         }
7310
7311         return r;
7312 }
7313
7314 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7315 {
7316         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7317
7318         return vcpu->arch.smbase;
7319 }
7320
7321 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7322 {
7323         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7324
7325         vcpu->arch.smbase = smbase;
7326 }
7327
7328 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7329                               u32 pmc)
7330 {
7331         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7332 }
7333
7334 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7335                              u32 pmc, u64 *pdata)
7336 {
7337         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7338 }
7339
7340 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7341 {
7342         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7343 }
7344
7345 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7346                               struct x86_instruction_info *info,
7347                               enum x86_intercept_stage stage)
7348 {
7349         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7350                                             &ctxt->exception);
7351 }
7352
7353 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7354                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7355                               bool exact_only)
7356 {
7357         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7358 }
7359
7360 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7361 {
7362         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7363 }
7364
7365 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7366 {
7367         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7368 }
7369
7370 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7371 {
7372         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7373 }
7374
7375 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7376 {
7377         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7378 }
7379
7380 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7381 {
7382         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7383 }
7384
7385 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7386 {
7387         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7388 }
7389
7390 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7391 {
7392         return emul_to_vcpu(ctxt)->arch.hflags;
7393 }
7394
7395 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7396 {
7397         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7398
7399         kvm_smm_changed(vcpu, false);
7400 }
7401
7402 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7403                                   const char *smstate)
7404 {
7405         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7406 }
7407
7408 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7409 {
7410         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7411 }
7412
7413 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7414 {
7415         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7416 }
7417
7418 static const struct x86_emulate_ops emulate_ops = {
7419         .read_gpr            = emulator_read_gpr,
7420         .write_gpr           = emulator_write_gpr,
7421         .read_std            = emulator_read_std,
7422         .write_std           = emulator_write_std,
7423         .read_phys           = kvm_read_guest_phys_system,
7424         .fetch               = kvm_fetch_guest_virt,
7425         .read_emulated       = emulator_read_emulated,
7426         .write_emulated      = emulator_write_emulated,
7427         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7428         .invlpg              = emulator_invlpg,
7429         .pio_in_emulated     = emulator_pio_in_emulated,
7430         .pio_out_emulated    = emulator_pio_out_emulated,
7431         .get_segment         = emulator_get_segment,
7432         .set_segment         = emulator_set_segment,
7433         .get_cached_segment_base = emulator_get_cached_segment_base,
7434         .get_gdt             = emulator_get_gdt,
7435         .get_idt             = emulator_get_idt,
7436         .set_gdt             = emulator_set_gdt,
7437         .set_idt             = emulator_set_idt,
7438         .get_cr              = emulator_get_cr,
7439         .set_cr              = emulator_set_cr,
7440         .cpl                 = emulator_get_cpl,
7441         .get_dr              = emulator_get_dr,
7442         .set_dr              = emulator_set_dr,
7443         .get_smbase          = emulator_get_smbase,
7444         .set_smbase          = emulator_set_smbase,
7445         .set_msr             = emulator_set_msr,
7446         .get_msr             = emulator_get_msr,
7447         .check_pmc           = emulator_check_pmc,
7448         .read_pmc            = emulator_read_pmc,
7449         .halt                = emulator_halt,
7450         .wbinvd              = emulator_wbinvd,
7451         .fix_hypercall       = emulator_fix_hypercall,
7452         .intercept           = emulator_intercept,
7453         .get_cpuid           = emulator_get_cpuid,
7454         .guest_has_long_mode = emulator_guest_has_long_mode,
7455         .guest_has_movbe     = emulator_guest_has_movbe,
7456         .guest_has_fxsr      = emulator_guest_has_fxsr,
7457         .set_nmi_mask        = emulator_set_nmi_mask,
7458         .get_hflags          = emulator_get_hflags,
7459         .exiting_smm         = emulator_exiting_smm,
7460         .leave_smm           = emulator_leave_smm,
7461         .triple_fault        = emulator_triple_fault,
7462         .set_xcr             = emulator_set_xcr,
7463 };
7464
7465 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7466 {
7467         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7468         /*
7469          * an sti; sti; sequence only disable interrupts for the first
7470          * instruction. So, if the last instruction, be it emulated or
7471          * not, left the system with the INT_STI flag enabled, it
7472          * means that the last instruction is an sti. We should not
7473          * leave the flag on in this case. The same goes for mov ss
7474          */
7475         if (int_shadow & mask)
7476                 mask = 0;
7477         if (unlikely(int_shadow || mask)) {
7478                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7479                 if (!mask)
7480                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7481         }
7482 }
7483
7484 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7485 {
7486         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7487         if (ctxt->exception.vector == PF_VECTOR)
7488                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7489
7490         if (ctxt->exception.error_code_valid)
7491                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7492                                       ctxt->exception.error_code);
7493         else
7494                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7495         return false;
7496 }
7497
7498 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7499 {
7500         struct x86_emulate_ctxt *ctxt;
7501
7502         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7503         if (!ctxt) {
7504                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7505                 return NULL;
7506         }
7507
7508         ctxt->vcpu = vcpu;
7509         ctxt->ops = &emulate_ops;
7510         vcpu->arch.emulate_ctxt = ctxt;
7511
7512         return ctxt;
7513 }
7514
7515 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7516 {
7517         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7518         int cs_db, cs_l;
7519
7520         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7521
7522         ctxt->gpa_available = false;
7523         ctxt->eflags = kvm_get_rflags(vcpu);
7524         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7525
7526         ctxt->eip = kvm_rip_read(vcpu);
7527         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7528                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7529                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7530                      cs_db                              ? X86EMUL_MODE_PROT32 :
7531                                                           X86EMUL_MODE_PROT16;
7532         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7533         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7534         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7535
7536         ctxt->interruptibility = 0;
7537         ctxt->have_exception = false;
7538         ctxt->exception.vector = -1;
7539         ctxt->perm_ok = false;
7540
7541         init_decode_cache(ctxt);
7542         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7543 }
7544
7545 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7546 {
7547         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7548         int ret;
7549
7550         init_emulate_ctxt(vcpu);
7551
7552         ctxt->op_bytes = 2;
7553         ctxt->ad_bytes = 2;
7554         ctxt->_eip = ctxt->eip + inc_eip;
7555         ret = emulate_int_real(ctxt, irq);
7556
7557         if (ret != X86EMUL_CONTINUE) {
7558                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7559         } else {
7560                 ctxt->eip = ctxt->_eip;
7561                 kvm_rip_write(vcpu, ctxt->eip);
7562                 kvm_set_rflags(vcpu, ctxt->eflags);
7563         }
7564 }
7565 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7566
7567 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7568                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7569 {
7570         struct kvm_run *run = vcpu->run;
7571         u64 info[5];
7572         u8 info_start;
7573
7574         /*
7575          * Zero the whole array used to retrieve the exit info, as casting to
7576          * u32 for select entries will leave some chunks uninitialized.
7577          */
7578         memset(&info, 0, sizeof(info));
7579
7580         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7581                                            &info[2], (u32 *)&info[3],
7582                                            (u32 *)&info[4]);
7583
7584         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7585         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7586
7587         /*
7588          * There's currently space for 13 entries, but 5 are used for the exit
7589          * reason and info.  Restrict to 4 to reduce the maintenance burden
7590          * when expanding kvm_run.emulation_failure in the future.
7591          */
7592         if (WARN_ON_ONCE(ndata > 4))
7593                 ndata = 4;
7594
7595         /* Always include the flags as a 'data' entry. */
7596         info_start = 1;
7597         run->emulation_failure.flags = 0;
7598
7599         if (insn_size) {
7600                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7601                               sizeof(run->emulation_failure.insn_bytes) != 16));
7602                 info_start += 2;
7603                 run->emulation_failure.flags |=
7604                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7605                 run->emulation_failure.insn_size = insn_size;
7606                 memset(run->emulation_failure.insn_bytes, 0x90,
7607                        sizeof(run->emulation_failure.insn_bytes));
7608                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7609         }
7610
7611         memcpy(&run->internal.data[info_start], info, sizeof(info));
7612         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7613                ndata * sizeof(data[0]));
7614
7615         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7616 }
7617
7618 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7619 {
7620         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7621
7622         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7623                                        ctxt->fetch.end - ctxt->fetch.data);
7624 }
7625
7626 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7627                                           u8 ndata)
7628 {
7629         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7630 }
7631 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7632
7633 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7634 {
7635         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7636 }
7637 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7638
7639 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7640 {
7641         struct kvm *kvm = vcpu->kvm;
7642
7643         ++vcpu->stat.insn_emulation_fail;
7644         trace_kvm_emulate_insn_failed(vcpu);
7645
7646         if (emulation_type & EMULTYPE_VMWARE_GP) {
7647                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7648                 return 1;
7649         }
7650
7651         if (kvm->arch.exit_on_emulation_error ||
7652             (emulation_type & EMULTYPE_SKIP)) {
7653                 prepare_emulation_ctxt_failure_exit(vcpu);
7654                 return 0;
7655         }
7656
7657         kvm_queue_exception(vcpu, UD_VECTOR);
7658
7659         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7660                 prepare_emulation_ctxt_failure_exit(vcpu);
7661                 return 0;
7662         }
7663
7664         return 1;
7665 }
7666
7667 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7668                                   bool write_fault_to_shadow_pgtable,
7669                                   int emulation_type)
7670 {
7671         gpa_t gpa = cr2_or_gpa;
7672         kvm_pfn_t pfn;
7673
7674         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7675                 return false;
7676
7677         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7678             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7679                 return false;
7680
7681         if (!vcpu->arch.mmu->direct_map) {
7682                 /*
7683                  * Write permission should be allowed since only
7684                  * write access need to be emulated.
7685                  */
7686                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7687
7688                 /*
7689                  * If the mapping is invalid in guest, let cpu retry
7690                  * it to generate fault.
7691                  */
7692                 if (gpa == UNMAPPED_GVA)
7693                         return true;
7694         }
7695
7696         /*
7697          * Do not retry the unhandleable instruction if it faults on the
7698          * readonly host memory, otherwise it will goto a infinite loop:
7699          * retry instruction -> write #PF -> emulation fail -> retry
7700          * instruction -> ...
7701          */
7702         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7703
7704         /*
7705          * If the instruction failed on the error pfn, it can not be fixed,
7706          * report the error to userspace.
7707          */
7708         if (is_error_noslot_pfn(pfn))
7709                 return false;
7710
7711         kvm_release_pfn_clean(pfn);
7712
7713         /* The instructions are well-emulated on direct mmu. */
7714         if (vcpu->arch.mmu->direct_map) {
7715                 unsigned int indirect_shadow_pages;
7716
7717                 write_lock(&vcpu->kvm->mmu_lock);
7718                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7719                 write_unlock(&vcpu->kvm->mmu_lock);
7720
7721                 if (indirect_shadow_pages)
7722                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7723
7724                 return true;
7725         }
7726
7727         /*
7728          * if emulation was due to access to shadowed page table
7729          * and it failed try to unshadow page and re-enter the
7730          * guest to let CPU execute the instruction.
7731          */
7732         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7733
7734         /*
7735          * If the access faults on its page table, it can not
7736          * be fixed by unprotecting shadow page and it should
7737          * be reported to userspace.
7738          */
7739         return !write_fault_to_shadow_pgtable;
7740 }
7741
7742 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7743                               gpa_t cr2_or_gpa,  int emulation_type)
7744 {
7745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7746         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7747
7748         last_retry_eip = vcpu->arch.last_retry_eip;
7749         last_retry_addr = vcpu->arch.last_retry_addr;
7750
7751         /*
7752          * If the emulation is caused by #PF and it is non-page_table
7753          * writing instruction, it means the VM-EXIT is caused by shadow
7754          * page protected, we can zap the shadow page and retry this
7755          * instruction directly.
7756          *
7757          * Note: if the guest uses a non-page-table modifying instruction
7758          * on the PDE that points to the instruction, then we will unmap
7759          * the instruction and go to an infinite loop. So, we cache the
7760          * last retried eip and the last fault address, if we meet the eip
7761          * and the address again, we can break out of the potential infinite
7762          * loop.
7763          */
7764         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7765
7766         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7767                 return false;
7768
7769         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7770             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7771                 return false;
7772
7773         if (x86_page_table_writing_insn(ctxt))
7774                 return false;
7775
7776         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7777                 return false;
7778
7779         vcpu->arch.last_retry_eip = ctxt->eip;
7780         vcpu->arch.last_retry_addr = cr2_or_gpa;
7781
7782         if (!vcpu->arch.mmu->direct_map)
7783                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7784
7785         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7786
7787         return true;
7788 }
7789
7790 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7791 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7792
7793 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7794 {
7795         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7796
7797         if (entering_smm) {
7798                 vcpu->arch.hflags |= HF_SMM_MASK;
7799         } else {
7800                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7801
7802                 /* Process a latched INIT or SMI, if any.  */
7803                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7804
7805                 /*
7806                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7807                  * on SMM exit we still need to reload them from
7808                  * guest memory
7809                  */
7810                 vcpu->arch.pdptrs_from_userspace = false;
7811         }
7812
7813         kvm_mmu_reset_context(vcpu);
7814 }
7815
7816 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7817                                 unsigned long *db)
7818 {
7819         u32 dr6 = 0;
7820         int i;
7821         u32 enable, rwlen;
7822
7823         enable = dr7;
7824         rwlen = dr7 >> 16;
7825         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7826                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7827                         dr6 |= (1 << i);
7828         return dr6;
7829 }
7830
7831 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7832 {
7833         struct kvm_run *kvm_run = vcpu->run;
7834
7835         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7836                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7837                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7838                 kvm_run->debug.arch.exception = DB_VECTOR;
7839                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7840                 return 0;
7841         }
7842         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7843         return 1;
7844 }
7845
7846 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7847 {
7848         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7849         int r;
7850
7851         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7852         if (unlikely(!r))
7853                 return 0;
7854
7855         /*
7856          * rflags is the old, "raw" value of the flags.  The new value has
7857          * not been saved yet.
7858          *
7859          * This is correct even for TF set by the guest, because "the
7860          * processor will not generate this exception after the instruction
7861          * that sets the TF flag".
7862          */
7863         if (unlikely(rflags & X86_EFLAGS_TF))
7864                 r = kvm_vcpu_do_singlestep(vcpu);
7865         return r;
7866 }
7867 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7868
7869 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7870 {
7871         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7872             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7873                 struct kvm_run *kvm_run = vcpu->run;
7874                 unsigned long eip = kvm_get_linear_rip(vcpu);
7875                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7876                                            vcpu->arch.guest_debug_dr7,
7877                                            vcpu->arch.eff_db);
7878
7879                 if (dr6 != 0) {
7880                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7881                         kvm_run->debug.arch.pc = eip;
7882                         kvm_run->debug.arch.exception = DB_VECTOR;
7883                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7884                         *r = 0;
7885                         return true;
7886                 }
7887         }
7888
7889         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7890             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7891                 unsigned long eip = kvm_get_linear_rip(vcpu);
7892                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7893                                            vcpu->arch.dr7,
7894                                            vcpu->arch.db);
7895
7896                 if (dr6 != 0) {
7897                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7898                         *r = 1;
7899                         return true;
7900                 }
7901         }
7902
7903         return false;
7904 }
7905
7906 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7907 {
7908         switch (ctxt->opcode_len) {
7909         case 1:
7910                 switch (ctxt->b) {
7911                 case 0xe4:      /* IN */
7912                 case 0xe5:
7913                 case 0xec:
7914                 case 0xed:
7915                 case 0xe6:      /* OUT */
7916                 case 0xe7:
7917                 case 0xee:
7918                 case 0xef:
7919                 case 0x6c:      /* INS */
7920                 case 0x6d:
7921                 case 0x6e:      /* OUTS */
7922                 case 0x6f:
7923                         return true;
7924                 }
7925                 break;
7926         case 2:
7927                 switch (ctxt->b) {
7928                 case 0x33:      /* RDPMC */
7929                         return true;
7930                 }
7931                 break;
7932         }
7933
7934         return false;
7935 }
7936
7937 /*
7938  * Decode to be emulated instruction. Return EMULATION_OK if success.
7939  */
7940 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7941                                     void *insn, int insn_len)
7942 {
7943         int r = EMULATION_OK;
7944         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7945
7946         init_emulate_ctxt(vcpu);
7947
7948         /*
7949          * We will reenter on the same instruction since we do not set
7950          * complete_userspace_io. This does not handle watchpoints yet,
7951          * those would be handled in the emulate_ops.
7952          */
7953         if (!(emulation_type & EMULTYPE_SKIP) &&
7954             kvm_vcpu_check_breakpoint(vcpu, &r))
7955                 return r;
7956
7957         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
7958
7959         trace_kvm_emulate_insn_start(vcpu);
7960         ++vcpu->stat.insn_emulation;
7961
7962         return r;
7963 }
7964 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7965
7966 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7967                             int emulation_type, void *insn, int insn_len)
7968 {
7969         int r;
7970         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7971         bool writeback = true;
7972         bool write_fault_to_spt;
7973
7974         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7975                 return 1;
7976
7977         vcpu->arch.l1tf_flush_l1d = true;
7978
7979         /*
7980          * Clear write_fault_to_shadow_pgtable here to ensure it is
7981          * never reused.
7982          */
7983         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7984         vcpu->arch.write_fault_to_shadow_pgtable = false;
7985
7986         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7987                 kvm_clear_exception_queue(vcpu);
7988
7989                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7990                                                     insn, insn_len);
7991                 if (r != EMULATION_OK)  {
7992                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7993                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7994                                 kvm_queue_exception(vcpu, UD_VECTOR);
7995                                 return 1;
7996                         }
7997                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7998                                                   write_fault_to_spt,
7999                                                   emulation_type))
8000                                 return 1;
8001                         if (ctxt->have_exception) {
8002                                 /*
8003                                  * #UD should result in just EMULATION_FAILED, and trap-like
8004                                  * exception should not be encountered during decode.
8005                                  */
8006                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8007                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8008                                 inject_emulated_exception(vcpu);
8009                                 return 1;
8010                         }
8011                         return handle_emulation_failure(vcpu, emulation_type);
8012                 }
8013         }
8014
8015         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8016             !is_vmware_backdoor_opcode(ctxt)) {
8017                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8018                 return 1;
8019         }
8020
8021         /*
8022          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8023          * for kvm_skip_emulated_instruction().  The caller is responsible for
8024          * updating interruptibility state and injecting single-step #DBs.
8025          */
8026         if (emulation_type & EMULTYPE_SKIP) {
8027                 kvm_rip_write(vcpu, ctxt->_eip);
8028                 if (ctxt->eflags & X86_EFLAGS_RF)
8029                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8030                 return 1;
8031         }
8032
8033         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8034                 return 1;
8035
8036         /* this is needed for vmware backdoor interface to work since it
8037            changes registers values  during IO operation */
8038         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8039                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8040                 emulator_invalidate_register_cache(ctxt);
8041         }
8042
8043 restart:
8044         if (emulation_type & EMULTYPE_PF) {
8045                 /* Save the faulting GPA (cr2) in the address field */
8046                 ctxt->exception.address = cr2_or_gpa;
8047
8048                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8049                 if (vcpu->arch.mmu->direct_map) {
8050                         ctxt->gpa_available = true;
8051                         ctxt->gpa_val = cr2_or_gpa;
8052                 }
8053         } else {
8054                 /* Sanitize the address out of an abundance of paranoia. */
8055                 ctxt->exception.address = 0;
8056         }
8057
8058         r = x86_emulate_insn(ctxt);
8059
8060         if (r == EMULATION_INTERCEPTED)
8061                 return 1;
8062
8063         if (r == EMULATION_FAILED) {
8064                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8065                                         emulation_type))
8066                         return 1;
8067
8068                 return handle_emulation_failure(vcpu, emulation_type);
8069         }
8070
8071         if (ctxt->have_exception) {
8072                 r = 1;
8073                 if (inject_emulated_exception(vcpu))
8074                         return r;
8075         } else if (vcpu->arch.pio.count) {
8076                 if (!vcpu->arch.pio.in) {
8077                         /* FIXME: return into emulator if single-stepping.  */
8078                         vcpu->arch.pio.count = 0;
8079                 } else {
8080                         writeback = false;
8081                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8082                 }
8083                 r = 0;
8084         } else if (vcpu->mmio_needed) {
8085                 ++vcpu->stat.mmio_exits;
8086
8087                 if (!vcpu->mmio_is_write)
8088                         writeback = false;
8089                 r = 0;
8090                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8091         } else if (r == EMULATION_RESTART)
8092                 goto restart;
8093         else
8094                 r = 1;
8095
8096         if (writeback) {
8097                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8098                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8099                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8100                 if (!ctxt->have_exception ||
8101                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8102                         kvm_rip_write(vcpu, ctxt->eip);
8103                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8104                                 r = kvm_vcpu_do_singlestep(vcpu);
8105                         if (kvm_x86_ops.update_emulated_instruction)
8106                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8107                         __kvm_set_rflags(vcpu, ctxt->eflags);
8108                 }
8109
8110                 /*
8111                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8112                  * do nothing, and it will be requested again as soon as
8113                  * the shadow expires.  But we still need to check here,
8114                  * because POPF has no interrupt shadow.
8115                  */
8116                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8117                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8118         } else
8119                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8120
8121         return r;
8122 }
8123
8124 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8125 {
8126         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8127 }
8128 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8129
8130 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8131                                         void *insn, int insn_len)
8132 {
8133         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8134 }
8135 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8136
8137 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8138 {
8139         vcpu->arch.pio.count = 0;
8140         return 1;
8141 }
8142
8143 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8144 {
8145         vcpu->arch.pio.count = 0;
8146
8147         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8148                 return 1;
8149
8150         return kvm_skip_emulated_instruction(vcpu);
8151 }
8152
8153 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8154                             unsigned short port)
8155 {
8156         unsigned long val = kvm_rax_read(vcpu);
8157         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8158
8159         if (ret)
8160                 return ret;
8161
8162         /*
8163          * Workaround userspace that relies on old KVM behavior of %rip being
8164          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8165          */
8166         if (port == 0x7e &&
8167             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8168                 vcpu->arch.complete_userspace_io =
8169                         complete_fast_pio_out_port_0x7e;
8170                 kvm_skip_emulated_instruction(vcpu);
8171         } else {
8172                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8173                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8174         }
8175         return 0;
8176 }
8177
8178 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8179 {
8180         unsigned long val;
8181
8182         /* We should only ever be called with arch.pio.count equal to 1 */
8183         BUG_ON(vcpu->arch.pio.count != 1);
8184
8185         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8186                 vcpu->arch.pio.count = 0;
8187                 return 1;
8188         }
8189
8190         /* For size less than 4 we merge, else we zero extend */
8191         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8192
8193         /*
8194          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8195          * the copy and tracing
8196          */
8197         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8198         kvm_rax_write(vcpu, val);
8199
8200         return kvm_skip_emulated_instruction(vcpu);
8201 }
8202
8203 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8204                            unsigned short port)
8205 {
8206         unsigned long val;
8207         int ret;
8208
8209         /* For size less than 4 we merge, else we zero extend */
8210         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8211
8212         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8213         if (ret) {
8214                 kvm_rax_write(vcpu, val);
8215                 return ret;
8216         }
8217
8218         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8219         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8220
8221         return 0;
8222 }
8223
8224 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8225 {
8226         int ret;
8227
8228         if (in)
8229                 ret = kvm_fast_pio_in(vcpu, size, port);
8230         else
8231                 ret = kvm_fast_pio_out(vcpu, size, port);
8232         return ret && kvm_skip_emulated_instruction(vcpu);
8233 }
8234 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8235
8236 static int kvmclock_cpu_down_prep(unsigned int cpu)
8237 {
8238         __this_cpu_write(cpu_tsc_khz, 0);
8239         return 0;
8240 }
8241
8242 static void tsc_khz_changed(void *data)
8243 {
8244         struct cpufreq_freqs *freq = data;
8245         unsigned long khz = 0;
8246
8247         if (data)
8248                 khz = freq->new;
8249         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8250                 khz = cpufreq_quick_get(raw_smp_processor_id());
8251         if (!khz)
8252                 khz = tsc_khz;
8253         __this_cpu_write(cpu_tsc_khz, khz);
8254 }
8255
8256 #ifdef CONFIG_X86_64
8257 static void kvm_hyperv_tsc_notifier(void)
8258 {
8259         struct kvm *kvm;
8260         int cpu;
8261
8262         mutex_lock(&kvm_lock);
8263         list_for_each_entry(kvm, &vm_list, vm_list)
8264                 kvm_make_mclock_inprogress_request(kvm);
8265
8266         /* no guest entries from this point */
8267         hyperv_stop_tsc_emulation();
8268
8269         /* TSC frequency always matches when on Hyper-V */
8270         for_each_present_cpu(cpu)
8271                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8272         kvm_max_guest_tsc_khz = tsc_khz;
8273
8274         list_for_each_entry(kvm, &vm_list, vm_list) {
8275                 __kvm_start_pvclock_update(kvm);
8276                 pvclock_update_vm_gtod_copy(kvm);
8277                 kvm_end_pvclock_update(kvm);
8278         }
8279
8280         mutex_unlock(&kvm_lock);
8281 }
8282 #endif
8283
8284 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8285 {
8286         struct kvm *kvm;
8287         struct kvm_vcpu *vcpu;
8288         int i, send_ipi = 0;
8289
8290         /*
8291          * We allow guests to temporarily run on slowing clocks,
8292          * provided we notify them after, or to run on accelerating
8293          * clocks, provided we notify them before.  Thus time never
8294          * goes backwards.
8295          *
8296          * However, we have a problem.  We can't atomically update
8297          * the frequency of a given CPU from this function; it is
8298          * merely a notifier, which can be called from any CPU.
8299          * Changing the TSC frequency at arbitrary points in time
8300          * requires a recomputation of local variables related to
8301          * the TSC for each VCPU.  We must flag these local variables
8302          * to be updated and be sure the update takes place with the
8303          * new frequency before any guests proceed.
8304          *
8305          * Unfortunately, the combination of hotplug CPU and frequency
8306          * change creates an intractable locking scenario; the order
8307          * of when these callouts happen is undefined with respect to
8308          * CPU hotplug, and they can race with each other.  As such,
8309          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8310          * undefined; you can actually have a CPU frequency change take
8311          * place in between the computation of X and the setting of the
8312          * variable.  To protect against this problem, all updates of
8313          * the per_cpu tsc_khz variable are done in an interrupt
8314          * protected IPI, and all callers wishing to update the value
8315          * must wait for a synchronous IPI to complete (which is trivial
8316          * if the caller is on the CPU already).  This establishes the
8317          * necessary total order on variable updates.
8318          *
8319          * Note that because a guest time update may take place
8320          * anytime after the setting of the VCPU's request bit, the
8321          * correct TSC value must be set before the request.  However,
8322          * to ensure the update actually makes it to any guest which
8323          * starts running in hardware virtualization between the set
8324          * and the acquisition of the spinlock, we must also ping the
8325          * CPU after setting the request bit.
8326          *
8327          */
8328
8329         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8330
8331         mutex_lock(&kvm_lock);
8332         list_for_each_entry(kvm, &vm_list, vm_list) {
8333                 kvm_for_each_vcpu(i, vcpu, kvm) {
8334                         if (vcpu->cpu != cpu)
8335                                 continue;
8336                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8337                         if (vcpu->cpu != raw_smp_processor_id())
8338                                 send_ipi = 1;
8339                 }
8340         }
8341         mutex_unlock(&kvm_lock);
8342
8343         if (freq->old < freq->new && send_ipi) {
8344                 /*
8345                  * We upscale the frequency.  Must make the guest
8346                  * doesn't see old kvmclock values while running with
8347                  * the new frequency, otherwise we risk the guest sees
8348                  * time go backwards.
8349                  *
8350                  * In case we update the frequency for another cpu
8351                  * (which might be in guest context) send an interrupt
8352                  * to kick the cpu out of guest context.  Next time
8353                  * guest context is entered kvmclock will be updated,
8354                  * so the guest will not see stale values.
8355                  */
8356                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8357         }
8358 }
8359
8360 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8361                                      void *data)
8362 {
8363         struct cpufreq_freqs *freq = data;
8364         int cpu;
8365
8366         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8367                 return 0;
8368         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8369                 return 0;
8370
8371         for_each_cpu(cpu, freq->policy->cpus)
8372                 __kvmclock_cpufreq_notifier(freq, cpu);
8373
8374         return 0;
8375 }
8376
8377 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8378         .notifier_call  = kvmclock_cpufreq_notifier
8379 };
8380
8381 static int kvmclock_cpu_online(unsigned int cpu)
8382 {
8383         tsc_khz_changed(NULL);
8384         return 0;
8385 }
8386
8387 static void kvm_timer_init(void)
8388 {
8389         max_tsc_khz = tsc_khz;
8390
8391         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8392 #ifdef CONFIG_CPU_FREQ
8393                 struct cpufreq_policy *policy;
8394                 int cpu;
8395
8396                 cpu = get_cpu();
8397                 policy = cpufreq_cpu_get(cpu);
8398                 if (policy) {
8399                         if (policy->cpuinfo.max_freq)
8400                                 max_tsc_khz = policy->cpuinfo.max_freq;
8401                         cpufreq_cpu_put(policy);
8402                 }
8403                 put_cpu();
8404 #endif
8405                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8406                                           CPUFREQ_TRANSITION_NOTIFIER);
8407         }
8408
8409         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8410                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8411 }
8412
8413 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8414 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8415
8416 int kvm_is_in_guest(void)
8417 {
8418         return __this_cpu_read(current_vcpu) != NULL;
8419 }
8420
8421 static int kvm_is_user_mode(void)
8422 {
8423         int user_mode = 3;
8424
8425         if (__this_cpu_read(current_vcpu))
8426                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8427
8428         return user_mode != 0;
8429 }
8430
8431 static unsigned long kvm_get_guest_ip(void)
8432 {
8433         unsigned long ip = 0;
8434
8435         if (__this_cpu_read(current_vcpu))
8436                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8437
8438         return ip;
8439 }
8440
8441 static void kvm_handle_intel_pt_intr(void)
8442 {
8443         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8444
8445         kvm_make_request(KVM_REQ_PMI, vcpu);
8446         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8447                         (unsigned long *)&vcpu->arch.pmu.global_status);
8448 }
8449
8450 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8451         .is_in_guest            = kvm_is_in_guest,
8452         .is_user_mode           = kvm_is_user_mode,
8453         .get_guest_ip           = kvm_get_guest_ip,
8454         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8455 };
8456
8457 #ifdef CONFIG_X86_64
8458 static void pvclock_gtod_update_fn(struct work_struct *work)
8459 {
8460         struct kvm *kvm;
8461
8462         struct kvm_vcpu *vcpu;
8463         int i;
8464
8465         mutex_lock(&kvm_lock);
8466         list_for_each_entry(kvm, &vm_list, vm_list)
8467                 kvm_for_each_vcpu(i, vcpu, kvm)
8468                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8469         atomic_set(&kvm_guest_has_master_clock, 0);
8470         mutex_unlock(&kvm_lock);
8471 }
8472
8473 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8474
8475 /*
8476  * Indirection to move queue_work() out of the tk_core.seq write held
8477  * region to prevent possible deadlocks against time accessors which
8478  * are invoked with work related locks held.
8479  */
8480 static void pvclock_irq_work_fn(struct irq_work *w)
8481 {
8482         queue_work(system_long_wq, &pvclock_gtod_work);
8483 }
8484
8485 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8486
8487 /*
8488  * Notification about pvclock gtod data update.
8489  */
8490 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8491                                void *priv)
8492 {
8493         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8494         struct timekeeper *tk = priv;
8495
8496         update_pvclock_gtod(tk);
8497
8498         /*
8499          * Disable master clock if host does not trust, or does not use,
8500          * TSC based clocksource. Delegate queue_work() to irq_work as
8501          * this is invoked with tk_core.seq write held.
8502          */
8503         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8504             atomic_read(&kvm_guest_has_master_clock) != 0)
8505                 irq_work_queue(&pvclock_irq_work);
8506         return 0;
8507 }
8508
8509 static struct notifier_block pvclock_gtod_notifier = {
8510         .notifier_call = pvclock_gtod_notify,
8511 };
8512 #endif
8513
8514 int kvm_arch_init(void *opaque)
8515 {
8516         struct kvm_x86_init_ops *ops = opaque;
8517         int r;
8518
8519         if (kvm_x86_ops.hardware_enable) {
8520                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8521                 r = -EEXIST;
8522                 goto out;
8523         }
8524
8525         if (!ops->cpu_has_kvm_support()) {
8526                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8527                                    ops->runtime_ops->name);
8528                 r = -EOPNOTSUPP;
8529                 goto out;
8530         }
8531         if (ops->disabled_by_bios()) {
8532                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8533                                    ops->runtime_ops->name);
8534                 r = -EOPNOTSUPP;
8535                 goto out;
8536         }
8537
8538         /*
8539          * KVM explicitly assumes that the guest has an FPU and
8540          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8541          * vCPU's FPU state as a fxregs_state struct.
8542          */
8543         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8544                 printk(KERN_ERR "kvm: inadequate fpu\n");
8545                 r = -EOPNOTSUPP;
8546                 goto out;
8547         }
8548
8549         r = -ENOMEM;
8550
8551         x86_emulator_cache = kvm_alloc_emulator_cache();
8552         if (!x86_emulator_cache) {
8553                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8554                 goto out;
8555         }
8556
8557         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8558         if (!user_return_msrs) {
8559                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8560                 goto out_free_x86_emulator_cache;
8561         }
8562         kvm_nr_uret_msrs = 0;
8563
8564         r = kvm_mmu_module_init();
8565         if (r)
8566                 goto out_free_percpu;
8567
8568         kvm_timer_init();
8569
8570         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8571
8572         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8573                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8574                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8575         }
8576
8577         if (pi_inject_timer == -1)
8578                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8579 #ifdef CONFIG_X86_64
8580         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8581
8582         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8583                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8584 #endif
8585
8586         return 0;
8587
8588 out_free_percpu:
8589         free_percpu(user_return_msrs);
8590 out_free_x86_emulator_cache:
8591         kmem_cache_destroy(x86_emulator_cache);
8592 out:
8593         return r;
8594 }
8595
8596 void kvm_arch_exit(void)
8597 {
8598 #ifdef CONFIG_X86_64
8599         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8600                 clear_hv_tscchange_cb();
8601 #endif
8602         kvm_lapic_exit();
8603         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8604
8605         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8606                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8607                                             CPUFREQ_TRANSITION_NOTIFIER);
8608         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8609 #ifdef CONFIG_X86_64
8610         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8611         irq_work_sync(&pvclock_irq_work);
8612         cancel_work_sync(&pvclock_gtod_work);
8613 #endif
8614         kvm_x86_ops.hardware_enable = NULL;
8615         kvm_mmu_module_exit();
8616         free_percpu(user_return_msrs);
8617         kmem_cache_destroy(x86_emulator_cache);
8618 #ifdef CONFIG_KVM_XEN
8619         static_key_deferred_flush(&kvm_xen_enabled);
8620         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8621 #endif
8622 }
8623
8624 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8625 {
8626         ++vcpu->stat.halt_exits;
8627         if (lapic_in_kernel(vcpu)) {
8628                 vcpu->arch.mp_state = state;
8629                 return 1;
8630         } else {
8631                 vcpu->run->exit_reason = reason;
8632                 return 0;
8633         }
8634 }
8635
8636 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8637 {
8638         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8639 }
8640 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8641
8642 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8643 {
8644         int ret = kvm_skip_emulated_instruction(vcpu);
8645         /*
8646          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8647          * KVM_EXIT_DEBUG here.
8648          */
8649         return kvm_vcpu_halt(vcpu) && ret;
8650 }
8651 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8652
8653 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8654 {
8655         int ret = kvm_skip_emulated_instruction(vcpu);
8656
8657         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8658 }
8659 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8660
8661 #ifdef CONFIG_X86_64
8662 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8663                                 unsigned long clock_type)
8664 {
8665         struct kvm_clock_pairing clock_pairing;
8666         struct timespec64 ts;
8667         u64 cycle;
8668         int ret;
8669
8670         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8671                 return -KVM_EOPNOTSUPP;
8672
8673         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8674                 return -KVM_EOPNOTSUPP;
8675
8676         clock_pairing.sec = ts.tv_sec;
8677         clock_pairing.nsec = ts.tv_nsec;
8678         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8679         clock_pairing.flags = 0;
8680         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8681
8682         ret = 0;
8683         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8684                             sizeof(struct kvm_clock_pairing)))
8685                 ret = -KVM_EFAULT;
8686
8687         return ret;
8688 }
8689 #endif
8690
8691 /*
8692  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8693  *
8694  * @apicid - apicid of vcpu to be kicked.
8695  */
8696 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8697 {
8698         struct kvm_lapic_irq lapic_irq;
8699
8700         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8701         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8702         lapic_irq.level = 0;
8703         lapic_irq.dest_id = apicid;
8704         lapic_irq.msi_redir_hint = false;
8705
8706         lapic_irq.delivery_mode = APIC_DM_REMRD;
8707         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8708 }
8709
8710 bool kvm_apicv_activated(struct kvm *kvm)
8711 {
8712         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8713 }
8714 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8715
8716 static void kvm_apicv_init(struct kvm *kvm)
8717 {
8718         init_rwsem(&kvm->arch.apicv_update_lock);
8719
8720         if (enable_apicv)
8721                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8722                           &kvm->arch.apicv_inhibit_reasons);
8723         else
8724                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8725                         &kvm->arch.apicv_inhibit_reasons);
8726 }
8727
8728 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8729 {
8730         struct kvm_vcpu *target = NULL;
8731         struct kvm_apic_map *map;
8732
8733         vcpu->stat.directed_yield_attempted++;
8734
8735         if (single_task_running())
8736                 goto no_yield;
8737
8738         rcu_read_lock();
8739         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8740
8741         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8742                 target = map->phys_map[dest_id]->vcpu;
8743
8744         rcu_read_unlock();
8745
8746         if (!target || !READ_ONCE(target->ready))
8747                 goto no_yield;
8748
8749         /* Ignore requests to yield to self */
8750         if (vcpu == target)
8751                 goto no_yield;
8752
8753         if (kvm_vcpu_yield_to(target) <= 0)
8754                 goto no_yield;
8755
8756         vcpu->stat.directed_yield_successful++;
8757
8758 no_yield:
8759         return;
8760 }
8761
8762 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8763 {
8764         u64 ret = vcpu->run->hypercall.ret;
8765
8766         if (!is_64_bit_mode(vcpu))
8767                 ret = (u32)ret;
8768         kvm_rax_write(vcpu, ret);
8769         ++vcpu->stat.hypercalls;
8770         return kvm_skip_emulated_instruction(vcpu);
8771 }
8772
8773 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8774 {
8775         unsigned long nr, a0, a1, a2, a3, ret;
8776         int op_64_bit;
8777
8778         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8779                 return kvm_xen_hypercall(vcpu);
8780
8781         if (kvm_hv_hypercall_enabled(vcpu))
8782                 return kvm_hv_hypercall(vcpu);
8783
8784         nr = kvm_rax_read(vcpu);
8785         a0 = kvm_rbx_read(vcpu);
8786         a1 = kvm_rcx_read(vcpu);
8787         a2 = kvm_rdx_read(vcpu);
8788         a3 = kvm_rsi_read(vcpu);
8789
8790         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8791
8792         op_64_bit = is_64_bit_mode(vcpu);
8793         if (!op_64_bit) {
8794                 nr &= 0xFFFFFFFF;
8795                 a0 &= 0xFFFFFFFF;
8796                 a1 &= 0xFFFFFFFF;
8797                 a2 &= 0xFFFFFFFF;
8798                 a3 &= 0xFFFFFFFF;
8799         }
8800
8801         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8802                 ret = -KVM_EPERM;
8803                 goto out;
8804         }
8805
8806         ret = -KVM_ENOSYS;
8807
8808         switch (nr) {
8809         case KVM_HC_VAPIC_POLL_IRQ:
8810                 ret = 0;
8811                 break;
8812         case KVM_HC_KICK_CPU:
8813                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8814                         break;
8815
8816                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8817                 kvm_sched_yield(vcpu, a1);
8818                 ret = 0;
8819                 break;
8820 #ifdef CONFIG_X86_64
8821         case KVM_HC_CLOCK_PAIRING:
8822                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8823                 break;
8824 #endif
8825         case KVM_HC_SEND_IPI:
8826                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8827                         break;
8828
8829                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8830                 break;
8831         case KVM_HC_SCHED_YIELD:
8832                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8833                         break;
8834
8835                 kvm_sched_yield(vcpu, a0);
8836                 ret = 0;
8837                 break;
8838         case KVM_HC_MAP_GPA_RANGE: {
8839                 u64 gpa = a0, npages = a1, attrs = a2;
8840
8841                 ret = -KVM_ENOSYS;
8842                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
8843                         break;
8844
8845                 if (!PAGE_ALIGNED(gpa) || !npages ||
8846                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
8847                         ret = -KVM_EINVAL;
8848                         break;
8849                 }
8850
8851                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
8852                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
8853                 vcpu->run->hypercall.args[0]  = gpa;
8854                 vcpu->run->hypercall.args[1]  = npages;
8855                 vcpu->run->hypercall.args[2]  = attrs;
8856                 vcpu->run->hypercall.longmode = op_64_bit;
8857                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
8858                 return 0;
8859         }
8860         default:
8861                 ret = -KVM_ENOSYS;
8862                 break;
8863         }
8864 out:
8865         if (!op_64_bit)
8866                 ret = (u32)ret;
8867         kvm_rax_write(vcpu, ret);
8868
8869         ++vcpu->stat.hypercalls;
8870         return kvm_skip_emulated_instruction(vcpu);
8871 }
8872 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8873
8874 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8875 {
8876         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8877         char instruction[3];
8878         unsigned long rip = kvm_rip_read(vcpu);
8879
8880         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8881
8882         return emulator_write_emulated(ctxt, rip, instruction, 3,
8883                 &ctxt->exception);
8884 }
8885
8886 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8887 {
8888         return vcpu->run->request_interrupt_window &&
8889                 likely(!pic_in_kernel(vcpu->kvm));
8890 }
8891
8892 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8893 {
8894         struct kvm_run *kvm_run = vcpu->run;
8895
8896         /*
8897          * if_flag is obsolete and useless, so do not bother
8898          * setting it for SEV-ES guests.  Userspace can just
8899          * use kvm_run->ready_for_interrupt_injection.
8900          */
8901         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8902                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8903
8904         kvm_run->cr8 = kvm_get_cr8(vcpu);
8905         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8906
8907         /*
8908          * The call to kvm_ready_for_interrupt_injection() may end up in
8909          * kvm_xen_has_interrupt() which may require the srcu lock to be
8910          * held, to protect against changes in the vcpu_info address.
8911          */
8912         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8913         kvm_run->ready_for_interrupt_injection =
8914                 pic_in_kernel(vcpu->kvm) ||
8915                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8916         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8917
8918         if (is_smm(vcpu))
8919                 kvm_run->flags |= KVM_RUN_X86_SMM;
8920 }
8921
8922 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8923 {
8924         int max_irr, tpr;
8925
8926         if (!kvm_x86_ops.update_cr8_intercept)
8927                 return;
8928
8929         if (!lapic_in_kernel(vcpu))
8930                 return;
8931
8932         if (vcpu->arch.apicv_active)
8933                 return;
8934
8935         if (!vcpu->arch.apic->vapic_addr)
8936                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8937         else
8938                 max_irr = -1;
8939
8940         if (max_irr != -1)
8941                 max_irr >>= 4;
8942
8943         tpr = kvm_lapic_get_cr8(vcpu);
8944
8945         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8946 }
8947
8948
8949 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8950 {
8951         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8952                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8953                 return 1;
8954         }
8955
8956         return kvm_x86_ops.nested_ops->check_events(vcpu);
8957 }
8958
8959 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8960 {
8961         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8962                 vcpu->arch.exception.error_code = false;
8963         static_call(kvm_x86_queue_exception)(vcpu);
8964 }
8965
8966 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8967 {
8968         int r;
8969         bool can_inject = true;
8970
8971         /* try to reinject previous events if any */
8972
8973         if (vcpu->arch.exception.injected) {
8974                 kvm_inject_exception(vcpu);
8975                 can_inject = false;
8976         }
8977         /*
8978          * Do not inject an NMI or interrupt if there is a pending
8979          * exception.  Exceptions and interrupts are recognized at
8980          * instruction boundaries, i.e. the start of an instruction.
8981          * Trap-like exceptions, e.g. #DB, have higher priority than
8982          * NMIs and interrupts, i.e. traps are recognized before an
8983          * NMI/interrupt that's pending on the same instruction.
8984          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8985          * priority, but are only generated (pended) during instruction
8986          * execution, i.e. a pending fault-like exception means the
8987          * fault occurred on the *previous* instruction and must be
8988          * serviced prior to recognizing any new events in order to
8989          * fully complete the previous instruction.
8990          */
8991         else if (!vcpu->arch.exception.pending) {
8992                 if (vcpu->arch.nmi_injected) {
8993                         static_call(kvm_x86_set_nmi)(vcpu);
8994                         can_inject = false;
8995                 } else if (vcpu->arch.interrupt.injected) {
8996                         static_call(kvm_x86_set_irq)(vcpu);
8997                         can_inject = false;
8998                 }
8999         }
9000
9001         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9002                      vcpu->arch.exception.pending);
9003
9004         /*
9005          * Call check_nested_events() even if we reinjected a previous event
9006          * in order for caller to determine if it should require immediate-exit
9007          * from L2 to L1 due to pending L1 events which require exit
9008          * from L2 to L1.
9009          */
9010         if (is_guest_mode(vcpu)) {
9011                 r = kvm_check_nested_events(vcpu);
9012                 if (r < 0)
9013                         goto out;
9014         }
9015
9016         /* try to inject new event if pending */
9017         if (vcpu->arch.exception.pending) {
9018                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9019                                         vcpu->arch.exception.has_error_code,
9020                                         vcpu->arch.exception.error_code);
9021
9022                 vcpu->arch.exception.pending = false;
9023                 vcpu->arch.exception.injected = true;
9024
9025                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9026                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9027                                              X86_EFLAGS_RF);
9028
9029                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9030                         kvm_deliver_exception_payload(vcpu);
9031                         if (vcpu->arch.dr7 & DR7_GD) {
9032                                 vcpu->arch.dr7 &= ~DR7_GD;
9033                                 kvm_update_dr7(vcpu);
9034                         }
9035                 }
9036
9037                 kvm_inject_exception(vcpu);
9038                 can_inject = false;
9039         }
9040
9041         /* Don't inject interrupts if the user asked to avoid doing so */
9042         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9043                 return 0;
9044
9045         /*
9046          * Finally, inject interrupt events.  If an event cannot be injected
9047          * due to architectural conditions (e.g. IF=0) a window-open exit
9048          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9049          * and can architecturally be injected, but we cannot do it right now:
9050          * an interrupt could have arrived just now and we have to inject it
9051          * as a vmexit, or there could already an event in the queue, which is
9052          * indicated by can_inject.  In that case we request an immediate exit
9053          * in order to make progress and get back here for another iteration.
9054          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9055          */
9056         if (vcpu->arch.smi_pending) {
9057                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9058                 if (r < 0)
9059                         goto out;
9060                 if (r) {
9061                         vcpu->arch.smi_pending = false;
9062                         ++vcpu->arch.smi_count;
9063                         enter_smm(vcpu);
9064                         can_inject = false;
9065                 } else
9066                         static_call(kvm_x86_enable_smi_window)(vcpu);
9067         }
9068
9069         if (vcpu->arch.nmi_pending) {
9070                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9071                 if (r < 0)
9072                         goto out;
9073                 if (r) {
9074                         --vcpu->arch.nmi_pending;
9075                         vcpu->arch.nmi_injected = true;
9076                         static_call(kvm_x86_set_nmi)(vcpu);
9077                         can_inject = false;
9078                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9079                 }
9080                 if (vcpu->arch.nmi_pending)
9081                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9082         }
9083
9084         if (kvm_cpu_has_injectable_intr(vcpu)) {
9085                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9086                 if (r < 0)
9087                         goto out;
9088                 if (r) {
9089                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9090                         static_call(kvm_x86_set_irq)(vcpu);
9091                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9092                 }
9093                 if (kvm_cpu_has_injectable_intr(vcpu))
9094                         static_call(kvm_x86_enable_irq_window)(vcpu);
9095         }
9096
9097         if (is_guest_mode(vcpu) &&
9098             kvm_x86_ops.nested_ops->hv_timer_pending &&
9099             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9100                 *req_immediate_exit = true;
9101
9102         WARN_ON(vcpu->arch.exception.pending);
9103         return 0;
9104
9105 out:
9106         if (r == -EBUSY) {
9107                 *req_immediate_exit = true;
9108                 r = 0;
9109         }
9110         return r;
9111 }
9112
9113 static void process_nmi(struct kvm_vcpu *vcpu)
9114 {
9115         unsigned limit = 2;
9116
9117         /*
9118          * x86 is limited to one NMI running, and one NMI pending after it.
9119          * If an NMI is already in progress, limit further NMIs to just one.
9120          * Otherwise, allow two (and we'll inject the first one immediately).
9121          */
9122         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9123                 limit = 1;
9124
9125         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9126         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9127         kvm_make_request(KVM_REQ_EVENT, vcpu);
9128 }
9129
9130 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9131 {
9132         u32 flags = 0;
9133         flags |= seg->g       << 23;
9134         flags |= seg->db      << 22;
9135         flags |= seg->l       << 21;
9136         flags |= seg->avl     << 20;
9137         flags |= seg->present << 15;
9138         flags |= seg->dpl     << 13;
9139         flags |= seg->s       << 12;
9140         flags |= seg->type    << 8;
9141         return flags;
9142 }
9143
9144 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9145 {
9146         struct kvm_segment seg;
9147         int offset;
9148
9149         kvm_get_segment(vcpu, &seg, n);
9150         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9151
9152         if (n < 3)
9153                 offset = 0x7f84 + n * 12;
9154         else
9155                 offset = 0x7f2c + (n - 3) * 12;
9156
9157         put_smstate(u32, buf, offset + 8, seg.base);
9158         put_smstate(u32, buf, offset + 4, seg.limit);
9159         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9160 }
9161
9162 #ifdef CONFIG_X86_64
9163 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9164 {
9165         struct kvm_segment seg;
9166         int offset;
9167         u16 flags;
9168
9169         kvm_get_segment(vcpu, &seg, n);
9170         offset = 0x7e00 + n * 16;
9171
9172         flags = enter_smm_get_segment_flags(&seg) >> 8;
9173         put_smstate(u16, buf, offset, seg.selector);
9174         put_smstate(u16, buf, offset + 2, flags);
9175         put_smstate(u32, buf, offset + 4, seg.limit);
9176         put_smstate(u64, buf, offset + 8, seg.base);
9177 }
9178 #endif
9179
9180 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9181 {
9182         struct desc_ptr dt;
9183         struct kvm_segment seg;
9184         unsigned long val;
9185         int i;
9186
9187         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9188         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9189         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9190         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9191
9192         for (i = 0; i < 8; i++)
9193                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9194
9195         kvm_get_dr(vcpu, 6, &val);
9196         put_smstate(u32, buf, 0x7fcc, (u32)val);
9197         kvm_get_dr(vcpu, 7, &val);
9198         put_smstate(u32, buf, 0x7fc8, (u32)val);
9199
9200         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9201         put_smstate(u32, buf, 0x7fc4, seg.selector);
9202         put_smstate(u32, buf, 0x7f64, seg.base);
9203         put_smstate(u32, buf, 0x7f60, seg.limit);
9204         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9205
9206         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9207         put_smstate(u32, buf, 0x7fc0, seg.selector);
9208         put_smstate(u32, buf, 0x7f80, seg.base);
9209         put_smstate(u32, buf, 0x7f7c, seg.limit);
9210         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9211
9212         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9213         put_smstate(u32, buf, 0x7f74, dt.address);
9214         put_smstate(u32, buf, 0x7f70, dt.size);
9215
9216         static_call(kvm_x86_get_idt)(vcpu, &dt);
9217         put_smstate(u32, buf, 0x7f58, dt.address);
9218         put_smstate(u32, buf, 0x7f54, dt.size);
9219
9220         for (i = 0; i < 6; i++)
9221                 enter_smm_save_seg_32(vcpu, buf, i);
9222
9223         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9224
9225         /* revision id */
9226         put_smstate(u32, buf, 0x7efc, 0x00020000);
9227         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9228 }
9229
9230 #ifdef CONFIG_X86_64
9231 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9232 {
9233         struct desc_ptr dt;
9234         struct kvm_segment seg;
9235         unsigned long val;
9236         int i;
9237
9238         for (i = 0; i < 16; i++)
9239                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9240
9241         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9242         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9243
9244         kvm_get_dr(vcpu, 6, &val);
9245         put_smstate(u64, buf, 0x7f68, val);
9246         kvm_get_dr(vcpu, 7, &val);
9247         put_smstate(u64, buf, 0x7f60, val);
9248
9249         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9250         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9251         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9252
9253         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9254
9255         /* revision id */
9256         put_smstate(u32, buf, 0x7efc, 0x00020064);
9257
9258         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9259
9260         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9261         put_smstate(u16, buf, 0x7e90, seg.selector);
9262         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9263         put_smstate(u32, buf, 0x7e94, seg.limit);
9264         put_smstate(u64, buf, 0x7e98, seg.base);
9265
9266         static_call(kvm_x86_get_idt)(vcpu, &dt);
9267         put_smstate(u32, buf, 0x7e84, dt.size);
9268         put_smstate(u64, buf, 0x7e88, dt.address);
9269
9270         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9271         put_smstate(u16, buf, 0x7e70, seg.selector);
9272         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9273         put_smstate(u32, buf, 0x7e74, seg.limit);
9274         put_smstate(u64, buf, 0x7e78, seg.base);
9275
9276         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9277         put_smstate(u32, buf, 0x7e64, dt.size);
9278         put_smstate(u64, buf, 0x7e68, dt.address);
9279
9280         for (i = 0; i < 6; i++)
9281                 enter_smm_save_seg_64(vcpu, buf, i);
9282 }
9283 #endif
9284
9285 static void enter_smm(struct kvm_vcpu *vcpu)
9286 {
9287         struct kvm_segment cs, ds;
9288         struct desc_ptr dt;
9289         unsigned long cr0;
9290         char buf[512];
9291
9292         memset(buf, 0, 512);
9293 #ifdef CONFIG_X86_64
9294         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9295                 enter_smm_save_state_64(vcpu, buf);
9296         else
9297 #endif
9298                 enter_smm_save_state_32(vcpu, buf);
9299
9300         /*
9301          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9302          * state (e.g. leave guest mode) after we've saved the state into the
9303          * SMM state-save area.
9304          */
9305         static_call(kvm_x86_enter_smm)(vcpu, buf);
9306
9307         kvm_smm_changed(vcpu, true);
9308         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9309
9310         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9311                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9312         else
9313                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9314
9315         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9316         kvm_rip_write(vcpu, 0x8000);
9317
9318         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9319         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9320         vcpu->arch.cr0 = cr0;
9321
9322         static_call(kvm_x86_set_cr4)(vcpu, 0);
9323
9324         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9325         dt.address = dt.size = 0;
9326         static_call(kvm_x86_set_idt)(vcpu, &dt);
9327
9328         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9329
9330         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9331         cs.base = vcpu->arch.smbase;
9332
9333         ds.selector = 0;
9334         ds.base = 0;
9335
9336         cs.limit    = ds.limit = 0xffffffff;
9337         cs.type     = ds.type = 0x3;
9338         cs.dpl      = ds.dpl = 0;
9339         cs.db       = ds.db = 0;
9340         cs.s        = ds.s = 1;
9341         cs.l        = ds.l = 0;
9342         cs.g        = ds.g = 1;
9343         cs.avl      = ds.avl = 0;
9344         cs.present  = ds.present = 1;
9345         cs.unusable = ds.unusable = 0;
9346         cs.padding  = ds.padding = 0;
9347
9348         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9349         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9350         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9351         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9352         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9353         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9354
9355 #ifdef CONFIG_X86_64
9356         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9357                 static_call(kvm_x86_set_efer)(vcpu, 0);
9358 #endif
9359
9360         kvm_update_cpuid_runtime(vcpu);
9361         kvm_mmu_reset_context(vcpu);
9362 }
9363
9364 static void process_smi(struct kvm_vcpu *vcpu)
9365 {
9366         vcpu->arch.smi_pending = true;
9367         kvm_make_request(KVM_REQ_EVENT, vcpu);
9368 }
9369
9370 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9371                                        unsigned long *vcpu_bitmap)
9372 {
9373         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9374 }
9375
9376 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9377 {
9378         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9379 }
9380
9381 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9382 {
9383         bool activate;
9384
9385         if (!lapic_in_kernel(vcpu))
9386                 return;
9387
9388         down_read(&vcpu->kvm->arch.apicv_update_lock);
9389
9390         activate = kvm_apicv_activated(vcpu->kvm);
9391         if (vcpu->arch.apicv_active == activate)
9392                 goto out;
9393
9394         vcpu->arch.apicv_active = activate;
9395         kvm_apic_update_apicv(vcpu);
9396         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9397
9398         /*
9399          * When APICv gets disabled, we may still have injected interrupts
9400          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9401          * still active when the interrupt got accepted. Make sure
9402          * inject_pending_event() is called to check for that.
9403          */
9404         if (!vcpu->arch.apicv_active)
9405                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9406
9407 out:
9408         up_read(&vcpu->kvm->arch.apicv_update_lock);
9409 }
9410 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9411
9412 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9413 {
9414         unsigned long old, new;
9415
9416         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9417
9418         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9419             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9420                 return;
9421
9422         old = new = kvm->arch.apicv_inhibit_reasons;
9423
9424         if (activate)
9425                 __clear_bit(bit, &new);
9426         else
9427                 __set_bit(bit, &new);
9428
9429         if (!!old != !!new) {
9430                 trace_kvm_apicv_update_request(activate, bit);
9431                 /*
9432                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9433                  * false positives in the sanity check WARN in svm_vcpu_run().
9434                  * This task will wait for all vCPUs to ack the kick IRQ before
9435                  * updating apicv_inhibit_reasons, and all other vCPUs will
9436                  * block on acquiring apicv_update_lock so that vCPUs can't
9437                  * redo svm_vcpu_run() without seeing the new inhibit state.
9438                  *
9439                  * Note, holding apicv_update_lock and taking it in the read
9440                  * side (handling the request) also prevents other vCPUs from
9441                  * servicing the request with a stale apicv_inhibit_reasons.
9442                  */
9443                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9444                 kvm->arch.apicv_inhibit_reasons = new;
9445                 if (new) {
9446                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9447                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9448                 }
9449         } else
9450                 kvm->arch.apicv_inhibit_reasons = new;
9451 }
9452 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9453
9454 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9455 {
9456         down_write(&kvm->arch.apicv_update_lock);
9457         __kvm_request_apicv_update(kvm, activate, bit);
9458         up_write(&kvm->arch.apicv_update_lock);
9459 }
9460 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9461
9462 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9463 {
9464         if (!kvm_apic_present(vcpu))
9465                 return;
9466
9467         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9468
9469         if (irqchip_split(vcpu->kvm))
9470                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9471         else {
9472                 if (vcpu->arch.apicv_active)
9473                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9474                 if (ioapic_in_kernel(vcpu->kvm))
9475                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9476         }
9477
9478         if (is_guest_mode(vcpu))
9479                 vcpu->arch.load_eoi_exitmap_pending = true;
9480         else
9481                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9482 }
9483
9484 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9485 {
9486         u64 eoi_exit_bitmap[4];
9487
9488         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9489                 return;
9490
9491         if (to_hv_vcpu(vcpu))
9492                 bitmap_or((ulong *)eoi_exit_bitmap,
9493                           vcpu->arch.ioapic_handled_vectors,
9494                           to_hv_synic(vcpu)->vec_bitmap, 256);
9495
9496         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9497 }
9498
9499 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9500                                             unsigned long start, unsigned long end)
9501 {
9502         unsigned long apic_address;
9503
9504         /*
9505          * The physical address of apic access page is stored in the VMCS.
9506          * Update it when it becomes invalid.
9507          */
9508         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9509         if (start <= apic_address && apic_address < end)
9510                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9511 }
9512
9513 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9514 {
9515         if (!lapic_in_kernel(vcpu))
9516                 return;
9517
9518         if (!kvm_x86_ops.set_apic_access_page_addr)
9519                 return;
9520
9521         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9522 }
9523
9524 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9525 {
9526         smp_send_reschedule(vcpu->cpu);
9527 }
9528 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9529
9530 /*
9531  * Returns 1 to let vcpu_run() continue the guest execution loop without
9532  * exiting to the userspace.  Otherwise, the value will be returned to the
9533  * userspace.
9534  */
9535 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9536 {
9537         int r;
9538         bool req_int_win =
9539                 dm_request_for_irq_injection(vcpu) &&
9540                 kvm_cpu_accept_dm_intr(vcpu);
9541         fastpath_t exit_fastpath;
9542
9543         bool req_immediate_exit = false;
9544
9545         /* Forbid vmenter if vcpu dirty ring is soft-full */
9546         if (unlikely(vcpu->kvm->dirty_ring_size &&
9547                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9548                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9549                 trace_kvm_dirty_ring_exit(vcpu);
9550                 r = 0;
9551                 goto out;
9552         }
9553
9554         if (kvm_request_pending(vcpu)) {
9555                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9556                         r = -EIO;
9557                         goto out;
9558                 }
9559                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9560                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9561                                 r = 0;
9562                                 goto out;
9563                         }
9564                 }
9565                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9566                         kvm_mmu_unload(vcpu);
9567                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9568                         __kvm_migrate_timers(vcpu);
9569                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9570                         kvm_update_masterclock(vcpu->kvm);
9571                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9572                         kvm_gen_kvmclock_update(vcpu);
9573                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9574                         r = kvm_guest_time_update(vcpu);
9575                         if (unlikely(r))
9576                                 goto out;
9577                 }
9578                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9579                         kvm_mmu_sync_roots(vcpu);
9580                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9581                         kvm_mmu_load_pgd(vcpu);
9582                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9583                         kvm_vcpu_flush_tlb_all(vcpu);
9584
9585                         /* Flushing all ASIDs flushes the current ASID... */
9586                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9587                 }
9588                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9589                         kvm_vcpu_flush_tlb_current(vcpu);
9590                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9591                         kvm_vcpu_flush_tlb_guest(vcpu);
9592
9593                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9594                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9595                         r = 0;
9596                         goto out;
9597                 }
9598                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9599                         if (is_guest_mode(vcpu)) {
9600                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9601                         } else {
9602                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9603                                 vcpu->mmio_needed = 0;
9604                                 r = 0;
9605                                 goto out;
9606                         }
9607                 }
9608                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9609                         /* Page is swapped out. Do synthetic halt */
9610                         vcpu->arch.apf.halted = true;
9611                         r = 1;
9612                         goto out;
9613                 }
9614                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9615                         record_steal_time(vcpu);
9616                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9617                         process_smi(vcpu);
9618                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9619                         process_nmi(vcpu);
9620                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9621                         kvm_pmu_handle_event(vcpu);
9622                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9623                         kvm_pmu_deliver_pmi(vcpu);
9624                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9625                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9626                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9627                                      vcpu->arch.ioapic_handled_vectors)) {
9628                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9629                                 vcpu->run->eoi.vector =
9630                                                 vcpu->arch.pending_ioapic_eoi;
9631                                 r = 0;
9632                                 goto out;
9633                         }
9634                 }
9635                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9636                         vcpu_scan_ioapic(vcpu);
9637                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9638                         vcpu_load_eoi_exitmap(vcpu);
9639                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9640                         kvm_vcpu_reload_apic_access_page(vcpu);
9641                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9642                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9643                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9644                         r = 0;
9645                         goto out;
9646                 }
9647                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9648                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9649                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9650                         r = 0;
9651                         goto out;
9652                 }
9653                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9654                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9655
9656                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9657                         vcpu->run->hyperv = hv_vcpu->exit;
9658                         r = 0;
9659                         goto out;
9660                 }
9661
9662                 /*
9663                  * KVM_REQ_HV_STIMER has to be processed after
9664                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9665                  * depend on the guest clock being up-to-date
9666                  */
9667                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9668                         kvm_hv_process_stimers(vcpu);
9669                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9670                         kvm_vcpu_update_apicv(vcpu);
9671                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9672                         kvm_check_async_pf_completion(vcpu);
9673                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9674                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9675
9676                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9677                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9678         }
9679
9680         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9681             kvm_xen_has_interrupt(vcpu)) {
9682                 ++vcpu->stat.req_event;
9683                 r = kvm_apic_accept_events(vcpu);
9684                 if (r < 0) {
9685                         r = 0;
9686                         goto out;
9687                 }
9688                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9689                         r = 1;
9690                         goto out;
9691                 }
9692
9693                 r = inject_pending_event(vcpu, &req_immediate_exit);
9694                 if (r < 0) {
9695                         r = 0;
9696                         goto out;
9697                 }
9698                 if (req_int_win)
9699                         static_call(kvm_x86_enable_irq_window)(vcpu);
9700
9701                 if (kvm_lapic_enabled(vcpu)) {
9702                         update_cr8_intercept(vcpu);
9703                         kvm_lapic_sync_to_vapic(vcpu);
9704                 }
9705         }
9706
9707         r = kvm_mmu_reload(vcpu);
9708         if (unlikely(r)) {
9709                 goto cancel_injection;
9710         }
9711
9712         preempt_disable();
9713
9714         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9715
9716         /*
9717          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9718          * IPI are then delayed after guest entry, which ensures that they
9719          * result in virtual interrupt delivery.
9720          */
9721         local_irq_disable();
9722         vcpu->mode = IN_GUEST_MODE;
9723
9724         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9725
9726         /*
9727          * 1) We should set ->mode before checking ->requests.  Please see
9728          * the comment in kvm_vcpu_exiting_guest_mode().
9729          *
9730          * 2) For APICv, we should set ->mode before checking PID.ON. This
9731          * pairs with the memory barrier implicit in pi_test_and_set_on
9732          * (see vmx_deliver_posted_interrupt).
9733          *
9734          * 3) This also orders the write to mode from any reads to the page
9735          * tables done while the VCPU is running.  Please see the comment
9736          * in kvm_flush_remote_tlbs.
9737          */
9738         smp_mb__after_srcu_read_unlock();
9739
9740         /*
9741          * This handles the case where a posted interrupt was
9742          * notified with kvm_vcpu_kick.
9743          */
9744         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9745                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9746
9747         if (kvm_vcpu_exit_request(vcpu)) {
9748                 vcpu->mode = OUTSIDE_GUEST_MODE;
9749                 smp_wmb();
9750                 local_irq_enable();
9751                 preempt_enable();
9752                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9753                 r = 1;
9754                 goto cancel_injection;
9755         }
9756
9757         if (req_immediate_exit) {
9758                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9759                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9760         }
9761
9762         fpregs_assert_state_consistent();
9763         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9764                 switch_fpu_return();
9765
9766         if (unlikely(vcpu->arch.switch_db_regs)) {
9767                 set_debugreg(0, 7);
9768                 set_debugreg(vcpu->arch.eff_db[0], 0);
9769                 set_debugreg(vcpu->arch.eff_db[1], 1);
9770                 set_debugreg(vcpu->arch.eff_db[2], 2);
9771                 set_debugreg(vcpu->arch.eff_db[3], 3);
9772         } else if (unlikely(hw_breakpoint_active())) {
9773                 set_debugreg(0, 7);
9774         }
9775
9776         for (;;) {
9777                 /*
9778                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
9779                  * update must kick and wait for all vCPUs before toggling the
9780                  * per-VM state, and responsing vCPUs must wait for the update
9781                  * to complete before servicing KVM_REQ_APICV_UPDATE.
9782                  */
9783                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
9784
9785                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9786                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9787                         break;
9788
9789                 if (vcpu->arch.apicv_active)
9790                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9791
9792                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9793                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9794                         break;
9795                 }
9796         }
9797
9798         /*
9799          * Do this here before restoring debug registers on the host.  And
9800          * since we do this before handling the vmexit, a DR access vmexit
9801          * can (a) read the correct value of the debug registers, (b) set
9802          * KVM_DEBUGREG_WONT_EXIT again.
9803          */
9804         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9805                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9806                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9807                 kvm_update_dr0123(vcpu);
9808                 kvm_update_dr7(vcpu);
9809         }
9810
9811         /*
9812          * If the guest has used debug registers, at least dr7
9813          * will be disabled while returning to the host.
9814          * If we don't have active breakpoints in the host, we don't
9815          * care about the messed up debug address registers. But if
9816          * we have some of them active, restore the old state.
9817          */
9818         if (hw_breakpoint_active())
9819                 hw_breakpoint_restore();
9820
9821         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9822         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9823
9824         vcpu->mode = OUTSIDE_GUEST_MODE;
9825         smp_wmb();
9826
9827         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9828
9829         /*
9830          * Consume any pending interrupts, including the possible source of
9831          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9832          * An instruction is required after local_irq_enable() to fully unblock
9833          * interrupts on processors that implement an interrupt shadow, the
9834          * stat.exits increment will do nicely.
9835          */
9836         kvm_before_interrupt(vcpu);
9837         local_irq_enable();
9838         ++vcpu->stat.exits;
9839         local_irq_disable();
9840         kvm_after_interrupt(vcpu);
9841
9842         /*
9843          * Wait until after servicing IRQs to account guest time so that any
9844          * ticks that occurred while running the guest are properly accounted
9845          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9846          * of accounting via context tracking, but the loss of accuracy is
9847          * acceptable for all known use cases.
9848          */
9849         vtime_account_guest_exit();
9850
9851         if (lapic_in_kernel(vcpu)) {
9852                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9853                 if (delta != S64_MIN) {
9854                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9855                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9856                 }
9857         }
9858
9859         local_irq_enable();
9860         preempt_enable();
9861
9862         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9863
9864         /*
9865          * Profile KVM exit RIPs:
9866          */
9867         if (unlikely(prof_on == KVM_PROFILING)) {
9868                 unsigned long rip = kvm_rip_read(vcpu);
9869                 profile_hit(KVM_PROFILING, (void *)rip);
9870         }
9871
9872         if (unlikely(vcpu->arch.tsc_always_catchup))
9873                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9874
9875         if (vcpu->arch.apic_attention)
9876                 kvm_lapic_sync_from_vapic(vcpu);
9877
9878         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9879         return r;
9880
9881 cancel_injection:
9882         if (req_immediate_exit)
9883                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9884         static_call(kvm_x86_cancel_injection)(vcpu);
9885         if (unlikely(vcpu->arch.apic_attention))
9886                 kvm_lapic_sync_from_vapic(vcpu);
9887 out:
9888         return r;
9889 }
9890
9891 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9892 {
9893         if (!kvm_arch_vcpu_runnable(vcpu) &&
9894             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9895                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9896                 kvm_vcpu_block(vcpu);
9897                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9898
9899                 if (kvm_x86_ops.post_block)
9900                         static_call(kvm_x86_post_block)(vcpu);
9901
9902                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9903                         return 1;
9904         }
9905
9906         if (kvm_apic_accept_events(vcpu) < 0)
9907                 return 0;
9908         switch(vcpu->arch.mp_state) {
9909         case KVM_MP_STATE_HALTED:
9910         case KVM_MP_STATE_AP_RESET_HOLD:
9911                 vcpu->arch.pv.pv_unhalted = false;
9912                 vcpu->arch.mp_state =
9913                         KVM_MP_STATE_RUNNABLE;
9914                 fallthrough;
9915         case KVM_MP_STATE_RUNNABLE:
9916                 vcpu->arch.apf.halted = false;
9917                 break;
9918         case KVM_MP_STATE_INIT_RECEIVED:
9919                 break;
9920         default:
9921                 return -EINTR;
9922         }
9923         return 1;
9924 }
9925
9926 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9927 {
9928         if (is_guest_mode(vcpu))
9929                 kvm_check_nested_events(vcpu);
9930
9931         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9932                 !vcpu->arch.apf.halted);
9933 }
9934
9935 static int vcpu_run(struct kvm_vcpu *vcpu)
9936 {
9937         int r;
9938         struct kvm *kvm = vcpu->kvm;
9939
9940         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9941         vcpu->arch.l1tf_flush_l1d = true;
9942
9943         for (;;) {
9944                 if (kvm_vcpu_running(vcpu)) {
9945                         r = vcpu_enter_guest(vcpu);
9946                 } else {
9947                         r = vcpu_block(kvm, vcpu);
9948                 }
9949
9950                 if (r <= 0)
9951                         break;
9952
9953                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
9954                 if (kvm_cpu_has_pending_timer(vcpu))
9955                         kvm_inject_pending_timer_irqs(vcpu);
9956
9957                 if (dm_request_for_irq_injection(vcpu) &&
9958                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9959                         r = 0;
9960                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9961                         ++vcpu->stat.request_irq_exits;
9962                         break;
9963                 }
9964
9965                 if (__xfer_to_guest_mode_work_pending()) {
9966                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9967                         r = xfer_to_guest_mode_handle_work(vcpu);
9968                         if (r)
9969                                 return r;
9970                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9971                 }
9972         }
9973
9974         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9975
9976         return r;
9977 }
9978
9979 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9980 {
9981         int r;
9982
9983         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9984         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9985         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9986         return r;
9987 }
9988
9989 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9990 {
9991         BUG_ON(!vcpu->arch.pio.count);
9992
9993         return complete_emulated_io(vcpu);
9994 }
9995
9996 /*
9997  * Implements the following, as a state machine:
9998  *
9999  * read:
10000  *   for each fragment
10001  *     for each mmio piece in the fragment
10002  *       write gpa, len
10003  *       exit
10004  *       copy data
10005  *   execute insn
10006  *
10007  * write:
10008  *   for each fragment
10009  *     for each mmio piece in the fragment
10010  *       write gpa, len
10011  *       copy data
10012  *       exit
10013  */
10014 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10015 {
10016         struct kvm_run *run = vcpu->run;
10017         struct kvm_mmio_fragment *frag;
10018         unsigned len;
10019
10020         BUG_ON(!vcpu->mmio_needed);
10021
10022         /* Complete previous fragment */
10023         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10024         len = min(8u, frag->len);
10025         if (!vcpu->mmio_is_write)
10026                 memcpy(frag->data, run->mmio.data, len);
10027
10028         if (frag->len <= 8) {
10029                 /* Switch to the next fragment. */
10030                 frag++;
10031                 vcpu->mmio_cur_fragment++;
10032         } else {
10033                 /* Go forward to the next mmio piece. */
10034                 frag->data += len;
10035                 frag->gpa += len;
10036                 frag->len -= len;
10037         }
10038
10039         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10040                 vcpu->mmio_needed = 0;
10041
10042                 /* FIXME: return into emulator if single-stepping.  */
10043                 if (vcpu->mmio_is_write)
10044                         return 1;
10045                 vcpu->mmio_read_completed = 1;
10046                 return complete_emulated_io(vcpu);
10047         }
10048
10049         run->exit_reason = KVM_EXIT_MMIO;
10050         run->mmio.phys_addr = frag->gpa;
10051         if (vcpu->mmio_is_write)
10052                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10053         run->mmio.len = min(8u, frag->len);
10054         run->mmio.is_write = vcpu->mmio_is_write;
10055         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10056         return 0;
10057 }
10058
10059 /* Swap (qemu) user FPU context for the guest FPU context. */
10060 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10061 {
10062         /*
10063          * Exclude PKRU from restore as restored separately in
10064          * kvm_x86_ops.run().
10065          */
10066         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10067         trace_kvm_fpu(1);
10068 }
10069
10070 /* When vcpu_run ends, restore user space FPU context. */
10071 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10072 {
10073         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10074         ++vcpu->stat.fpu_reload;
10075         trace_kvm_fpu(0);
10076 }
10077
10078 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10079 {
10080         struct kvm_run *kvm_run = vcpu->run;
10081         int r;
10082
10083         vcpu_load(vcpu);
10084         kvm_sigset_activate(vcpu);
10085         kvm_run->flags = 0;
10086         kvm_load_guest_fpu(vcpu);
10087
10088         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10089                 if (kvm_run->immediate_exit) {
10090                         r = -EINTR;
10091                         goto out;
10092                 }
10093                 kvm_vcpu_block(vcpu);
10094                 if (kvm_apic_accept_events(vcpu) < 0) {
10095                         r = 0;
10096                         goto out;
10097                 }
10098                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10099                 r = -EAGAIN;
10100                 if (signal_pending(current)) {
10101                         r = -EINTR;
10102                         kvm_run->exit_reason = KVM_EXIT_INTR;
10103                         ++vcpu->stat.signal_exits;
10104                 }
10105                 goto out;
10106         }
10107
10108         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10109             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10110                 r = -EINVAL;
10111                 goto out;
10112         }
10113
10114         if (kvm_run->kvm_dirty_regs) {
10115                 r = sync_regs(vcpu);
10116                 if (r != 0)
10117                         goto out;
10118         }
10119
10120         /* re-sync apic's tpr */
10121         if (!lapic_in_kernel(vcpu)) {
10122                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10123                         r = -EINVAL;
10124                         goto out;
10125                 }
10126         }
10127
10128         if (unlikely(vcpu->arch.complete_userspace_io)) {
10129                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10130                 vcpu->arch.complete_userspace_io = NULL;
10131                 r = cui(vcpu);
10132                 if (r <= 0)
10133                         goto out;
10134         } else
10135                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10136
10137         if (kvm_run->immediate_exit)
10138                 r = -EINTR;
10139         else
10140                 r = vcpu_run(vcpu);
10141
10142 out:
10143         kvm_put_guest_fpu(vcpu);
10144         if (kvm_run->kvm_valid_regs)
10145                 store_regs(vcpu);
10146         post_kvm_run_save(vcpu);
10147         kvm_sigset_deactivate(vcpu);
10148
10149         vcpu_put(vcpu);
10150         return r;
10151 }
10152
10153 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10154 {
10155         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10156                 /*
10157                  * We are here if userspace calls get_regs() in the middle of
10158                  * instruction emulation. Registers state needs to be copied
10159                  * back from emulation context to vcpu. Userspace shouldn't do
10160                  * that usually, but some bad designed PV devices (vmware
10161                  * backdoor interface) need this to work
10162                  */
10163                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10164                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10165         }
10166         regs->rax = kvm_rax_read(vcpu);
10167         regs->rbx = kvm_rbx_read(vcpu);
10168         regs->rcx = kvm_rcx_read(vcpu);
10169         regs->rdx = kvm_rdx_read(vcpu);
10170         regs->rsi = kvm_rsi_read(vcpu);
10171         regs->rdi = kvm_rdi_read(vcpu);
10172         regs->rsp = kvm_rsp_read(vcpu);
10173         regs->rbp = kvm_rbp_read(vcpu);
10174 #ifdef CONFIG_X86_64
10175         regs->r8 = kvm_r8_read(vcpu);
10176         regs->r9 = kvm_r9_read(vcpu);
10177         regs->r10 = kvm_r10_read(vcpu);
10178         regs->r11 = kvm_r11_read(vcpu);
10179         regs->r12 = kvm_r12_read(vcpu);
10180         regs->r13 = kvm_r13_read(vcpu);
10181         regs->r14 = kvm_r14_read(vcpu);
10182         regs->r15 = kvm_r15_read(vcpu);
10183 #endif
10184
10185         regs->rip = kvm_rip_read(vcpu);
10186         regs->rflags = kvm_get_rflags(vcpu);
10187 }
10188
10189 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10190 {
10191         vcpu_load(vcpu);
10192         __get_regs(vcpu, regs);
10193         vcpu_put(vcpu);
10194         return 0;
10195 }
10196
10197 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10198 {
10199         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10200         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10201
10202         kvm_rax_write(vcpu, regs->rax);
10203         kvm_rbx_write(vcpu, regs->rbx);
10204         kvm_rcx_write(vcpu, regs->rcx);
10205         kvm_rdx_write(vcpu, regs->rdx);
10206         kvm_rsi_write(vcpu, regs->rsi);
10207         kvm_rdi_write(vcpu, regs->rdi);
10208         kvm_rsp_write(vcpu, regs->rsp);
10209         kvm_rbp_write(vcpu, regs->rbp);
10210 #ifdef CONFIG_X86_64
10211         kvm_r8_write(vcpu, regs->r8);
10212         kvm_r9_write(vcpu, regs->r9);
10213         kvm_r10_write(vcpu, regs->r10);
10214         kvm_r11_write(vcpu, regs->r11);
10215         kvm_r12_write(vcpu, regs->r12);
10216         kvm_r13_write(vcpu, regs->r13);
10217         kvm_r14_write(vcpu, regs->r14);
10218         kvm_r15_write(vcpu, regs->r15);
10219 #endif
10220
10221         kvm_rip_write(vcpu, regs->rip);
10222         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10223
10224         vcpu->arch.exception.pending = false;
10225
10226         kvm_make_request(KVM_REQ_EVENT, vcpu);
10227 }
10228
10229 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10230 {
10231         vcpu_load(vcpu);
10232         __set_regs(vcpu, regs);
10233         vcpu_put(vcpu);
10234         return 0;
10235 }
10236
10237 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10238 {
10239         struct kvm_segment cs;
10240
10241         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10242         *db = cs.db;
10243         *l = cs.l;
10244 }
10245 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10246
10247 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10248 {
10249         struct desc_ptr dt;
10250
10251         if (vcpu->arch.guest_state_protected)
10252                 goto skip_protected_regs;
10253
10254         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10255         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10256         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10257         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10258         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10259         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10260
10261         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10262         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10263
10264         static_call(kvm_x86_get_idt)(vcpu, &dt);
10265         sregs->idt.limit = dt.size;
10266         sregs->idt.base = dt.address;
10267         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10268         sregs->gdt.limit = dt.size;
10269         sregs->gdt.base = dt.address;
10270
10271         sregs->cr2 = vcpu->arch.cr2;
10272         sregs->cr3 = kvm_read_cr3(vcpu);
10273
10274 skip_protected_regs:
10275         sregs->cr0 = kvm_read_cr0(vcpu);
10276         sregs->cr4 = kvm_read_cr4(vcpu);
10277         sregs->cr8 = kvm_get_cr8(vcpu);
10278         sregs->efer = vcpu->arch.efer;
10279         sregs->apic_base = kvm_get_apic_base(vcpu);
10280 }
10281
10282 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10283 {
10284         __get_sregs_common(vcpu, sregs);
10285
10286         if (vcpu->arch.guest_state_protected)
10287                 return;
10288
10289         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10290                 set_bit(vcpu->arch.interrupt.nr,
10291                         (unsigned long *)sregs->interrupt_bitmap);
10292 }
10293
10294 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10295 {
10296         int i;
10297
10298         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10299
10300         if (vcpu->arch.guest_state_protected)
10301                 return;
10302
10303         if (is_pae_paging(vcpu)) {
10304                 for (i = 0 ; i < 4 ; i++)
10305                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10306                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10307         }
10308 }
10309
10310 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10311                                   struct kvm_sregs *sregs)
10312 {
10313         vcpu_load(vcpu);
10314         __get_sregs(vcpu, sregs);
10315         vcpu_put(vcpu);
10316         return 0;
10317 }
10318
10319 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10320                                     struct kvm_mp_state *mp_state)
10321 {
10322         int r;
10323
10324         vcpu_load(vcpu);
10325         if (kvm_mpx_supported())
10326                 kvm_load_guest_fpu(vcpu);
10327
10328         r = kvm_apic_accept_events(vcpu);
10329         if (r < 0)
10330                 goto out;
10331         r = 0;
10332
10333         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10334              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10335             vcpu->arch.pv.pv_unhalted)
10336                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10337         else
10338                 mp_state->mp_state = vcpu->arch.mp_state;
10339
10340 out:
10341         if (kvm_mpx_supported())
10342                 kvm_put_guest_fpu(vcpu);
10343         vcpu_put(vcpu);
10344         return r;
10345 }
10346
10347 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10348                                     struct kvm_mp_state *mp_state)
10349 {
10350         int ret = -EINVAL;
10351
10352         vcpu_load(vcpu);
10353
10354         if (!lapic_in_kernel(vcpu) &&
10355             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10356                 goto out;
10357
10358         /*
10359          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10360          * INIT state; latched init should be reported using
10361          * KVM_SET_VCPU_EVENTS, so reject it here.
10362          */
10363         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10364             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10365              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10366                 goto out;
10367
10368         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10369                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10370                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10371         } else
10372                 vcpu->arch.mp_state = mp_state->mp_state;
10373         kvm_make_request(KVM_REQ_EVENT, vcpu);
10374
10375         ret = 0;
10376 out:
10377         vcpu_put(vcpu);
10378         return ret;
10379 }
10380
10381 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10382                     int reason, bool has_error_code, u32 error_code)
10383 {
10384         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10385         int ret;
10386
10387         init_emulate_ctxt(vcpu);
10388
10389         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10390                                    has_error_code, error_code);
10391         if (ret) {
10392                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10393                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10394                 vcpu->run->internal.ndata = 0;
10395                 return 0;
10396         }
10397
10398         kvm_rip_write(vcpu, ctxt->eip);
10399         kvm_set_rflags(vcpu, ctxt->eflags);
10400         return 1;
10401 }
10402 EXPORT_SYMBOL_GPL(kvm_task_switch);
10403
10404 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10405 {
10406         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10407                 /*
10408                  * When EFER.LME and CR0.PG are set, the processor is in
10409                  * 64-bit mode (though maybe in a 32-bit code segment).
10410                  * CR4.PAE and EFER.LMA must be set.
10411                  */
10412                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10413                         return false;
10414                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10415                         return false;
10416         } else {
10417                 /*
10418                  * Not in 64-bit mode: EFER.LMA is clear and the code
10419                  * segment cannot be 64-bit.
10420                  */
10421                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10422                         return false;
10423         }
10424
10425         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10426 }
10427
10428 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10429                 int *mmu_reset_needed, bool update_pdptrs)
10430 {
10431         struct msr_data apic_base_msr;
10432         int idx;
10433         struct desc_ptr dt;
10434
10435         if (!kvm_is_valid_sregs(vcpu, sregs))
10436                 return -EINVAL;
10437
10438         apic_base_msr.data = sregs->apic_base;
10439         apic_base_msr.host_initiated = true;
10440         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10441                 return -EINVAL;
10442
10443         if (vcpu->arch.guest_state_protected)
10444                 return 0;
10445
10446         dt.size = sregs->idt.limit;
10447         dt.address = sregs->idt.base;
10448         static_call(kvm_x86_set_idt)(vcpu, &dt);
10449         dt.size = sregs->gdt.limit;
10450         dt.address = sregs->gdt.base;
10451         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10452
10453         vcpu->arch.cr2 = sregs->cr2;
10454         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10455         vcpu->arch.cr3 = sregs->cr3;
10456         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10457
10458         kvm_set_cr8(vcpu, sregs->cr8);
10459
10460         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10461         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10462
10463         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10464         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10465         vcpu->arch.cr0 = sregs->cr0;
10466
10467         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10468         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10469
10470         if (update_pdptrs) {
10471                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10472                 if (is_pae_paging(vcpu)) {
10473                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10474                         *mmu_reset_needed = 1;
10475                 }
10476                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10477         }
10478
10479         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10480         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10481         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10482         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10483         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10484         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10485
10486         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10487         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10488
10489         update_cr8_intercept(vcpu);
10490
10491         /* Older userspace won't unhalt the vcpu on reset. */
10492         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10493             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10494             !is_protmode(vcpu))
10495                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10496
10497         return 0;
10498 }
10499
10500 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10501 {
10502         int pending_vec, max_bits;
10503         int mmu_reset_needed = 0;
10504         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10505
10506         if (ret)
10507                 return ret;
10508
10509         if (mmu_reset_needed)
10510                 kvm_mmu_reset_context(vcpu);
10511
10512         max_bits = KVM_NR_INTERRUPTS;
10513         pending_vec = find_first_bit(
10514                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10515
10516         if (pending_vec < max_bits) {
10517                 kvm_queue_interrupt(vcpu, pending_vec, false);
10518                 pr_debug("Set back pending irq %d\n", pending_vec);
10519                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10520         }
10521         return 0;
10522 }
10523
10524 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10525 {
10526         int mmu_reset_needed = 0;
10527         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10528         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10529                 !(sregs2->efer & EFER_LMA);
10530         int i, ret;
10531
10532         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10533                 return -EINVAL;
10534
10535         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10536                 return -EINVAL;
10537
10538         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10539                                  &mmu_reset_needed, !valid_pdptrs);
10540         if (ret)
10541                 return ret;
10542
10543         if (valid_pdptrs) {
10544                 for (i = 0; i < 4 ; i++)
10545                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10546
10547                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10548                 mmu_reset_needed = 1;
10549                 vcpu->arch.pdptrs_from_userspace = true;
10550         }
10551         if (mmu_reset_needed)
10552                 kvm_mmu_reset_context(vcpu);
10553         return 0;
10554 }
10555
10556 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10557                                   struct kvm_sregs *sregs)
10558 {
10559         int ret;
10560
10561         vcpu_load(vcpu);
10562         ret = __set_sregs(vcpu, sregs);
10563         vcpu_put(vcpu);
10564         return ret;
10565 }
10566
10567 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10568                                         struct kvm_guest_debug *dbg)
10569 {
10570         unsigned long rflags;
10571         int i, r;
10572
10573         if (vcpu->arch.guest_state_protected)
10574                 return -EINVAL;
10575
10576         vcpu_load(vcpu);
10577
10578         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10579                 r = -EBUSY;
10580                 if (vcpu->arch.exception.pending)
10581                         goto out;
10582                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10583                         kvm_queue_exception(vcpu, DB_VECTOR);
10584                 else
10585                         kvm_queue_exception(vcpu, BP_VECTOR);
10586         }
10587
10588         /*
10589          * Read rflags as long as potentially injected trace flags are still
10590          * filtered out.
10591          */
10592         rflags = kvm_get_rflags(vcpu);
10593
10594         vcpu->guest_debug = dbg->control;
10595         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10596                 vcpu->guest_debug = 0;
10597
10598         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10599                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10600                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10601                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10602         } else {
10603                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10604                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10605         }
10606         kvm_update_dr7(vcpu);
10607
10608         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10609                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10610
10611         /*
10612          * Trigger an rflags update that will inject or remove the trace
10613          * flags.
10614          */
10615         kvm_set_rflags(vcpu, rflags);
10616
10617         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10618
10619         r = 0;
10620
10621 out:
10622         vcpu_put(vcpu);
10623         return r;
10624 }
10625
10626 /*
10627  * Translate a guest virtual address to a guest physical address.
10628  */
10629 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10630                                     struct kvm_translation *tr)
10631 {
10632         unsigned long vaddr = tr->linear_address;
10633         gpa_t gpa;
10634         int idx;
10635
10636         vcpu_load(vcpu);
10637
10638         idx = srcu_read_lock(&vcpu->kvm->srcu);
10639         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10640         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10641         tr->physical_address = gpa;
10642         tr->valid = gpa != UNMAPPED_GVA;
10643         tr->writeable = 1;
10644         tr->usermode = 0;
10645
10646         vcpu_put(vcpu);
10647         return 0;
10648 }
10649
10650 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10651 {
10652         struct fxregs_state *fxsave;
10653
10654         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10655                 return 0;
10656
10657         vcpu_load(vcpu);
10658
10659         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10660         memcpy(fpu->fpr, fxsave->st_space, 128);
10661         fpu->fcw = fxsave->cwd;
10662         fpu->fsw = fxsave->swd;
10663         fpu->ftwx = fxsave->twd;
10664         fpu->last_opcode = fxsave->fop;
10665         fpu->last_ip = fxsave->rip;
10666         fpu->last_dp = fxsave->rdp;
10667         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10668
10669         vcpu_put(vcpu);
10670         return 0;
10671 }
10672
10673 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10674 {
10675         struct fxregs_state *fxsave;
10676
10677         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10678                 return 0;
10679
10680         vcpu_load(vcpu);
10681
10682         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10683
10684         memcpy(fxsave->st_space, fpu->fpr, 128);
10685         fxsave->cwd = fpu->fcw;
10686         fxsave->swd = fpu->fsw;
10687         fxsave->twd = fpu->ftwx;
10688         fxsave->fop = fpu->last_opcode;
10689         fxsave->rip = fpu->last_ip;
10690         fxsave->rdp = fpu->last_dp;
10691         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10692
10693         vcpu_put(vcpu);
10694         return 0;
10695 }
10696
10697 static void store_regs(struct kvm_vcpu *vcpu)
10698 {
10699         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10700
10701         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10702                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10703
10704         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10705                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10706
10707         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10708                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10709                                 vcpu, &vcpu->run->s.regs.events);
10710 }
10711
10712 static int sync_regs(struct kvm_vcpu *vcpu)
10713 {
10714         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10715                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10716                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10717         }
10718         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10719                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10720                         return -EINVAL;
10721                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10722         }
10723         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10724                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10725                                 vcpu, &vcpu->run->s.regs.events))
10726                         return -EINVAL;
10727                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10728         }
10729
10730         return 0;
10731 }
10732
10733 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10734 {
10735         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10736                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10737                              "guest TSC will not be reliable\n");
10738
10739         return 0;
10740 }
10741
10742 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10743 {
10744         struct page *page;
10745         int r;
10746
10747         vcpu->arch.last_vmentry_cpu = -1;
10748         vcpu->arch.regs_avail = ~0;
10749         vcpu->arch.regs_dirty = ~0;
10750
10751         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10752                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10753         else
10754                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10755
10756         r = kvm_mmu_create(vcpu);
10757         if (r < 0)
10758                 return r;
10759
10760         if (irqchip_in_kernel(vcpu->kvm)) {
10761                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10762                 if (r < 0)
10763                         goto fail_mmu_destroy;
10764                 if (kvm_apicv_activated(vcpu->kvm))
10765                         vcpu->arch.apicv_active = true;
10766         } else
10767                 static_branch_inc(&kvm_has_noapic_vcpu);
10768
10769         r = -ENOMEM;
10770
10771         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10772         if (!page)
10773                 goto fail_free_lapic;
10774         vcpu->arch.pio_data = page_address(page);
10775
10776         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10777                                        GFP_KERNEL_ACCOUNT);
10778         if (!vcpu->arch.mce_banks)
10779                 goto fail_free_pio_data;
10780         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10781
10782         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10783                                 GFP_KERNEL_ACCOUNT))
10784                 goto fail_free_mce_banks;
10785
10786         if (!alloc_emulate_ctxt(vcpu))
10787                 goto free_wbinvd_dirty_mask;
10788
10789         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
10790                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10791                 goto free_emulate_ctxt;
10792         }
10793
10794         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10795         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10796
10797         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10798
10799         kvm_async_pf_hash_reset(vcpu);
10800         kvm_pmu_init(vcpu);
10801
10802         vcpu->arch.pending_external_vector = -1;
10803         vcpu->arch.preempted_in_kernel = false;
10804
10805 #if IS_ENABLED(CONFIG_HYPERV)
10806         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10807 #endif
10808
10809         r = static_call(kvm_x86_vcpu_create)(vcpu);
10810         if (r)
10811                 goto free_guest_fpu;
10812
10813         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10814         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10815         kvm_vcpu_mtrr_init(vcpu);
10816         vcpu_load(vcpu);
10817         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10818         kvm_vcpu_reset(vcpu, false);
10819         kvm_init_mmu(vcpu);
10820         vcpu_put(vcpu);
10821         return 0;
10822
10823 free_guest_fpu:
10824         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
10825 free_emulate_ctxt:
10826         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10827 free_wbinvd_dirty_mask:
10828         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10829 fail_free_mce_banks:
10830         kfree(vcpu->arch.mce_banks);
10831 fail_free_pio_data:
10832         free_page((unsigned long)vcpu->arch.pio_data);
10833 fail_free_lapic:
10834         kvm_free_lapic(vcpu);
10835 fail_mmu_destroy:
10836         kvm_mmu_destroy(vcpu);
10837         return r;
10838 }
10839
10840 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10841 {
10842         struct kvm *kvm = vcpu->kvm;
10843
10844         if (mutex_lock_killable(&vcpu->mutex))
10845                 return;
10846         vcpu_load(vcpu);
10847         kvm_synchronize_tsc(vcpu, 0);
10848         vcpu_put(vcpu);
10849
10850         /* poll control enabled by default */
10851         vcpu->arch.msr_kvm_poll_control = 1;
10852
10853         mutex_unlock(&vcpu->mutex);
10854
10855         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10856                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10857                                                 KVMCLOCK_SYNC_PERIOD);
10858 }
10859
10860 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10861 {
10862         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10863         int idx;
10864
10865         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10866
10867         kvmclock_reset(vcpu);
10868
10869         static_call(kvm_x86_vcpu_free)(vcpu);
10870
10871         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10872         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10873         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
10874
10875         kvm_hv_vcpu_uninit(vcpu);
10876         kvm_pmu_destroy(vcpu);
10877         kfree(vcpu->arch.mce_banks);
10878         kvm_free_lapic(vcpu);
10879         idx = srcu_read_lock(&vcpu->kvm->srcu);
10880         kvm_mmu_destroy(vcpu);
10881         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10882         free_page((unsigned long)vcpu->arch.pio_data);
10883         kvfree(vcpu->arch.cpuid_entries);
10884         if (!lapic_in_kernel(vcpu))
10885                 static_branch_dec(&kvm_has_noapic_vcpu);
10886 }
10887
10888 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10889 {
10890         struct kvm_cpuid_entry2 *cpuid_0x1;
10891         unsigned long old_cr0 = kvm_read_cr0(vcpu);
10892         unsigned long new_cr0;
10893
10894         /*
10895          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
10896          * to handle side effects.  RESET emulation hits those flows and relies
10897          * on emulated/virtualized registers, including those that are loaded
10898          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
10899          * to detect improper or missing initialization.
10900          */
10901         WARN_ON_ONCE(!init_event &&
10902                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
10903
10904         kvm_lapic_reset(vcpu, init_event);
10905
10906         vcpu->arch.hflags = 0;
10907
10908         vcpu->arch.smi_pending = 0;
10909         vcpu->arch.smi_count = 0;
10910         atomic_set(&vcpu->arch.nmi_queued, 0);
10911         vcpu->arch.nmi_pending = 0;
10912         vcpu->arch.nmi_injected = false;
10913         kvm_clear_interrupt_queue(vcpu);
10914         kvm_clear_exception_queue(vcpu);
10915
10916         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10917         kvm_update_dr0123(vcpu);
10918         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10919         vcpu->arch.dr7 = DR7_FIXED_1;
10920         kvm_update_dr7(vcpu);
10921
10922         vcpu->arch.cr2 = 0;
10923
10924         kvm_make_request(KVM_REQ_EVENT, vcpu);
10925         vcpu->arch.apf.msr_en_val = 0;
10926         vcpu->arch.apf.msr_int_val = 0;
10927         vcpu->arch.st.msr_val = 0;
10928
10929         kvmclock_reset(vcpu);
10930
10931         kvm_clear_async_pf_completion_queue(vcpu);
10932         kvm_async_pf_hash_reset(vcpu);
10933         vcpu->arch.apf.halted = false;
10934
10935         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
10936                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
10937
10938                 /*
10939                  * To avoid have the INIT path from kvm_apic_has_events() that be
10940                  * called with loaded FPU and does not let userspace fix the state.
10941                  */
10942                 if (init_event)
10943                         kvm_put_guest_fpu(vcpu);
10944
10945                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
10946                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
10947
10948                 if (init_event)
10949                         kvm_load_guest_fpu(vcpu);
10950         }
10951
10952         if (!init_event) {
10953                 kvm_pmu_reset(vcpu);
10954                 vcpu->arch.smbase = 0x30000;
10955
10956                 vcpu->arch.msr_misc_features_enables = 0;
10957
10958                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10959         }
10960
10961         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
10962         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10963         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
10964
10965         /*
10966          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
10967          * if no CPUID match is found.  Note, it's impossible to get a match at
10968          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
10969          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
10970          * on RESET.  But, go through the motions in case that's ever remedied.
10971          */
10972         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
10973         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
10974
10975         vcpu->arch.ia32_xss = 0;
10976
10977         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10978
10979         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
10980         kvm_rip_write(vcpu, 0xfff0);
10981
10982         vcpu->arch.cr3 = 0;
10983         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10984
10985         /*
10986          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
10987          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
10988          * (or qualify) that with a footnote stating that CD/NW are preserved.
10989          */
10990         new_cr0 = X86_CR0_ET;
10991         if (init_event)
10992                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
10993         else
10994                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
10995
10996         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
10997         static_call(kvm_x86_set_cr4)(vcpu, 0);
10998         static_call(kvm_x86_set_efer)(vcpu, 0);
10999         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11000
11001         /*
11002          * Reset the MMU context if paging was enabled prior to INIT (which is
11003          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11004          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11005          * checked because it is unconditionally cleared on INIT and all other
11006          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11007          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11008          */
11009         if (old_cr0 & X86_CR0_PG)
11010                 kvm_mmu_reset_context(vcpu);
11011
11012         /*
11013          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11014          * APM states the TLBs are untouched by INIT, but it also states that
11015          * the TLBs are flushed on "External initialization of the processor."
11016          * Flush the guest TLB regardless of vendor, there is no meaningful
11017          * benefit in relying on the guest to flush the TLB immediately after
11018          * INIT.  A spurious TLB flush is benign and likely negligible from a
11019          * performance perspective.
11020          */
11021         if (init_event)
11022                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11023 }
11024 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11025
11026 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11027 {
11028         struct kvm_segment cs;
11029
11030         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11031         cs.selector = vector << 8;
11032         cs.base = vector << 12;
11033         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11034         kvm_rip_write(vcpu, 0);
11035 }
11036 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11037
11038 int kvm_arch_hardware_enable(void)
11039 {
11040         struct kvm *kvm;
11041         struct kvm_vcpu *vcpu;
11042         int i;
11043         int ret;
11044         u64 local_tsc;
11045         u64 max_tsc = 0;
11046         bool stable, backwards_tsc = false;
11047
11048         kvm_user_return_msr_cpu_online();
11049         ret = static_call(kvm_x86_hardware_enable)();
11050         if (ret != 0)
11051                 return ret;
11052
11053         local_tsc = rdtsc();
11054         stable = !kvm_check_tsc_unstable();
11055         list_for_each_entry(kvm, &vm_list, vm_list) {
11056                 kvm_for_each_vcpu(i, vcpu, kvm) {
11057                         if (!stable && vcpu->cpu == smp_processor_id())
11058                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11059                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11060                                 backwards_tsc = true;
11061                                 if (vcpu->arch.last_host_tsc > max_tsc)
11062                                         max_tsc = vcpu->arch.last_host_tsc;
11063                         }
11064                 }
11065         }
11066
11067         /*
11068          * Sometimes, even reliable TSCs go backwards.  This happens on
11069          * platforms that reset TSC during suspend or hibernate actions, but
11070          * maintain synchronization.  We must compensate.  Fortunately, we can
11071          * detect that condition here, which happens early in CPU bringup,
11072          * before any KVM threads can be running.  Unfortunately, we can't
11073          * bring the TSCs fully up to date with real time, as we aren't yet far
11074          * enough into CPU bringup that we know how much real time has actually
11075          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11076          * variables that haven't been updated yet.
11077          *
11078          * So we simply find the maximum observed TSC above, then record the
11079          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11080          * the adjustment will be applied.  Note that we accumulate
11081          * adjustments, in case multiple suspend cycles happen before some VCPU
11082          * gets a chance to run again.  In the event that no KVM threads get a
11083          * chance to run, we will miss the entire elapsed period, as we'll have
11084          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11085          * loose cycle time.  This isn't too big a deal, since the loss will be
11086          * uniform across all VCPUs (not to mention the scenario is extremely
11087          * unlikely). It is possible that a second hibernate recovery happens
11088          * much faster than a first, causing the observed TSC here to be
11089          * smaller; this would require additional padding adjustment, which is
11090          * why we set last_host_tsc to the local tsc observed here.
11091          *
11092          * N.B. - this code below runs only on platforms with reliable TSC,
11093          * as that is the only way backwards_tsc is set above.  Also note
11094          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11095          * have the same delta_cyc adjustment applied if backwards_tsc
11096          * is detected.  Note further, this adjustment is only done once,
11097          * as we reset last_host_tsc on all VCPUs to stop this from being
11098          * called multiple times (one for each physical CPU bringup).
11099          *
11100          * Platforms with unreliable TSCs don't have to deal with this, they
11101          * will be compensated by the logic in vcpu_load, which sets the TSC to
11102          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11103          * guarantee that they stay in perfect synchronization.
11104          */
11105         if (backwards_tsc) {
11106                 u64 delta_cyc = max_tsc - local_tsc;
11107                 list_for_each_entry(kvm, &vm_list, vm_list) {
11108                         kvm->arch.backwards_tsc_observed = true;
11109                         kvm_for_each_vcpu(i, vcpu, kvm) {
11110                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11111                                 vcpu->arch.last_host_tsc = local_tsc;
11112                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11113                         }
11114
11115                         /*
11116                          * We have to disable TSC offset matching.. if you were
11117                          * booting a VM while issuing an S4 host suspend....
11118                          * you may have some problem.  Solving this issue is
11119                          * left as an exercise to the reader.
11120                          */
11121                         kvm->arch.last_tsc_nsec = 0;
11122                         kvm->arch.last_tsc_write = 0;
11123                 }
11124
11125         }
11126         return 0;
11127 }
11128
11129 void kvm_arch_hardware_disable(void)
11130 {
11131         static_call(kvm_x86_hardware_disable)();
11132         drop_user_return_notifiers();
11133 }
11134
11135 int kvm_arch_hardware_setup(void *opaque)
11136 {
11137         struct kvm_x86_init_ops *ops = opaque;
11138         int r;
11139
11140         rdmsrl_safe(MSR_EFER, &host_efer);
11141
11142         if (boot_cpu_has(X86_FEATURE_XSAVES))
11143                 rdmsrl(MSR_IA32_XSS, host_xss);
11144
11145         r = ops->hardware_setup();
11146         if (r != 0)
11147                 return r;
11148
11149         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11150         kvm_ops_static_call_update();
11151
11152         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11153                 supported_xss = 0;
11154
11155 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11156         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11157 #undef __kvm_cpu_cap_has
11158
11159         if (kvm_has_tsc_control) {
11160                 /*
11161                  * Make sure the user can only configure tsc_khz values that
11162                  * fit into a signed integer.
11163                  * A min value is not calculated because it will always
11164                  * be 1 on all machines.
11165                  */
11166                 u64 max = min(0x7fffffffULL,
11167                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11168                 kvm_max_guest_tsc_khz = max;
11169
11170                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11171         }
11172
11173         kvm_init_msr_list();
11174         return 0;
11175 }
11176
11177 void kvm_arch_hardware_unsetup(void)
11178 {
11179         static_call(kvm_x86_hardware_unsetup)();
11180 }
11181
11182 int kvm_arch_check_processor_compat(void *opaque)
11183 {
11184         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11185         struct kvm_x86_init_ops *ops = opaque;
11186
11187         WARN_ON(!irqs_disabled());
11188
11189         if (__cr4_reserved_bits(cpu_has, c) !=
11190             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11191                 return -EIO;
11192
11193         return ops->check_processor_compatibility();
11194 }
11195
11196 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11197 {
11198         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11199 }
11200 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11201
11202 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11203 {
11204         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11205 }
11206
11207 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11208 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11209
11210 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11211 {
11212         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11213
11214         vcpu->arch.l1tf_flush_l1d = true;
11215         if (pmu->version && unlikely(pmu->event_count)) {
11216                 pmu->need_cleanup = true;
11217                 kvm_make_request(KVM_REQ_PMU, vcpu);
11218         }
11219         static_call(kvm_x86_sched_in)(vcpu, cpu);
11220 }
11221
11222 void kvm_arch_free_vm(struct kvm *kvm)
11223 {
11224         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11225         __kvm_arch_free_vm(kvm);
11226 }
11227
11228
11229 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11230 {
11231         int ret;
11232         unsigned long flags;
11233
11234         if (type)
11235                 return -EINVAL;
11236
11237         ret = kvm_page_track_init(kvm);
11238         if (ret)
11239                 return ret;
11240
11241         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11242         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11243         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11244         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11245         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11246         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11247
11248         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11249         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11250         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11251         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11252                 &kvm->arch.irq_sources_bitmap);
11253
11254         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11255         mutex_init(&kvm->arch.apic_map_lock);
11256         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11257         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11258
11259         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11260         pvclock_update_vm_gtod_copy(kvm);
11261         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11262
11263         kvm->arch.guest_can_read_msr_platform_info = true;
11264
11265 #if IS_ENABLED(CONFIG_HYPERV)
11266         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11267         kvm->arch.hv_root_tdp = INVALID_PAGE;
11268 #endif
11269
11270         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11271         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11272
11273         kvm_apicv_init(kvm);
11274         kvm_hv_init_vm(kvm);
11275         kvm_mmu_init_vm(kvm);
11276         kvm_xen_init_vm(kvm);
11277
11278         return static_call(kvm_x86_vm_init)(kvm);
11279 }
11280
11281 int kvm_arch_post_init_vm(struct kvm *kvm)
11282 {
11283         return kvm_mmu_post_init_vm(kvm);
11284 }
11285
11286 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11287 {
11288         vcpu_load(vcpu);
11289         kvm_mmu_unload(vcpu);
11290         vcpu_put(vcpu);
11291 }
11292
11293 static void kvm_free_vcpus(struct kvm *kvm)
11294 {
11295         unsigned int i;
11296         struct kvm_vcpu *vcpu;
11297
11298         /*
11299          * Unpin any mmu pages first.
11300          */
11301         kvm_for_each_vcpu(i, vcpu, kvm) {
11302                 kvm_clear_async_pf_completion_queue(vcpu);
11303                 kvm_unload_vcpu_mmu(vcpu);
11304         }
11305         kvm_for_each_vcpu(i, vcpu, kvm)
11306                 kvm_vcpu_destroy(vcpu);
11307
11308         mutex_lock(&kvm->lock);
11309         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11310                 kvm->vcpus[i] = NULL;
11311
11312         atomic_set(&kvm->online_vcpus, 0);
11313         mutex_unlock(&kvm->lock);
11314 }
11315
11316 void kvm_arch_sync_events(struct kvm *kvm)
11317 {
11318         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11319         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11320         kvm_free_pit(kvm);
11321 }
11322
11323 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11324
11325 /**
11326  * __x86_set_memory_region: Setup KVM internal memory slot
11327  *
11328  * @kvm: the kvm pointer to the VM.
11329  * @id: the slot ID to setup.
11330  * @gpa: the GPA to install the slot (unused when @size == 0).
11331  * @size: the size of the slot. Set to zero to uninstall a slot.
11332  *
11333  * This function helps to setup a KVM internal memory slot.  Specify
11334  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11335  * slot.  The return code can be one of the following:
11336  *
11337  *   HVA:           on success (uninstall will return a bogus HVA)
11338  *   -errno:        on error
11339  *
11340  * The caller should always use IS_ERR() to check the return value
11341  * before use.  Note, the KVM internal memory slots are guaranteed to
11342  * remain valid and unchanged until the VM is destroyed, i.e., the
11343  * GPA->HVA translation will not change.  However, the HVA is a user
11344  * address, i.e. its accessibility is not guaranteed, and must be
11345  * accessed via __copy_{to,from}_user().
11346  */
11347 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11348                                       u32 size)
11349 {
11350         int i, r;
11351         unsigned long hva, old_npages;
11352         struct kvm_memslots *slots = kvm_memslots(kvm);
11353         struct kvm_memory_slot *slot;
11354
11355         /* Called with kvm->slots_lock held.  */
11356         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11357                 return ERR_PTR_USR(-EINVAL);
11358
11359         slot = id_to_memslot(slots, id);
11360         if (size) {
11361                 if (slot && slot->npages)
11362                         return ERR_PTR_USR(-EEXIST);
11363
11364                 /*
11365                  * MAP_SHARED to prevent internal slot pages from being moved
11366                  * by fork()/COW.
11367                  */
11368                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11369                               MAP_SHARED | MAP_ANONYMOUS, 0);
11370                 if (IS_ERR((void *)hva))
11371                         return (void __user *)hva;
11372         } else {
11373                 if (!slot || !slot->npages)
11374                         return NULL;
11375
11376                 old_npages = slot->npages;
11377                 hva = slot->userspace_addr;
11378         }
11379
11380         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11381                 struct kvm_userspace_memory_region m;
11382
11383                 m.slot = id | (i << 16);
11384                 m.flags = 0;
11385                 m.guest_phys_addr = gpa;
11386                 m.userspace_addr = hva;
11387                 m.memory_size = size;
11388                 r = __kvm_set_memory_region(kvm, &m);
11389                 if (r < 0)
11390                         return ERR_PTR_USR(r);
11391         }
11392
11393         if (!size)
11394                 vm_munmap(hva, old_npages * PAGE_SIZE);
11395
11396         return (void __user *)hva;
11397 }
11398 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11399
11400 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11401 {
11402         kvm_mmu_pre_destroy_vm(kvm);
11403 }
11404
11405 void kvm_arch_destroy_vm(struct kvm *kvm)
11406 {
11407         if (current->mm == kvm->mm) {
11408                 /*
11409                  * Free memory regions allocated on behalf of userspace,
11410                  * unless the the memory map has changed due to process exit
11411                  * or fd copying.
11412                  */
11413                 mutex_lock(&kvm->slots_lock);
11414                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11415                                         0, 0);
11416                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11417                                         0, 0);
11418                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11419                 mutex_unlock(&kvm->slots_lock);
11420         }
11421         static_call_cond(kvm_x86_vm_destroy)(kvm);
11422         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11423         kvm_pic_destroy(kvm);
11424         kvm_ioapic_destroy(kvm);
11425         kvm_free_vcpus(kvm);
11426         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11427         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11428         kvm_mmu_uninit_vm(kvm);
11429         kvm_page_track_cleanup(kvm);
11430         kvm_xen_destroy_vm(kvm);
11431         kvm_hv_destroy_vm(kvm);
11432 }
11433
11434 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11435 {
11436         int i;
11437
11438         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11439                 kvfree(slot->arch.rmap[i]);
11440                 slot->arch.rmap[i] = NULL;
11441         }
11442 }
11443
11444 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11445 {
11446         int i;
11447
11448         memslot_rmap_free(slot);
11449
11450         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11451                 kvfree(slot->arch.lpage_info[i - 1]);
11452                 slot->arch.lpage_info[i - 1] = NULL;
11453         }
11454
11455         kvm_page_track_free_memslot(slot);
11456 }
11457
11458 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11459 {
11460         const int sz = sizeof(*slot->arch.rmap[0]);
11461         int i;
11462
11463         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11464                 int level = i + 1;
11465                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11466
11467                 if (slot->arch.rmap[i])
11468                         continue;
11469
11470                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11471                 if (!slot->arch.rmap[i]) {
11472                         memslot_rmap_free(slot);
11473                         return -ENOMEM;
11474                 }
11475         }
11476
11477         return 0;
11478 }
11479
11480 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11481                                       struct kvm_memory_slot *slot,
11482                                       unsigned long npages)
11483 {
11484         int i, r;
11485
11486         /*
11487          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11488          * old arrays will be freed by __kvm_set_memory_region() if installing
11489          * the new memslot is successful.
11490          */
11491         memset(&slot->arch, 0, sizeof(slot->arch));
11492
11493         if (kvm_memslots_have_rmaps(kvm)) {
11494                 r = memslot_rmap_alloc(slot, npages);
11495                 if (r)
11496                         return r;
11497         }
11498
11499         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11500                 struct kvm_lpage_info *linfo;
11501                 unsigned long ugfn;
11502                 int lpages;
11503                 int level = i + 1;
11504
11505                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11506
11507                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11508                 if (!linfo)
11509                         goto out_free;
11510
11511                 slot->arch.lpage_info[i - 1] = linfo;
11512
11513                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11514                         linfo[0].disallow_lpage = 1;
11515                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11516                         linfo[lpages - 1].disallow_lpage = 1;
11517                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11518                 /*
11519                  * If the gfn and userspace address are not aligned wrt each
11520                  * other, disable large page support for this slot.
11521                  */
11522                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11523                         unsigned long j;
11524
11525                         for (j = 0; j < lpages; ++j)
11526                                 linfo[j].disallow_lpage = 1;
11527                 }
11528         }
11529
11530         if (kvm_page_track_create_memslot(kvm, slot, npages))
11531                 goto out_free;
11532
11533         return 0;
11534
11535 out_free:
11536         memslot_rmap_free(slot);
11537
11538         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11539                 kvfree(slot->arch.lpage_info[i - 1]);
11540                 slot->arch.lpage_info[i - 1] = NULL;
11541         }
11542         return -ENOMEM;
11543 }
11544
11545 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11546 {
11547         struct kvm_vcpu *vcpu;
11548         int i;
11549
11550         /*
11551          * memslots->generation has been incremented.
11552          * mmio generation may have reached its maximum value.
11553          */
11554         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11555
11556         /* Force re-initialization of steal_time cache */
11557         kvm_for_each_vcpu(i, vcpu, kvm)
11558                 kvm_vcpu_kick(vcpu);
11559 }
11560
11561 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11562                                 struct kvm_memory_slot *memslot,
11563                                 const struct kvm_userspace_memory_region *mem,
11564                                 enum kvm_mr_change change)
11565 {
11566         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11567                 return kvm_alloc_memslot_metadata(kvm, memslot,
11568                                                   mem->memory_size >> PAGE_SHIFT);
11569         return 0;
11570 }
11571
11572
11573 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11574 {
11575         struct kvm_arch *ka = &kvm->arch;
11576
11577         if (!kvm_x86_ops.cpu_dirty_log_size)
11578                 return;
11579
11580         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11581             (!enable && --ka->cpu_dirty_logging_count == 0))
11582                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11583
11584         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11585 }
11586
11587 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11588                                      struct kvm_memory_slot *old,
11589                                      const struct kvm_memory_slot *new,
11590                                      enum kvm_mr_change change)
11591 {
11592         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11593
11594         /*
11595          * Update CPU dirty logging if dirty logging is being toggled.  This
11596          * applies to all operations.
11597          */
11598         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11599                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11600
11601         /*
11602          * Nothing more to do for RO slots (which can't be dirtied and can't be
11603          * made writable) or CREATE/MOVE/DELETE of a slot.
11604          *
11605          * For a memslot with dirty logging disabled:
11606          * CREATE:      No dirty mappings will already exist.
11607          * MOVE/DELETE: The old mappings will already have been cleaned up by
11608          *              kvm_arch_flush_shadow_memslot()
11609          *
11610          * For a memslot with dirty logging enabled:
11611          * CREATE:      No shadow pages exist, thus nothing to write-protect
11612          *              and no dirty bits to clear.
11613          * MOVE/DELETE: The old mappings will already have been cleaned up by
11614          *              kvm_arch_flush_shadow_memslot().
11615          */
11616         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11617                 return;
11618
11619         /*
11620          * READONLY and non-flags changes were filtered out above, and the only
11621          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11622          * logging isn't being toggled on or off.
11623          */
11624         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11625                 return;
11626
11627         if (!log_dirty_pages) {
11628                 /*
11629                  * Dirty logging tracks sptes in 4k granularity, meaning that
11630                  * large sptes have to be split.  If live migration succeeds,
11631                  * the guest in the source machine will be destroyed and large
11632                  * sptes will be created in the destination.  However, if the
11633                  * guest continues to run in the source machine (for example if
11634                  * live migration fails), small sptes will remain around and
11635                  * cause bad performance.
11636                  *
11637                  * Scan sptes if dirty logging has been stopped, dropping those
11638                  * which can be collapsed into a single large-page spte.  Later
11639                  * page faults will create the large-page sptes.
11640                  */
11641                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11642         } else {
11643                 /*
11644                  * Initially-all-set does not require write protecting any page,
11645                  * because they're all assumed to be dirty.
11646                  */
11647                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11648                         return;
11649
11650                 if (kvm_x86_ops.cpu_dirty_log_size) {
11651                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11652                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11653                 } else {
11654                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11655                 }
11656         }
11657 }
11658
11659 void kvm_arch_commit_memory_region(struct kvm *kvm,
11660                                 const struct kvm_userspace_memory_region *mem,
11661                                 struct kvm_memory_slot *old,
11662                                 const struct kvm_memory_slot *new,
11663                                 enum kvm_mr_change change)
11664 {
11665         if (!kvm->arch.n_requested_mmu_pages)
11666                 kvm_mmu_change_mmu_pages(kvm,
11667                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11668
11669         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11670
11671         /* Free the arrays associated with the old memslot. */
11672         if (change == KVM_MR_MOVE)
11673                 kvm_arch_free_memslot(kvm, old);
11674 }
11675
11676 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11677 {
11678         kvm_mmu_zap_all(kvm);
11679 }
11680
11681 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11682                                    struct kvm_memory_slot *slot)
11683 {
11684         kvm_page_track_flush_slot(kvm, slot);
11685 }
11686
11687 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11688 {
11689         return (is_guest_mode(vcpu) &&
11690                         kvm_x86_ops.guest_apic_has_interrupt &&
11691                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11692 }
11693
11694 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11695 {
11696         if (!list_empty_careful(&vcpu->async_pf.done))
11697                 return true;
11698
11699         if (kvm_apic_has_events(vcpu))
11700                 return true;
11701
11702         if (vcpu->arch.pv.pv_unhalted)
11703                 return true;
11704
11705         if (vcpu->arch.exception.pending)
11706                 return true;
11707
11708         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11709             (vcpu->arch.nmi_pending &&
11710              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11711                 return true;
11712
11713         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11714             (vcpu->arch.smi_pending &&
11715              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11716                 return true;
11717
11718         if (kvm_arch_interrupt_allowed(vcpu) &&
11719             (kvm_cpu_has_interrupt(vcpu) ||
11720             kvm_guest_apic_has_interrupt(vcpu)))
11721                 return true;
11722
11723         if (kvm_hv_has_stimer_pending(vcpu))
11724                 return true;
11725
11726         if (is_guest_mode(vcpu) &&
11727             kvm_x86_ops.nested_ops->hv_timer_pending &&
11728             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11729                 return true;
11730
11731         return false;
11732 }
11733
11734 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11735 {
11736         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11737 }
11738
11739 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11740 {
11741         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11742                 return true;
11743
11744         return false;
11745 }
11746
11747 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11748 {
11749         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11750                 return true;
11751
11752         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11753                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11754                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11755                 return true;
11756
11757         return kvm_arch_dy_has_pending_interrupt(vcpu);
11758 }
11759
11760 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11761 {
11762         if (vcpu->arch.guest_state_protected)
11763                 return true;
11764
11765         return vcpu->arch.preempted_in_kernel;
11766 }
11767
11768 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11769 {
11770         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11771 }
11772
11773 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11774 {
11775         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11776 }
11777
11778 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11779 {
11780         /* Can't read the RIP when guest state is protected, just return 0 */
11781         if (vcpu->arch.guest_state_protected)
11782                 return 0;
11783
11784         if (is_64_bit_mode(vcpu))
11785                 return kvm_rip_read(vcpu);
11786         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11787                      kvm_rip_read(vcpu));
11788 }
11789 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11790
11791 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11792 {
11793         return kvm_get_linear_rip(vcpu) == linear_rip;
11794 }
11795 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11796
11797 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11798 {
11799         unsigned long rflags;
11800
11801         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11802         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11803                 rflags &= ~X86_EFLAGS_TF;
11804         return rflags;
11805 }
11806 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11807
11808 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11809 {
11810         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11811             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11812                 rflags |= X86_EFLAGS_TF;
11813         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11814 }
11815
11816 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11817 {
11818         __kvm_set_rflags(vcpu, rflags);
11819         kvm_make_request(KVM_REQ_EVENT, vcpu);
11820 }
11821 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11822
11823 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11824 {
11825         int r;
11826
11827         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11828               work->wakeup_all)
11829                 return;
11830
11831         r = kvm_mmu_reload(vcpu);
11832         if (unlikely(r))
11833                 return;
11834
11835         if (!vcpu->arch.mmu->direct_map &&
11836               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11837                 return;
11838
11839         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11840 }
11841
11842 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11843 {
11844         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11845
11846         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11847 }
11848
11849 static inline u32 kvm_async_pf_next_probe(u32 key)
11850 {
11851         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11852 }
11853
11854 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11855 {
11856         u32 key = kvm_async_pf_hash_fn(gfn);
11857
11858         while (vcpu->arch.apf.gfns[key] != ~0)
11859                 key = kvm_async_pf_next_probe(key);
11860
11861         vcpu->arch.apf.gfns[key] = gfn;
11862 }
11863
11864 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11865 {
11866         int i;
11867         u32 key = kvm_async_pf_hash_fn(gfn);
11868
11869         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11870                      (vcpu->arch.apf.gfns[key] != gfn &&
11871                       vcpu->arch.apf.gfns[key] != ~0); i++)
11872                 key = kvm_async_pf_next_probe(key);
11873
11874         return key;
11875 }
11876
11877 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11878 {
11879         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11880 }
11881
11882 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11883 {
11884         u32 i, j, k;
11885
11886         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11887
11888         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11889                 return;
11890
11891         while (true) {
11892                 vcpu->arch.apf.gfns[i] = ~0;
11893                 do {
11894                         j = kvm_async_pf_next_probe(j);
11895                         if (vcpu->arch.apf.gfns[j] == ~0)
11896                                 return;
11897                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11898                         /*
11899                          * k lies cyclically in ]i,j]
11900                          * |    i.k.j |
11901                          * |....j i.k.| or  |.k..j i...|
11902                          */
11903                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11904                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11905                 i = j;
11906         }
11907 }
11908
11909 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11910 {
11911         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11912
11913         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11914                                       sizeof(reason));
11915 }
11916
11917 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11918 {
11919         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11920
11921         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11922                                              &token, offset, sizeof(token));
11923 }
11924
11925 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11926 {
11927         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11928         u32 val;
11929
11930         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11931                                          &val, offset, sizeof(val)))
11932                 return false;
11933
11934         return !val;
11935 }
11936
11937 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11938 {
11939         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11940                 return false;
11941
11942         if (!kvm_pv_async_pf_enabled(vcpu) ||
11943             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11944                 return false;
11945
11946         return true;
11947 }
11948
11949 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11950 {
11951         if (unlikely(!lapic_in_kernel(vcpu) ||
11952                      kvm_event_needs_reinjection(vcpu) ||
11953                      vcpu->arch.exception.pending))
11954                 return false;
11955
11956         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11957                 return false;
11958
11959         /*
11960          * If interrupts are off we cannot even use an artificial
11961          * halt state.
11962          */
11963         return kvm_arch_interrupt_allowed(vcpu);
11964 }
11965
11966 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11967                                      struct kvm_async_pf *work)
11968 {
11969         struct x86_exception fault;
11970
11971         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11972         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11973
11974         if (kvm_can_deliver_async_pf(vcpu) &&
11975             !apf_put_user_notpresent(vcpu)) {
11976                 fault.vector = PF_VECTOR;
11977                 fault.error_code_valid = true;
11978                 fault.error_code = 0;
11979                 fault.nested_page_fault = false;
11980                 fault.address = work->arch.token;
11981                 fault.async_page_fault = true;
11982                 kvm_inject_page_fault(vcpu, &fault);
11983                 return true;
11984         } else {
11985                 /*
11986                  * It is not possible to deliver a paravirtualized asynchronous
11987                  * page fault, but putting the guest in an artificial halt state
11988                  * can be beneficial nevertheless: if an interrupt arrives, we
11989                  * can deliver it timely and perhaps the guest will schedule
11990                  * another process.  When the instruction that triggered a page
11991                  * fault is retried, hopefully the page will be ready in the host.
11992                  */
11993                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11994                 return false;
11995         }
11996 }
11997
11998 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11999                                  struct kvm_async_pf *work)
12000 {
12001         struct kvm_lapic_irq irq = {
12002                 .delivery_mode = APIC_DM_FIXED,
12003                 .vector = vcpu->arch.apf.vec
12004         };
12005
12006         if (work->wakeup_all)
12007                 work->arch.token = ~0; /* broadcast wakeup */
12008         else
12009                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12010         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12011
12012         if ((work->wakeup_all || work->notpresent_injected) &&
12013             kvm_pv_async_pf_enabled(vcpu) &&
12014             !apf_put_user_ready(vcpu, work->arch.token)) {
12015                 vcpu->arch.apf.pageready_pending = true;
12016                 kvm_apic_set_irq(vcpu, &irq, NULL);
12017         }
12018
12019         vcpu->arch.apf.halted = false;
12020         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12021 }
12022
12023 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12024 {
12025         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12026         if (!vcpu->arch.apf.pageready_pending)
12027                 kvm_vcpu_kick(vcpu);
12028 }
12029
12030 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12031 {
12032         if (!kvm_pv_async_pf_enabled(vcpu))
12033                 return true;
12034         else
12035                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12036 }
12037
12038 void kvm_arch_start_assignment(struct kvm *kvm)
12039 {
12040         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12041                 static_call_cond(kvm_x86_start_assignment)(kvm);
12042 }
12043 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12044
12045 void kvm_arch_end_assignment(struct kvm *kvm)
12046 {
12047         atomic_dec(&kvm->arch.assigned_device_count);
12048 }
12049 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12050
12051 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12052 {
12053         return atomic_read(&kvm->arch.assigned_device_count);
12054 }
12055 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12056
12057 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12058 {
12059         atomic_inc(&kvm->arch.noncoherent_dma_count);
12060 }
12061 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12062
12063 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12064 {
12065         atomic_dec(&kvm->arch.noncoherent_dma_count);
12066 }
12067 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12068
12069 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12070 {
12071         return atomic_read(&kvm->arch.noncoherent_dma_count);
12072 }
12073 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12074
12075 bool kvm_arch_has_irq_bypass(void)
12076 {
12077         return true;
12078 }
12079
12080 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12081                                       struct irq_bypass_producer *prod)
12082 {
12083         struct kvm_kernel_irqfd *irqfd =
12084                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12085         int ret;
12086
12087         irqfd->producer = prod;
12088         kvm_arch_start_assignment(irqfd->kvm);
12089         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12090                                          prod->irq, irqfd->gsi, 1);
12091
12092         if (ret)
12093                 kvm_arch_end_assignment(irqfd->kvm);
12094
12095         return ret;
12096 }
12097
12098 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12099                                       struct irq_bypass_producer *prod)
12100 {
12101         int ret;
12102         struct kvm_kernel_irqfd *irqfd =
12103                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12104
12105         WARN_ON(irqfd->producer != prod);
12106         irqfd->producer = NULL;
12107
12108         /*
12109          * When producer of consumer is unregistered, we change back to
12110          * remapped mode, so we can re-use the current implementation
12111          * when the irq is masked/disabled or the consumer side (KVM
12112          * int this case doesn't want to receive the interrupts.
12113         */
12114         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12115         if (ret)
12116                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12117                        " fails: %d\n", irqfd->consumer.token, ret);
12118
12119         kvm_arch_end_assignment(irqfd->kvm);
12120 }
12121
12122 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12123                                    uint32_t guest_irq, bool set)
12124 {
12125         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12126 }
12127
12128 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12129                                   struct kvm_kernel_irq_routing_entry *new)
12130 {
12131         if (new->type != KVM_IRQ_ROUTING_MSI)
12132                 return true;
12133
12134         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12135 }
12136
12137 bool kvm_vector_hashing_enabled(void)
12138 {
12139         return vector_hashing;
12140 }
12141
12142 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12143 {
12144         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12145 }
12146 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12147
12148
12149 int kvm_spec_ctrl_test_value(u64 value)
12150 {
12151         /*
12152          * test that setting IA32_SPEC_CTRL to given value
12153          * is allowed by the host processor
12154          */
12155
12156         u64 saved_value;
12157         unsigned long flags;
12158         int ret = 0;
12159
12160         local_irq_save(flags);
12161
12162         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12163                 ret = 1;
12164         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12165                 ret = 1;
12166         else
12167                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12168
12169         local_irq_restore(flags);
12170
12171         return ret;
12172 }
12173 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12174
12175 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12176 {
12177         struct x86_exception fault;
12178         u32 access = error_code &
12179                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12180
12181         if (!(error_code & PFERR_PRESENT_MASK) ||
12182             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12183                 /*
12184                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12185                  * tables probably do not match the TLB.  Just proceed
12186                  * with the error code that the processor gave.
12187                  */
12188                 fault.vector = PF_VECTOR;
12189                 fault.error_code_valid = true;
12190                 fault.error_code = error_code;
12191                 fault.nested_page_fault = false;
12192                 fault.address = gva;
12193         }
12194         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12195 }
12196 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12197
12198 /*
12199  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12200  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12201  * indicates whether exit to userspace is needed.
12202  */
12203 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12204                               struct x86_exception *e)
12205 {
12206         if (r == X86EMUL_PROPAGATE_FAULT) {
12207                 kvm_inject_emulated_page_fault(vcpu, e);
12208                 return 1;
12209         }
12210
12211         /*
12212          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12213          * while handling a VMX instruction KVM could've handled the request
12214          * correctly by exiting to userspace and performing I/O but there
12215          * doesn't seem to be a real use-case behind such requests, just return
12216          * KVM_EXIT_INTERNAL_ERROR for now.
12217          */
12218         kvm_prepare_emulation_failure_exit(vcpu);
12219
12220         return 0;
12221 }
12222 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12223
12224 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12225 {
12226         bool pcid_enabled;
12227         struct x86_exception e;
12228         struct {
12229                 u64 pcid;
12230                 u64 gla;
12231         } operand;
12232         int r;
12233
12234         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12235         if (r != X86EMUL_CONTINUE)
12236                 return kvm_handle_memory_failure(vcpu, r, &e);
12237
12238         if (operand.pcid >> 12 != 0) {
12239                 kvm_inject_gp(vcpu, 0);
12240                 return 1;
12241         }
12242
12243         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12244
12245         switch (type) {
12246         case INVPCID_TYPE_INDIV_ADDR:
12247                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12248                     is_noncanonical_address(operand.gla, vcpu)) {
12249                         kvm_inject_gp(vcpu, 0);
12250                         return 1;
12251                 }
12252                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12253                 return kvm_skip_emulated_instruction(vcpu);
12254
12255         case INVPCID_TYPE_SINGLE_CTXT:
12256                 if (!pcid_enabled && (operand.pcid != 0)) {
12257                         kvm_inject_gp(vcpu, 0);
12258                         return 1;
12259                 }
12260
12261                 kvm_invalidate_pcid(vcpu, operand.pcid);
12262                 return kvm_skip_emulated_instruction(vcpu);
12263
12264         case INVPCID_TYPE_ALL_NON_GLOBAL:
12265                 /*
12266                  * Currently, KVM doesn't mark global entries in the shadow
12267                  * page tables, so a non-global flush just degenerates to a
12268                  * global flush. If needed, we could optimize this later by
12269                  * keeping track of global entries in shadow page tables.
12270                  */
12271
12272                 fallthrough;
12273         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12274                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12275                 return kvm_skip_emulated_instruction(vcpu);
12276
12277         default:
12278                 BUG(); /* We have already checked above that type <= 3 */
12279         }
12280 }
12281 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12282
12283 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12284 {
12285         struct kvm_run *run = vcpu->run;
12286         struct kvm_mmio_fragment *frag;
12287         unsigned int len;
12288
12289         BUG_ON(!vcpu->mmio_needed);
12290
12291         /* Complete previous fragment */
12292         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12293         len = min(8u, frag->len);
12294         if (!vcpu->mmio_is_write)
12295                 memcpy(frag->data, run->mmio.data, len);
12296
12297         if (frag->len <= 8) {
12298                 /* Switch to the next fragment. */
12299                 frag++;
12300                 vcpu->mmio_cur_fragment++;
12301         } else {
12302                 /* Go forward to the next mmio piece. */
12303                 frag->data += len;
12304                 frag->gpa += len;
12305                 frag->len -= len;
12306         }
12307
12308         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12309                 vcpu->mmio_needed = 0;
12310
12311                 // VMG change, at this point, we're always done
12312                 // RIP has already been advanced
12313                 return 1;
12314         }
12315
12316         // More MMIO is needed
12317         run->mmio.phys_addr = frag->gpa;
12318         run->mmio.len = min(8u, frag->len);
12319         run->mmio.is_write = vcpu->mmio_is_write;
12320         if (run->mmio.is_write)
12321                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12322         run->exit_reason = KVM_EXIT_MMIO;
12323
12324         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12325
12326         return 0;
12327 }
12328
12329 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12330                           void *data)
12331 {
12332         int handled;
12333         struct kvm_mmio_fragment *frag;
12334
12335         if (!data)
12336                 return -EINVAL;
12337
12338         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12339         if (handled == bytes)
12340                 return 1;
12341
12342         bytes -= handled;
12343         gpa += handled;
12344         data += handled;
12345
12346         /*TODO: Check if need to increment number of frags */
12347         frag = vcpu->mmio_fragments;
12348         vcpu->mmio_nr_fragments = 1;
12349         frag->len = bytes;
12350         frag->gpa = gpa;
12351         frag->data = data;
12352
12353         vcpu->mmio_needed = 1;
12354         vcpu->mmio_cur_fragment = 0;
12355
12356         vcpu->run->mmio.phys_addr = gpa;
12357         vcpu->run->mmio.len = min(8u, frag->len);
12358         vcpu->run->mmio.is_write = 1;
12359         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12360         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12361
12362         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12363
12364         return 0;
12365 }
12366 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12367
12368 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12369                          void *data)
12370 {
12371         int handled;
12372         struct kvm_mmio_fragment *frag;
12373
12374         if (!data)
12375                 return -EINVAL;
12376
12377         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12378         if (handled == bytes)
12379                 return 1;
12380
12381         bytes -= handled;
12382         gpa += handled;
12383         data += handled;
12384
12385         /*TODO: Check if need to increment number of frags */
12386         frag = vcpu->mmio_fragments;
12387         vcpu->mmio_nr_fragments = 1;
12388         frag->len = bytes;
12389         frag->gpa = gpa;
12390         frag->data = data;
12391
12392         vcpu->mmio_needed = 1;
12393         vcpu->mmio_cur_fragment = 0;
12394
12395         vcpu->run->mmio.phys_addr = gpa;
12396         vcpu->run->mmio.len = min(8u, frag->len);
12397         vcpu->run->mmio.is_write = 0;
12398         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12399
12400         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12401
12402         return 0;
12403 }
12404 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12405
12406 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12407                            unsigned int port);
12408
12409 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12410 {
12411         int size = vcpu->arch.pio.size;
12412         int port = vcpu->arch.pio.port;
12413
12414         vcpu->arch.pio.count = 0;
12415         if (vcpu->arch.sev_pio_count)
12416                 return kvm_sev_es_outs(vcpu, size, port);
12417         return 1;
12418 }
12419
12420 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12421                            unsigned int port)
12422 {
12423         for (;;) {
12424                 unsigned int count =
12425                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12426                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12427
12428                 /* memcpy done already by emulator_pio_out.  */
12429                 vcpu->arch.sev_pio_count -= count;
12430                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12431                 if (!ret)
12432                         break;
12433
12434                 /* Emulation done by the kernel.  */
12435                 if (!vcpu->arch.sev_pio_count)
12436                         return 1;
12437         }
12438
12439         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12440         return 0;
12441 }
12442
12443 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12444                           unsigned int port);
12445
12446 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12447 {
12448         unsigned count = vcpu->arch.pio.count;
12449         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12450         vcpu->arch.sev_pio_count -= count;
12451         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12452 }
12453
12454 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12455 {
12456         int size = vcpu->arch.pio.size;
12457         int port = vcpu->arch.pio.port;
12458
12459         advance_sev_es_emulated_ins(vcpu);
12460         if (vcpu->arch.sev_pio_count)
12461                 return kvm_sev_es_ins(vcpu, size, port);
12462         return 1;
12463 }
12464
12465 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12466                           unsigned int port)
12467 {
12468         for (;;) {
12469                 unsigned int count =
12470                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12471                 if (!__emulator_pio_in(vcpu, size, port, count))
12472                         break;
12473
12474                 /* Emulation done by the kernel.  */
12475                 advance_sev_es_emulated_ins(vcpu);
12476                 if (!vcpu->arch.sev_pio_count)
12477                         return 1;
12478         }
12479
12480         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12481         return 0;
12482 }
12483
12484 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12485                          unsigned int port, void *data,  unsigned int count,
12486                          int in)
12487 {
12488         vcpu->arch.sev_pio_data = data;
12489         vcpu->arch.sev_pio_count = count;
12490         return in ? kvm_sev_es_ins(vcpu, size, port)
12491                   : kvm_sev_es_outs(vcpu, size, port);
12492 }
12493 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12494
12495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12501 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12502 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12503 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12504 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12505 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12506 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12507 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12508 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12509 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12510 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12511 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12512 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12513 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12514 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12515 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12516 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12517 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12518 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12519 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12520 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12521 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);