arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68
  69 #define CREATE_TRACE_POINTS
  70 #include "trace.h"
  71
  72 #define MAX_IO_MSRS 256
  73 #define KVM_MAX_MCE_BANKS 32
  74 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  76
  77 #define emul_to_vcpu(ctxt) \
  78         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  79
  80 /* EFER defaults:
  81  * - enable syscall per default because its emulated by KVM
  82  * - enable LME and LMA per default on 64 bit KVM
  83  */
  84 #ifdef CONFIG_X86_64
  85 static
  86 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  87 #else
  88 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  89 #endif
  90
  91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  93
  94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  95                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  96
  97 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  98 static void process_nmi(struct kvm_vcpu *vcpu);
  99 static void enter_smm(struct kvm_vcpu *vcpu);
 100 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 101
 102 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 103 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 104
 105 static bool __read_mostly ignore_msrs = 0;
 106 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 107
 108 unsigned int min_timer_period_us = 500;
 109 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 110
 111 static bool __read_mostly kvmclock_periodic_sync = true;
 112 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 113
 114 bool __read_mostly kvm_has_tsc_control;
 115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 116 u32  __read_mostly kvm_max_guest_tsc_khz;
 117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 118 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 120 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 122 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 124
 125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 126 static u32 __read_mostly tsc_tolerance_ppm = 250;
 127 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 128
 129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 130 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 131 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 132
 133 static bool __read_mostly vector_hashing = true;
 134 module_param(vector_hashing, bool, S_IRUGO);
 135
 136 static bool __read_mostly backwards_tsc_observed = false;
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "req_event", VCPU_STAT(req_event) },
 184         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 185         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 186         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 187         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 188         { "mmu_flooded", VM_STAT(mmu_flooded) },
 189         { "mmu_recycled", VM_STAT(mmu_recycled) },
 190         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 191         { "mmu_unsync", VM_STAT(mmu_unsync) },
 192         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 193         { "largepages", VM_STAT(lpages) },
 194         { "max_mmu_page_hash_collisions",
 195                 VM_STAT(max_mmu_page_hash_collisions) },
 196         { NULL }
 197 };
 198
 199 u64 __read_mostly host_xcr0;
 200
 201 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 202
 203 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 204 {
 205         int i;
 206         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 207                 vcpu->arch.apf.gfns[i] = ~0;
 208 }
 209
 210 static void kvm_on_user_return(struct user_return_notifier *urn)
 211 {
 212         unsigned slot;
 213         struct kvm_shared_msrs *locals
 214                 = container_of(urn, struct kvm_shared_msrs, urn);
 215         struct kvm_shared_msr_values *values;
 216         unsigned long flags;
 217
 218         /*
 219          * Disabling irqs at this point since the following code could be
 220          * interrupted and executed through kvm_arch_hardware_disable()
 221          */
 222         local_irq_save(flags);
 223         if (locals->registered) {
 224                 locals->registered = false;
 225                 user_return_notifier_unregister(urn);
 226         }
 227         local_irq_restore(flags);
 228         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 229                 values = &locals->values[slot];
 230                 if (values->host != values->curr) {
 231                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 232                         values->curr = values->host;
 233                 }
 234         }
 235 }
 236
 237 static void shared_msr_update(unsigned slot, u32 msr)
 238 {
 239         u64 value;
 240         unsigned int cpu = smp_processor_id();
 241         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 242
 243         /* only read, and nobody should modify it at this time,
 244          * so don't need lock */
 245         if (slot >= shared_msrs_global.nr) {
 246                 printk(KERN_ERR "kvm: invalid MSR slot!");
 247                 return;
 248         }
 249         rdmsrl_safe(msr, &value);
 250         smsr->values[slot].host = value;
 251         smsr->values[slot].curr = value;
 252 }
 253
 254 void kvm_define_shared_msr(unsigned slot, u32 msr)
 255 {
 256         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 257         shared_msrs_global.msrs[slot] = msr;
 258         if (slot >= shared_msrs_global.nr)
 259                 shared_msrs_global.nr = slot + 1;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 262
 263 static void kvm_shared_msr_cpu_online(void)
 264 {
 265         unsigned i;
 266
 267         for (i = 0; i < shared_msrs_global.nr; ++i)
 268                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 269 }
 270
 271 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 272 {
 273         unsigned int cpu = smp_processor_id();
 274         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 275         int err;
 276
 277         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 278                 return 0;
 279         smsr->values[slot].curr = value;
 280         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 281         if (err)
 282                 return 1;
 283
 284         if (!smsr->registered) {
 285                 smsr->urn.on_user_return = kvm_on_user_return;
 286                 user_return_notifier_register(&smsr->urn);
 287                 smsr->registered = true;
 288         }
 289         return 0;
 290 }
 291 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 292
 293 static void drop_user_return_notifiers(void)
 294 {
 295         unsigned int cpu = smp_processor_id();
 296         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 297
 298         if (smsr->registered)
 299                 kvm_on_user_return(&smsr->urn);
 300 }
 301
 302 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 303 {
 304         return vcpu->arch.apic_base;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 307
 308 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 309 {
 310         u64 old_state = vcpu->arch.apic_base &
 311                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 312         u64 new_state = msr_info->data &
 313                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 314         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 315                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 316
 317         if (!msr_info->host_initiated &&
 318             ((msr_info->data & reserved_bits) != 0 ||
 319              new_state == X2APIC_ENABLE ||
 320              (new_state == MSR_IA32_APICBASE_ENABLE &&
 321               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 322              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 323               old_state == 0)))
 324                 return 1;
 325
 326         kvm_lapic_set_base(vcpu, msr_info->data);
 327         return 0;
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 330
 331 asmlinkage __visible void kvm_spurious_fault(void)
 332 {
 333         /* Fault while not rebooting.  We want the trace. */
 334         BUG();
 335 }
 336 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 337
 338 #define EXCPT_BENIGN            0
 339 #define EXCPT_CONTRIBUTORY      1
 340 #define EXCPT_PF                2
 341
 342 static int exception_class(int vector)
 343 {
 344         switch (vector) {
 345         case PF_VECTOR:
 346                 return EXCPT_PF;
 347         case DE_VECTOR:
 348         case TS_VECTOR:
 349         case NP_VECTOR:
 350         case SS_VECTOR:
 351         case GP_VECTOR:
 352                 return EXCPT_CONTRIBUTORY;
 353         default:
 354                 break;
 355         }
 356         return EXCPT_BENIGN;
 357 }
 358
 359 #define EXCPT_FAULT             0
 360 #define EXCPT_TRAP              1
 361 #define EXCPT_ABORT             2
 362 #define EXCPT_INTERRUPT         3
 363
 364 static int exception_type(int vector)
 365 {
 366         unsigned int mask;
 367
 368         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 369                 return EXCPT_INTERRUPT;
 370
 371         mask = 1 << vector;
 372
 373         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 374         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 375                 return EXCPT_TRAP;
 376
 377         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 378                 return EXCPT_ABORT;
 379
 380         /* Reserved exceptions will result in fault */
 381         return EXCPT_FAULT;
 382 }
 383
 384 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 385                 unsigned nr, bool has_error, u32 error_code,
 386                 bool reinject)
 387 {
 388         u32 prev_nr;
 389         int class1, class2;
 390
 391         kvm_make_request(KVM_REQ_EVENT, vcpu);
 392
 393         if (!vcpu->arch.exception.pending) {
 394         queue:
 395                 if (has_error && !is_protmode(vcpu))
 396                         has_error = false;
 397                 vcpu->arch.exception.pending = true;
 398                 vcpu->arch.exception.has_error_code = has_error;
 399                 vcpu->arch.exception.nr = nr;
 400                 vcpu->arch.exception.error_code = error_code;
 401                 vcpu->arch.exception.reinject = reinject;
 402                 return;
 403         }
 404
 405         /* to check exception */
 406         prev_nr = vcpu->arch.exception.nr;
 407         if (prev_nr == DF_VECTOR) {
 408                 /* triple fault -> shutdown */
 409                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 410                 return;
 411         }
 412         class1 = exception_class(prev_nr);
 413         class2 = exception_class(nr);
 414         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 415                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 416                 /* generate double fault per SDM Table 5-5 */
 417                 vcpu->arch.exception.pending = true;
 418                 vcpu->arch.exception.has_error_code = true;
 419                 vcpu->arch.exception.nr = DF_VECTOR;
 420                 vcpu->arch.exception.error_code = 0;
 421         } else
 422                 /* replace previous exception with a new one in a hope
 423                    that instruction re-execution will regenerate lost
 424                    exception */
 425                 goto queue;
 426 }
 427
 428 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 429 {
 430         kvm_multiple_exception(vcpu, nr, false, 0, false);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 433
 434 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 435 {
 436         kvm_multiple_exception(vcpu, nr, false, 0, true);
 437 }
 438 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 439
 440 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 441 {
 442         if (err)
 443                 kvm_inject_gp(vcpu, 0);
 444         else
 445                 return kvm_skip_emulated_instruction(vcpu);
 446
 447         return 1;
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 450
 451 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 452 {
 453         ++vcpu->stat.pf_guest;
 454         vcpu->arch.cr2 = fault->address;
 455         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 458
 459 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 460 {
 461         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 462                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 463         else
 464                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 465
 466         return fault->nested_page_fault;
 467 }
 468
 469 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 470 {
 471         atomic_inc(&vcpu->arch.nmi_queued);
 472         kvm_make_request(KVM_REQ_NMI, vcpu);
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 475
 476 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 477 {
 478         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 481
 482 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 483 {
 484         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 485 }
 486 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 487
 488 /*
 489  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 490  * a #GP and return false.
 491  */
 492 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 493 {
 494         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 495                 return true;
 496         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 497         return false;
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 500
 501 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 502 {
 503         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 504                 return true;
 505
 506         kvm_queue_exception(vcpu, UD_VECTOR);
 507         return false;
 508 }
 509 EXPORT_SYMBOL_GPL(kvm_require_dr);
 510
 511 /*
 512  * This function will be used to read from the physical memory of the currently
 513  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 514  * can read from guest physical or from the guest's guest physical memory.
 515  */
 516 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 517                             gfn_t ngfn, void *data, int offset, int len,
 518                             u32 access)
 519 {
 520         struct x86_exception exception;
 521         gfn_t real_gfn;
 522         gpa_t ngpa;
 523
 524         ngpa     = gfn_to_gpa(ngfn);
 525         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 526         if (real_gfn == UNMAPPED_GVA)
 527                 return -EFAULT;
 528
 529         real_gfn = gpa_to_gfn(real_gfn);
 530
 531         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 532 }
 533 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 534
 535 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 536                                void *data, int offset, int len, u32 access)
 537 {
 538         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 539                                        data, offset, len, access);
 540 }
 541
 542 /*
 543  * Load the pae pdptrs.  Return true is they are all valid.
 544  */
 545 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 546 {
 547         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 548         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 549         int i;
 550         int ret;
 551         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 552
 553         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 554                                       offset * sizeof(u64), sizeof(pdpte),
 555                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 556         if (ret < 0) {
 557                 ret = 0;
 558                 goto out;
 559         }
 560         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 561                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 562                     (pdpte[i] &
 563                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 564                         ret = 0;
 565                         goto out;
 566                 }
 567         }
 568         ret = 1;
 569
 570         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 571         __set_bit(VCPU_EXREG_PDPTR,
 572                   (unsigned long *)&vcpu->arch.regs_avail);
 573         __set_bit(VCPU_EXREG_PDPTR,
 574                   (unsigned long *)&vcpu->arch.regs_dirty);
 575 out:
 576
 577         return ret;
 578 }
 579 EXPORT_SYMBOL_GPL(load_pdptrs);
 580
 581 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 582 {
 583         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 584         bool changed = true;
 585         int offset;
 586         gfn_t gfn;
 587         int r;
 588
 589         if (is_long_mode(vcpu) || !is_pae(vcpu))
 590                 return false;
 591
 592         if (!test_bit(VCPU_EXREG_PDPTR,
 593                       (unsigned long *)&vcpu->arch.regs_avail))
 594                 return true;
 595
 596         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 597         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 598         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 599                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 600         if (r < 0)
 601                 goto out;
 602         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 603 out:
 604
 605         return changed;
 606 }
 607 EXPORT_SYMBOL_GPL(pdptrs_changed);
 608
 609 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 610 {
 611         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 612         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 613
 614         cr0 |= X86_CR0_ET;
 615
 616 #ifdef CONFIG_X86_64
 617         if (cr0 & 0xffffffff00000000UL)
 618                 return 1;
 619 #endif
 620
 621         cr0 &= ~CR0_RESERVED_BITS;
 622
 623         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 624                 return 1;
 625
 626         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 627                 return 1;
 628
 629         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 630 #ifdef CONFIG_X86_64
 631                 if ((vcpu->arch.efer & EFER_LME)) {
 632                         int cs_db, cs_l;
 633
 634                         if (!is_pae(vcpu))
 635                                 return 1;
 636                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 637                         if (cs_l)
 638                                 return 1;
 639                 } else
 640 #endif
 641                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 642                                                  kvm_read_cr3(vcpu)))
 643                         return 1;
 644         }
 645
 646         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 647                 return 1;
 648
 649         kvm_x86_ops->set_cr0(vcpu, cr0);
 650
 651         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 652                 kvm_clear_async_pf_completion_queue(vcpu);
 653                 kvm_async_pf_hash_reset(vcpu);
 654         }
 655
 656         if ((cr0 ^ old_cr0) & update_bits)
 657                 kvm_mmu_reset_context(vcpu);
 658
 659         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 660             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 661             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 662                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 663
 664         return 0;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 667
 668 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 669 {
 670         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_lmsw);
 673
 674 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 675 {
 676         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 677                         !vcpu->guest_xcr0_loaded) {
 678                 /* kvm_set_xcr() also depends on this */
 679                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 680                 vcpu->guest_xcr0_loaded = 1;
 681         }
 682 }
 683
 684 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 685 {
 686         if (vcpu->guest_xcr0_loaded) {
 687                 if (vcpu->arch.xcr0 != host_xcr0)
 688                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 689                 vcpu->guest_xcr0_loaded = 0;
 690         }
 691 }
 692
 693 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 694 {
 695         u64 xcr0 = xcr;
 696         u64 old_xcr0 = vcpu->arch.xcr0;
 697         u64 valid_bits;
 698
 699         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 700         if (index != XCR_XFEATURE_ENABLED_MASK)
 701                 return 1;
 702         if (!(xcr0 & XFEATURE_MASK_FP))
 703                 return 1;
 704         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 705                 return 1;
 706
 707         /*
 708          * Do not allow the guest to set bits that we do not support
 709          * saving.  However, xcr0 bit 0 is always set, even if the
 710          * emulated CPU does not support XSAVE (see fx_init).
 711          */
 712         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 713         if (xcr0 & ~valid_bits)
 714                 return 1;
 715
 716         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 717             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 718                 return 1;
 719
 720         if (xcr0 & XFEATURE_MASK_AVX512) {
 721                 if (!(xcr0 & XFEATURE_MASK_YMM))
 722                         return 1;
 723                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 724                         return 1;
 725         }
 726         vcpu->arch.xcr0 = xcr0;
 727
 728         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 729                 kvm_update_cpuid(vcpu);
 730         return 0;
 731 }
 732
 733 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 734 {
 735         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 736             __kvm_set_xcr(vcpu, index, xcr)) {
 737                 kvm_inject_gp(vcpu, 0);
 738                 return 1;
 739         }
 740         return 0;
 741 }
 742 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 743
 744 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 745 {
 746         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 747         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 748                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 749
 750         if (cr4 & CR4_RESERVED_BITS)
 751                 return 1;
 752
 753         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 754                 return 1;
 755
 756         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 757                 return 1;
 758
 759         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 760                 return 1;
 761
 762         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 763                 return 1;
 764
 765         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 766                 return 1;
 767
 768         if (is_long_mode(vcpu)) {
 769                 if (!(cr4 & X86_CR4_PAE))
 770                         return 1;
 771         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 772                    && ((cr4 ^ old_cr4) & pdptr_bits)
 773                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 774                                    kvm_read_cr3(vcpu)))
 775                 return 1;
 776
 777         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 778                 if (!guest_cpuid_has_pcid(vcpu))
 779                         return 1;
 780
 781                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 782                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 783                         return 1;
 784         }
 785
 786         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 787                 return 1;
 788
 789         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 790             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 791                 kvm_mmu_reset_context(vcpu);
 792
 793         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 794                 kvm_update_cpuid(vcpu);
 795
 796         return 0;
 797 }
 798 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 799
 800 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 801 {
 802 #ifdef CONFIG_X86_64
 803         cr3 &= ~CR3_PCID_INVD;
 804 #endif
 805
 806         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 807                 kvm_mmu_sync_roots(vcpu);
 808                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 809                 return 0;
 810         }
 811
 812         if (is_long_mode(vcpu)) {
 813                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 814                         return 1;
 815         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 816                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 817                 return 1;
 818
 819         vcpu->arch.cr3 = cr3;
 820         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 821         kvm_mmu_new_cr3(vcpu);
 822         return 0;
 823 }
 824 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 825
 826 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 827 {
 828         if (cr8 & CR8_RESERVED_BITS)
 829                 return 1;
 830         if (lapic_in_kernel(vcpu))
 831                 kvm_lapic_set_tpr(vcpu, cr8);
 832         else
 833                 vcpu->arch.cr8 = cr8;
 834         return 0;
 835 }
 836 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 837
 838 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 839 {
 840         if (lapic_in_kernel(vcpu))
 841                 return kvm_lapic_get_cr8(vcpu);
 842         else
 843                 return vcpu->arch.cr8;
 844 }
 845 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 846
 847 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 848 {
 849         int i;
 850
 851         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 852                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 853                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 854                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 855         }
 856 }
 857
 858 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 859 {
 860         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 861                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 862 }
 863
 864 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 865 {
 866         unsigned long dr7;
 867
 868         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 869                 dr7 = vcpu->arch.guest_debug_dr7;
 870         else
 871                 dr7 = vcpu->arch.dr7;
 872         kvm_x86_ops->set_dr7(vcpu, dr7);
 873         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 874         if (dr7 & DR7_BP_EN_MASK)
 875                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 876 }
 877
 878 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 879 {
 880         u64 fixed = DR6_FIXED_1;
 881
 882         if (!guest_cpuid_has_rtm(vcpu))
 883                 fixed |= DR6_RTM;
 884         return fixed;
 885 }
 886
 887 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 888 {
 889         switch (dr) {
 890         case 0 ... 3:
 891                 vcpu->arch.db[dr] = val;
 892                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 893                         vcpu->arch.eff_db[dr] = val;
 894                 break;
 895         case 4:
 896                 /* fall through */
 897         case 6:
 898                 if (val & 0xffffffff00000000ULL)
 899                         return -1; /* #GP */
 900                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 901                 kvm_update_dr6(vcpu);
 902                 break;
 903         case 5:
 904                 /* fall through */
 905         default: /* 7 */
 906                 if (val & 0xffffffff00000000ULL)
 907                         return -1; /* #GP */
 908                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 909                 kvm_update_dr7(vcpu);
 910                 break;
 911         }
 912
 913         return 0;
 914 }
 915
 916 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 917 {
 918         if (__kvm_set_dr(vcpu, dr, val)) {
 919                 kvm_inject_gp(vcpu, 0);
 920                 return 1;
 921         }
 922         return 0;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_set_dr);
 925
 926 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 927 {
 928         switch (dr) {
 929         case 0 ... 3:
 930                 *val = vcpu->arch.db[dr];
 931                 break;
 932         case 4:
 933                 /* fall through */
 934         case 6:
 935                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 936                         *val = vcpu->arch.dr6;
 937                 else
 938                         *val = kvm_x86_ops->get_dr6(vcpu);
 939                 break;
 940         case 5:
 941                 /* fall through */
 942         default: /* 7 */
 943                 *val = vcpu->arch.dr7;
 944                 break;
 945         }
 946         return 0;
 947 }
 948 EXPORT_SYMBOL_GPL(kvm_get_dr);
 949
 950 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 951 {
 952         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 953         u64 data;
 954         int err;
 955
 956         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 957         if (err)
 958                 return err;
 959         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 960         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 961         return err;
 962 }
 963 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 964
 965 /*
 966  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 967  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 968  *
 969  * This list is modified at module load time to reflect the
 970  * capabilities of the host cpu. This capabilities test skips MSRs that are
 971  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 972  * may depend on host virtualization features rather than host cpu features.
 973  */
 974
 975 static u32 msrs_to_save[] = {
 976         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 977         MSR_STAR,
 978 #ifdef CONFIG_X86_64
 979         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 980 #endif
 981         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 982         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 983 };
 984
 985 static unsigned num_msrs_to_save;
 986
 987 static u32 emulated_msrs[] = {
 988         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 989         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 990         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 991         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 992         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 993         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 994         HV_X64_MSR_RESET,
 995         HV_X64_MSR_VP_INDEX,
 996         HV_X64_MSR_VP_RUNTIME,
 997         HV_X64_MSR_SCONTROL,
 998         HV_X64_MSR_STIMER0_CONFIG,
 999         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1000         MSR_KVM_PV_EOI_EN,
1001
1002         MSR_IA32_TSC_ADJUST,
1003         MSR_IA32_TSCDEADLINE,
1004         MSR_IA32_MISC_ENABLE,
1005         MSR_IA32_MCG_STATUS,
1006         MSR_IA32_MCG_CTL,
1007         MSR_IA32_MCG_EXT_CTL,
1008         MSR_IA32_SMBASE,
1009 };
1010
1011 static unsigned num_emulated_msrs;
1012
1013 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1014 {
1015         if (efer & efer_reserved_bits)
1016                 return false;
1017
1018         if (efer & EFER_FFXSR) {
1019                 struct kvm_cpuid_entry2 *feat;
1020
1021                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1022                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1023                         return false;
1024         }
1025
1026         if (efer & EFER_SVME) {
1027                 struct kvm_cpuid_entry2 *feat;
1028
1029                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1030                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1031                         return false;
1032         }
1033
1034         return true;
1035 }
1036 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1037
1038 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1039 {
1040         u64 old_efer = vcpu->arch.efer;
1041
1042         if (!kvm_valid_efer(vcpu, efer))
1043                 return 1;
1044
1045         if (is_paging(vcpu)
1046             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1047                 return 1;
1048
1049         efer &= ~EFER_LMA;
1050         efer |= vcpu->arch.efer & EFER_LMA;
1051
1052         kvm_x86_ops->set_efer(vcpu, efer);
1053
1054         /* Update reserved bits */
1055         if ((efer ^ old_efer) & EFER_NX)
1056                 kvm_mmu_reset_context(vcpu);
1057
1058         return 0;
1059 }
1060
1061 void kvm_enable_efer_bits(u64 mask)
1062 {
1063        efer_reserved_bits &= ~mask;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1066
1067 /*
1068  * Writes msr value into into the appropriate "register".
1069  * Returns 0 on success, non-0 otherwise.
1070  * Assumes vcpu_load() was already called.
1071  */
1072 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1073 {
1074         switch (msr->index) {
1075         case MSR_FS_BASE:
1076         case MSR_GS_BASE:
1077         case MSR_KERNEL_GS_BASE:
1078         case MSR_CSTAR:
1079         case MSR_LSTAR:
1080                 if (is_noncanonical_address(msr->data))
1081                         return 1;
1082                 break;
1083         case MSR_IA32_SYSENTER_EIP:
1084         case MSR_IA32_SYSENTER_ESP:
1085                 /*
1086                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1087                  * non-canonical address is written on Intel but not on
1088                  * AMD (which ignores the top 32-bits, because it does
1089                  * not implement 64-bit SYSENTER).
1090                  *
1091                  * 64-bit code should hence be able to write a non-canonical
1092                  * value on AMD.  Making the address canonical ensures that
1093                  * vmentry does not fail on Intel after writing a non-canonical
1094                  * value, and that something deterministic happens if the guest
1095                  * invokes 64-bit SYSENTER.
1096                  */
1097                 msr->data = get_canonical(msr->data);
1098         }
1099         return kvm_x86_ops->set_msr(vcpu, msr);
1100 }
1101 EXPORT_SYMBOL_GPL(kvm_set_msr);
1102
1103 /*
1104  * Adapt set_msr() to msr_io()'s calling convention
1105  */
1106 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1107 {
1108         struct msr_data msr;
1109         int r;
1110
1111         msr.index = index;
1112         msr.host_initiated = true;
1113         r = kvm_get_msr(vcpu, &msr);
1114         if (r)
1115                 return r;
1116
1117         *data = msr.data;
1118         return 0;
1119 }
1120
1121 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1122 {
1123         struct msr_data msr;
1124
1125         msr.data = *data;
1126         msr.index = index;
1127         msr.host_initiated = true;
1128         return kvm_set_msr(vcpu, &msr);
1129 }
1130
1131 #ifdef CONFIG_X86_64
1132 struct pvclock_gtod_data {
1133         seqcount_t      seq;
1134
1135         struct { /* extract of a clocksource struct */
1136                 int vclock_mode;
1137                 u64     cycle_last;
1138                 u64     mask;
1139                 u32     mult;
1140                 u32     shift;
1141         } clock;
1142
1143         u64             boot_ns;
1144         u64             nsec_base;
1145         u64             wall_time_sec;
1146 };
1147
1148 static struct pvclock_gtod_data pvclock_gtod_data;
1149
1150 static void update_pvclock_gtod(struct timekeeper *tk)
1151 {
1152         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1153         u64 boot_ns;
1154
1155         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1156
1157         write_seqcount_begin(&vdata->seq);
1158
1159         /* copy pvclock gtod data */
1160         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1161         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1162         vdata->clock.mask               = tk->tkr_mono.mask;
1163         vdata->clock.mult               = tk->tkr_mono.mult;
1164         vdata->clock.shift              = tk->tkr_mono.shift;
1165
1166         vdata->boot_ns                  = boot_ns;
1167         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1168
1169         vdata->wall_time_sec            = tk->xtime_sec;
1170
1171         write_seqcount_end(&vdata->seq);
1172 }
1173 #endif
1174
1175 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1176 {
1177         /*
1178          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1179          * vcpu_enter_guest.  This function is only called from
1180          * the physical CPU that is running vcpu.
1181          */
1182         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1183 }
1184
1185 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1186 {
1187         int version;
1188         int r;
1189         struct pvclock_wall_clock wc;
1190         struct timespec64 boot;
1191
1192         if (!wall_clock)
1193                 return;
1194
1195         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1196         if (r)
1197                 return;
1198
1199         if (version & 1)
1200                 ++version;  /* first time write, random junk */
1201
1202         ++version;
1203
1204         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1205                 return;
1206
1207         /*
1208          * The guest calculates current wall clock time by adding
1209          * system time (updated by kvm_guest_time_update below) to the
1210          * wall clock specified here.  guest system time equals host
1211          * system time for us, thus we must fill in host boot time here.
1212          */
1213         getboottime64(&boot);
1214
1215         if (kvm->arch.kvmclock_offset) {
1216                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1217                 boot = timespec64_sub(boot, ts);
1218         }
1219         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1220         wc.nsec = boot.tv_nsec;
1221         wc.version = version;
1222
1223         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1224
1225         version++;
1226         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1227 }
1228
1229 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1230 {
1231         do_shl32_div32(dividend, divisor);
1232         return dividend;
1233 }
1234
1235 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1236                                s8 *pshift, u32 *pmultiplier)
1237 {
1238         uint64_t scaled64;
1239         int32_t  shift = 0;
1240         uint64_t tps64;
1241         uint32_t tps32;
1242
1243         tps64 = base_hz;
1244         scaled64 = scaled_hz;
1245         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1246                 tps64 >>= 1;
1247                 shift--;
1248         }
1249
1250         tps32 = (uint32_t)tps64;
1251         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1252                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1253                         scaled64 >>= 1;
1254                 else
1255                         tps32 <<= 1;
1256                 shift++;
1257         }
1258
1259         *pshift = shift;
1260         *pmultiplier = div_frac(scaled64, tps32);
1261
1262         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1263                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1264 }
1265
1266 #ifdef CONFIG_X86_64
1267 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1268 #endif
1269
1270 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1271 static unsigned long max_tsc_khz;
1272
1273 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1274 {
1275         u64 v = (u64)khz * (1000000 + ppm);
1276         do_div(v, 1000000);
1277         return v;
1278 }
1279
1280 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1281 {
1282         u64 ratio;
1283
1284         /* Guest TSC same frequency as host TSC? */
1285         if (!scale) {
1286                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1287                 return 0;
1288         }
1289
1290         /* TSC scaling supported? */
1291         if (!kvm_has_tsc_control) {
1292                 if (user_tsc_khz > tsc_khz) {
1293                         vcpu->arch.tsc_catchup = 1;
1294                         vcpu->arch.tsc_always_catchup = 1;
1295                         return 0;
1296                 } else {
1297                         WARN(1, "user requested TSC rate below hardware speed\n");
1298                         return -1;
1299                 }
1300         }
1301
1302         /* TSC scaling required  - calculate ratio */
1303         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1304                                 user_tsc_khz, tsc_khz);
1305
1306         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1307                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1308                           user_tsc_khz);
1309                 return -1;
1310         }
1311
1312         vcpu->arch.tsc_scaling_ratio = ratio;
1313         return 0;
1314 }
1315
1316 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1317 {
1318         u32 thresh_lo, thresh_hi;
1319         int use_scaling = 0;
1320
1321         /* tsc_khz can be zero if TSC calibration fails */
1322         if (user_tsc_khz == 0) {
1323                 /* set tsc_scaling_ratio to a safe value */
1324                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1325                 return -1;
1326         }
1327
1328         /* Compute a scale to convert nanoseconds in TSC cycles */
1329         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1330                            &vcpu->arch.virtual_tsc_shift,
1331                            &vcpu->arch.virtual_tsc_mult);
1332         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1333
1334         /*
1335          * Compute the variation in TSC rate which is acceptable
1336          * within the range of tolerance and decide if the
1337          * rate being applied is within that bounds of the hardware
1338          * rate.  If so, no scaling or compensation need be done.
1339          */
1340         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1341         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1342         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1343                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1344                 use_scaling = 1;
1345         }
1346         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1347 }
1348
1349 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1350 {
1351         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1352                                       vcpu->arch.virtual_tsc_mult,
1353                                       vcpu->arch.virtual_tsc_shift);
1354         tsc += vcpu->arch.this_tsc_write;
1355         return tsc;
1356 }
1357
1358 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1359 {
1360 #ifdef CONFIG_X86_64
1361         bool vcpus_matched;
1362         struct kvm_arch *ka = &vcpu->kvm->arch;
1363         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1364
1365         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1366                          atomic_read(&vcpu->kvm->online_vcpus));
1367
1368         /*
1369          * Once the masterclock is enabled, always perform request in
1370          * order to update it.
1371          *
1372          * In order to enable masterclock, the host clocksource must be TSC
1373          * and the vcpus need to have matched TSCs.  When that happens,
1374          * perform request to enable masterclock.
1375          */
1376         if (ka->use_master_clock ||
1377             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1378                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1379
1380         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1381                             atomic_read(&vcpu->kvm->online_vcpus),
1382                             ka->use_master_clock, gtod->clock.vclock_mode);
1383 #endif
1384 }
1385
1386 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1387 {
1388         u64 curr_offset = vcpu->arch.tsc_offset;
1389         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1390 }
1391
1392 /*
1393  * Multiply tsc by a fixed point number represented by ratio.
1394  *
1395  * The most significant 64-N bits (mult) of ratio represent the
1396  * integral part of the fixed point number; the remaining N bits
1397  * (frac) represent the fractional part, ie. ratio represents a fixed
1398  * point number (mult + frac * 2^(-N)).
1399  *
1400  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1401  */
1402 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1403 {
1404         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1405 }
1406
1407 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1408 {
1409         u64 _tsc = tsc;
1410         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1411
1412         if (ratio != kvm_default_tsc_scaling_ratio)
1413                 _tsc = __scale_tsc(ratio, tsc);
1414
1415         return _tsc;
1416 }
1417 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1418
1419 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1420 {
1421         u64 tsc;
1422
1423         tsc = kvm_scale_tsc(vcpu, rdtsc());
1424
1425         return target_tsc - tsc;
1426 }
1427
1428 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1429 {
1430         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1431 }
1432 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1433
1434 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1435 {
1436         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1437         vcpu->arch.tsc_offset = offset;
1438 }
1439
1440 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1441 {
1442         struct kvm *kvm = vcpu->kvm;
1443         u64 offset, ns, elapsed;
1444         unsigned long flags;
1445         s64 usdiff;
1446         bool matched;
1447         bool already_matched;
1448         u64 data = msr->data;
1449
1450         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1451         offset = kvm_compute_tsc_offset(vcpu, data);
1452         ns = ktime_get_boot_ns();
1453         elapsed = ns - kvm->arch.last_tsc_nsec;
1454
1455         if (vcpu->arch.virtual_tsc_khz) {
1456                 int faulted = 0;
1457
1458                 /* n.b - signed multiplication and division required */
1459                 usdiff = data - kvm->arch.last_tsc_write;
1460 #ifdef CONFIG_X86_64
1461                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1462 #else
1463                 /* do_div() only does unsigned */
1464                 asm("1: idivl %[divisor]\n"
1465                     "2: xor %%edx, %%edx\n"
1466                     "   movl $0, %[faulted]\n"
1467                     "3:\n"
1468                     ".section .fixup,\"ax\"\n"
1469                     "4: movl $1, %[faulted]\n"
1470                     "   jmp  3b\n"
1471                     ".previous\n"
1472
1473                 _ASM_EXTABLE(1b, 4b)
1474
1475                 : "=A"(usdiff), [faulted] "=r" (faulted)
1476                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1477
1478 #endif
1479                 do_div(elapsed, 1000);
1480                 usdiff -= elapsed;
1481                 if (usdiff < 0)
1482                         usdiff = -usdiff;
1483
1484                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1485                 if (faulted)
1486                         usdiff = USEC_PER_SEC;
1487         } else
1488                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1489
1490         /*
1491          * Special case: TSC write with a small delta (1 second) of virtual
1492          * cycle time against real time is interpreted as an attempt to
1493          * synchronize the CPU.
1494          *
1495          * For a reliable TSC, we can match TSC offsets, and for an unstable
1496          * TSC, we add elapsed time in this computation.  We could let the
1497          * compensation code attempt to catch up if we fall behind, but
1498          * it's better to try to match offsets from the beginning.
1499          */
1500         if (usdiff < USEC_PER_SEC &&
1501             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1502                 if (!check_tsc_unstable()) {
1503                         offset = kvm->arch.cur_tsc_offset;
1504                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1505                 } else {
1506                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1507                         data += delta;
1508                         offset = kvm_compute_tsc_offset(vcpu, data);
1509                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1510                 }
1511                 matched = true;
1512                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1513         } else {
1514                 /*
1515                  * We split periods of matched TSC writes into generations.
1516                  * For each generation, we track the original measured
1517                  * nanosecond time, offset, and write, so if TSCs are in
1518                  * sync, we can match exact offset, and if not, we can match
1519                  * exact software computation in compute_guest_tsc()
1520                  *
1521                  * These values are tracked in kvm->arch.cur_xxx variables.
1522                  */
1523                 kvm->arch.cur_tsc_generation++;
1524                 kvm->arch.cur_tsc_nsec = ns;
1525                 kvm->arch.cur_tsc_write = data;
1526                 kvm->arch.cur_tsc_offset = offset;
1527                 matched = false;
1528                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1529                          kvm->arch.cur_tsc_generation, data);
1530         }
1531
1532         /*
1533          * We also track th most recent recorded KHZ, write and time to
1534          * allow the matching interval to be extended at each write.
1535          */
1536         kvm->arch.last_tsc_nsec = ns;
1537         kvm->arch.last_tsc_write = data;
1538         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1539
1540         vcpu->arch.last_guest_tsc = data;
1541
1542         /* Keep track of which generation this VCPU has synchronized to */
1543         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1544         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1545         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1546
1547         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1548                 update_ia32_tsc_adjust_msr(vcpu, offset);
1549         kvm_vcpu_write_tsc_offset(vcpu, offset);
1550         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1551
1552         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1553         if (!matched) {
1554                 kvm->arch.nr_vcpus_matched_tsc = 0;
1555         } else if (!already_matched) {
1556                 kvm->arch.nr_vcpus_matched_tsc++;
1557         }
1558
1559         kvm_track_tsc_matching(vcpu);
1560         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1561 }
1562
1563 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1564
1565 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1566                                            s64 adjustment)
1567 {
1568         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1569 }
1570
1571 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1572 {
1573         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1574                 WARN_ON(adjustment < 0);
1575         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1576         adjust_tsc_offset_guest(vcpu, adjustment);
1577 }
1578
1579 #ifdef CONFIG_X86_64
1580
1581 static u64 read_tsc(void)
1582 {
1583         u64 ret = (u64)rdtsc_ordered();
1584         u64 last = pvclock_gtod_data.clock.cycle_last;
1585
1586         if (likely(ret >= last))
1587                 return ret;
1588
1589         /*
1590          * GCC likes to generate cmov here, but this branch is extremely
1591          * predictable (it's just a function of time and the likely is
1592          * very likely) and there's a data dependence, so force GCC
1593          * to generate a branch instead.  I don't barrier() because
1594          * we don't actually need a barrier, and if this function
1595          * ever gets inlined it will generate worse code.
1596          */
1597         asm volatile ("");
1598         return last;
1599 }
1600
1601 static inline u64 vgettsc(u64 *cycle_now)
1602 {
1603         long v;
1604         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1605
1606         *cycle_now = read_tsc();
1607
1608         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1609         return v * gtod->clock.mult;
1610 }
1611
1612 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1613 {
1614         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1615         unsigned long seq;
1616         int mode;
1617         u64 ns;
1618
1619         do {
1620                 seq = read_seqcount_begin(&gtod->seq);
1621                 mode = gtod->clock.vclock_mode;
1622                 ns = gtod->nsec_base;
1623                 ns += vgettsc(cycle_now);
1624                 ns >>= gtod->clock.shift;
1625                 ns += gtod->boot_ns;
1626         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1627         *t = ns;
1628
1629         return mode;
1630 }
1631
1632 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1633 {
1634         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1635         unsigned long seq;
1636         int mode;
1637         u64 ns;
1638
1639         do {
1640                 seq = read_seqcount_begin(&gtod->seq);
1641                 mode = gtod->clock.vclock_mode;
1642                 ts->tv_sec = gtod->wall_time_sec;
1643                 ns = gtod->nsec_base;
1644                 ns += vgettsc(cycle_now);
1645                 ns >>= gtod->clock.shift;
1646         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1647
1648         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1649         ts->tv_nsec = ns;
1650
1651         return mode;
1652 }
1653
1654 /* returns true if host is using tsc clocksource */
1655 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1656 {
1657         /* checked again under seqlock below */
1658         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1659                 return false;
1660
1661         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1662 }
1663
1664 /* returns true if host is using tsc clocksource */
1665 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1666                                            u64 *cycle_now)
1667 {
1668         /* checked again under seqlock below */
1669         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1670                 return false;
1671
1672         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1673 }
1674 #endif
1675
1676 /*
1677  *
1678  * Assuming a stable TSC across physical CPUS, and a stable TSC
1679  * across virtual CPUs, the following condition is possible.
1680  * Each numbered line represents an event visible to both
1681  * CPUs at the next numbered event.
1682  *
1683  * "timespecX" represents host monotonic time. "tscX" represents
1684  * RDTSC value.
1685  *
1686  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1687  *
1688  * 1.  read timespec0,tsc0
1689  * 2.                                   | timespec1 = timespec0 + N
1690  *                                      | tsc1 = tsc0 + M
1691  * 3. transition to guest               | transition to guest
1692  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1693  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1694  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1695  *
1696  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1697  *
1698  *      - ret0 < ret1
1699  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1700  *              ...
1701  *      - 0 < N - M => M < N
1702  *
1703  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1704  * always the case (the difference between two distinct xtime instances
1705  * might be smaller then the difference between corresponding TSC reads,
1706  * when updating guest vcpus pvclock areas).
1707  *
1708  * To avoid that problem, do not allow visibility of distinct
1709  * system_timestamp/tsc_timestamp values simultaneously: use a master
1710  * copy of host monotonic time values. Update that master copy
1711  * in lockstep.
1712  *
1713  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1714  *
1715  */
1716
1717 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1718 {
1719 #ifdef CONFIG_X86_64
1720         struct kvm_arch *ka = &kvm->arch;
1721         int vclock_mode;
1722         bool host_tsc_clocksource, vcpus_matched;
1723
1724         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1725                         atomic_read(&kvm->online_vcpus));
1726
1727         /*
1728          * If the host uses TSC clock, then passthrough TSC as stable
1729          * to the guest.
1730          */
1731         host_tsc_clocksource = kvm_get_time_and_clockread(
1732                                         &ka->master_kernel_ns,
1733                                         &ka->master_cycle_now);
1734
1735         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1736                                 && !backwards_tsc_observed
1737                                 && !ka->boot_vcpu_runs_old_kvmclock;
1738
1739         if (ka->use_master_clock)
1740                 atomic_set(&kvm_guest_has_master_clock, 1);
1741
1742         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1743         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1744                                         vcpus_matched);
1745 #endif
1746 }
1747
1748 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1749 {
1750         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1751 }
1752
1753 static void kvm_gen_update_masterclock(struct kvm *kvm)
1754 {
1755 #ifdef CONFIG_X86_64
1756         int i;
1757         struct kvm_vcpu *vcpu;
1758         struct kvm_arch *ka = &kvm->arch;
1759
1760         spin_lock(&ka->pvclock_gtod_sync_lock);
1761         kvm_make_mclock_inprogress_request(kvm);
1762         /* no guest entries from this point */
1763         pvclock_update_vm_gtod_copy(kvm);
1764
1765         kvm_for_each_vcpu(i, vcpu, kvm)
1766                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1767
1768         /* guest entries allowed */
1769         kvm_for_each_vcpu(i, vcpu, kvm)
1770                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1771
1772         spin_unlock(&ka->pvclock_gtod_sync_lock);
1773 #endif
1774 }
1775
1776 static u64 __get_kvmclock_ns(struct kvm *kvm)
1777 {
1778         struct kvm_arch *ka = &kvm->arch;
1779         struct pvclock_vcpu_time_info hv_clock;
1780
1781         spin_lock(&ka->pvclock_gtod_sync_lock);
1782         if (!ka->use_master_clock) {
1783                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1784                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1785         }
1786
1787         hv_clock.tsc_timestamp = ka->master_cycle_now;
1788         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1789         spin_unlock(&ka->pvclock_gtod_sync_lock);
1790
1791         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1792                            &hv_clock.tsc_shift,
1793                            &hv_clock.tsc_to_system_mul);
1794         return __pvclock_read_cycles(&hv_clock, rdtsc());
1795 }
1796
1797 u64 get_kvmclock_ns(struct kvm *kvm)
1798 {
1799         unsigned long flags;
1800         s64 ns;
1801
1802         local_irq_save(flags);
1803         ns = __get_kvmclock_ns(kvm);
1804         local_irq_restore(flags);
1805
1806         return ns;
1807 }
1808
1809 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1810 {
1811         struct kvm_vcpu_arch *vcpu = &v->arch;
1812         struct pvclock_vcpu_time_info guest_hv_clock;
1813
1814         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1815                 &guest_hv_clock, sizeof(guest_hv_clock))))
1816                 return;
1817
1818         /* This VCPU is paused, but it's legal for a guest to read another
1819          * VCPU's kvmclock, so we really have to follow the specification where
1820          * it says that version is odd if data is being modified, and even after
1821          * it is consistent.
1822          *
1823          * Version field updates must be kept separate.  This is because
1824          * kvm_write_guest_cached might use a "rep movs" instruction, and
1825          * writes within a string instruction are weakly ordered.  So there
1826          * are three writes overall.
1827          *
1828          * As a small optimization, only write the version field in the first
1829          * and third write.  The vcpu->pv_time cache is still valid, because the
1830          * version field is the first in the struct.
1831          */
1832         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1833
1834         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1835         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1836                                 &vcpu->hv_clock,
1837                                 sizeof(vcpu->hv_clock.version));
1838
1839         smp_wmb();
1840
1841         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1842         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1843
1844         if (vcpu->pvclock_set_guest_stopped_request) {
1845                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1846                 vcpu->pvclock_set_guest_stopped_request = false;
1847         }
1848
1849         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1850
1851         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1852                                 &vcpu->hv_clock,
1853                                 sizeof(vcpu->hv_clock));
1854
1855         smp_wmb();
1856
1857         vcpu->hv_clock.version++;
1858         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1859                                 &vcpu->hv_clock,
1860                                 sizeof(vcpu->hv_clock.version));
1861 }
1862
1863 static int kvm_guest_time_update(struct kvm_vcpu *v)
1864 {
1865         unsigned long flags, tgt_tsc_khz;
1866         struct kvm_vcpu_arch *vcpu = &v->arch;
1867         struct kvm_arch *ka = &v->kvm->arch;
1868         s64 kernel_ns;
1869         u64 tsc_timestamp, host_tsc;
1870         u8 pvclock_flags;
1871         bool use_master_clock;
1872
1873         kernel_ns = 0;
1874         host_tsc = 0;
1875
1876         /*
1877          * If the host uses TSC clock, then passthrough TSC as stable
1878          * to the guest.
1879          */
1880         spin_lock(&ka->pvclock_gtod_sync_lock);
1881         use_master_clock = ka->use_master_clock;
1882         if (use_master_clock) {
1883                 host_tsc = ka->master_cycle_now;
1884                 kernel_ns = ka->master_kernel_ns;
1885         }
1886         spin_unlock(&ka->pvclock_gtod_sync_lock);
1887
1888         /* Keep irq disabled to prevent changes to the clock */
1889         local_irq_save(flags);
1890         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1891         if (unlikely(tgt_tsc_khz == 0)) {
1892                 local_irq_restore(flags);
1893                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1894                 return 1;
1895         }
1896         if (!use_master_clock) {
1897                 host_tsc = rdtsc();
1898                 kernel_ns = ktime_get_boot_ns();
1899         }
1900
1901         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1902
1903         /*
1904          * We may have to catch up the TSC to match elapsed wall clock
1905          * time for two reasons, even if kvmclock is used.
1906          *   1) CPU could have been running below the maximum TSC rate
1907          *   2) Broken TSC compensation resets the base at each VCPU
1908          *      entry to avoid unknown leaps of TSC even when running
1909          *      again on the same CPU.  This may cause apparent elapsed
1910          *      time to disappear, and the guest to stand still or run
1911          *      very slowly.
1912          */
1913         if (vcpu->tsc_catchup) {
1914                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1915                 if (tsc > tsc_timestamp) {
1916                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1917                         tsc_timestamp = tsc;
1918                 }
1919         }
1920
1921         local_irq_restore(flags);
1922
1923         /* With all the info we got, fill in the values */
1924
1925         if (kvm_has_tsc_control)
1926                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1927
1928         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1929                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1930                                    &vcpu->hv_clock.tsc_shift,
1931                                    &vcpu->hv_clock.tsc_to_system_mul);
1932                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1933         }
1934
1935         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1936         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1937         vcpu->last_guest_tsc = tsc_timestamp;
1938
1939         /* If the host uses TSC clocksource, then it is stable */
1940         pvclock_flags = 0;
1941         if (use_master_clock)
1942                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1943
1944         vcpu->hv_clock.flags = pvclock_flags;
1945
1946         if (vcpu->pv_time_enabled)
1947                 kvm_setup_pvclock_page(v);
1948         if (v == kvm_get_vcpu(v->kvm, 0))
1949                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1950         return 0;
1951 }
1952
1953 /*
1954  * kvmclock updates which are isolated to a given vcpu, such as
1955  * vcpu->cpu migration, should not allow system_timestamp from
1956  * the rest of the vcpus to remain static. Otherwise ntp frequency
1957  * correction applies to one vcpu's system_timestamp but not
1958  * the others.
1959  *
1960  * So in those cases, request a kvmclock update for all vcpus.
1961  * We need to rate-limit these requests though, as they can
1962  * considerably slow guests that have a large number of vcpus.
1963  * The time for a remote vcpu to update its kvmclock is bound
1964  * by the delay we use to rate-limit the updates.
1965  */
1966
1967 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1968
1969 static void kvmclock_update_fn(struct work_struct *work)
1970 {
1971         int i;
1972         struct delayed_work *dwork = to_delayed_work(work);
1973         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1974                                            kvmclock_update_work);
1975         struct kvm *kvm = container_of(ka, struct kvm, arch);
1976         struct kvm_vcpu *vcpu;
1977
1978         kvm_for_each_vcpu(i, vcpu, kvm) {
1979                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1980                 kvm_vcpu_kick(vcpu);
1981         }
1982 }
1983
1984 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1985 {
1986         struct kvm *kvm = v->kvm;
1987
1988         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1989         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1990                                         KVMCLOCK_UPDATE_DELAY);
1991 }
1992
1993 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1994
1995 static void kvmclock_sync_fn(struct work_struct *work)
1996 {
1997         struct delayed_work *dwork = to_delayed_work(work);
1998         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1999                                            kvmclock_sync_work);
2000         struct kvm *kvm = container_of(ka, struct kvm, arch);
2001
2002         if (!kvmclock_periodic_sync)
2003                 return;
2004
2005         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2006         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2007                                         KVMCLOCK_SYNC_PERIOD);
2008 }
2009
2010 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2011 {
2012         u64 mcg_cap = vcpu->arch.mcg_cap;
2013         unsigned bank_num = mcg_cap & 0xff;
2014
2015         switch (msr) {
2016         case MSR_IA32_MCG_STATUS:
2017                 vcpu->arch.mcg_status = data;
2018                 break;
2019         case MSR_IA32_MCG_CTL:
2020                 if (!(mcg_cap & MCG_CTL_P))
2021                         return 1;
2022                 if (data != 0 && data != ~(u64)0)
2023                         return -1;
2024                 vcpu->arch.mcg_ctl = data;
2025                 break;
2026         default:
2027                 if (msr >= MSR_IA32_MC0_CTL &&
2028                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2029                         u32 offset = msr - MSR_IA32_MC0_CTL;
2030                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2031                          * some Linux kernels though clear bit 10 in bank 4 to
2032                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2033                          * this to avoid an uncatched #GP in the guest
2034                          */
2035                         if ((offset & 0x3) == 0 &&
2036                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2037                                 return -1;
2038                         vcpu->arch.mce_banks[offset] = data;
2039                         break;
2040                 }
2041                 return 1;
2042         }
2043         return 0;
2044 }
2045
2046 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2047 {
2048         struct kvm *kvm = vcpu->kvm;
2049         int lm = is_long_mode(vcpu);
2050         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2051                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2052         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2053                 : kvm->arch.xen_hvm_config.blob_size_32;
2054         u32 page_num = data & ~PAGE_MASK;
2055         u64 page_addr = data & PAGE_MASK;
2056         u8 *page;
2057         int r;
2058
2059         r = -E2BIG;
2060         if (page_num >= blob_size)
2061                 goto out;
2062         r = -ENOMEM;
2063         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2064         if (IS_ERR(page)) {
2065                 r = PTR_ERR(page);
2066                 goto out;
2067         }
2068         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2069                 goto out_free;
2070         r = 0;
2071 out_free:
2072         kfree(page);
2073 out:
2074         return r;
2075 }
2076
2077 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2078 {
2079         gpa_t gpa = data & ~0x3f;
2080
2081         /* Bits 2:5 are reserved, Should be zero */
2082         if (data & 0x3c)
2083                 return 1;
2084
2085         vcpu->arch.apf.msr_val = data;
2086
2087         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2088                 kvm_clear_async_pf_completion_queue(vcpu);
2089                 kvm_async_pf_hash_reset(vcpu);
2090                 return 0;
2091         }
2092
2093         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2094                                         sizeof(u32)))
2095                 return 1;
2096
2097         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2098         kvm_async_pf_wakeup_all(vcpu);
2099         return 0;
2100 }
2101
2102 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2103 {
2104         vcpu->arch.pv_time_enabled = false;
2105 }
2106
2107 static void record_steal_time(struct kvm_vcpu *vcpu)
2108 {
2109         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2110                 return;
2111
2112         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2113                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2114                 return;
2115
2116         vcpu->arch.st.steal.preempted = 0;
2117
2118         if (vcpu->arch.st.steal.version & 1)
2119                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2120
2121         vcpu->arch.st.steal.version += 1;
2122
2123         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2124                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2125
2126         smp_wmb();
2127
2128         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2129                 vcpu->arch.st.last_steal;
2130         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2131
2132         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2133                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2134
2135         smp_wmb();
2136
2137         vcpu->arch.st.steal.version += 1;
2138
2139         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2140                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2141 }
2142
2143 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2144 {
2145         bool pr = false;
2146         u32 msr = msr_info->index;
2147         u64 data = msr_info->data;
2148
2149         switch (msr) {
2150         case MSR_AMD64_NB_CFG:
2151         case MSR_IA32_UCODE_REV:
2152         case MSR_IA32_UCODE_WRITE:
2153         case MSR_VM_HSAVE_PA:
2154         case MSR_AMD64_PATCH_LOADER:
2155         case MSR_AMD64_BU_CFG2:
2156                 break;
2157
2158         case MSR_EFER:
2159                 return set_efer(vcpu, data);
2160         case MSR_K7_HWCR:
2161                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2162                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2163                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2164                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2165                 if (data != 0) {
2166                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2167                                     data);
2168                         return 1;
2169                 }
2170                 break;
2171         case MSR_FAM10H_MMIO_CONF_BASE:
2172                 if (data != 0) {
2173                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2174                                     "0x%llx\n", data);
2175                         return 1;
2176                 }
2177                 break;
2178         case MSR_IA32_DEBUGCTLMSR:
2179                 if (!data) {
2180                         /* We support the non-activated case already */
2181                         break;
2182                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2183                         /* Values other than LBR and BTF are vendor-specific,
2184                            thus reserved and should throw a #GP */
2185                         return 1;
2186                 }
2187                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2188                             __func__, data);
2189                 break;
2190         case 0x200 ... 0x2ff:
2191                 return kvm_mtrr_set_msr(vcpu, msr, data);
2192         case MSR_IA32_APICBASE:
2193                 return kvm_set_apic_base(vcpu, msr_info);
2194         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2195                 return kvm_x2apic_msr_write(vcpu, msr, data);
2196         case MSR_IA32_TSCDEADLINE:
2197                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2198                 break;
2199         case MSR_IA32_TSC_ADJUST:
2200                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2201                         if (!msr_info->host_initiated) {
2202                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2203                                 adjust_tsc_offset_guest(vcpu, adj);
2204                         }
2205                         vcpu->arch.ia32_tsc_adjust_msr = data;
2206                 }
2207                 break;
2208         case MSR_IA32_MISC_ENABLE:
2209                 vcpu->arch.ia32_misc_enable_msr = data;
2210                 break;
2211         case MSR_IA32_SMBASE:
2212                 if (!msr_info->host_initiated)
2213                         return 1;
2214                 vcpu->arch.smbase = data;
2215                 break;
2216         case MSR_KVM_WALL_CLOCK_NEW:
2217         case MSR_KVM_WALL_CLOCK:
2218                 vcpu->kvm->arch.wall_clock = data;
2219                 kvm_write_wall_clock(vcpu->kvm, data);
2220                 break;
2221         case MSR_KVM_SYSTEM_TIME_NEW:
2222         case MSR_KVM_SYSTEM_TIME: {
2223                 struct kvm_arch *ka = &vcpu->kvm->arch;
2224
2225                 kvmclock_reset(vcpu);
2226
2227                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2228                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2229
2230                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2231                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2232                                         &vcpu->requests);
2233
2234                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2235                 }
2236
2237                 vcpu->arch.time = data;
2238                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2239
2240                 /* we verify if the enable bit is set... */
2241                 if (!(data & 1))
2242                         break;
2243
2244                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2245                      &vcpu->arch.pv_time, data & ~1ULL,
2246                      sizeof(struct pvclock_vcpu_time_info)))
2247                         vcpu->arch.pv_time_enabled = false;
2248                 else
2249                         vcpu->arch.pv_time_enabled = true;
2250
2251                 break;
2252         }
2253         case MSR_KVM_ASYNC_PF_EN:
2254                 if (kvm_pv_enable_async_pf(vcpu, data))
2255                         return 1;
2256                 break;
2257         case MSR_KVM_STEAL_TIME:
2258
2259                 if (unlikely(!sched_info_on()))
2260                         return 1;
2261
2262                 if (data & KVM_STEAL_RESERVED_MASK)
2263                         return 1;
2264
2265                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2266                                                 data & KVM_STEAL_VALID_BITS,
2267                                                 sizeof(struct kvm_steal_time)))
2268                         return 1;
2269
2270                 vcpu->arch.st.msr_val = data;
2271
2272                 if (!(data & KVM_MSR_ENABLED))
2273                         break;
2274
2275                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2276
2277                 break;
2278         case MSR_KVM_PV_EOI_EN:
2279                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2280                         return 1;
2281                 break;
2282
2283         case MSR_IA32_MCG_CTL:
2284         case MSR_IA32_MCG_STATUS:
2285         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2286                 return set_msr_mce(vcpu, msr, data);
2287
2288         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2289         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2290                 pr = true; /* fall through */
2291         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2292         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2293                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2294                         return kvm_pmu_set_msr(vcpu, msr_info);
2295
2296                 if (pr || data != 0)
2297                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2298                                     "0x%x data 0x%llx\n", msr, data);
2299                 break;
2300         case MSR_K7_CLK_CTL:
2301                 /*
2302                  * Ignore all writes to this no longer documented MSR.
2303                  * Writes are only relevant for old K7 processors,
2304                  * all pre-dating SVM, but a recommended workaround from
2305                  * AMD for these chips. It is possible to specify the
2306                  * affected processor models on the command line, hence
2307                  * the need to ignore the workaround.
2308                  */
2309                 break;
2310         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2311         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2312         case HV_X64_MSR_CRASH_CTL:
2313         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2314                 return kvm_hv_set_msr_common(vcpu, msr, data,
2315                                              msr_info->host_initiated);
2316         case MSR_IA32_BBL_CR_CTL3:
2317                 /* Drop writes to this legacy MSR -- see rdmsr
2318                  * counterpart for further detail.
2319                  */
2320                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2321                 break;
2322         case MSR_AMD64_OSVW_ID_LENGTH:
2323                 if (!guest_cpuid_has_osvw(vcpu))
2324                         return 1;
2325                 vcpu->arch.osvw.length = data;
2326                 break;
2327         case MSR_AMD64_OSVW_STATUS:
2328                 if (!guest_cpuid_has_osvw(vcpu))
2329                         return 1;
2330                 vcpu->arch.osvw.status = data;
2331                 break;
2332         default:
2333                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2334                         return xen_hvm_config(vcpu, data);
2335                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2336                         return kvm_pmu_set_msr(vcpu, msr_info);
2337                 if (!ignore_msrs) {
2338                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2339                                     msr, data);
2340                         return 1;
2341                 } else {
2342                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2343                                     msr, data);
2344                         break;
2345                 }
2346         }
2347         return 0;
2348 }
2349 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2350
2351
2352 /*
2353  * Reads an msr value (of 'msr_index') into 'pdata'.
2354  * Returns 0 on success, non-0 otherwise.
2355  * Assumes vcpu_load() was already called.
2356  */
2357 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2358 {
2359         return kvm_x86_ops->get_msr(vcpu, msr);
2360 }
2361 EXPORT_SYMBOL_GPL(kvm_get_msr);
2362
2363 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2364 {
2365         u64 data;
2366         u64 mcg_cap = vcpu->arch.mcg_cap;
2367         unsigned bank_num = mcg_cap & 0xff;
2368
2369         switch (msr) {
2370         case MSR_IA32_P5_MC_ADDR:
2371         case MSR_IA32_P5_MC_TYPE:
2372                 data = 0;
2373                 break;
2374         case MSR_IA32_MCG_CAP:
2375                 data = vcpu->arch.mcg_cap;
2376                 break;
2377         case MSR_IA32_MCG_CTL:
2378                 if (!(mcg_cap & MCG_CTL_P))
2379                         return 1;
2380                 data = vcpu->arch.mcg_ctl;
2381                 break;
2382         case MSR_IA32_MCG_STATUS:
2383                 data = vcpu->arch.mcg_status;
2384                 break;
2385         default:
2386                 if (msr >= MSR_IA32_MC0_CTL &&
2387                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2388                         u32 offset = msr - MSR_IA32_MC0_CTL;
2389                         data = vcpu->arch.mce_banks[offset];
2390                         break;
2391                 }
2392                 return 1;
2393         }
2394         *pdata = data;
2395         return 0;
2396 }
2397
2398 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2399 {
2400         switch (msr_info->index) {
2401         case MSR_IA32_PLATFORM_ID:
2402         case MSR_IA32_EBL_CR_POWERON:
2403         case MSR_IA32_DEBUGCTLMSR:
2404         case MSR_IA32_LASTBRANCHFROMIP:
2405         case MSR_IA32_LASTBRANCHTOIP:
2406         case MSR_IA32_LASTINTFROMIP:
2407         case MSR_IA32_LASTINTTOIP:
2408         case MSR_K8_SYSCFG:
2409         case MSR_K8_TSEG_ADDR:
2410         case MSR_K8_TSEG_MASK:
2411         case MSR_K7_HWCR:
2412         case MSR_VM_HSAVE_PA:
2413         case MSR_K8_INT_PENDING_MSG:
2414         case MSR_AMD64_NB_CFG:
2415         case MSR_FAM10H_MMIO_CONF_BASE:
2416         case MSR_AMD64_BU_CFG2:
2417         case MSR_IA32_PERF_CTL:
2418                 msr_info->data = 0;
2419                 break;
2420         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2421         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2422         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2423         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2424                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2425                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2426                 msr_info->data = 0;
2427                 break;
2428         case MSR_IA32_UCODE_REV:
2429                 msr_info->data = 0x100000000ULL;
2430                 break;
2431         case MSR_MTRRcap:
2432         case 0x200 ... 0x2ff:
2433                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2434         case 0xcd: /* fsb frequency */
2435                 msr_info->data = 3;
2436                 break;
2437                 /*
2438                  * MSR_EBC_FREQUENCY_ID
2439                  * Conservative value valid for even the basic CPU models.
2440                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2441                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2442                  * and 266MHz for model 3, or 4. Set Core Clock
2443                  * Frequency to System Bus Frequency Ratio to 1 (bits
2444                  * 31:24) even though these are only valid for CPU
2445                  * models > 2, however guests may end up dividing or
2446                  * multiplying by zero otherwise.
2447                  */
2448         case MSR_EBC_FREQUENCY_ID:
2449                 msr_info->data = 1 << 24;
2450                 break;
2451         case MSR_IA32_APICBASE:
2452                 msr_info->data = kvm_get_apic_base(vcpu);
2453                 break;
2454         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2455                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2456                 break;
2457         case MSR_IA32_TSCDEADLINE:
2458                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2459                 break;
2460         case MSR_IA32_TSC_ADJUST:
2461                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2462                 break;
2463         case MSR_IA32_MISC_ENABLE:
2464                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2465                 break;
2466         case MSR_IA32_SMBASE:
2467                 if (!msr_info->host_initiated)
2468                         return 1;
2469                 msr_info->data = vcpu->arch.smbase;
2470                 break;
2471         case MSR_IA32_PERF_STATUS:
2472                 /* TSC increment by tick */
2473                 msr_info->data = 1000ULL;
2474                 /* CPU multiplier */
2475                 msr_info->data |= (((uint64_t)4ULL) << 40);
2476                 break;
2477         case MSR_EFER:
2478                 msr_info->data = vcpu->arch.efer;
2479                 break;
2480         case MSR_KVM_WALL_CLOCK:
2481         case MSR_KVM_WALL_CLOCK_NEW:
2482                 msr_info->data = vcpu->kvm->arch.wall_clock;
2483                 break;
2484         case MSR_KVM_SYSTEM_TIME:
2485         case MSR_KVM_SYSTEM_TIME_NEW:
2486                 msr_info->data = vcpu->arch.time;
2487                 break;
2488         case MSR_KVM_ASYNC_PF_EN:
2489                 msr_info->data = vcpu->arch.apf.msr_val;
2490                 break;
2491         case MSR_KVM_STEAL_TIME:
2492                 msr_info->data = vcpu->arch.st.msr_val;
2493                 break;
2494         case MSR_KVM_PV_EOI_EN:
2495                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2496                 break;
2497         case MSR_IA32_P5_MC_ADDR:
2498         case MSR_IA32_P5_MC_TYPE:
2499         case MSR_IA32_MCG_CAP:
2500         case MSR_IA32_MCG_CTL:
2501         case MSR_IA32_MCG_STATUS:
2502         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2503                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2504         case MSR_K7_CLK_CTL:
2505                 /*
2506                  * Provide expected ramp-up count for K7. All other
2507                  * are set to zero, indicating minimum divisors for
2508                  * every field.
2509                  *
2510                  * This prevents guest kernels on AMD host with CPU
2511                  * type 6, model 8 and higher from exploding due to
2512                  * the rdmsr failing.
2513                  */
2514                 msr_info->data = 0x20000000;
2515                 break;
2516         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2517         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2518         case HV_X64_MSR_CRASH_CTL:
2519         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2520                 return kvm_hv_get_msr_common(vcpu,
2521                                              msr_info->index, &msr_info->data);
2522                 break;
2523         case MSR_IA32_BBL_CR_CTL3:
2524                 /* This legacy MSR exists but isn't fully documented in current
2525                  * silicon.  It is however accessed by winxp in very narrow
2526                  * scenarios where it sets bit #19, itself documented as
2527                  * a "reserved" bit.  Best effort attempt to source coherent
2528                  * read data here should the balance of the register be
2529                  * interpreted by the guest:
2530                  *
2531                  * L2 cache control register 3: 64GB range, 256KB size,
2532                  * enabled, latency 0x1, configured
2533                  */
2534                 msr_info->data = 0xbe702111;
2535                 break;
2536         case MSR_AMD64_OSVW_ID_LENGTH:
2537                 if (!guest_cpuid_has_osvw(vcpu))
2538                         return 1;
2539                 msr_info->data = vcpu->arch.osvw.length;
2540                 break;
2541         case MSR_AMD64_OSVW_STATUS:
2542                 if (!guest_cpuid_has_osvw(vcpu))
2543                         return 1;
2544                 msr_info->data = vcpu->arch.osvw.status;
2545                 break;
2546         default:
2547                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2548                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2549                 if (!ignore_msrs) {
2550                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2551                                                msr_info->index);
2552                         return 1;
2553                 } else {
2554                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2555                         msr_info->data = 0;
2556                 }
2557                 break;
2558         }
2559         return 0;
2560 }
2561 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2562
2563 /*
2564  * Read or write a bunch of msrs. All parameters are kernel addresses.
2565  *
2566  * @return number of msrs set successfully.
2567  */
2568 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2569                     struct kvm_msr_entry *entries,
2570                     int (*do_msr)(struct kvm_vcpu *vcpu,
2571                                   unsigned index, u64 *data))
2572 {
2573         int i, idx;
2574
2575         idx = srcu_read_lock(&vcpu->kvm->srcu);
2576         for (i = 0; i < msrs->nmsrs; ++i)
2577                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2578                         break;
2579         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2580
2581         return i;
2582 }
2583
2584 /*
2585  * Read or write a bunch of msrs. Parameters are user addresses.
2586  *
2587  * @return number of msrs set successfully.
2588  */
2589 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2590                   int (*do_msr)(struct kvm_vcpu *vcpu,
2591                                 unsigned index, u64 *data),
2592                   int writeback)
2593 {
2594         struct kvm_msrs msrs;
2595         struct kvm_msr_entry *entries;
2596         int r, n;
2597         unsigned size;
2598
2599         r = -EFAULT;
2600         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2601                 goto out;
2602
2603         r = -E2BIG;
2604         if (msrs.nmsrs >= MAX_IO_MSRS)
2605                 goto out;
2606
2607         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2608         entries = memdup_user(user_msrs->entries, size);
2609         if (IS_ERR(entries)) {
2610                 r = PTR_ERR(entries);
2611                 goto out;
2612         }
2613
2614         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2615         if (r < 0)
2616                 goto out_free;
2617
2618         r = -EFAULT;
2619         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2620                 goto out_free;
2621
2622         r = n;
2623
2624 out_free:
2625         kfree(entries);
2626 out:
2627         return r;
2628 }
2629
2630 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2631 {
2632         int r;
2633
2634         switch (ext) {
2635         case KVM_CAP_IRQCHIP:
2636         case KVM_CAP_HLT:
2637         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2638         case KVM_CAP_SET_TSS_ADDR:
2639         case KVM_CAP_EXT_CPUID:
2640         case KVM_CAP_EXT_EMUL_CPUID:
2641         case KVM_CAP_CLOCKSOURCE:
2642         case KVM_CAP_PIT:
2643         case KVM_CAP_NOP_IO_DELAY:
2644         case KVM_CAP_MP_STATE:
2645         case KVM_CAP_SYNC_MMU:
2646         case KVM_CAP_USER_NMI:
2647         case KVM_CAP_REINJECT_CONTROL:
2648         case KVM_CAP_IRQ_INJECT_STATUS:
2649         case KVM_CAP_IOEVENTFD:
2650         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2651         case KVM_CAP_PIT2:
2652         case KVM_CAP_PIT_STATE2:
2653         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2654         case KVM_CAP_XEN_HVM:
2655         case KVM_CAP_VCPU_EVENTS:
2656         case KVM_CAP_HYPERV:
2657         case KVM_CAP_HYPERV_VAPIC:
2658         case KVM_CAP_HYPERV_SPIN:
2659         case KVM_CAP_HYPERV_SYNIC:
2660         case KVM_CAP_PCI_SEGMENT:
2661         case KVM_CAP_DEBUGREGS:
2662         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2663         case KVM_CAP_XSAVE:
2664         case KVM_CAP_ASYNC_PF:
2665         case KVM_CAP_GET_TSC_KHZ:
2666         case KVM_CAP_KVMCLOCK_CTRL:
2667         case KVM_CAP_READONLY_MEM:
2668         case KVM_CAP_HYPERV_TIME:
2669         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2670         case KVM_CAP_TSC_DEADLINE_TIMER:
2671         case KVM_CAP_ENABLE_CAP_VM:
2672         case KVM_CAP_DISABLE_QUIRKS:
2673         case KVM_CAP_SET_BOOT_CPU_ID:
2674         case KVM_CAP_SPLIT_IRQCHIP:
2675 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2676         case KVM_CAP_ASSIGN_DEV_IRQ:
2677         case KVM_CAP_PCI_2_3:
2678 #endif
2679                 r = 1;
2680                 break;
2681         case KVM_CAP_ADJUST_CLOCK:
2682                 r = KVM_CLOCK_TSC_STABLE;
2683                 break;
2684         case KVM_CAP_X86_SMM:
2685                 /* SMBASE is usually relocated above 1M on modern chipsets,
2686                  * and SMM handlers might indeed rely on 4G segment limits,
2687                  * so do not report SMM to be available if real mode is
2688                  * emulated via vm86 mode.  Still, do not go to great lengths
2689                  * to avoid userspace's usage of the feature, because it is a
2690                  * fringe case that is not enabled except via specific settings
2691                  * of the module parameters.
2692                  */
2693                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2694                 break;
2695         case KVM_CAP_COALESCED_MMIO:
2696                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2697                 break;
2698         case KVM_CAP_VAPIC:
2699                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2700                 break;
2701         case KVM_CAP_NR_VCPUS:
2702                 r = KVM_SOFT_MAX_VCPUS;
2703                 break;
2704         case KVM_CAP_MAX_VCPUS:
2705                 r = KVM_MAX_VCPUS;
2706                 break;
2707         case KVM_CAP_NR_MEMSLOTS:
2708                 r = KVM_USER_MEM_SLOTS;
2709                 break;
2710         case KVM_CAP_PV_MMU:    /* obsolete */
2711                 r = 0;
2712                 break;
2713 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2714         case KVM_CAP_IOMMU:
2715                 r = iommu_present(&pci_bus_type);
2716                 break;
2717 #endif
2718         case KVM_CAP_MCE:
2719                 r = KVM_MAX_MCE_BANKS;
2720                 break;
2721         case KVM_CAP_XCRS:
2722                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2723                 break;
2724         case KVM_CAP_TSC_CONTROL:
2725                 r = kvm_has_tsc_control;
2726                 break;
2727         case KVM_CAP_X2APIC_API:
2728                 r = KVM_X2APIC_API_VALID_FLAGS;
2729                 break;
2730         default:
2731                 r = 0;
2732                 break;
2733         }
2734         return r;
2735
2736 }
2737
2738 long kvm_arch_dev_ioctl(struct file *filp,
2739                         unsigned int ioctl, unsigned long arg)
2740 {
2741         void __user *argp = (void __user *)arg;
2742         long r;
2743
2744         switch (ioctl) {
2745         case KVM_GET_MSR_INDEX_LIST: {
2746                 struct kvm_msr_list __user *user_msr_list = argp;
2747                 struct kvm_msr_list msr_list;
2748                 unsigned n;
2749
2750                 r = -EFAULT;
2751                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2752                         goto out;
2753                 n = msr_list.nmsrs;
2754                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2755                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2756                         goto out;
2757                 r = -E2BIG;
2758                 if (n < msr_list.nmsrs)
2759                         goto out;
2760                 r = -EFAULT;
2761                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2762                                  num_msrs_to_save * sizeof(u32)))
2763                         goto out;
2764                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2765                                  &emulated_msrs,
2766                                  num_emulated_msrs * sizeof(u32)))
2767                         goto out;
2768                 r = 0;
2769                 break;
2770         }
2771         case KVM_GET_SUPPORTED_CPUID:
2772         case KVM_GET_EMULATED_CPUID: {
2773                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2774                 struct kvm_cpuid2 cpuid;
2775
2776                 r = -EFAULT;
2777                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2778                         goto out;
2779
2780                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2781                                             ioctl);
2782                 if (r)
2783                         goto out;
2784
2785                 r = -EFAULT;
2786                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2787                         goto out;
2788                 r = 0;
2789                 break;
2790         }
2791         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2792                 r = -EFAULT;
2793                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2794                                  sizeof(kvm_mce_cap_supported)))
2795                         goto out;
2796                 r = 0;
2797                 break;
2798         }
2799         default:
2800                 r = -EINVAL;
2801         }
2802 out:
2803         return r;
2804 }
2805
2806 static void wbinvd_ipi(void *garbage)
2807 {
2808         wbinvd();
2809 }
2810
2811 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2812 {
2813         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2814 }
2815
2816 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2817 {
2818         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2819 }
2820
2821 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2822 {
2823         /* Address WBINVD may be executed by guest */
2824         if (need_emulate_wbinvd(vcpu)) {
2825                 if (kvm_x86_ops->has_wbinvd_exit())
2826                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2827                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2828                         smp_call_function_single(vcpu->cpu,
2829                                         wbinvd_ipi, NULL, 1);
2830         }
2831
2832         kvm_x86_ops->vcpu_load(vcpu, cpu);
2833
2834         /* Apply any externally detected TSC adjustments (due to suspend) */
2835         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2836                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2837                 vcpu->arch.tsc_offset_adjustment = 0;
2838                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2839         }
2840
2841         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2842                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2843                                 rdtsc() - vcpu->arch.last_host_tsc;
2844                 if (tsc_delta < 0)
2845                         mark_tsc_unstable("KVM discovered backwards TSC");
2846
2847                 if (check_tsc_unstable()) {
2848                         u64 offset = kvm_compute_tsc_offset(vcpu,
2849                                                 vcpu->arch.last_guest_tsc);
2850                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2851                         vcpu->arch.tsc_catchup = 1;
2852                 }
2853                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2854                                 kvm_x86_ops->set_hv_timer(vcpu,
2855                                         kvm_get_lapic_target_expiration_tsc(vcpu)))
2856                         kvm_lapic_switch_to_sw_timer(vcpu);
2857                 /*
2858                  * On a host with synchronized TSC, there is no need to update
2859                  * kvmclock on vcpu->cpu migration
2860                  */
2861                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2862                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2863                 if (vcpu->cpu != cpu)
2864                         kvm_migrate_timers(vcpu);
2865                 vcpu->cpu = cpu;
2866         }
2867
2868         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2869 }
2870
2871 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2872 {
2873         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2874                 return;
2875
2876         vcpu->arch.st.steal.preempted = 1;
2877
2878         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2879                         &vcpu->arch.st.steal.preempted,
2880                         offsetof(struct kvm_steal_time, preempted),
2881                         sizeof(vcpu->arch.st.steal.preempted));
2882 }
2883
2884 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2885 {
2886         int idx;
2887         /*
2888          * Disable page faults because we're in atomic context here.
2889          * kvm_write_guest_offset_cached() would call might_fault()
2890          * that relies on pagefault_disable() to tell if there's a
2891          * bug. NOTE: the write to guest memory may not go through if
2892          * during postcopy live migration or if there's heavy guest
2893          * paging.
2894          */
2895         pagefault_disable();
2896         /*
2897          * kvm_memslots() will be called by
2898          * kvm_write_guest_offset_cached() so take the srcu lock.
2899          */
2900         idx = srcu_read_lock(&vcpu->kvm->srcu);
2901         kvm_steal_time_set_preempted(vcpu);
2902         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2903         pagefault_enable();
2904         kvm_x86_ops->vcpu_put(vcpu);
2905         kvm_put_guest_fpu(vcpu);
2906         vcpu->arch.last_host_tsc = rdtsc();
2907 }
2908
2909 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2910                                     struct kvm_lapic_state *s)
2911 {
2912         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2913                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2914
2915         return kvm_apic_get_state(vcpu, s);
2916 }
2917
2918 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2919                                     struct kvm_lapic_state *s)
2920 {
2921         int r;
2922
2923         r = kvm_apic_set_state(vcpu, s);
2924         if (r)
2925                 return r;
2926         update_cr8_intercept(vcpu);
2927
2928         return 0;
2929 }
2930
2931 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2932 {
2933         return (!lapic_in_kernel(vcpu) ||
2934                 kvm_apic_accept_pic_intr(vcpu));
2935 }
2936
2937 /*
2938  * if userspace requested an interrupt window, check that the
2939  * interrupt window is open.
2940  *
2941  * No need to exit to userspace if we already have an interrupt queued.
2942  */
2943 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2944 {
2945         return kvm_arch_interrupt_allowed(vcpu) &&
2946                 !kvm_cpu_has_interrupt(vcpu) &&
2947                 !kvm_event_needs_reinjection(vcpu) &&
2948                 kvm_cpu_accept_dm_intr(vcpu);
2949 }
2950
2951 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2952                                     struct kvm_interrupt *irq)
2953 {
2954         if (irq->irq >= KVM_NR_INTERRUPTS)
2955                 return -EINVAL;
2956
2957         if (!irqchip_in_kernel(vcpu->kvm)) {
2958                 kvm_queue_interrupt(vcpu, irq->irq, false);
2959                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2960                 return 0;
2961         }
2962
2963         /*
2964          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2965          * fail for in-kernel 8259.
2966          */
2967         if (pic_in_kernel(vcpu->kvm))
2968                 return -ENXIO;
2969
2970         if (vcpu->arch.pending_external_vector != -1)
2971                 return -EEXIST;
2972
2973         vcpu->arch.pending_external_vector = irq->irq;
2974         kvm_make_request(KVM_REQ_EVENT, vcpu);
2975         return 0;
2976 }
2977
2978 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2979 {
2980         kvm_inject_nmi(vcpu);
2981
2982         return 0;
2983 }
2984
2985 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2986 {
2987         kvm_make_request(KVM_REQ_SMI, vcpu);
2988
2989         return 0;
2990 }
2991
2992 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2993                                            struct kvm_tpr_access_ctl *tac)
2994 {
2995         if (tac->flags)
2996                 return -EINVAL;
2997         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2998         return 0;
2999 }
3000
3001 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3002                                         u64 mcg_cap)
3003 {
3004         int r;
3005         unsigned bank_num = mcg_cap & 0xff, bank;
3006
3007         r = -EINVAL;
3008         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3009                 goto out;
3010         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3011                 goto out;
3012         r = 0;
3013         vcpu->arch.mcg_cap = mcg_cap;
3014         /* Init IA32_MCG_CTL to all 1s */
3015         if (mcg_cap & MCG_CTL_P)
3016                 vcpu->arch.mcg_ctl = ~(u64)0;
3017         /* Init IA32_MCi_CTL to all 1s */
3018         for (bank = 0; bank < bank_num; bank++)
3019                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3020
3021         if (kvm_x86_ops->setup_mce)
3022                 kvm_x86_ops->setup_mce(vcpu);
3023 out:
3024         return r;
3025 }
3026
3027 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3028                                       struct kvm_x86_mce *mce)
3029 {
3030         u64 mcg_cap = vcpu->arch.mcg_cap;
3031         unsigned bank_num = mcg_cap & 0xff;
3032         u64 *banks = vcpu->arch.mce_banks;
3033
3034         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3035                 return -EINVAL;
3036         /*
3037          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3038          * reporting is disabled
3039          */
3040         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3041             vcpu->arch.mcg_ctl != ~(u64)0)
3042                 return 0;
3043         banks += 4 * mce->bank;
3044         /*
3045          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3046          * reporting is disabled for the bank
3047          */
3048         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3049                 return 0;
3050         if (mce->status & MCI_STATUS_UC) {
3051                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3052                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3053                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3054                         return 0;
3055                 }
3056                 if (banks[1] & MCI_STATUS_VAL)
3057                         mce->status |= MCI_STATUS_OVER;
3058                 banks[2] = mce->addr;
3059                 banks[3] = mce->misc;
3060                 vcpu->arch.mcg_status = mce->mcg_status;
3061                 banks[1] = mce->status;
3062                 kvm_queue_exception(vcpu, MC_VECTOR);
3063         } else if (!(banks[1] & MCI_STATUS_VAL)
3064                    || !(banks[1] & MCI_STATUS_UC)) {
3065                 if (banks[1] & MCI_STATUS_VAL)
3066                         mce->status |= MCI_STATUS_OVER;
3067                 banks[2] = mce->addr;
3068                 banks[3] = mce->misc;
3069                 banks[1] = mce->status;
3070         } else
3071                 banks[1] |= MCI_STATUS_OVER;
3072         return 0;
3073 }
3074
3075 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3076                                                struct kvm_vcpu_events *events)
3077 {
3078         process_nmi(vcpu);
3079         events->exception.injected =
3080                 vcpu->arch.exception.pending &&
3081                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3082         events->exception.nr = vcpu->arch.exception.nr;
3083         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3084         events->exception.pad = 0;
3085         events->exception.error_code = vcpu->arch.exception.error_code;
3086
3087         events->interrupt.injected =
3088                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3089         events->interrupt.nr = vcpu->arch.interrupt.nr;
3090         events->interrupt.soft = 0;
3091         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3092
3093         events->nmi.injected = vcpu->arch.nmi_injected;
3094         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3095         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3096         events->nmi.pad = 0;
3097
3098         events->sipi_vector = 0; /* never valid when reporting to user space */
3099
3100         events->smi.smm = is_smm(vcpu);
3101         events->smi.pending = vcpu->arch.smi_pending;
3102         events->smi.smm_inside_nmi =
3103                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3104         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3105
3106         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3107                          | KVM_VCPUEVENT_VALID_SHADOW
3108                          | KVM_VCPUEVENT_VALID_SMM);
3109         memset(&events->reserved, 0, sizeof(events->reserved));
3110 }
3111
3112 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3113
3114 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3115                                               struct kvm_vcpu_events *events)
3116 {
3117         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3118                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3119                               | KVM_VCPUEVENT_VALID_SHADOW
3120                               | KVM_VCPUEVENT_VALID_SMM))
3121                 return -EINVAL;
3122
3123         if (events->exception.injected &&
3124             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3125                 return -EINVAL;
3126
3127         process_nmi(vcpu);
3128         vcpu->arch.exception.pending = events->exception.injected;
3129         vcpu->arch.exception.nr = events->exception.nr;
3130         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3131         vcpu->arch.exception.error_code = events->exception.error_code;
3132
3133         vcpu->arch.interrupt.pending = events->interrupt.injected;
3134         vcpu->arch.interrupt.nr = events->interrupt.nr;
3135         vcpu->arch.interrupt.soft = events->interrupt.soft;
3136         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3137                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3138                                                   events->interrupt.shadow);
3139
3140         vcpu->arch.nmi_injected = events->nmi.injected;
3141         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3142                 vcpu->arch.nmi_pending = events->nmi.pending;
3143         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3144
3145         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3146             lapic_in_kernel(vcpu))
3147                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3148
3149         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3150                 u32 hflags = vcpu->arch.hflags;
3151                 if (events->smi.smm)
3152                         hflags |= HF_SMM_MASK;
3153                 else
3154                         hflags &= ~HF_SMM_MASK;
3155                 kvm_set_hflags(vcpu, hflags);
3156
3157                 vcpu->arch.smi_pending = events->smi.pending;
3158                 if (events->smi.smm_inside_nmi)
3159                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3160                 else
3161                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3162                 if (lapic_in_kernel(vcpu)) {
3163                         if (events->smi.latched_init)
3164                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3165                         else
3166                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3167                 }
3168         }
3169
3170         kvm_make_request(KVM_REQ_EVENT, vcpu);
3171
3172         return 0;
3173 }
3174
3175 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3176                                              struct kvm_debugregs *dbgregs)
3177 {
3178         unsigned long val;
3179
3180         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3181         kvm_get_dr(vcpu, 6, &val);
3182         dbgregs->dr6 = val;
3183         dbgregs->dr7 = vcpu->arch.dr7;
3184         dbgregs->flags = 0;
3185         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3186 }
3187
3188 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3189                                             struct kvm_debugregs *dbgregs)
3190 {
3191         if (dbgregs->flags)
3192                 return -EINVAL;
3193
3194         if (dbgregs->dr6 & ~0xffffffffull)
3195                 return -EINVAL;
3196         if (dbgregs->dr7 & ~0xffffffffull)
3197                 return -EINVAL;
3198
3199         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3200         kvm_update_dr0123(vcpu);
3201         vcpu->arch.dr6 = dbgregs->dr6;
3202         kvm_update_dr6(vcpu);
3203         vcpu->arch.dr7 = dbgregs->dr7;
3204         kvm_update_dr7(vcpu);
3205
3206         return 0;
3207 }
3208
3209 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3210
3211 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3212 {
3213         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3214         u64 xstate_bv = xsave->header.xfeatures;
3215         u64 valid;
3216
3217         /*
3218          * Copy legacy XSAVE area, to avoid complications with CPUID
3219          * leaves 0 and 1 in the loop below.
3220          */
3221         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3222
3223         /* Set XSTATE_BV */
3224         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3225
3226         /*
3227          * Copy each region from the possibly compacted offset to the
3228          * non-compacted offset.
3229          */
3230         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3231         while (valid) {
3232                 u64 feature = valid & -valid;
3233                 int index = fls64(feature) - 1;
3234                 void *src = get_xsave_addr(xsave, feature);
3235
3236                 if (src) {
3237                         u32 size, offset, ecx, edx;
3238                         cpuid_count(XSTATE_CPUID, index,
3239                                     &size, &offset, &ecx, &edx);
3240                         memcpy(dest + offset, src, size);
3241                 }
3242
3243                 valid -= feature;
3244         }
3245 }
3246
3247 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3248 {
3249         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3250         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3251         u64 valid;
3252
3253         /*
3254          * Copy legacy XSAVE area, to avoid complications with CPUID
3255          * leaves 0 and 1 in the loop below.
3256          */
3257         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3258
3259         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3260         xsave->header.xfeatures = xstate_bv;
3261         if (boot_cpu_has(X86_FEATURE_XSAVES))
3262                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3263
3264         /*
3265          * Copy each region from the non-compacted offset to the
3266          * possibly compacted offset.
3267          */
3268         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3269         while (valid) {
3270                 u64 feature = valid & -valid;
3271                 int index = fls64(feature) - 1;
3272                 void *dest = get_xsave_addr(xsave, feature);
3273
3274                 if (dest) {
3275                         u32 size, offset, ecx, edx;
3276                         cpuid_count(XSTATE_CPUID, index,
3277                                     &size, &offset, &ecx, &edx);
3278                         memcpy(dest, src + offset, size);
3279                 }
3280
3281                 valid -= feature;
3282         }
3283 }
3284
3285 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3286                                          struct kvm_xsave *guest_xsave)
3287 {
3288         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3289                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3290                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3291         } else {
3292                 memcpy(guest_xsave->region,
3293                         &vcpu->arch.guest_fpu.state.fxsave,
3294                         sizeof(struct fxregs_state));
3295                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3296                         XFEATURE_MASK_FPSSE;
3297         }
3298 }
3299
3300 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3301                                         struct kvm_xsave *guest_xsave)
3302 {
3303         u64 xstate_bv =
3304                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3305
3306         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3307                 /*
3308                  * Here we allow setting states that are not present in
3309                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3310                  * with old userspace.
3311                  */
3312                 if (xstate_bv & ~kvm_supported_xcr0())
3313                         return -EINVAL;
3314                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3315         } else {
3316                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3317                         return -EINVAL;
3318                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3319                         guest_xsave->region, sizeof(struct fxregs_state));
3320         }
3321         return 0;
3322 }
3323
3324 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3325                                         struct kvm_xcrs *guest_xcrs)
3326 {
3327         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3328                 guest_xcrs->nr_xcrs = 0;
3329                 return;
3330         }
3331
3332         guest_xcrs->nr_xcrs = 1;
3333         guest_xcrs->flags = 0;
3334         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3335         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3336 }
3337
3338 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3339                                        struct kvm_xcrs *guest_xcrs)
3340 {
3341         int i, r = 0;
3342
3343         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3344                 return -EINVAL;
3345
3346         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3347                 return -EINVAL;
3348
3349         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3350                 /* Only support XCR0 currently */
3351                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3352                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3353                                 guest_xcrs->xcrs[i].value);
3354                         break;
3355                 }
3356         if (r)
3357                 r = -EINVAL;
3358         return r;
3359 }
3360
3361 /*
3362  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3363  * stopped by the hypervisor.  This function will be called from the host only.
3364  * EINVAL is returned when the host attempts to set the flag for a guest that
3365  * does not support pv clocks.
3366  */
3367 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3368 {
3369         if (!vcpu->arch.pv_time_enabled)
3370                 return -EINVAL;
3371         vcpu->arch.pvclock_set_guest_stopped_request = true;
3372         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3373         return 0;
3374 }
3375
3376 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3377                                      struct kvm_enable_cap *cap)
3378 {
3379         if (cap->flags)
3380                 return -EINVAL;
3381
3382         switch (cap->cap) {
3383         case KVM_CAP_HYPERV_SYNIC:
3384                 if (!irqchip_in_kernel(vcpu->kvm))
3385                         return -EINVAL;
3386                 return kvm_hv_activate_synic(vcpu);
3387         default:
3388                 return -EINVAL;
3389         }
3390 }
3391
3392 long kvm_arch_vcpu_ioctl(struct file *filp,
3393                          unsigned int ioctl, unsigned long arg)
3394 {
3395         struct kvm_vcpu *vcpu = filp->private_data;
3396         void __user *argp = (void __user *)arg;
3397         int r;
3398         union {
3399                 struct kvm_lapic_state *lapic;
3400                 struct kvm_xsave *xsave;
3401                 struct kvm_xcrs *xcrs;
3402                 void *buffer;
3403         } u;
3404
3405         u.buffer = NULL;
3406         switch (ioctl) {
3407         case KVM_GET_LAPIC: {
3408                 r = -EINVAL;
3409                 if (!lapic_in_kernel(vcpu))
3410                         goto out;
3411                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3412
3413                 r = -ENOMEM;
3414                 if (!u.lapic)
3415                         goto out;
3416                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3417                 if (r)
3418                         goto out;
3419                 r = -EFAULT;
3420                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3421                         goto out;
3422                 r = 0;
3423                 break;
3424         }
3425         case KVM_SET_LAPIC: {
3426                 r = -EINVAL;
3427                 if (!lapic_in_kernel(vcpu))
3428                         goto out;
3429                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3430                 if (IS_ERR(u.lapic))
3431                         return PTR_ERR(u.lapic);
3432
3433                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3434                 break;
3435         }
3436         case KVM_INTERRUPT: {
3437                 struct kvm_interrupt irq;
3438
3439                 r = -EFAULT;
3440                 if (copy_from_user(&irq, argp, sizeof irq))
3441                         goto out;
3442                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3443                 break;
3444         }
3445         case KVM_NMI: {
3446                 r = kvm_vcpu_ioctl_nmi(vcpu);
3447                 break;
3448         }
3449         case KVM_SMI: {
3450                 r = kvm_vcpu_ioctl_smi(vcpu);
3451                 break;
3452         }
3453         case KVM_SET_CPUID: {
3454                 struct kvm_cpuid __user *cpuid_arg = argp;
3455                 struct kvm_cpuid cpuid;
3456
3457                 r = -EFAULT;
3458                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3459                         goto out;
3460                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3461                 break;
3462         }
3463         case KVM_SET_CPUID2: {
3464                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3465                 struct kvm_cpuid2 cpuid;
3466
3467                 r = -EFAULT;
3468                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3469                         goto out;
3470                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3471                                               cpuid_arg->entries);
3472                 break;
3473         }
3474         case KVM_GET_CPUID2: {
3475                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3476                 struct kvm_cpuid2 cpuid;
3477
3478                 r = -EFAULT;
3479                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3480                         goto out;
3481                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3482                                               cpuid_arg->entries);
3483                 if (r)
3484                         goto out;
3485                 r = -EFAULT;
3486                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3487                         goto out;
3488                 r = 0;
3489                 break;
3490         }
3491         case KVM_GET_MSRS:
3492                 r = msr_io(vcpu, argp, do_get_msr, 1);
3493                 break;
3494         case KVM_SET_MSRS:
3495                 r = msr_io(vcpu, argp, do_set_msr, 0);
3496                 break;
3497         case KVM_TPR_ACCESS_REPORTING: {
3498                 struct kvm_tpr_access_ctl tac;
3499
3500                 r = -EFAULT;
3501                 if (copy_from_user(&tac, argp, sizeof tac))
3502                         goto out;
3503                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3504                 if (r)
3505                         goto out;
3506                 r = -EFAULT;
3507                 if (copy_to_user(argp, &tac, sizeof tac))
3508                         goto out;
3509                 r = 0;
3510                 break;
3511         };
3512         case KVM_SET_VAPIC_ADDR: {
3513                 struct kvm_vapic_addr va;
3514                 int idx;
3515
3516                 r = -EINVAL;
3517                 if (!lapic_in_kernel(vcpu))
3518                         goto out;
3519                 r = -EFAULT;
3520                 if (copy_from_user(&va, argp, sizeof va))
3521                         goto out;
3522                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3523                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3524                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3525                 break;
3526         }
3527         case KVM_X86_SETUP_MCE: {
3528                 u64 mcg_cap;
3529
3530                 r = -EFAULT;
3531                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3532                         goto out;
3533                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3534                 break;
3535         }
3536         case KVM_X86_SET_MCE: {
3537                 struct kvm_x86_mce mce;
3538
3539                 r = -EFAULT;
3540                 if (copy_from_user(&mce, argp, sizeof mce))
3541                         goto out;
3542                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3543                 break;
3544         }
3545         case KVM_GET_VCPU_EVENTS: {
3546                 struct kvm_vcpu_events events;
3547
3548                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3549
3550                 r = -EFAULT;
3551                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3552                         break;
3553                 r = 0;
3554                 break;
3555         }
3556         case KVM_SET_VCPU_EVENTS: {
3557                 struct kvm_vcpu_events events;
3558
3559                 r = -EFAULT;
3560                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3561                         break;
3562
3563                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3564                 break;
3565         }
3566         case KVM_GET_DEBUGREGS: {
3567                 struct kvm_debugregs dbgregs;
3568
3569                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3570
3571                 r = -EFAULT;
3572                 if (copy_to_user(argp, &dbgregs,
3573                                  sizeof(struct kvm_debugregs)))
3574                         break;
3575                 r = 0;
3576                 break;
3577         }
3578         case KVM_SET_DEBUGREGS: {
3579                 struct kvm_debugregs dbgregs;
3580
3581                 r = -EFAULT;
3582                 if (copy_from_user(&dbgregs, argp,
3583                                    sizeof(struct kvm_debugregs)))
3584                         break;
3585
3586                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3587                 break;
3588         }
3589         case KVM_GET_XSAVE: {
3590                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3591                 r = -ENOMEM;
3592                 if (!u.xsave)
3593                         break;
3594
3595                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3596
3597                 r = -EFAULT;
3598                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3599                         break;
3600                 r = 0;
3601                 break;
3602         }
3603         case KVM_SET_XSAVE: {
3604                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3605                 if (IS_ERR(u.xsave))
3606                         return PTR_ERR(u.xsave);
3607
3608                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3609                 break;
3610         }
3611         case KVM_GET_XCRS: {
3612                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3613                 r = -ENOMEM;
3614                 if (!u.xcrs)
3615                         break;
3616
3617                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3618
3619                 r = -EFAULT;
3620                 if (copy_to_user(argp, u.xcrs,
3621                                  sizeof(struct kvm_xcrs)))
3622                         break;
3623                 r = 0;
3624                 break;
3625         }
3626         case KVM_SET_XCRS: {
3627                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3628                 if (IS_ERR(u.xcrs))
3629                         return PTR_ERR(u.xcrs);
3630
3631                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3632                 break;
3633         }
3634         case KVM_SET_TSC_KHZ: {
3635                 u32 user_tsc_khz;
3636
3637                 r = -EINVAL;
3638                 user_tsc_khz = (u32)arg;
3639
3640                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3641                         goto out;
3642
3643                 if (user_tsc_khz == 0)
3644                         user_tsc_khz = tsc_khz;
3645
3646                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3647                         r = 0;
3648
3649                 goto out;
3650         }
3651         case KVM_GET_TSC_KHZ: {
3652                 r = vcpu->arch.virtual_tsc_khz;
3653                 goto out;
3654         }
3655         case KVM_KVMCLOCK_CTRL: {
3656                 r = kvm_set_guest_paused(vcpu);
3657                 goto out;
3658         }
3659         case KVM_ENABLE_CAP: {
3660                 struct kvm_enable_cap cap;
3661
3662                 r = -EFAULT;
3663                 if (copy_from_user(&cap, argp, sizeof(cap)))
3664                         goto out;
3665                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3666                 break;
3667         }
3668         default:
3669                 r = -EINVAL;
3670         }
3671 out:
3672         kfree(u.buffer);
3673         return r;
3674 }
3675
3676 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3677 {
3678         return VM_FAULT_SIGBUS;
3679 }
3680
3681 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3682 {
3683         int ret;
3684
3685         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3686                 return -EINVAL;
3687         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3688         return ret;
3689 }
3690
3691 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3692                                               u64 ident_addr)
3693 {
3694         kvm->arch.ept_identity_map_addr = ident_addr;
3695         return 0;
3696 }
3697
3698 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3699                                           u32 kvm_nr_mmu_pages)
3700 {
3701         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3702                 return -EINVAL;
3703
3704         mutex_lock(&kvm->slots_lock);
3705
3706         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3707         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3708
3709         mutex_unlock(&kvm->slots_lock);
3710         return 0;
3711 }
3712
3713 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3714 {
3715         return kvm->arch.n_max_mmu_pages;
3716 }
3717
3718 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3719 {
3720         int r;
3721
3722         r = 0;
3723         switch (chip->chip_id) {
3724         case KVM_IRQCHIP_PIC_MASTER:
3725                 memcpy(&chip->chip.pic,
3726                         &pic_irqchip(kvm)->pics[0],
3727                         sizeof(struct kvm_pic_state));
3728                 break;
3729         case KVM_IRQCHIP_PIC_SLAVE:
3730                 memcpy(&chip->chip.pic,
3731                         &pic_irqchip(kvm)->pics[1],
3732                         sizeof(struct kvm_pic_state));
3733                 break;
3734         case KVM_IRQCHIP_IOAPIC:
3735                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3736                 break;
3737         default:
3738                 r = -EINVAL;
3739                 break;
3740         }
3741         return r;
3742 }
3743
3744 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3745 {
3746         int r;
3747
3748         r = 0;
3749         switch (chip->chip_id) {
3750         case KVM_IRQCHIP_PIC_MASTER:
3751                 spin_lock(&pic_irqchip(kvm)->lock);
3752                 memcpy(&pic_irqchip(kvm)->pics[0],
3753                         &chip->chip.pic,
3754                         sizeof(struct kvm_pic_state));
3755                 spin_unlock(&pic_irqchip(kvm)->lock);
3756                 break;
3757         case KVM_IRQCHIP_PIC_SLAVE:
3758                 spin_lock(&pic_irqchip(kvm)->lock);
3759                 memcpy(&pic_irqchip(kvm)->pics[1],
3760                         &chip->chip.pic,
3761                         sizeof(struct kvm_pic_state));
3762                 spin_unlock(&pic_irqchip(kvm)->lock);
3763                 break;
3764         case KVM_IRQCHIP_IOAPIC:
3765                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3766                 break;
3767         default:
3768                 r = -EINVAL;
3769                 break;
3770         }
3771         kvm_pic_update_irq(pic_irqchip(kvm));
3772         return r;
3773 }
3774
3775 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3776 {
3777         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3778
3779         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3780
3781         mutex_lock(&kps->lock);
3782         memcpy(ps, &kps->channels, sizeof(*ps));
3783         mutex_unlock(&kps->lock);
3784         return 0;
3785 }
3786
3787 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3788 {
3789         int i;
3790         struct kvm_pit *pit = kvm->arch.vpit;
3791
3792         mutex_lock(&pit->pit_state.lock);
3793         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3794         for (i = 0; i < 3; i++)
3795                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3796         mutex_unlock(&pit->pit_state.lock);
3797         return 0;
3798 }
3799
3800 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3801 {
3802         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3803         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3804                 sizeof(ps->channels));
3805         ps->flags = kvm->arch.vpit->pit_state.flags;
3806         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3807         memset(&ps->reserved, 0, sizeof(ps->reserved));
3808         return 0;
3809 }
3810
3811 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3812 {
3813         int start = 0;
3814         int i;
3815         u32 prev_legacy, cur_legacy;
3816         struct kvm_pit *pit = kvm->arch.vpit;
3817
3818         mutex_lock(&pit->pit_state.lock);
3819         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3820         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3821         if (!prev_legacy && cur_legacy)
3822                 start = 1;
3823         memcpy(&pit->pit_state.channels, &ps->channels,
3824                sizeof(pit->pit_state.channels));
3825         pit->pit_state.flags = ps->flags;
3826         for (i = 0; i < 3; i++)
3827                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3828                                    start && i == 0);
3829         mutex_unlock(&pit->pit_state.lock);
3830         return 0;
3831 }
3832
3833 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3834                                  struct kvm_reinject_control *control)
3835 {
3836         struct kvm_pit *pit = kvm->arch.vpit;
3837
3838         if (!pit)
3839                 return -ENXIO;
3840
3841         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3842          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3843          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3844          */
3845         mutex_lock(&pit->pit_state.lock);
3846         kvm_pit_set_reinject(pit, control->pit_reinject);
3847         mutex_unlock(&pit->pit_state.lock);
3848
3849         return 0;
3850 }
3851
3852 /**
3853  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3854  * @kvm: kvm instance
3855  * @log: slot id and address to which we copy the log
3856  *
3857  * Steps 1-4 below provide general overview of dirty page logging. See
3858  * kvm_get_dirty_log_protect() function description for additional details.
3859  *
3860  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3861  * always flush the TLB (step 4) even if previous step failed  and the dirty
3862  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3863  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3864  * writes will be marked dirty for next log read.
3865  *
3866  *   1. Take a snapshot of the bit and clear it if needed.
3867  *   2. Write protect the corresponding page.
3868  *   3. Copy the snapshot to the userspace.
3869  *   4. Flush TLB's if needed.
3870  */
3871 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3872 {
3873         bool is_dirty = false;
3874         int r;
3875
3876         mutex_lock(&kvm->slots_lock);
3877
3878         /*
3879          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3880          */
3881         if (kvm_x86_ops->flush_log_dirty)
3882                 kvm_x86_ops->flush_log_dirty(kvm);
3883
3884         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3885
3886         /*
3887          * All the TLBs can be flushed out of mmu lock, see the comments in
3888          * kvm_mmu_slot_remove_write_access().
3889          */
3890         lockdep_assert_held(&kvm->slots_lock);
3891         if (is_dirty)
3892                 kvm_flush_remote_tlbs(kvm);
3893
3894         mutex_unlock(&kvm->slots_lock);
3895         return r;
3896 }
3897
3898 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3899                         bool line_status)
3900 {
3901         if (!irqchip_in_kernel(kvm))
3902                 return -ENXIO;
3903
3904         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3905                                         irq_event->irq, irq_event->level,
3906                                         line_status);
3907         return 0;
3908 }
3909
3910 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3911                                    struct kvm_enable_cap *cap)
3912 {
3913         int r;
3914
3915         if (cap->flags)
3916                 return -EINVAL;
3917
3918         switch (cap->cap) {
3919         case KVM_CAP_DISABLE_QUIRKS:
3920                 kvm->arch.disabled_quirks = cap->args[0];
3921                 r = 0;
3922                 break;
3923         case KVM_CAP_SPLIT_IRQCHIP: {
3924                 mutex_lock(&kvm->lock);
3925                 r = -EINVAL;
3926                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3927                         goto split_irqchip_unlock;
3928                 r = -EEXIST;
3929                 if (irqchip_in_kernel(kvm))
3930                         goto split_irqchip_unlock;
3931                 if (kvm->created_vcpus)
3932                         goto split_irqchip_unlock;
3933                 r = kvm_setup_empty_irq_routing(kvm);
3934                 if (r)
3935                         goto split_irqchip_unlock;
3936                 /* Pairs with irqchip_in_kernel. */
3937                 smp_wmb();
3938                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3939                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3940                 r = 0;
3941 split_irqchip_unlock:
3942                 mutex_unlock(&kvm->lock);
3943                 break;
3944         }
3945         case KVM_CAP_X2APIC_API:
3946                 r = -EINVAL;
3947                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3948                         break;
3949
3950                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3951                         kvm->arch.x2apic_format = true;
3952                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3953                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3954
3955                 r = 0;
3956                 break;
3957         default:
3958                 r = -EINVAL;
3959                 break;
3960         }
3961         return r;
3962 }
3963
3964 long kvm_arch_vm_ioctl(struct file *filp,
3965                        unsigned int ioctl, unsigned long arg)
3966 {
3967         struct kvm *kvm = filp->private_data;
3968         void __user *argp = (void __user *)arg;
3969         int r = -ENOTTY;
3970         /*
3971          * This union makes it completely explicit to gcc-3.x
3972          * that these two variables' stack usage should be
3973          * combined, not added together.
3974          */
3975         union {
3976                 struct kvm_pit_state ps;
3977                 struct kvm_pit_state2 ps2;
3978                 struct kvm_pit_config pit_config;
3979         } u;
3980
3981         switch (ioctl) {
3982         case KVM_SET_TSS_ADDR:
3983                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3984                 break;
3985         case KVM_SET_IDENTITY_MAP_ADDR: {
3986                 u64 ident_addr;
3987
3988                 r = -EFAULT;
3989                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3990                         goto out;
3991                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3992                 break;
3993         }
3994         case KVM_SET_NR_MMU_PAGES:
3995                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3996                 break;
3997         case KVM_GET_NR_MMU_PAGES:
3998                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3999                 break;
4000         case KVM_CREATE_IRQCHIP: {
4001                 mutex_lock(&kvm->lock);
4002
4003                 r = -EEXIST;
4004                 if (irqchip_in_kernel(kvm))
4005                         goto create_irqchip_unlock;
4006
4007                 r = -EINVAL;
4008                 if (kvm->created_vcpus)
4009                         goto create_irqchip_unlock;
4010
4011                 r = kvm_pic_init(kvm);
4012                 if (r)
4013                         goto create_irqchip_unlock;
4014
4015                 r = kvm_ioapic_init(kvm);
4016                 if (r) {
4017                         mutex_lock(&kvm->slots_lock);
4018                         kvm_pic_destroy(kvm);
4019                         mutex_unlock(&kvm->slots_lock);
4020                         goto create_irqchip_unlock;
4021                 }
4022
4023                 r = kvm_setup_default_irq_routing(kvm);
4024                 if (r) {
4025                         mutex_lock(&kvm->slots_lock);
4026                         mutex_lock(&kvm->irq_lock);
4027                         kvm_ioapic_destroy(kvm);
4028                         kvm_pic_destroy(kvm);
4029                         mutex_unlock(&kvm->irq_lock);
4030                         mutex_unlock(&kvm->slots_lock);
4031                         goto create_irqchip_unlock;
4032                 }
4033                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4034                 smp_wmb();
4035                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4036         create_irqchip_unlock:
4037                 mutex_unlock(&kvm->lock);
4038                 break;
4039         }
4040         case KVM_CREATE_PIT:
4041                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4042                 goto create_pit;
4043         case KVM_CREATE_PIT2:
4044                 r = -EFAULT;
4045                 if (copy_from_user(&u.pit_config, argp,
4046                                    sizeof(struct kvm_pit_config)))
4047                         goto out;
4048         create_pit:
4049                 mutex_lock(&kvm->lock);
4050                 r = -EEXIST;
4051                 if (kvm->arch.vpit)
4052                         goto create_pit_unlock;
4053                 r = -ENOMEM;
4054                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4055                 if (kvm->arch.vpit)
4056                         r = 0;
4057         create_pit_unlock:
4058                 mutex_unlock(&kvm->lock);
4059                 break;
4060         case KVM_GET_IRQCHIP: {
4061                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4062                 struct kvm_irqchip *chip;
4063
4064                 chip = memdup_user(argp, sizeof(*chip));
4065                 if (IS_ERR(chip)) {
4066                         r = PTR_ERR(chip);
4067                         goto out;
4068                 }
4069
4070                 r = -ENXIO;
4071                 if (!irqchip_kernel(kvm))
4072                         goto get_irqchip_out;
4073                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4074                 if (r)
4075                         goto get_irqchip_out;
4076                 r = -EFAULT;
4077                 if (copy_to_user(argp, chip, sizeof *chip))
4078                         goto get_irqchip_out;
4079                 r = 0;
4080         get_irqchip_out:
4081                 kfree(chip);
4082                 break;
4083         }
4084         case KVM_SET_IRQCHIP: {
4085                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4086                 struct kvm_irqchip *chip;
4087
4088                 chip = memdup_user(argp, sizeof(*chip));
4089                 if (IS_ERR(chip)) {
4090                         r = PTR_ERR(chip);
4091                         goto out;
4092                 }
4093
4094                 r = -ENXIO;
4095                 if (!irqchip_kernel(kvm))
4096                         goto set_irqchip_out;
4097                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4098                 if (r)
4099                         goto set_irqchip_out;
4100                 r = 0;
4101         set_irqchip_out:
4102                 kfree(chip);
4103                 break;
4104         }
4105         case KVM_GET_PIT: {
4106                 r = -EFAULT;
4107                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4108                         goto out;
4109                 r = -ENXIO;
4110                 if (!kvm->arch.vpit)
4111                         goto out;
4112                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4113                 if (r)
4114                         goto out;
4115                 r = -EFAULT;
4116                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4117                         goto out;
4118                 r = 0;
4119                 break;
4120         }
4121         case KVM_SET_PIT: {
4122                 r = -EFAULT;
4123                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4124                         goto out;
4125                 r = -ENXIO;
4126                 if (!kvm->arch.vpit)
4127                         goto out;
4128                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4129                 break;
4130         }
4131         case KVM_GET_PIT2: {
4132                 r = -ENXIO;
4133                 if (!kvm->arch.vpit)
4134                         goto out;
4135                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4136                 if (r)
4137                         goto out;
4138                 r = -EFAULT;
4139                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4140                         goto out;
4141                 r = 0;
4142                 break;
4143         }
4144         case KVM_SET_PIT2: {
4145                 r = -EFAULT;
4146                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4147                         goto out;
4148                 r = -ENXIO;
4149                 if (!kvm->arch.vpit)
4150                         goto out;
4151                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4152                 break;
4153         }
4154         case KVM_REINJECT_CONTROL: {
4155                 struct kvm_reinject_control control;
4156                 r =  -EFAULT;
4157                 if (copy_from_user(&control, argp, sizeof(control)))
4158                         goto out;
4159                 r = kvm_vm_ioctl_reinject(kvm, &control);
4160                 break;
4161         }
4162         case KVM_SET_BOOT_CPU_ID:
4163                 r = 0;
4164                 mutex_lock(&kvm->lock);
4165                 if (kvm->created_vcpus)
4166                         r = -EBUSY;
4167                 else
4168                         kvm->arch.bsp_vcpu_id = arg;
4169                 mutex_unlock(&kvm->lock);
4170                 break;
4171         case KVM_XEN_HVM_CONFIG: {
4172                 r = -EFAULT;
4173                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4174                                    sizeof(struct kvm_xen_hvm_config)))
4175                         goto out;
4176                 r = -EINVAL;
4177                 if (kvm->arch.xen_hvm_config.flags)
4178                         goto out;
4179                 r = 0;
4180                 break;
4181         }
4182         case KVM_SET_CLOCK: {
4183                 struct kvm_clock_data user_ns;
4184                 u64 now_ns;
4185
4186                 r = -EFAULT;
4187                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4188                         goto out;
4189
4190                 r = -EINVAL;
4191                 if (user_ns.flags)
4192                         goto out;
4193
4194                 r = 0;
4195                 local_irq_disable();
4196                 now_ns = __get_kvmclock_ns(kvm);
4197                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4198                 local_irq_enable();
4199                 kvm_gen_update_masterclock(kvm);
4200                 break;
4201         }
4202         case KVM_GET_CLOCK: {
4203                 struct kvm_clock_data user_ns;
4204                 u64 now_ns;
4205
4206                 local_irq_disable();
4207                 now_ns = __get_kvmclock_ns(kvm);
4208                 user_ns.clock = now_ns;
4209                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4210                 local_irq_enable();
4211                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4212
4213                 r = -EFAULT;
4214                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4215                         goto out;
4216                 r = 0;
4217                 break;
4218         }
4219         case KVM_ENABLE_CAP: {
4220                 struct kvm_enable_cap cap;
4221
4222                 r = -EFAULT;
4223                 if (copy_from_user(&cap, argp, sizeof(cap)))
4224                         goto out;
4225                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4226                 break;
4227         }
4228         default:
4229                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4230         }
4231 out:
4232         return r;
4233 }
4234
4235 static void kvm_init_msr_list(void)
4236 {
4237         u32 dummy[2];
4238         unsigned i, j;
4239
4240         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4241                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4242                         continue;
4243
4244                 /*
4245                  * Even MSRs that are valid in the host may not be exposed
4246                  * to the guests in some cases.
4247                  */
4248                 switch (msrs_to_save[i]) {
4249                 case MSR_IA32_BNDCFGS:
4250                         if (!kvm_x86_ops->mpx_supported())
4251                                 continue;
4252                         break;
4253                 case MSR_TSC_AUX:
4254                         if (!kvm_x86_ops->rdtscp_supported())
4255                                 continue;
4256                         break;
4257                 default:
4258                         break;
4259                 }
4260
4261                 if (j < i)
4262                         msrs_to_save[j] = msrs_to_save[i];
4263                 j++;
4264         }
4265         num_msrs_to_save = j;
4266
4267         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4268                 switch (emulated_msrs[i]) {
4269                 case MSR_IA32_SMBASE:
4270                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4271                                 continue;
4272                         break;
4273                 default:
4274                         break;
4275                 }
4276
4277                 if (j < i)
4278                         emulated_msrs[j] = emulated_msrs[i];
4279                 j++;
4280         }
4281         num_emulated_msrs = j;
4282 }
4283
4284 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4285                            const void *v)
4286 {
4287         int handled = 0;
4288         int n;
4289
4290         do {
4291                 n = min(len, 8);
4292                 if (!(lapic_in_kernel(vcpu) &&
4293                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4294                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4295                         break;
4296                 handled += n;
4297                 addr += n;
4298                 len -= n;
4299                 v += n;
4300         } while (len);
4301
4302         return handled;
4303 }
4304
4305 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4306 {
4307         int handled = 0;
4308         int n;
4309
4310         do {
4311                 n = min(len, 8);
4312                 if (!(lapic_in_kernel(vcpu) &&
4313                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4314                                          addr, n, v))
4315                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4316                         break;
4317                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4318                 handled += n;
4319                 addr += n;
4320                 len -= n;
4321                 v += n;
4322         } while (len);
4323
4324         return handled;
4325 }
4326
4327 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4328                         struct kvm_segment *var, int seg)
4329 {
4330         kvm_x86_ops->set_segment(vcpu, var, seg);
4331 }
4332
4333 void kvm_get_segment(struct kvm_vcpu *vcpu,
4334                      struct kvm_segment *var, int seg)
4335 {
4336         kvm_x86_ops->get_segment(vcpu, var, seg);
4337 }
4338
4339 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4340                            struct x86_exception *exception)
4341 {
4342         gpa_t t_gpa;
4343
4344         BUG_ON(!mmu_is_nested(vcpu));
4345
4346         /* NPT walks are always user-walks */
4347         access |= PFERR_USER_MASK;
4348         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4349
4350         return t_gpa;
4351 }
4352
4353 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4354                               struct x86_exception *exception)
4355 {
4356         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4357         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4358 }
4359
4360  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4361                                 struct x86_exception *exception)
4362 {
4363         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4364         access |= PFERR_FETCH_MASK;
4365         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4366 }
4367
4368 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4369                                struct x86_exception *exception)
4370 {
4371         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4372         access |= PFERR_WRITE_MASK;
4373         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4374 }
4375
4376 /* uses this to access any guest's mapped memory without checking CPL */
4377 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4378                                 struct x86_exception *exception)
4379 {
4380         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4381 }
4382
4383 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4384                                       struct kvm_vcpu *vcpu, u32 access,
4385                                       struct x86_exception *exception)
4386 {
4387         void *data = val;
4388         int r = X86EMUL_CONTINUE;
4389
4390         while (bytes) {
4391                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4392                                                             exception);
4393                 unsigned offset = addr & (PAGE_SIZE-1);
4394                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4395                 int ret;
4396
4397                 if (gpa == UNMAPPED_GVA)
4398                         return X86EMUL_PROPAGATE_FAULT;
4399                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4400                                                offset, toread);
4401                 if (ret < 0) {
4402                         r = X86EMUL_IO_NEEDED;
4403                         goto out;
4404                 }
4405
4406                 bytes -= toread;
4407                 data += toread;
4408                 addr += toread;
4409         }
4410 out:
4411         return r;
4412 }
4413
4414 /* used for instruction fetching */
4415 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4416                                 gva_t addr, void *val, unsigned int bytes,
4417                                 struct x86_exception *exception)
4418 {
4419         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4420         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4421         unsigned offset;
4422         int ret;
4423
4424         /* Inline kvm_read_guest_virt_helper for speed.  */
4425         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4426                                                     exception);
4427         if (unlikely(gpa == UNMAPPED_GVA))
4428                 return X86EMUL_PROPAGATE_FAULT;
4429
4430         offset = addr & (PAGE_SIZE-1);
4431         if (WARN_ON(offset + bytes > PAGE_SIZE))
4432                 bytes = (unsigned)PAGE_SIZE - offset;
4433         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4434                                        offset, bytes);
4435         if (unlikely(ret < 0))
4436                 return X86EMUL_IO_NEEDED;
4437
4438         return X86EMUL_CONTINUE;
4439 }
4440
4441 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4442                                gva_t addr, void *val, unsigned int bytes,
4443                                struct x86_exception *exception)
4444 {
4445         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4446         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4447
4448         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4449                                           exception);
4450 }
4451 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4452
4453 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4454                                       gva_t addr, void *val, unsigned int bytes,
4455                                       struct x86_exception *exception)
4456 {
4457         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4458         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4459 }
4460
4461 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4462                 unsigned long addr, void *val, unsigned int bytes)
4463 {
4464         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4465         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4466
4467         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4468 }
4469
4470 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4471                                        gva_t addr, void *val,
4472                                        unsigned int bytes,
4473                                        struct x86_exception *exception)
4474 {
4475         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4476         void *data = val;
4477         int r = X86EMUL_CONTINUE;
4478
4479         while (bytes) {
4480                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4481                                                              PFERR_WRITE_MASK,
4482                                                              exception);
4483                 unsigned offset = addr & (PAGE_SIZE-1);
4484                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4485                 int ret;
4486
4487                 if (gpa == UNMAPPED_GVA)
4488                         return X86EMUL_PROPAGATE_FAULT;
4489                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4490                 if (ret < 0) {
4491                         r = X86EMUL_IO_NEEDED;
4492                         goto out;
4493                 }
4494
4495                 bytes -= towrite;
4496                 data += towrite;
4497                 addr += towrite;
4498         }
4499 out:
4500         return r;
4501 }
4502 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4503
4504 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4505                             gpa_t gpa, bool write)
4506 {
4507         /* For APIC access vmexit */
4508         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4509                 return 1;
4510
4511         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4512                 trace_vcpu_match_mmio(gva, gpa, write, true);
4513                 return 1;
4514         }
4515
4516         return 0;
4517 }
4518
4519 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4520                                 gpa_t *gpa, struct x86_exception *exception,
4521                                 bool write)
4522 {
4523         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4524                 | (write ? PFERR_WRITE_MASK : 0);
4525
4526         /*
4527          * currently PKRU is only applied to ept enabled guest so
4528          * there is no pkey in EPT page table for L1 guest or EPT
4529          * shadow page table for L2 guest.
4530          */
4531         if (vcpu_match_mmio_gva(vcpu, gva)
4532             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4533                                  vcpu->arch.access, 0, access)) {
4534                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4535                                         (gva & (PAGE_SIZE - 1));
4536                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4537                 return 1;
4538         }
4539
4540         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4541
4542         if (*gpa == UNMAPPED_GVA)
4543                 return -1;
4544
4545         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4546 }
4547
4548 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4549                         const void *val, int bytes)
4550 {
4551         int ret;
4552
4553         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4554         if (ret < 0)
4555                 return 0;
4556         kvm_page_track_write(vcpu, gpa, val, bytes);
4557         return 1;
4558 }
4559
4560 struct read_write_emulator_ops {
4561         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4562                                   int bytes);
4563         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4564                                   void *val, int bytes);
4565         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4566                                int bytes, void *val);
4567         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4568                                     void *val, int bytes);
4569         bool write;
4570 };
4571
4572 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4573 {
4574         if (vcpu->mmio_read_completed) {
4575                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4576                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4577                 vcpu->mmio_read_completed = 0;
4578                 return 1;
4579         }
4580
4581         return 0;
4582 }
4583
4584 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4585                         void *val, int bytes)
4586 {
4587         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4588 }
4589
4590 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4591                          void *val, int bytes)
4592 {
4593         return emulator_write_phys(vcpu, gpa, val, bytes);
4594 }
4595
4596 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4597 {
4598         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4599         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4600 }
4601
4602 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4603                           void *val, int bytes)
4604 {
4605         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4606         return X86EMUL_IO_NEEDED;
4607 }
4608
4609 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4610                            void *val, int bytes)
4611 {
4612         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4613
4614         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4615         return X86EMUL_CONTINUE;
4616 }
4617
4618 static const struct read_write_emulator_ops read_emultor = {
4619         .read_write_prepare = read_prepare,
4620         .read_write_emulate = read_emulate,
4621         .read_write_mmio = vcpu_mmio_read,
4622         .read_write_exit_mmio = read_exit_mmio,
4623 };
4624
4625 static const struct read_write_emulator_ops write_emultor = {
4626         .read_write_emulate = write_emulate,
4627         .read_write_mmio = write_mmio,
4628         .read_write_exit_mmio = write_exit_mmio,
4629         .write = true,
4630 };
4631
4632 static int emulator_read_write_onepage(unsigned long addr, void *val,
4633                                        unsigned int bytes,
4634                                        struct x86_exception *exception,
4635                                        struct kvm_vcpu *vcpu,
4636                                        const struct read_write_emulator_ops *ops)
4637 {
4638         gpa_t gpa;
4639         int handled, ret;
4640         bool write = ops->write;
4641         struct kvm_mmio_fragment *frag;
4642         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4643
4644         /*
4645          * If the exit was due to a NPF we may already have a GPA.
4646          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4647          * Note, this cannot be used on string operations since string
4648          * operation using rep will only have the initial GPA from the NPF
4649          * occurred.
4650          */
4651         if (vcpu->arch.gpa_available &&
4652             emulator_can_use_gpa(ctxt) &&
4653             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4654             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4655                 gpa = exception->address;
4656                 goto mmio;
4657         }
4658
4659         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4660
4661         if (ret < 0)
4662                 return X86EMUL_PROPAGATE_FAULT;
4663
4664         /* For APIC access vmexit */
4665         if (ret)
4666                 goto mmio;
4667
4668         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4669                 return X86EMUL_CONTINUE;
4670
4671 mmio:
4672         /*
4673          * Is this MMIO handled locally?
4674          */
4675         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4676         if (handled == bytes)
4677                 return X86EMUL_CONTINUE;
4678
4679         gpa += handled;
4680         bytes -= handled;
4681         val += handled;
4682
4683         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4684         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4685         frag->gpa = gpa;
4686         frag->data = val;
4687         frag->len = bytes;
4688         return X86EMUL_CONTINUE;
4689 }
4690
4691 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4692                         unsigned long addr,
4693                         void *val, unsigned int bytes,
4694                         struct x86_exception *exception,
4695                         const struct read_write_emulator_ops *ops)
4696 {
4697         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4698         gpa_t gpa;
4699         int rc;
4700
4701         if (ops->read_write_prepare &&
4702                   ops->read_write_prepare(vcpu, val, bytes))
4703                 return X86EMUL_CONTINUE;
4704
4705         vcpu->mmio_nr_fragments = 0;
4706
4707         /* Crossing a page boundary? */
4708         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4709                 int now;
4710
4711                 now = -addr & ~PAGE_MASK;
4712                 rc = emulator_read_write_onepage(addr, val, now, exception,
4713                                                  vcpu, ops);
4714
4715                 if (rc != X86EMUL_CONTINUE)
4716                         return rc;
4717                 addr += now;
4718                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4719                         addr = (u32)addr;
4720                 val += now;
4721                 bytes -= now;
4722         }
4723
4724         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4725                                          vcpu, ops);
4726         if (rc != X86EMUL_CONTINUE)
4727                 return rc;
4728
4729         if (!vcpu->mmio_nr_fragments)
4730                 return rc;
4731
4732         gpa = vcpu->mmio_fragments[0].gpa;
4733
4734         vcpu->mmio_needed = 1;
4735         vcpu->mmio_cur_fragment = 0;
4736
4737         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4738         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4739         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4740         vcpu->run->mmio.phys_addr = gpa;
4741
4742         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4743 }
4744
4745 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4746                                   unsigned long addr,
4747                                   void *val,
4748                                   unsigned int bytes,
4749                                   struct x86_exception *exception)
4750 {
4751         return emulator_read_write(ctxt, addr, val, bytes,
4752                                    exception, &read_emultor);
4753 }
4754
4755 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4756                             unsigned long addr,
4757                             const void *val,
4758                             unsigned int bytes,
4759                             struct x86_exception *exception)
4760 {
4761         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4762                                    exception, &write_emultor);
4763 }
4764
4765 #define CMPXCHG_TYPE(t, ptr, old, new) \
4766         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4767
4768 #ifdef CONFIG_X86_64
4769 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4770 #else
4771 #  define CMPXCHG64(ptr, old, new) \
4772         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4773 #endif
4774
4775 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4776                                      unsigned long addr,
4777                                      const void *old,
4778                                      const void *new,
4779                                      unsigned int bytes,
4780                                      struct x86_exception *exception)
4781 {
4782         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4783         gpa_t gpa;
4784         struct page *page;
4785         char *kaddr;
4786         bool exchanged;
4787
4788         /* guests cmpxchg8b have to be emulated atomically */
4789         if (bytes > 8 || (bytes & (bytes - 1)))
4790                 goto emul_write;
4791
4792         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4793
4794         if (gpa == UNMAPPED_GVA ||
4795             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4796                 goto emul_write;
4797
4798         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4799                 goto emul_write;
4800
4801         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4802         if (is_error_page(page))
4803                 goto emul_write;
4804
4805         kaddr = kmap_atomic(page);
4806         kaddr += offset_in_page(gpa);
4807         switch (bytes) {
4808         case 1:
4809                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4810                 break;
4811         case 2:
4812                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4813                 break;
4814         case 4:
4815                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4816                 break;
4817         case 8:
4818                 exchanged = CMPXCHG64(kaddr, old, new);
4819                 break;
4820         default:
4821                 BUG();
4822         }
4823         kunmap_atomic(kaddr);
4824         kvm_release_page_dirty(page);
4825
4826         if (!exchanged)
4827                 return X86EMUL_CMPXCHG_FAILED;
4828
4829         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4830         kvm_page_track_write(vcpu, gpa, new, bytes);
4831
4832         return X86EMUL_CONTINUE;
4833
4834 emul_write:
4835         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4836
4837         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4838 }
4839
4840 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4841 {
4842         /* TODO: String I/O for in kernel device */
4843         int r;
4844
4845         if (vcpu->arch.pio.in)
4846                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4847                                     vcpu->arch.pio.size, pd);
4848         else
4849                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4850                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4851                                      pd);
4852         return r;
4853 }
4854
4855 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4856                                unsigned short port, void *val,
4857                                unsigned int count, bool in)
4858 {
4859         vcpu->arch.pio.port = port;
4860         vcpu->arch.pio.in = in;
4861         vcpu->arch.pio.count  = count;
4862         vcpu->arch.pio.size = size;
4863
4864         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4865                 vcpu->arch.pio.count = 0;
4866                 return 1;
4867         }
4868
4869         vcpu->run->exit_reason = KVM_EXIT_IO;
4870         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4871         vcpu->run->io.size = size;
4872         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4873         vcpu->run->io.count = count;
4874         vcpu->run->io.port = port;
4875
4876         return 0;
4877 }
4878
4879 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4880                                     int size, unsigned short port, void *val,
4881                                     unsigned int count)
4882 {
4883         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4884         int ret;
4885
4886         if (vcpu->arch.pio.count)
4887                 goto data_avail;
4888
4889         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4890         if (ret) {
4891 data_avail:
4892                 memcpy(val, vcpu->arch.pio_data, size * count);
4893                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4894                 vcpu->arch.pio.count = 0;
4895                 return 1;
4896         }
4897
4898         return 0;
4899 }
4900
4901 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4902                                      int size, unsigned short port,
4903                                      const void *val, unsigned int count)
4904 {
4905         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4906
4907         memcpy(vcpu->arch.pio_data, val, size * count);
4908         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4909         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4910 }
4911
4912 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4913 {
4914         return kvm_x86_ops->get_segment_base(vcpu, seg);
4915 }
4916
4917 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4918 {
4919         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4920 }
4921
4922 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4923 {
4924         if (!need_emulate_wbinvd(vcpu))
4925                 return X86EMUL_CONTINUE;
4926
4927         if (kvm_x86_ops->has_wbinvd_exit()) {
4928                 int cpu = get_cpu();
4929
4930                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4931                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4932                                 wbinvd_ipi, NULL, 1);
4933                 put_cpu();
4934                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4935         } else
4936                 wbinvd();
4937         return X86EMUL_CONTINUE;
4938 }
4939
4940 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4941 {
4942         kvm_emulate_wbinvd_noskip(vcpu);
4943         return kvm_skip_emulated_instruction(vcpu);
4944 }
4945 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4946
4947
4948
4949 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4950 {
4951         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4952 }
4953
4954 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4955                            unsigned long *dest)
4956 {
4957         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4958 }
4959
4960 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4961                            unsigned long value)
4962 {
4963
4964         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4965 }
4966
4967 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4968 {
4969         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4970 }
4971
4972 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4973 {
4974         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4975         unsigned long value;
4976
4977         switch (cr) {
4978         case 0:
4979                 value = kvm_read_cr0(vcpu);
4980                 break;
4981         case 2:
4982                 value = vcpu->arch.cr2;
4983                 break;
4984         case 3:
4985                 value = kvm_read_cr3(vcpu);
4986                 break;
4987         case 4:
4988                 value = kvm_read_cr4(vcpu);
4989                 break;
4990         case 8:
4991                 value = kvm_get_cr8(vcpu);
4992                 break;
4993         default:
4994                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4995                 return 0;
4996         }
4997
4998         return value;
4999 }
5000
5001 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5002 {
5003         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5004         int res = 0;
5005
5006         switch (cr) {
5007         case 0:
5008                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5009                 break;
5010         case 2:
5011                 vcpu->arch.cr2 = val;
5012                 break;
5013         case 3:
5014                 res = kvm_set_cr3(vcpu, val);
5015                 break;
5016         case 4:
5017                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5018                 break;
5019         case 8:
5020                 res = kvm_set_cr8(vcpu, val);
5021                 break;
5022         default:
5023                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5024                 res = -1;
5025         }
5026
5027         return res;
5028 }
5029
5030 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5031 {
5032         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5033 }
5034
5035 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5036 {
5037         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5038 }
5039
5040 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5041 {
5042         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5043 }
5044
5045 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5046 {
5047         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5048 }
5049
5050 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5051 {
5052         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5053 }
5054
5055 static unsigned long emulator_get_cached_segment_base(
5056         struct x86_emulate_ctxt *ctxt, int seg)
5057 {
5058         return get_segment_base(emul_to_vcpu(ctxt), seg);
5059 }
5060
5061 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5062                                  struct desc_struct *desc, u32 *base3,
5063                                  int seg)
5064 {
5065         struct kvm_segment var;
5066
5067         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5068         *selector = var.selector;
5069
5070         if (var.unusable) {
5071                 memset(desc, 0, sizeof(*desc));
5072                 return false;
5073         }
5074
5075         if (var.g)
5076                 var.limit >>= 12;
5077         set_desc_limit(desc, var.limit);
5078         set_desc_base(desc, (unsigned long)var.base);
5079 #ifdef CONFIG_X86_64
5080         if (base3)
5081                 *base3 = var.base >> 32;
5082 #endif
5083         desc->type = var.type;
5084         desc->s = var.s;
5085         desc->dpl = var.dpl;
5086         desc->p = var.present;
5087         desc->avl = var.avl;
5088         desc->l = var.l;
5089         desc->d = var.db;
5090         desc->g = var.g;
5091
5092         return true;
5093 }
5094
5095 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5096                                  struct desc_struct *desc, u32 base3,
5097                                  int seg)
5098 {
5099         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5100         struct kvm_segment var;
5101
5102         var.selector = selector;
5103         var.base = get_desc_base(desc);
5104 #ifdef CONFIG_X86_64
5105         var.base |= ((u64)base3) << 32;
5106 #endif
5107         var.limit = get_desc_limit(desc);
5108         if (desc->g)
5109                 var.limit = (var.limit << 12) | 0xfff;
5110         var.type = desc->type;
5111         var.dpl = desc->dpl;
5112         var.db = desc->d;
5113         var.s = desc->s;
5114         var.l = desc->l;
5115         var.g = desc->g;
5116         var.avl = desc->avl;
5117         var.present = desc->p;
5118         var.unusable = !var.present;
5119         var.padding = 0;
5120
5121         kvm_set_segment(vcpu, &var, seg);
5122         return;
5123 }
5124
5125 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5126                             u32 msr_index, u64 *pdata)
5127 {
5128         struct msr_data msr;
5129         int r;
5130
5131         msr.index = msr_index;
5132         msr.host_initiated = false;
5133         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5134         if (r)
5135                 return r;
5136
5137         *pdata = msr.data;
5138         return 0;
5139 }
5140
5141 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5142                             u32 msr_index, u64 data)
5143 {
5144         struct msr_data msr;
5145
5146         msr.data = data;
5147         msr.index = msr_index;
5148         msr.host_initiated = false;
5149         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5150 }
5151
5152 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5153 {
5154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5155
5156         return vcpu->arch.smbase;
5157 }
5158
5159 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5160 {
5161         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5162
5163         vcpu->arch.smbase = smbase;
5164 }
5165
5166 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5167                               u32 pmc)
5168 {
5169         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5170 }
5171
5172 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5173                              u32 pmc, u64 *pdata)
5174 {
5175         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5176 }
5177
5178 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5179 {
5180         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5181 }
5182
5183 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5184 {
5185         preempt_disable();
5186         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5187 }
5188
5189 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5190 {
5191         preempt_enable();
5192 }
5193
5194 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5195                               struct x86_instruction_info *info,
5196                               enum x86_intercept_stage stage)
5197 {
5198         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5199 }
5200
5201 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5202                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5203 {
5204         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5205 }
5206
5207 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5208 {
5209         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5210 }
5211
5212 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5213 {
5214         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5215 }
5216
5217 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5218 {
5219         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5220 }
5221
5222 static const struct x86_emulate_ops emulate_ops = {
5223         .read_gpr            = emulator_read_gpr,
5224         .write_gpr           = emulator_write_gpr,
5225         .read_std            = kvm_read_guest_virt_system,
5226         .write_std           = kvm_write_guest_virt_system,
5227         .read_phys           = kvm_read_guest_phys_system,
5228         .fetch               = kvm_fetch_guest_virt,
5229         .read_emulated       = emulator_read_emulated,
5230         .write_emulated      = emulator_write_emulated,
5231         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5232         .invlpg              = emulator_invlpg,
5233         .pio_in_emulated     = emulator_pio_in_emulated,
5234         .pio_out_emulated    = emulator_pio_out_emulated,
5235         .get_segment         = emulator_get_segment,
5236         .set_segment         = emulator_set_segment,
5237         .get_cached_segment_base = emulator_get_cached_segment_base,
5238         .get_gdt             = emulator_get_gdt,
5239         .get_idt             = emulator_get_idt,
5240         .set_gdt             = emulator_set_gdt,
5241         .set_idt             = emulator_set_idt,
5242         .get_cr              = emulator_get_cr,
5243         .set_cr              = emulator_set_cr,
5244         .cpl                 = emulator_get_cpl,
5245         .get_dr              = emulator_get_dr,
5246         .set_dr              = emulator_set_dr,
5247         .get_smbase          = emulator_get_smbase,
5248         .set_smbase          = emulator_set_smbase,
5249         .set_msr             = emulator_set_msr,
5250         .get_msr             = emulator_get_msr,
5251         .check_pmc           = emulator_check_pmc,
5252         .read_pmc            = emulator_read_pmc,
5253         .halt                = emulator_halt,
5254         .wbinvd              = emulator_wbinvd,
5255         .fix_hypercall       = emulator_fix_hypercall,
5256         .get_fpu             = emulator_get_fpu,
5257         .put_fpu             = emulator_put_fpu,
5258         .intercept           = emulator_intercept,
5259         .get_cpuid           = emulator_get_cpuid,
5260         .set_nmi_mask        = emulator_set_nmi_mask,
5261 };
5262
5263 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5264 {
5265         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5266         /*
5267          * an sti; sti; sequence only disable interrupts for the first
5268          * instruction. So, if the last instruction, be it emulated or
5269          * not, left the system with the INT_STI flag enabled, it
5270          * means that the last instruction is an sti. We should not
5271          * leave the flag on in this case. The same goes for mov ss
5272          */
5273         if (int_shadow & mask)
5274                 mask = 0;
5275         if (unlikely(int_shadow || mask)) {
5276                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5277                 if (!mask)
5278                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5279         }
5280 }
5281
5282 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5283 {
5284         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5285         if (ctxt->exception.vector == PF_VECTOR)
5286                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5287
5288         if (ctxt->exception.error_code_valid)
5289                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5290                                       ctxt->exception.error_code);
5291         else
5292                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5293         return false;
5294 }
5295
5296 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5297 {
5298         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5299         int cs_db, cs_l;
5300
5301         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5302
5303         ctxt->eflags = kvm_get_rflags(vcpu);
5304         ctxt->eip = kvm_rip_read(vcpu);
5305         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5306                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5307                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5308                      cs_db                              ? X86EMUL_MODE_PROT32 :
5309                                                           X86EMUL_MODE_PROT16;
5310         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5311         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5312         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5313         ctxt->emul_flags = vcpu->arch.hflags;
5314
5315         init_decode_cache(ctxt);
5316         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5317 }
5318
5319 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5320 {
5321         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5322         int ret;
5323
5324         init_emulate_ctxt(vcpu);
5325
5326         ctxt->op_bytes = 2;
5327         ctxt->ad_bytes = 2;
5328         ctxt->_eip = ctxt->eip + inc_eip;
5329         ret = emulate_int_real(ctxt, irq);
5330
5331         if (ret != X86EMUL_CONTINUE)
5332                 return EMULATE_FAIL;
5333
5334         ctxt->eip = ctxt->_eip;
5335         kvm_rip_write(vcpu, ctxt->eip);
5336         kvm_set_rflags(vcpu, ctxt->eflags);
5337
5338         if (irq == NMI_VECTOR)
5339                 vcpu->arch.nmi_pending = 0;
5340         else
5341                 vcpu->arch.interrupt.pending = false;
5342
5343         return EMULATE_DONE;
5344 }
5345 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5346
5347 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5348 {
5349         int r = EMULATE_DONE;
5350
5351         ++vcpu->stat.insn_emulation_fail;
5352         trace_kvm_emulate_insn_failed(vcpu);
5353         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5354                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5355                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5356                 vcpu->run->internal.ndata = 0;
5357                 r = EMULATE_FAIL;
5358         }
5359         kvm_queue_exception(vcpu, UD_VECTOR);
5360
5361         return r;
5362 }
5363
5364 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5365                                   bool write_fault_to_shadow_pgtable,
5366                                   int emulation_type)
5367 {
5368         gpa_t gpa = cr2;
5369         kvm_pfn_t pfn;
5370
5371         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5372                 return false;
5373
5374         if (!vcpu->arch.mmu.direct_map) {
5375                 /*
5376                  * Write permission should be allowed since only
5377                  * write access need to be emulated.
5378                  */
5379                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5380
5381                 /*
5382                  * If the mapping is invalid in guest, let cpu retry
5383                  * it to generate fault.
5384                  */
5385                 if (gpa == UNMAPPED_GVA)
5386                         return true;
5387         }
5388
5389         /*
5390          * Do not retry the unhandleable instruction if it faults on the
5391          * readonly host memory, otherwise it will goto a infinite loop:
5392          * retry instruction -> write #PF -> emulation fail -> retry
5393          * instruction -> ...
5394          */
5395         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5396
5397         /*
5398          * If the instruction failed on the error pfn, it can not be fixed,
5399          * report the error to userspace.
5400          */
5401         if (is_error_noslot_pfn(pfn))
5402                 return false;
5403
5404         kvm_release_pfn_clean(pfn);
5405
5406         /* The instructions are well-emulated on direct mmu. */
5407         if (vcpu->arch.mmu.direct_map) {
5408                 unsigned int indirect_shadow_pages;
5409
5410                 spin_lock(&vcpu->kvm->mmu_lock);
5411                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5412                 spin_unlock(&vcpu->kvm->mmu_lock);
5413
5414                 if (indirect_shadow_pages)
5415                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5416
5417                 return true;
5418         }
5419
5420         /*
5421          * if emulation was due to access to shadowed page table
5422          * and it failed try to unshadow page and re-enter the
5423          * guest to let CPU execute the instruction.
5424          */
5425         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5426
5427         /*
5428          * If the access faults on its page table, it can not
5429          * be fixed by unprotecting shadow page and it should
5430          * be reported to userspace.
5431          */
5432         return !write_fault_to_shadow_pgtable;
5433 }
5434
5435 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5436                               unsigned long cr2,  int emulation_type)
5437 {
5438         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5439         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5440
5441         last_retry_eip = vcpu->arch.last_retry_eip;
5442         last_retry_addr = vcpu->arch.last_retry_addr;
5443
5444         /*
5445          * If the emulation is caused by #PF and it is non-page_table
5446          * writing instruction, it means the VM-EXIT is caused by shadow
5447          * page protected, we can zap the shadow page and retry this
5448          * instruction directly.
5449          *
5450          * Note: if the guest uses a non-page-table modifying instruction
5451          * on the PDE that points to the instruction, then we will unmap
5452          * the instruction and go to an infinite loop. So, we cache the
5453          * last retried eip and the last fault address, if we meet the eip
5454          * and the address again, we can break out of the potential infinite
5455          * loop.
5456          */
5457         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5458
5459         if (!(emulation_type & EMULTYPE_RETRY))
5460                 return false;
5461
5462         if (x86_page_table_writing_insn(ctxt))
5463                 return false;
5464
5465         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5466                 return false;
5467
5468         vcpu->arch.last_retry_eip = ctxt->eip;
5469         vcpu->arch.last_retry_addr = cr2;
5470
5471         if (!vcpu->arch.mmu.direct_map)
5472                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5473
5474         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5475
5476         return true;
5477 }
5478
5479 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5480 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5481
5482 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5483 {
5484         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5485                 /* This is a good place to trace that we are exiting SMM.  */
5486                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5487
5488                 /* Process a latched INIT or SMI, if any.  */
5489                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5490         }
5491
5492         kvm_mmu_reset_context(vcpu);
5493 }
5494
5495 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5496 {
5497         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5498
5499         vcpu->arch.hflags = emul_flags;
5500
5501         if (changed & HF_SMM_MASK)
5502                 kvm_smm_changed(vcpu);
5503 }
5504
5505 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5506                                 unsigned long *db)
5507 {
5508         u32 dr6 = 0;
5509         int i;
5510         u32 enable, rwlen;
5511
5512         enable = dr7;
5513         rwlen = dr7 >> 16;
5514         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5515                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5516                         dr6 |= (1 << i);
5517         return dr6;
5518 }
5519
5520 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5521 {
5522         struct kvm_run *kvm_run = vcpu->run;
5523
5524         /*
5525          * rflags is the old, "raw" value of the flags.  The new value has
5526          * not been saved yet.
5527          *
5528          * This is correct even for TF set by the guest, because "the
5529          * processor will not generate this exception after the instruction
5530          * that sets the TF flag".
5531          */
5532         if (unlikely(rflags & X86_EFLAGS_TF)) {
5533                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5534                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5535                                                   DR6_RTM;
5536                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5537                         kvm_run->debug.arch.exception = DB_VECTOR;
5538                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5539                         *r = EMULATE_USER_EXIT;
5540                 } else {
5541                         /*
5542                          * "Certain debug exceptions may clear bit 0-3.  The
5543                          * remaining contents of the DR6 register are never
5544                          * cleared by the processor".
5545                          */
5546                         vcpu->arch.dr6 &= ~15;
5547                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5548                         kvm_queue_exception(vcpu, DB_VECTOR);
5549                 }
5550         }
5551 }
5552
5553 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5554 {
5555         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5556         int r = EMULATE_DONE;
5557
5558         kvm_x86_ops->skip_emulated_instruction(vcpu);
5559         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5560         return r == EMULATE_DONE;
5561 }
5562 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5563
5564 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5565 {
5566         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5567             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5568                 struct kvm_run *kvm_run = vcpu->run;
5569                 unsigned long eip = kvm_get_linear_rip(vcpu);
5570                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5571                                            vcpu->arch.guest_debug_dr7,
5572                                            vcpu->arch.eff_db);
5573
5574                 if (dr6 != 0) {
5575                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5576                         kvm_run->debug.arch.pc = eip;
5577                         kvm_run->debug.arch.exception = DB_VECTOR;
5578                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5579                         *r = EMULATE_USER_EXIT;
5580                         return true;
5581                 }
5582         }
5583
5584         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5585             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5586                 unsigned long eip = kvm_get_linear_rip(vcpu);
5587                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5588                                            vcpu->arch.dr7,
5589                                            vcpu->arch.db);
5590
5591                 if (dr6 != 0) {
5592                         vcpu->arch.dr6 &= ~15;
5593                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5594                         kvm_queue_exception(vcpu, DB_VECTOR);
5595                         *r = EMULATE_DONE;
5596                         return true;
5597                 }
5598         }
5599
5600         return false;
5601 }
5602
5603 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5604                             unsigned long cr2,
5605                             int emulation_type,
5606                             void *insn,
5607                             int insn_len)
5608 {
5609         int r;
5610         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5611         bool writeback = true;
5612         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5613
5614         /*
5615          * Clear write_fault_to_shadow_pgtable here to ensure it is
5616          * never reused.
5617          */
5618         vcpu->arch.write_fault_to_shadow_pgtable = false;
5619         kvm_clear_exception_queue(vcpu);
5620
5621         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5622                 init_emulate_ctxt(vcpu);
5623
5624                 /*
5625                  * We will reenter on the same instruction since
5626                  * we do not set complete_userspace_io.  This does not
5627                  * handle watchpoints yet, those would be handled in
5628                  * the emulate_ops.
5629                  */
5630                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5631                         return r;
5632
5633                 ctxt->interruptibility = 0;
5634                 ctxt->have_exception = false;
5635                 ctxt->exception.vector = -1;
5636                 ctxt->perm_ok = false;
5637
5638                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5639
5640                 r = x86_decode_insn(ctxt, insn, insn_len);
5641
5642                 trace_kvm_emulate_insn_start(vcpu);
5643                 ++vcpu->stat.insn_emulation;
5644                 if (r != EMULATION_OK)  {
5645                         if (emulation_type & EMULTYPE_TRAP_UD)
5646                                 return EMULATE_FAIL;
5647                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5648                                                 emulation_type))
5649                                 return EMULATE_DONE;
5650                         if (emulation_type & EMULTYPE_SKIP)
5651                                 return EMULATE_FAIL;
5652                         return handle_emulation_failure(vcpu);
5653                 }
5654         }
5655
5656         if (emulation_type & EMULTYPE_SKIP) {
5657                 kvm_rip_write(vcpu, ctxt->_eip);
5658                 if (ctxt->eflags & X86_EFLAGS_RF)
5659                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5660                 return EMULATE_DONE;
5661         }
5662
5663         if (retry_instruction(ctxt, cr2, emulation_type))
5664                 return EMULATE_DONE;
5665
5666         /* this is needed for vmware backdoor interface to work since it
5667            changes registers values  during IO operation */
5668         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5669                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5670                 emulator_invalidate_register_cache(ctxt);
5671         }
5672
5673 restart:
5674         /* Save the faulting GPA (cr2) in the address field */
5675         ctxt->exception.address = cr2;
5676
5677         r = x86_emulate_insn(ctxt);
5678
5679         if (r == EMULATION_INTERCEPTED)
5680                 return EMULATE_DONE;
5681
5682         if (r == EMULATION_FAILED) {
5683                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5684                                         emulation_type))
5685                         return EMULATE_DONE;
5686
5687                 return handle_emulation_failure(vcpu);
5688         }
5689
5690         if (ctxt->have_exception) {
5691                 r = EMULATE_DONE;
5692                 if (inject_emulated_exception(vcpu))
5693                         return r;
5694         } else if (vcpu->arch.pio.count) {
5695                 if (!vcpu->arch.pio.in) {
5696                         /* FIXME: return into emulator if single-stepping.  */
5697                         vcpu->arch.pio.count = 0;
5698                 } else {
5699                         writeback = false;
5700                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5701                 }
5702                 r = EMULATE_USER_EXIT;
5703         } else if (vcpu->mmio_needed) {
5704                 if (!vcpu->mmio_is_write)
5705                         writeback = false;
5706                 r = EMULATE_USER_EXIT;
5707                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5708         } else if (r == EMULATION_RESTART)
5709                 goto restart;
5710         else
5711                 r = EMULATE_DONE;
5712
5713         if (writeback) {
5714                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5715                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5716                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5717                 if (vcpu->arch.hflags != ctxt->emul_flags)
5718                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5719                 kvm_rip_write(vcpu, ctxt->eip);
5720                 if (r == EMULATE_DONE)
5721                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5722                 if (!ctxt->have_exception ||
5723                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5724                         __kvm_set_rflags(vcpu, ctxt->eflags);
5725
5726                 /*
5727                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5728                  * do nothing, and it will be requested again as soon as
5729                  * the shadow expires.  But we still need to check here,
5730                  * because POPF has no interrupt shadow.
5731                  */
5732                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5733                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5734         } else
5735                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5736
5737         return r;
5738 }
5739 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5740
5741 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5742 {
5743         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5744         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5745                                             size, port, &val, 1);
5746         /* do not return to emulator after return from userspace */
5747         vcpu->arch.pio.count = 0;
5748         return ret;
5749 }
5750 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5751
5752 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5753 {
5754         unsigned long val;
5755
5756         /* We should only ever be called with arch.pio.count equal to 1 */
5757         BUG_ON(vcpu->arch.pio.count != 1);
5758
5759         /* For size less than 4 we merge, else we zero extend */
5760         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5761                                         : 0;
5762
5763         /*
5764          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5765          * the copy and tracing
5766          */
5767         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5768                                  vcpu->arch.pio.port, &val, 1);
5769         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5770
5771         return 1;
5772 }
5773
5774 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5775 {
5776         unsigned long val;
5777         int ret;
5778
5779         /* For size less than 4 we merge, else we zero extend */
5780         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5781
5782         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5783                                        &val, 1);
5784         if (ret) {
5785                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5786                 return ret;
5787         }
5788
5789         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5790
5791         return 0;
5792 }
5793 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5794
5795 static int kvmclock_cpu_down_prep(unsigned int cpu)
5796 {
5797         __this_cpu_write(cpu_tsc_khz, 0);
5798         return 0;
5799 }
5800
5801 static void tsc_khz_changed(void *data)
5802 {
5803         struct cpufreq_freqs *freq = data;
5804         unsigned long khz = 0;
5805
5806         if (data)
5807                 khz = freq->new;
5808         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5809                 khz = cpufreq_quick_get(raw_smp_processor_id());
5810         if (!khz)
5811                 khz = tsc_khz;
5812         __this_cpu_write(cpu_tsc_khz, khz);
5813 }
5814
5815 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5816                                      void *data)
5817 {
5818         struct cpufreq_freqs *freq = data;
5819         struct kvm *kvm;
5820         struct kvm_vcpu *vcpu;
5821         int i, send_ipi = 0;
5822
5823         /*
5824          * We allow guests to temporarily run on slowing clocks,
5825          * provided we notify them after, or to run on accelerating
5826          * clocks, provided we notify them before.  Thus time never
5827          * goes backwards.
5828          *
5829          * However, we have a problem.  We can't atomically update
5830          * the frequency of a given CPU from this function; it is
5831          * merely a notifier, which can be called from any CPU.
5832          * Changing the TSC frequency at arbitrary points in time
5833          * requires a recomputation of local variables related to
5834          * the TSC for each VCPU.  We must flag these local variables
5835          * to be updated and be sure the update takes place with the
5836          * new frequency before any guests proceed.
5837          *
5838          * Unfortunately, the combination of hotplug CPU and frequency
5839          * change creates an intractable locking scenario; the order
5840          * of when these callouts happen is undefined with respect to
5841          * CPU hotplug, and they can race with each other.  As such,
5842          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5843          * undefined; you can actually have a CPU frequency change take
5844          * place in between the computation of X and the setting of the
5845          * variable.  To protect against this problem, all updates of
5846          * the per_cpu tsc_khz variable are done in an interrupt
5847          * protected IPI, and all callers wishing to update the value
5848          * must wait for a synchronous IPI to complete (which is trivial
5849          * if the caller is on the CPU already).  This establishes the
5850          * necessary total order on variable updates.
5851          *
5852          * Note that because a guest time update may take place
5853          * anytime after the setting of the VCPU's request bit, the
5854          * correct TSC value must be set before the request.  However,
5855          * to ensure the update actually makes it to any guest which
5856          * starts running in hardware virtualization between the set
5857          * and the acquisition of the spinlock, we must also ping the
5858          * CPU after setting the request bit.
5859          *
5860          */
5861
5862         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5863                 return 0;
5864         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5865                 return 0;
5866
5867         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5868
5869         spin_lock(&kvm_lock);
5870         list_for_each_entry(kvm, &vm_list, vm_list) {
5871                 kvm_for_each_vcpu(i, vcpu, kvm) {
5872                         if (vcpu->cpu != freq->cpu)
5873                                 continue;
5874                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5875                         if (vcpu->cpu != smp_processor_id())
5876                                 send_ipi = 1;
5877                 }
5878         }
5879         spin_unlock(&kvm_lock);
5880
5881         if (freq->old < freq->new && send_ipi) {
5882                 /*
5883                  * We upscale the frequency.  Must make the guest
5884                  * doesn't see old kvmclock values while running with
5885                  * the new frequency, otherwise we risk the guest sees
5886                  * time go backwards.
5887                  *
5888                  * In case we update the frequency for another cpu
5889                  * (which might be in guest context) send an interrupt
5890                  * to kick the cpu out of guest context.  Next time
5891                  * guest context is entered kvmclock will be updated,
5892                  * so the guest will not see stale values.
5893                  */
5894                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5895         }
5896         return 0;
5897 }
5898
5899 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5900         .notifier_call  = kvmclock_cpufreq_notifier
5901 };
5902
5903 static int kvmclock_cpu_online(unsigned int cpu)
5904 {
5905         tsc_khz_changed(NULL);
5906         return 0;
5907 }
5908
5909 static void kvm_timer_init(void)
5910 {
5911         max_tsc_khz = tsc_khz;
5912
5913         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5914 #ifdef CONFIG_CPU_FREQ
5915                 struct cpufreq_policy policy;
5916                 int cpu;
5917
5918                 memset(&policy, 0, sizeof(policy));
5919                 cpu = get_cpu();
5920                 cpufreq_get_policy(&policy, cpu);
5921                 if (policy.cpuinfo.max_freq)
5922                         max_tsc_khz = policy.cpuinfo.max_freq;
5923                 put_cpu();
5924 #endif
5925                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5926                                           CPUFREQ_TRANSITION_NOTIFIER);
5927         }
5928         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5929
5930         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5931                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5932 }
5933
5934 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5935
5936 int kvm_is_in_guest(void)
5937 {
5938         return __this_cpu_read(current_vcpu) != NULL;
5939 }
5940
5941 static int kvm_is_user_mode(void)
5942 {
5943         int user_mode = 3;
5944
5945         if (__this_cpu_read(current_vcpu))
5946                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5947
5948         return user_mode != 0;
5949 }
5950
5951 static unsigned long kvm_get_guest_ip(void)
5952 {
5953         unsigned long ip = 0;
5954
5955         if (__this_cpu_read(current_vcpu))
5956                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5957
5958         return ip;
5959 }
5960
5961 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5962         .is_in_guest            = kvm_is_in_guest,
5963         .is_user_mode           = kvm_is_user_mode,
5964         .get_guest_ip           = kvm_get_guest_ip,
5965 };
5966
5967 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5968 {
5969         __this_cpu_write(current_vcpu, vcpu);
5970 }
5971 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5972
5973 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5974 {
5975         __this_cpu_write(current_vcpu, NULL);
5976 }
5977 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5978
5979 static void kvm_set_mmio_spte_mask(void)
5980 {
5981         u64 mask;
5982         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5983
5984         /*
5985          * Set the reserved bits and the present bit of an paging-structure
5986          * entry to generate page fault with PFER.RSV = 1.
5987          */
5988          /* Mask the reserved physical address bits. */
5989         mask = rsvd_bits(maxphyaddr, 51);
5990
5991         /* Set the present bit. */
5992         mask |= 1ull;
5993
5994 #ifdef CONFIG_X86_64
5995         /*
5996          * If reserved bit is not supported, clear the present bit to disable
5997          * mmio page fault.
5998          */
5999         if (maxphyaddr == 52)
6000                 mask &= ~1ull;
6001 #endif
6002
6003         kvm_mmu_set_mmio_spte_mask(mask);
6004 }
6005
6006 #ifdef CONFIG_X86_64
6007 static void pvclock_gtod_update_fn(struct work_struct *work)
6008 {
6009         struct kvm *kvm;
6010
6011         struct kvm_vcpu *vcpu;
6012         int i;
6013
6014         spin_lock(&kvm_lock);
6015         list_for_each_entry(kvm, &vm_list, vm_list)
6016                 kvm_for_each_vcpu(i, vcpu, kvm)
6017                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6018         atomic_set(&kvm_guest_has_master_clock, 0);
6019         spin_unlock(&kvm_lock);
6020 }
6021
6022 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6023
6024 /*
6025  * Notification about pvclock gtod data update.
6026  */
6027 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6028                                void *priv)
6029 {
6030         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6031         struct timekeeper *tk = priv;
6032
6033         update_pvclock_gtod(tk);
6034
6035         /* disable master clock if host does not trust, or does not
6036          * use, TSC clocksource
6037          */
6038         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6039             atomic_read(&kvm_guest_has_master_clock) != 0)
6040                 queue_work(system_long_wq, &pvclock_gtod_work);
6041
6042         return 0;
6043 }
6044
6045 static struct notifier_block pvclock_gtod_notifier = {
6046         .notifier_call = pvclock_gtod_notify,
6047 };
6048 #endif
6049
6050 int kvm_arch_init(void *opaque)
6051 {
6052         int r;
6053         struct kvm_x86_ops *ops = opaque;
6054
6055         if (kvm_x86_ops) {
6056                 printk(KERN_ERR "kvm: already loaded the other module\n");
6057                 r = -EEXIST;
6058                 goto out;
6059         }
6060
6061         if (!ops->cpu_has_kvm_support()) {
6062                 printk(KERN_ERR "kvm: no hardware support\n");
6063                 r = -EOPNOTSUPP;
6064                 goto out;
6065         }
6066         if (ops->disabled_by_bios()) {
6067                 printk(KERN_ERR "kvm: disabled by bios\n");
6068                 r = -EOPNOTSUPP;
6069                 goto out;
6070         }
6071
6072         r = -ENOMEM;
6073         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6074         if (!shared_msrs) {
6075                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6076                 goto out;
6077         }
6078
6079         r = kvm_mmu_module_init();
6080         if (r)
6081                 goto out_free_percpu;
6082
6083         kvm_set_mmio_spte_mask();
6084
6085         kvm_x86_ops = ops;
6086
6087         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6088                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6089                         PT_PRESENT_MASK, 0);
6090         kvm_timer_init();
6091
6092         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6093
6094         if (boot_cpu_has(X86_FEATURE_XSAVE))
6095                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6096
6097         kvm_lapic_init();
6098 #ifdef CONFIG_X86_64
6099         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6100 #endif
6101
6102         return 0;
6103
6104 out_free_percpu:
6105         free_percpu(shared_msrs);
6106 out:
6107         return r;
6108 }
6109
6110 void kvm_arch_exit(void)
6111 {
6112         kvm_lapic_exit();
6113         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6114
6115         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6116                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6117                                             CPUFREQ_TRANSITION_NOTIFIER);
6118         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6119 #ifdef CONFIG_X86_64
6120         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6121 #endif
6122         kvm_x86_ops = NULL;
6123         kvm_mmu_module_exit();
6124         free_percpu(shared_msrs);
6125 }
6126
6127 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6128 {
6129         ++vcpu->stat.halt_exits;
6130         if (lapic_in_kernel(vcpu)) {
6131                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6132                 return 1;
6133         } else {
6134                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6135                 return 0;
6136         }
6137 }
6138 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6139
6140 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6141 {
6142         int ret = kvm_skip_emulated_instruction(vcpu);
6143         /*
6144          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6145          * KVM_EXIT_DEBUG here.
6146          */
6147         return kvm_vcpu_halt(vcpu) && ret;
6148 }
6149 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6150
6151 #ifdef CONFIG_X86_64
6152 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6153                                 unsigned long clock_type)
6154 {
6155         struct kvm_clock_pairing clock_pairing;
6156         struct timespec ts;
6157         u64 cycle;
6158         int ret;
6159
6160         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6161                 return -KVM_EOPNOTSUPP;
6162
6163         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6164                 return -KVM_EOPNOTSUPP;
6165
6166         clock_pairing.sec = ts.tv_sec;
6167         clock_pairing.nsec = ts.tv_nsec;
6168         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6169         clock_pairing.flags = 0;
6170
6171         ret = 0;
6172         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6173                             sizeof(struct kvm_clock_pairing)))
6174                 ret = -KVM_EFAULT;
6175
6176         return ret;
6177 }
6178 #endif
6179
6180 /*
6181  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6182  *
6183  * @apicid - apicid of vcpu to be kicked.
6184  */
6185 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6186 {
6187         struct kvm_lapic_irq lapic_irq;
6188
6189         lapic_irq.shorthand = 0;
6190         lapic_irq.dest_mode = 0;
6191         lapic_irq.dest_id = apicid;
6192         lapic_irq.msi_redir_hint = false;
6193
6194         lapic_irq.delivery_mode = APIC_DM_REMRD;
6195         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6196 }
6197
6198 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6199 {
6200         vcpu->arch.apicv_active = false;
6201         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6202 }
6203
6204 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6205 {
6206         unsigned long nr, a0, a1, a2, a3, ret;
6207         int op_64_bit, r;
6208
6209         r = kvm_skip_emulated_instruction(vcpu);
6210
6211         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6212                 return kvm_hv_hypercall(vcpu);
6213
6214         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6215         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6216         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6217         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6218         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6219
6220         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6221
6222         op_64_bit = is_64_bit_mode(vcpu);
6223         if (!op_64_bit) {
6224                 nr &= 0xFFFFFFFF;
6225                 a0 &= 0xFFFFFFFF;
6226                 a1 &= 0xFFFFFFFF;
6227                 a2 &= 0xFFFFFFFF;
6228                 a3 &= 0xFFFFFFFF;
6229         }
6230
6231         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6232                 ret = -KVM_EPERM;
6233                 goto out;
6234         }
6235
6236         switch (nr) {
6237         case KVM_HC_VAPIC_POLL_IRQ:
6238                 ret = 0;
6239                 break;
6240         case KVM_HC_KICK_CPU:
6241                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6242                 ret = 0;
6243                 break;
6244 #ifdef CONFIG_X86_64
6245         case KVM_HC_CLOCK_PAIRING:
6246                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6247                 break;
6248 #endif
6249         default:
6250                 ret = -KVM_ENOSYS;
6251                 break;
6252         }
6253 out:
6254         if (!op_64_bit)
6255                 ret = (u32)ret;
6256         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6257         ++vcpu->stat.hypercalls;
6258         return r;
6259 }
6260 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6261
6262 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6263 {
6264         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6265         char instruction[3];
6266         unsigned long rip = kvm_rip_read(vcpu);
6267
6268         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6269
6270         return emulator_write_emulated(ctxt, rip, instruction, 3,
6271                 &ctxt->exception);
6272 }
6273
6274 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6275 {
6276         return vcpu->run->request_interrupt_window &&
6277                 likely(!pic_in_kernel(vcpu->kvm));
6278 }
6279
6280 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6281 {
6282         struct kvm_run *kvm_run = vcpu->run;
6283
6284         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6285         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6286         kvm_run->cr8 = kvm_get_cr8(vcpu);
6287         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6288         kvm_run->ready_for_interrupt_injection =
6289                 pic_in_kernel(vcpu->kvm) ||
6290                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6291 }
6292
6293 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6294 {
6295         int max_irr, tpr;
6296
6297         if (!kvm_x86_ops->update_cr8_intercept)
6298                 return;
6299
6300         if (!lapic_in_kernel(vcpu))
6301                 return;
6302
6303         if (vcpu->arch.apicv_active)
6304                 return;
6305
6306         if (!vcpu->arch.apic->vapic_addr)
6307                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6308         else
6309                 max_irr = -1;
6310
6311         if (max_irr != -1)
6312                 max_irr >>= 4;
6313
6314         tpr = kvm_lapic_get_cr8(vcpu);
6315
6316         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6317 }
6318
6319 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6320 {
6321         int r;
6322
6323         /* try to reinject previous events if any */
6324         if (vcpu->arch.exception.pending) {
6325                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6326                                         vcpu->arch.exception.has_error_code,
6327                                         vcpu->arch.exception.error_code);
6328
6329                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6330                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6331                                              X86_EFLAGS_RF);
6332
6333                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6334                     (vcpu->arch.dr7 & DR7_GD)) {
6335                         vcpu->arch.dr7 &= ~DR7_GD;
6336                         kvm_update_dr7(vcpu);
6337                 }
6338
6339                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6340                                           vcpu->arch.exception.has_error_code,
6341                                           vcpu->arch.exception.error_code,
6342                                           vcpu->arch.exception.reinject);
6343                 return 0;
6344         }
6345
6346         if (vcpu->arch.nmi_injected) {
6347                 kvm_x86_ops->set_nmi(vcpu);
6348                 return 0;
6349         }
6350
6351         if (vcpu->arch.interrupt.pending) {
6352                 kvm_x86_ops->set_irq(vcpu);
6353                 return 0;
6354         }
6355
6356         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6357                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6358                 if (r != 0)
6359                         return r;
6360         }
6361
6362         /* try to inject new event if pending */
6363         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6364                 vcpu->arch.smi_pending = false;
6365                 enter_smm(vcpu);
6366         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6367                 --vcpu->arch.nmi_pending;
6368                 vcpu->arch.nmi_injected = true;
6369                 kvm_x86_ops->set_nmi(vcpu);
6370         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6371                 /*
6372                  * Because interrupts can be injected asynchronously, we are
6373                  * calling check_nested_events again here to avoid a race condition.
6374                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6375                  * proposal and current concerns.  Perhaps we should be setting
6376                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6377                  */
6378                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6379                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6380                         if (r != 0)
6381                                 return r;
6382                 }
6383                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6384                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6385                                             false);
6386                         kvm_x86_ops->set_irq(vcpu);
6387                 }
6388         }
6389
6390         return 0;
6391 }
6392
6393 static void process_nmi(struct kvm_vcpu *vcpu)
6394 {
6395         unsigned limit = 2;
6396
6397         /*
6398          * x86 is limited to one NMI running, and one NMI pending after it.
6399          * If an NMI is already in progress, limit further NMIs to just one.
6400          * Otherwise, allow two (and we'll inject the first one immediately).
6401          */
6402         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6403                 limit = 1;
6404
6405         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6406         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6407         kvm_make_request(KVM_REQ_EVENT, vcpu);
6408 }
6409
6410 #define put_smstate(type, buf, offset, val)                       \
6411         *(type *)((buf) + (offset) - 0x7e00) = val
6412
6413 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6414 {
6415         u32 flags = 0;
6416         flags |= seg->g       << 23;
6417         flags |= seg->db      << 22;
6418         flags |= seg->l       << 21;
6419         flags |= seg->avl     << 20;
6420         flags |= seg->present << 15;
6421         flags |= seg->dpl     << 13;
6422         flags |= seg->s       << 12;
6423         flags |= seg->type    << 8;
6424         return flags;
6425 }
6426
6427 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6428 {
6429         struct kvm_segment seg;
6430         int offset;
6431
6432         kvm_get_segment(vcpu, &seg, n);
6433         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6434
6435         if (n < 3)
6436                 offset = 0x7f84 + n * 12;
6437         else
6438                 offset = 0x7f2c + (n - 3) * 12;
6439
6440         put_smstate(u32, buf, offset + 8, seg.base);
6441         put_smstate(u32, buf, offset + 4, seg.limit);
6442         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6443 }
6444
6445 #ifdef CONFIG_X86_64
6446 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6447 {
6448         struct kvm_segment seg;
6449         int offset;
6450         u16 flags;
6451
6452         kvm_get_segment(vcpu, &seg, n);
6453         offset = 0x7e00 + n * 16;
6454
6455         flags = enter_smm_get_segment_flags(&seg) >> 8;
6456         put_smstate(u16, buf, offset, seg.selector);
6457         put_smstate(u16, buf, offset + 2, flags);
6458         put_smstate(u32, buf, offset + 4, seg.limit);
6459         put_smstate(u64, buf, offset + 8, seg.base);
6460 }
6461 #endif
6462
6463 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6464 {
6465         struct desc_ptr dt;
6466         struct kvm_segment seg;
6467         unsigned long val;
6468         int i;
6469
6470         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6471         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6472         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6473         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6474
6475         for (i = 0; i < 8; i++)
6476                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6477
6478         kvm_get_dr(vcpu, 6, &val);
6479         put_smstate(u32, buf, 0x7fcc, (u32)val);
6480         kvm_get_dr(vcpu, 7, &val);
6481         put_smstate(u32, buf, 0x7fc8, (u32)val);
6482
6483         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6484         put_smstate(u32, buf, 0x7fc4, seg.selector);
6485         put_smstate(u32, buf, 0x7f64, seg.base);
6486         put_smstate(u32, buf, 0x7f60, seg.limit);
6487         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6488
6489         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6490         put_smstate(u32, buf, 0x7fc0, seg.selector);
6491         put_smstate(u32, buf, 0x7f80, seg.base);
6492         put_smstate(u32, buf, 0x7f7c, seg.limit);
6493         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6494
6495         kvm_x86_ops->get_gdt(vcpu, &dt);
6496         put_smstate(u32, buf, 0x7f74, dt.address);
6497         put_smstate(u32, buf, 0x7f70, dt.size);
6498
6499         kvm_x86_ops->get_idt(vcpu, &dt);
6500         put_smstate(u32, buf, 0x7f58, dt.address);
6501         put_smstate(u32, buf, 0x7f54, dt.size);
6502
6503         for (i = 0; i < 6; i++)
6504                 enter_smm_save_seg_32(vcpu, buf, i);
6505
6506         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6507
6508         /* revision id */
6509         put_smstate(u32, buf, 0x7efc, 0x00020000);
6510         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6511 }
6512
6513 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6514 {
6515 #ifdef CONFIG_X86_64
6516         struct desc_ptr dt;
6517         struct kvm_segment seg;
6518         unsigned long val;
6519         int i;
6520
6521         for (i = 0; i < 16; i++)
6522                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6523
6524         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6525         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6526
6527         kvm_get_dr(vcpu, 6, &val);
6528         put_smstate(u64, buf, 0x7f68, val);
6529         kvm_get_dr(vcpu, 7, &val);
6530         put_smstate(u64, buf, 0x7f60, val);
6531
6532         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6533         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6534         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6535
6536         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6537
6538         /* revision id */
6539         put_smstate(u32, buf, 0x7efc, 0x00020064);
6540
6541         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6542
6543         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6544         put_smstate(u16, buf, 0x7e90, seg.selector);
6545         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6546         put_smstate(u32, buf, 0x7e94, seg.limit);
6547         put_smstate(u64, buf, 0x7e98, seg.base);
6548
6549         kvm_x86_ops->get_idt(vcpu, &dt);
6550         put_smstate(u32, buf, 0x7e84, dt.size);
6551         put_smstate(u64, buf, 0x7e88, dt.address);
6552
6553         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6554         put_smstate(u16, buf, 0x7e70, seg.selector);
6555         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6556         put_smstate(u32, buf, 0x7e74, seg.limit);
6557         put_smstate(u64, buf, 0x7e78, seg.base);
6558
6559         kvm_x86_ops->get_gdt(vcpu, &dt);
6560         put_smstate(u32, buf, 0x7e64, dt.size);
6561         put_smstate(u64, buf, 0x7e68, dt.address);
6562
6563         for (i = 0; i < 6; i++)
6564                 enter_smm_save_seg_64(vcpu, buf, i);
6565 #else
6566         WARN_ON_ONCE(1);
6567 #endif
6568 }
6569
6570 static void enter_smm(struct kvm_vcpu *vcpu)
6571 {
6572         struct kvm_segment cs, ds;
6573         struct desc_ptr dt;
6574         char buf[512];
6575         u32 cr0;
6576
6577         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6578         vcpu->arch.hflags |= HF_SMM_MASK;
6579         memset(buf, 0, 512);
6580         if (guest_cpuid_has_longmode(vcpu))
6581                 enter_smm_save_state_64(vcpu, buf);
6582         else
6583                 enter_smm_save_state_32(vcpu, buf);
6584
6585         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6586
6587         if (kvm_x86_ops->get_nmi_mask(vcpu))
6588                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6589         else
6590                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6591
6592         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6593         kvm_rip_write(vcpu, 0x8000);
6594
6595         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6596         kvm_x86_ops->set_cr0(vcpu, cr0);
6597         vcpu->arch.cr0 = cr0;
6598
6599         kvm_x86_ops->set_cr4(vcpu, 0);
6600
6601         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6602         dt.address = dt.size = 0;
6603         kvm_x86_ops->set_idt(vcpu, &dt);
6604
6605         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6606
6607         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6608         cs.base = vcpu->arch.smbase;
6609
6610         ds.selector = 0;
6611         ds.base = 0;
6612
6613         cs.limit    = ds.limit = 0xffffffff;
6614         cs.type     = ds.type = 0x3;
6615         cs.dpl      = ds.dpl = 0;
6616         cs.db       = ds.db = 0;
6617         cs.s        = ds.s = 1;
6618         cs.l        = ds.l = 0;
6619         cs.g        = ds.g = 1;
6620         cs.avl      = ds.avl = 0;
6621         cs.present  = ds.present = 1;
6622         cs.unusable = ds.unusable = 0;
6623         cs.padding  = ds.padding = 0;
6624
6625         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6626         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6627         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6628         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6629         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6630         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6631
6632         if (guest_cpuid_has_longmode(vcpu))
6633                 kvm_x86_ops->set_efer(vcpu, 0);
6634
6635         kvm_update_cpuid(vcpu);
6636         kvm_mmu_reset_context(vcpu);
6637 }
6638
6639 static void process_smi(struct kvm_vcpu *vcpu)
6640 {
6641         vcpu->arch.smi_pending = true;
6642         kvm_make_request(KVM_REQ_EVENT, vcpu);
6643 }
6644
6645 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6646 {
6647         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6648 }
6649
6650 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6651 {
6652         u64 eoi_exit_bitmap[4];
6653
6654         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6655                 return;
6656
6657         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6658
6659         if (irqchip_split(vcpu->kvm))
6660                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6661         else {
6662                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6663                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6664                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6665         }
6666         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6667                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6668         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6669 }
6670
6671 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6672 {
6673         ++vcpu->stat.tlb_flush;
6674         kvm_x86_ops->tlb_flush(vcpu);
6675 }
6676
6677 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6678 {
6679         struct page *page = NULL;
6680
6681         if (!lapic_in_kernel(vcpu))
6682                 return;
6683
6684         if (!kvm_x86_ops->set_apic_access_page_addr)
6685                 return;
6686
6687         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6688         if (is_error_page(page))
6689                 return;
6690         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6691
6692         /*
6693          * Do not pin apic access page in memory, the MMU notifier
6694          * will call us again if it is migrated or swapped out.
6695          */
6696         put_page(page);
6697 }
6698 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6699
6700 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6701                                            unsigned long address)
6702 {
6703         /*
6704          * The physical address of apic access page is stored in the VMCS.
6705          * Update it when it becomes invalid.
6706          */
6707         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6708                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6709 }
6710
6711 /*
6712  * Returns 1 to let vcpu_run() continue the guest execution loop without
6713  * exiting to the userspace.  Otherwise, the value will be returned to the
6714  * userspace.
6715  */
6716 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6717 {
6718         int r;
6719         bool req_int_win =
6720                 dm_request_for_irq_injection(vcpu) &&
6721                 kvm_cpu_accept_dm_intr(vcpu);
6722
6723         bool req_immediate_exit = false;
6724
6725         if (vcpu->requests) {
6726                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6727                         kvm_mmu_unload(vcpu);
6728                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6729                         __kvm_migrate_timers(vcpu);
6730                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6731                         kvm_gen_update_masterclock(vcpu->kvm);
6732                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6733                         kvm_gen_kvmclock_update(vcpu);
6734                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6735                         r = kvm_guest_time_update(vcpu);
6736                         if (unlikely(r))
6737                                 goto out;
6738                 }
6739                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6740                         kvm_mmu_sync_roots(vcpu);
6741                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6742                         kvm_vcpu_flush_tlb(vcpu);
6743                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6744                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6745                         r = 0;
6746                         goto out;
6747                 }
6748                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6749                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6750                         r = 0;
6751                         goto out;
6752                 }
6753                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6754                         vcpu->fpu_active = 0;
6755                         kvm_x86_ops->fpu_deactivate(vcpu);
6756                 }
6757                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6758                         /* Page is swapped out. Do synthetic halt */
6759                         vcpu->arch.apf.halted = true;
6760                         r = 1;
6761                         goto out;
6762                 }
6763                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6764                         record_steal_time(vcpu);
6765                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6766                         process_smi(vcpu);
6767                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6768                         process_nmi(vcpu);
6769                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6770                         kvm_pmu_handle_event(vcpu);
6771                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6772                         kvm_pmu_deliver_pmi(vcpu);
6773                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6774                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6775                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6776                                      vcpu->arch.ioapic_handled_vectors)) {
6777                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6778                                 vcpu->run->eoi.vector =
6779                                                 vcpu->arch.pending_ioapic_eoi;
6780                                 r = 0;
6781                                 goto out;
6782                         }
6783                 }
6784                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6785                         vcpu_scan_ioapic(vcpu);
6786                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6787                         kvm_vcpu_reload_apic_access_page(vcpu);
6788                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6789                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6790                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6791                         r = 0;
6792                         goto out;
6793                 }
6794                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6795                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6796                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6797                         r = 0;
6798                         goto out;
6799                 }
6800                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6801                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6802                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6803                         r = 0;
6804                         goto out;
6805                 }
6806
6807                 /*
6808                  * KVM_REQ_HV_STIMER has to be processed after
6809                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6810                  * depend on the guest clock being up-to-date
6811                  */
6812                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6813                         kvm_hv_process_stimers(vcpu);
6814         }
6815
6816         /*
6817          * KVM_REQ_EVENT is not set when posted interrupts are set by
6818          * VT-d hardware, so we have to update RVI unconditionally.
6819          */
6820         if (kvm_lapic_enabled(vcpu)) {
6821                 /*
6822                  * Update architecture specific hints for APIC
6823                  * virtual interrupt delivery.
6824                  */
6825                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6826                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6827         }
6828
6829         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6830                 ++vcpu->stat.req_event;
6831                 kvm_apic_accept_events(vcpu);
6832                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6833                         r = 1;
6834                         goto out;
6835                 }
6836
6837                 if (inject_pending_event(vcpu, req_int_win) != 0)
6838                         req_immediate_exit = true;
6839                 else {
6840                         /* Enable NMI/IRQ window open exits if needed.
6841                          *
6842                          * SMIs have two cases: 1) they can be nested, and
6843                          * then there is nothing to do here because RSM will
6844                          * cause a vmexit anyway; 2) or the SMI can be pending
6845                          * because inject_pending_event has completed the
6846                          * injection of an IRQ or NMI from the previous vmexit,
6847                          * and then we request an immediate exit to inject the SMI.
6848                          */
6849                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6850                                 req_immediate_exit = true;
6851                         if (vcpu->arch.nmi_pending)
6852                                 kvm_x86_ops->enable_nmi_window(vcpu);
6853                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6854                                 kvm_x86_ops->enable_irq_window(vcpu);
6855                 }
6856
6857                 if (kvm_lapic_enabled(vcpu)) {
6858                         update_cr8_intercept(vcpu);
6859                         kvm_lapic_sync_to_vapic(vcpu);
6860                 }
6861         }
6862
6863         r = kvm_mmu_reload(vcpu);
6864         if (unlikely(r)) {
6865                 goto cancel_injection;
6866         }
6867
6868         preempt_disable();
6869
6870         kvm_x86_ops->prepare_guest_switch(vcpu);
6871         if (vcpu->fpu_active)
6872                 kvm_load_guest_fpu(vcpu);
6873         vcpu->mode = IN_GUEST_MODE;
6874
6875         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6876
6877         /*
6878          * We should set ->mode before check ->requests,
6879          * Please see the comment in kvm_make_all_cpus_request.
6880          * This also orders the write to mode from any reads
6881          * to the page tables done while the VCPU is running.
6882          * Please see the comment in kvm_flush_remote_tlbs.
6883          */
6884         smp_mb__after_srcu_read_unlock();
6885
6886         local_irq_disable();
6887
6888         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6889             || need_resched() || signal_pending(current)) {
6890                 vcpu->mode = OUTSIDE_GUEST_MODE;
6891                 smp_wmb();
6892                 local_irq_enable();
6893                 preempt_enable();
6894                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6895                 r = 1;
6896                 goto cancel_injection;
6897         }
6898
6899         kvm_load_guest_xcr0(vcpu);
6900
6901         if (req_immediate_exit) {
6902                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6903                 smp_send_reschedule(vcpu->cpu);
6904         }
6905
6906         trace_kvm_entry(vcpu->vcpu_id);
6907         wait_lapic_expire(vcpu);
6908         guest_enter_irqoff();
6909
6910         if (unlikely(vcpu->arch.switch_db_regs)) {
6911                 set_debugreg(0, 7);
6912                 set_debugreg(vcpu->arch.eff_db[0], 0);
6913                 set_debugreg(vcpu->arch.eff_db[1], 1);
6914                 set_debugreg(vcpu->arch.eff_db[2], 2);
6915                 set_debugreg(vcpu->arch.eff_db[3], 3);
6916                 set_debugreg(vcpu->arch.dr6, 6);
6917                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6918         }
6919
6920         kvm_x86_ops->run(vcpu);
6921
6922         /*
6923          * Do this here before restoring debug registers on the host.  And
6924          * since we do this before handling the vmexit, a DR access vmexit
6925          * can (a) read the correct value of the debug registers, (b) set
6926          * KVM_DEBUGREG_WONT_EXIT again.
6927          */
6928         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6929                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6930                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6931                 kvm_update_dr0123(vcpu);
6932                 kvm_update_dr6(vcpu);
6933                 kvm_update_dr7(vcpu);
6934                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6935         }
6936
6937         /*
6938          * If the guest has used debug registers, at least dr7
6939          * will be disabled while returning to the host.
6940          * If we don't have active breakpoints in the host, we don't
6941          * care about the messed up debug address registers. But if
6942          * we have some of them active, restore the old state.
6943          */
6944         if (hw_breakpoint_active())
6945                 hw_breakpoint_restore();
6946
6947         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6948
6949         vcpu->mode = OUTSIDE_GUEST_MODE;
6950         smp_wmb();
6951
6952         kvm_put_guest_xcr0(vcpu);
6953
6954         kvm_x86_ops->handle_external_intr(vcpu);
6955
6956         ++vcpu->stat.exits;
6957
6958         guest_exit_irqoff();
6959
6960         local_irq_enable();
6961         preempt_enable();
6962
6963         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6964
6965         /*
6966          * Profile KVM exit RIPs:
6967          */
6968         if (unlikely(prof_on == KVM_PROFILING)) {
6969                 unsigned long rip = kvm_rip_read(vcpu);
6970                 profile_hit(KVM_PROFILING, (void *)rip);
6971         }
6972
6973         if (unlikely(vcpu->arch.tsc_always_catchup))
6974                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6975
6976         if (vcpu->arch.apic_attention)
6977                 kvm_lapic_sync_from_vapic(vcpu);
6978
6979         r = kvm_x86_ops->handle_exit(vcpu);
6980         return r;
6981
6982 cancel_injection:
6983         kvm_x86_ops->cancel_injection(vcpu);
6984         if (unlikely(vcpu->arch.apic_attention))
6985                 kvm_lapic_sync_from_vapic(vcpu);
6986 out:
6987         return r;
6988 }
6989
6990 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6991 {
6992         if (!kvm_arch_vcpu_runnable(vcpu) &&
6993             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6994                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6995                 kvm_vcpu_block(vcpu);
6996                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6997
6998                 if (kvm_x86_ops->post_block)
6999                         kvm_x86_ops->post_block(vcpu);
7000
7001                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7002                         return 1;
7003         }
7004
7005         kvm_apic_accept_events(vcpu);
7006         switch(vcpu->arch.mp_state) {
7007         case KVM_MP_STATE_HALTED:
7008                 vcpu->arch.pv.pv_unhalted = false;
7009                 vcpu->arch.mp_state =
7010                         KVM_MP_STATE_RUNNABLE;
7011         case KVM_MP_STATE_RUNNABLE:
7012                 vcpu->arch.apf.halted = false;
7013                 break;
7014         case KVM_MP_STATE_INIT_RECEIVED:
7015                 break;
7016         default:
7017                 return -EINTR;
7018                 break;
7019         }
7020         return 1;
7021 }
7022
7023 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7024 {
7025         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7026                 kvm_x86_ops->check_nested_events(vcpu, false);
7027
7028         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7029                 !vcpu->arch.apf.halted);
7030 }
7031
7032 static int vcpu_run(struct kvm_vcpu *vcpu)
7033 {
7034         int r;
7035         struct kvm *kvm = vcpu->kvm;
7036
7037         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7038
7039         for (;;) {
7040                 if (kvm_vcpu_running(vcpu)) {
7041                         r = vcpu_enter_guest(vcpu);
7042                 } else {
7043                         r = vcpu_block(kvm, vcpu);
7044                 }
7045
7046                 if (r <= 0)
7047                         break;
7048
7049                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
7050                 if (kvm_cpu_has_pending_timer(vcpu))
7051                         kvm_inject_pending_timer_irqs(vcpu);
7052
7053                 if (dm_request_for_irq_injection(vcpu) &&
7054                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7055                         r = 0;
7056                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7057                         ++vcpu->stat.request_irq_exits;
7058                         break;
7059                 }
7060
7061                 kvm_check_async_pf_completion(vcpu);
7062
7063                 if (signal_pending(current)) {
7064                         r = -EINTR;
7065                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7066                         ++vcpu->stat.signal_exits;
7067                         break;
7068                 }
7069                 if (need_resched()) {
7070                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7071                         cond_resched();
7072                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7073                 }
7074         }
7075
7076         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7077
7078         return r;
7079 }
7080
7081 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7082 {
7083         int r;
7084         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7085         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7086         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7087         if (r != EMULATE_DONE)
7088                 return 0;
7089         return 1;
7090 }
7091
7092 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7093 {
7094         BUG_ON(!vcpu->arch.pio.count);
7095
7096         return complete_emulated_io(vcpu);
7097 }
7098
7099 /*
7100  * Implements the following, as a state machine:
7101  *
7102  * read:
7103  *   for each fragment
7104  *     for each mmio piece in the fragment
7105  *       write gpa, len
7106  *       exit
7107  *       copy data
7108  *   execute insn
7109  *
7110  * write:
7111  *   for each fragment
7112  *     for each mmio piece in the fragment
7113  *       write gpa, len
7114  *       copy data
7115  *       exit
7116  */
7117 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7118 {
7119         struct kvm_run *run = vcpu->run;
7120         struct kvm_mmio_fragment *frag;
7121         unsigned len;
7122
7123         BUG_ON(!vcpu->mmio_needed);
7124
7125         /* Complete previous fragment */
7126         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7127         len = min(8u, frag->len);
7128         if (!vcpu->mmio_is_write)
7129                 memcpy(frag->data, run->mmio.data, len);
7130
7131         if (frag->len <= 8) {
7132                 /* Switch to the next fragment. */
7133                 frag++;
7134                 vcpu->mmio_cur_fragment++;
7135         } else {
7136                 /* Go forward to the next mmio piece. */
7137                 frag->data += len;
7138                 frag->gpa += len;
7139                 frag->len -= len;
7140         }
7141
7142         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7143                 vcpu->mmio_needed = 0;
7144
7145                 /* FIXME: return into emulator if single-stepping.  */
7146                 if (vcpu->mmio_is_write)
7147                         return 1;
7148                 vcpu->mmio_read_completed = 1;
7149                 return complete_emulated_io(vcpu);
7150         }
7151
7152         run->exit_reason = KVM_EXIT_MMIO;
7153         run->mmio.phys_addr = frag->gpa;
7154         if (vcpu->mmio_is_write)
7155                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7156         run->mmio.len = min(8u, frag->len);
7157         run->mmio.is_write = vcpu->mmio_is_write;
7158         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7159         return 0;
7160 }
7161
7162
7163 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7164 {
7165         struct fpu *fpu = &current->thread.fpu;
7166         int r;
7167         sigset_t sigsaved;
7168
7169         fpu__activate_curr(fpu);
7170
7171         if (vcpu->sigset_active)
7172                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7173
7174         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7175                 kvm_vcpu_block(vcpu);
7176                 kvm_apic_accept_events(vcpu);
7177                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7178                 r = -EAGAIN;
7179                 goto out;
7180         }
7181
7182         /* re-sync apic's tpr */
7183         if (!lapic_in_kernel(vcpu)) {
7184                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7185                         r = -EINVAL;
7186                         goto out;
7187                 }
7188         }
7189
7190         if (unlikely(vcpu->arch.complete_userspace_io)) {
7191                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7192                 vcpu->arch.complete_userspace_io = NULL;
7193                 r = cui(vcpu);
7194                 if (r <= 0)
7195                         goto out;
7196         } else
7197                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7198
7199         r = vcpu_run(vcpu);
7200
7201 out:
7202         post_kvm_run_save(vcpu);
7203         if (vcpu->sigset_active)
7204                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7205
7206         return r;
7207 }
7208
7209 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7210 {
7211         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7212                 /*
7213                  * We are here if userspace calls get_regs() in the middle of
7214                  * instruction emulation. Registers state needs to be copied
7215                  * back from emulation context to vcpu. Userspace shouldn't do
7216                  * that usually, but some bad designed PV devices (vmware
7217                  * backdoor interface) need this to work
7218                  */
7219                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7220                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7221         }
7222         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7223         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7224         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7225         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7226         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7227         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7228         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7229         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7230 #ifdef CONFIG_X86_64
7231         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7232         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7233         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7234         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7235         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7236         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7237         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7238         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7239 #endif
7240
7241         regs->rip = kvm_rip_read(vcpu);
7242         regs->rflags = kvm_get_rflags(vcpu);
7243
7244         return 0;
7245 }
7246
7247 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7248 {
7249         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7250         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7251
7252         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7253         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7254         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7255         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7256         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7257         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7258         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7259         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7260 #ifdef CONFIG_X86_64
7261         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7262         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7263         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7264         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7265         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7266         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7267         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7268         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7269 #endif
7270
7271         kvm_rip_write(vcpu, regs->rip);
7272         kvm_set_rflags(vcpu, regs->rflags);
7273
7274         vcpu->arch.exception.pending = false;
7275
7276         kvm_make_request(KVM_REQ_EVENT, vcpu);
7277
7278         return 0;
7279 }
7280
7281 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7282 {
7283         struct kvm_segment cs;
7284
7285         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7286         *db = cs.db;
7287         *l = cs.l;
7288 }
7289 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7290
7291 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7292                                   struct kvm_sregs *sregs)
7293 {
7294         struct desc_ptr dt;
7295
7296         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7297         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7298         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7299         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7300         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7301         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7302
7303         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7304         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7305
7306         kvm_x86_ops->get_idt(vcpu, &dt);
7307         sregs->idt.limit = dt.size;
7308         sregs->idt.base = dt.address;
7309         kvm_x86_ops->get_gdt(vcpu, &dt);
7310         sregs->gdt.limit = dt.size;
7311         sregs->gdt.base = dt.address;
7312
7313         sregs->cr0 = kvm_read_cr0(vcpu);
7314         sregs->cr2 = vcpu->arch.cr2;
7315         sregs->cr3 = kvm_read_cr3(vcpu);
7316         sregs->cr4 = kvm_read_cr4(vcpu);
7317         sregs->cr8 = kvm_get_cr8(vcpu);
7318         sregs->efer = vcpu->arch.efer;
7319         sregs->apic_base = kvm_get_apic_base(vcpu);
7320
7321         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7322
7323         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7324                 set_bit(vcpu->arch.interrupt.nr,
7325                         (unsigned long *)sregs->interrupt_bitmap);
7326
7327         return 0;
7328 }
7329
7330 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7331                                     struct kvm_mp_state *mp_state)
7332 {
7333         kvm_apic_accept_events(vcpu);
7334         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7335                                         vcpu->arch.pv.pv_unhalted)
7336                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7337         else
7338                 mp_state->mp_state = vcpu->arch.mp_state;
7339
7340         return 0;
7341 }
7342
7343 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7344                                     struct kvm_mp_state *mp_state)
7345 {
7346         if (!lapic_in_kernel(vcpu) &&
7347             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7348                 return -EINVAL;
7349
7350         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7351                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7352                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7353         } else
7354                 vcpu->arch.mp_state = mp_state->mp_state;
7355         kvm_make_request(KVM_REQ_EVENT, vcpu);
7356         return 0;
7357 }
7358
7359 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7360                     int reason, bool has_error_code, u32 error_code)
7361 {
7362         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7363         int ret;
7364
7365         init_emulate_ctxt(vcpu);
7366
7367         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7368                                    has_error_code, error_code);
7369
7370         if (ret)
7371                 return EMULATE_FAIL;
7372
7373         kvm_rip_write(vcpu, ctxt->eip);
7374         kvm_set_rflags(vcpu, ctxt->eflags);
7375         kvm_make_request(KVM_REQ_EVENT, vcpu);
7376         return EMULATE_DONE;
7377 }
7378 EXPORT_SYMBOL_GPL(kvm_task_switch);
7379
7380 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7381                                   struct kvm_sregs *sregs)
7382 {
7383         struct msr_data apic_base_msr;
7384         int mmu_reset_needed = 0;
7385         int pending_vec, max_bits, idx;
7386         struct desc_ptr dt;
7387
7388         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7389                 return -EINVAL;
7390
7391         dt.size = sregs->idt.limit;
7392         dt.address = sregs->idt.base;
7393         kvm_x86_ops->set_idt(vcpu, &dt);
7394         dt.size = sregs->gdt.limit;
7395         dt.address = sregs->gdt.base;
7396         kvm_x86_ops->set_gdt(vcpu, &dt);
7397
7398         vcpu->arch.cr2 = sregs->cr2;
7399         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7400         vcpu->arch.cr3 = sregs->cr3;
7401         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7402
7403         kvm_set_cr8(vcpu, sregs->cr8);
7404
7405         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7406         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7407         apic_base_msr.data = sregs->apic_base;
7408         apic_base_msr.host_initiated = true;
7409         kvm_set_apic_base(vcpu, &apic_base_msr);
7410
7411         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7412         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7413         vcpu->arch.cr0 = sregs->cr0;
7414
7415         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7416         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7417         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7418                 kvm_update_cpuid(vcpu);
7419
7420         idx = srcu_read_lock(&vcpu->kvm->srcu);
7421         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7422                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7423                 mmu_reset_needed = 1;
7424         }
7425         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7426
7427         if (mmu_reset_needed)
7428                 kvm_mmu_reset_context(vcpu);
7429
7430         max_bits = KVM_NR_INTERRUPTS;
7431         pending_vec = find_first_bit(
7432                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7433         if (pending_vec < max_bits) {
7434                 kvm_queue_interrupt(vcpu, pending_vec, false);
7435                 pr_debug("Set back pending irq %d\n", pending_vec);
7436         }
7437
7438         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7439         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7440         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7441         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7442         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7443         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7444
7445         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7446         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7447
7448         update_cr8_intercept(vcpu);
7449
7450         /* Older userspace won't unhalt the vcpu on reset. */
7451         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7452             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7453             !is_protmode(vcpu))
7454                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7455
7456         kvm_make_request(KVM_REQ_EVENT, vcpu);
7457
7458         return 0;
7459 }
7460
7461 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7462                                         struct kvm_guest_debug *dbg)
7463 {
7464         unsigned long rflags;
7465         int i, r;
7466
7467         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7468                 r = -EBUSY;
7469                 if (vcpu->arch.exception.pending)
7470                         goto out;
7471                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7472                         kvm_queue_exception(vcpu, DB_VECTOR);
7473                 else
7474                         kvm_queue_exception(vcpu, BP_VECTOR);
7475         }
7476
7477         /*
7478          * Read rflags as long as potentially injected trace flags are still
7479          * filtered out.
7480          */
7481         rflags = kvm_get_rflags(vcpu);
7482
7483         vcpu->guest_debug = dbg->control;
7484         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7485                 vcpu->guest_debug = 0;
7486
7487         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7488                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7489                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7490                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7491         } else {
7492                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7493                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7494         }
7495         kvm_update_dr7(vcpu);
7496
7497         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7498                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7499                         get_segment_base(vcpu, VCPU_SREG_CS);
7500
7501         /*
7502          * Trigger an rflags update that will inject or remove the trace
7503          * flags.
7504          */
7505         kvm_set_rflags(vcpu, rflags);
7506
7507         kvm_x86_ops->update_bp_intercept(vcpu);
7508
7509         r = 0;
7510
7511 out:
7512
7513         return r;
7514 }
7515
7516 /*
7517  * Translate a guest virtual address to a guest physical address.
7518  */
7519 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7520                                     struct kvm_translation *tr)
7521 {
7522         unsigned long vaddr = tr->linear_address;
7523         gpa_t gpa;
7524         int idx;
7525
7526         idx = srcu_read_lock(&vcpu->kvm->srcu);
7527         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7528         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7529         tr->physical_address = gpa;
7530         tr->valid = gpa != UNMAPPED_GVA;
7531         tr->writeable = 1;
7532         tr->usermode = 0;
7533
7534         return 0;
7535 }
7536
7537 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7538 {
7539         struct fxregs_state *fxsave =
7540                         &vcpu->arch.guest_fpu.state.fxsave;
7541
7542         memcpy(fpu->fpr, fxsave->st_space, 128);
7543         fpu->fcw = fxsave->cwd;
7544         fpu->fsw = fxsave->swd;
7545         fpu->ftwx = fxsave->twd;
7546         fpu->last_opcode = fxsave->fop;
7547         fpu->last_ip = fxsave->rip;
7548         fpu->last_dp = fxsave->rdp;
7549         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7550
7551         return 0;
7552 }
7553
7554 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7555 {
7556         struct fxregs_state *fxsave =
7557                         &vcpu->arch.guest_fpu.state.fxsave;
7558
7559         memcpy(fxsave->st_space, fpu->fpr, 128);
7560         fxsave->cwd = fpu->fcw;
7561         fxsave->swd = fpu->fsw;
7562         fxsave->twd = fpu->ftwx;
7563         fxsave->fop = fpu->last_opcode;
7564         fxsave->rip = fpu->last_ip;
7565         fxsave->rdp = fpu->last_dp;
7566         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7567
7568         return 0;
7569 }
7570
7571 static void fx_init(struct kvm_vcpu *vcpu)
7572 {
7573         fpstate_init(&vcpu->arch.guest_fpu.state);
7574         if (boot_cpu_has(X86_FEATURE_XSAVES))
7575                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7576                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7577
7578         /*
7579          * Ensure guest xcr0 is valid for loading
7580          */
7581         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7582
7583         vcpu->arch.cr0 |= X86_CR0_ET;
7584 }
7585
7586 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7587 {
7588         if (vcpu->guest_fpu_loaded)
7589                 return;
7590
7591         /*
7592          * Restore all possible states in the guest,
7593          * and assume host would use all available bits.
7594          * Guest xcr0 would be loaded later.
7595          */
7596         vcpu->guest_fpu_loaded = 1;
7597         __kernel_fpu_begin();
7598         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7599         trace_kvm_fpu(1);
7600 }
7601
7602 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7603 {
7604         if (!vcpu->guest_fpu_loaded)
7605                 return;
7606
7607         vcpu->guest_fpu_loaded = 0;
7608         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7609         __kernel_fpu_end();
7610         ++vcpu->stat.fpu_reload;
7611         trace_kvm_fpu(0);
7612 }
7613
7614 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7615 {
7616         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7617
7618         kvmclock_reset(vcpu);
7619
7620         kvm_x86_ops->vcpu_free(vcpu);
7621         free_cpumask_var(wbinvd_dirty_mask);
7622 }
7623
7624 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7625                                                 unsigned int id)
7626 {
7627         struct kvm_vcpu *vcpu;
7628
7629         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7630                 printk_once(KERN_WARNING
7631                 "kvm: SMP vm created on host with unstable TSC; "
7632                 "guest TSC will not be reliable\n");
7633
7634         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7635
7636         return vcpu;
7637 }
7638
7639 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7640 {
7641         int r;
7642
7643         kvm_vcpu_mtrr_init(vcpu);
7644         r = vcpu_load(vcpu);
7645         if (r)
7646                 return r;
7647         kvm_vcpu_reset(vcpu, false);
7648         kvm_mmu_setup(vcpu);
7649         vcpu_put(vcpu);
7650         return r;
7651 }
7652
7653 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7654 {
7655         struct msr_data msr;
7656         struct kvm *kvm = vcpu->kvm;
7657
7658         if (vcpu_load(vcpu))
7659                 return;
7660         msr.data = 0x0;
7661         msr.index = MSR_IA32_TSC;
7662         msr.host_initiated = true;
7663         kvm_write_tsc(vcpu, &msr);
7664         vcpu_put(vcpu);
7665
7666         if (!kvmclock_periodic_sync)
7667                 return;
7668
7669         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7670                                         KVMCLOCK_SYNC_PERIOD);
7671 }
7672
7673 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7674 {
7675         int r;
7676         vcpu->arch.apf.msr_val = 0;
7677
7678         r = vcpu_load(vcpu);
7679         BUG_ON(r);
7680         kvm_mmu_unload(vcpu);
7681         vcpu_put(vcpu);
7682
7683         kvm_x86_ops->vcpu_free(vcpu);
7684 }
7685
7686 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7687 {
7688         vcpu->arch.hflags = 0;
7689
7690         vcpu->arch.smi_pending = 0;
7691         atomic_set(&vcpu->arch.nmi_queued, 0);
7692         vcpu->arch.nmi_pending = 0;
7693         vcpu->arch.nmi_injected = false;
7694         kvm_clear_interrupt_queue(vcpu);
7695         kvm_clear_exception_queue(vcpu);
7696
7697         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7698         kvm_update_dr0123(vcpu);
7699         vcpu->arch.dr6 = DR6_INIT;
7700         kvm_update_dr6(vcpu);
7701         vcpu->arch.dr7 = DR7_FIXED_1;
7702         kvm_update_dr7(vcpu);
7703
7704         vcpu->arch.cr2 = 0;
7705
7706         kvm_make_request(KVM_REQ_EVENT, vcpu);
7707         vcpu->arch.apf.msr_val = 0;
7708         vcpu->arch.st.msr_val = 0;
7709
7710         kvmclock_reset(vcpu);
7711
7712         kvm_clear_async_pf_completion_queue(vcpu);
7713         kvm_async_pf_hash_reset(vcpu);
7714         vcpu->arch.apf.halted = false;
7715
7716         if (!init_event) {
7717                 kvm_pmu_reset(vcpu);
7718                 vcpu->arch.smbase = 0x30000;
7719         }
7720
7721         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7722         vcpu->arch.regs_avail = ~0;
7723         vcpu->arch.regs_dirty = ~0;
7724
7725         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7726 }
7727
7728 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7729 {
7730         struct kvm_segment cs;
7731
7732         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7733         cs.selector = vector << 8;
7734         cs.base = vector << 12;
7735         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7736         kvm_rip_write(vcpu, 0);
7737 }
7738
7739 int kvm_arch_hardware_enable(void)
7740 {
7741         struct kvm *kvm;
7742         struct kvm_vcpu *vcpu;
7743         int i;
7744         int ret;
7745         u64 local_tsc;
7746         u64 max_tsc = 0;
7747         bool stable, backwards_tsc = false;
7748
7749         kvm_shared_msr_cpu_online();
7750         ret = kvm_x86_ops->hardware_enable();
7751         if (ret != 0)
7752                 return ret;
7753
7754         local_tsc = rdtsc();
7755         stable = !check_tsc_unstable();
7756         list_for_each_entry(kvm, &vm_list, vm_list) {
7757                 kvm_for_each_vcpu(i, vcpu, kvm) {
7758                         if (!stable && vcpu->cpu == smp_processor_id())
7759                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7760                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7761                                 backwards_tsc = true;
7762                                 if (vcpu->arch.last_host_tsc > max_tsc)
7763                                         max_tsc = vcpu->arch.last_host_tsc;
7764                         }
7765                 }
7766         }
7767
7768         /*
7769          * Sometimes, even reliable TSCs go backwards.  This happens on
7770          * platforms that reset TSC during suspend or hibernate actions, but
7771          * maintain synchronization.  We must compensate.  Fortunately, we can
7772          * detect that condition here, which happens early in CPU bringup,
7773          * before any KVM threads can be running.  Unfortunately, we can't
7774          * bring the TSCs fully up to date with real time, as we aren't yet far
7775          * enough into CPU bringup that we know how much real time has actually
7776          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7777          * variables that haven't been updated yet.
7778          *
7779          * So we simply find the maximum observed TSC above, then record the
7780          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7781          * the adjustment will be applied.  Note that we accumulate
7782          * adjustments, in case multiple suspend cycles happen before some VCPU
7783          * gets a chance to run again.  In the event that no KVM threads get a
7784          * chance to run, we will miss the entire elapsed period, as we'll have
7785          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7786          * loose cycle time.  This isn't too big a deal, since the loss will be
7787          * uniform across all VCPUs (not to mention the scenario is extremely
7788          * unlikely). It is possible that a second hibernate recovery happens
7789          * much faster than a first, causing the observed TSC here to be
7790          * smaller; this would require additional padding adjustment, which is
7791          * why we set last_host_tsc to the local tsc observed here.
7792          *
7793          * N.B. - this code below runs only on platforms with reliable TSC,
7794          * as that is the only way backwards_tsc is set above.  Also note
7795          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7796          * have the same delta_cyc adjustment applied if backwards_tsc
7797          * is detected.  Note further, this adjustment is only done once,
7798          * as we reset last_host_tsc on all VCPUs to stop this from being
7799          * called multiple times (one for each physical CPU bringup).
7800          *
7801          * Platforms with unreliable TSCs don't have to deal with this, they
7802          * will be compensated by the logic in vcpu_load, which sets the TSC to
7803          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7804          * guarantee that they stay in perfect synchronization.
7805          */
7806         if (backwards_tsc) {
7807                 u64 delta_cyc = max_tsc - local_tsc;
7808                 backwards_tsc_observed = true;
7809                 list_for_each_entry(kvm, &vm_list, vm_list) {
7810                         kvm_for_each_vcpu(i, vcpu, kvm) {
7811                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7812                                 vcpu->arch.last_host_tsc = local_tsc;
7813                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7814                         }
7815
7816                         /*
7817                          * We have to disable TSC offset matching.. if you were
7818                          * booting a VM while issuing an S4 host suspend....
7819                          * you may have some problem.  Solving this issue is
7820                          * left as an exercise to the reader.
7821                          */
7822                         kvm->arch.last_tsc_nsec = 0;
7823                         kvm->arch.last_tsc_write = 0;
7824                 }
7825
7826         }
7827         return 0;
7828 }
7829
7830 void kvm_arch_hardware_disable(void)
7831 {
7832         kvm_x86_ops->hardware_disable();
7833         drop_user_return_notifiers();
7834 }
7835
7836 int kvm_arch_hardware_setup(void)
7837 {
7838         int r;
7839
7840         r = kvm_x86_ops->hardware_setup();
7841         if (r != 0)
7842                 return r;
7843
7844         if (kvm_has_tsc_control) {
7845                 /*
7846                  * Make sure the user can only configure tsc_khz values that
7847                  * fit into a signed integer.
7848                  * A min value is not calculated needed because it will always
7849                  * be 1 on all machines.
7850                  */
7851                 u64 max = min(0x7fffffffULL,
7852                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7853                 kvm_max_guest_tsc_khz = max;
7854
7855                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7856         }
7857
7858         kvm_init_msr_list();
7859         return 0;
7860 }
7861
7862 void kvm_arch_hardware_unsetup(void)
7863 {
7864         kvm_x86_ops->hardware_unsetup();
7865 }
7866
7867 void kvm_arch_check_processor_compat(void *rtn)
7868 {
7869         kvm_x86_ops->check_processor_compatibility(rtn);
7870 }
7871
7872 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7873 {
7874         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7875 }
7876 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7877
7878 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7879 {
7880         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7881 }
7882
7883 struct static_key kvm_no_apic_vcpu __read_mostly;
7884 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7885
7886 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7887 {
7888         struct page *page;
7889         struct kvm *kvm;
7890         int r;
7891
7892         BUG_ON(vcpu->kvm == NULL);
7893         kvm = vcpu->kvm;
7894
7895         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7896         vcpu->arch.pv.pv_unhalted = false;
7897         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7898         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7899                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7900         else
7901                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7902
7903         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7904         if (!page) {
7905                 r = -ENOMEM;
7906                 goto fail;
7907         }
7908         vcpu->arch.pio_data = page_address(page);
7909
7910         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7911
7912         r = kvm_mmu_create(vcpu);
7913         if (r < 0)
7914                 goto fail_free_pio_data;
7915
7916         if (irqchip_in_kernel(kvm)) {
7917                 r = kvm_create_lapic(vcpu);
7918                 if (r < 0)
7919                         goto fail_mmu_destroy;
7920         } else
7921                 static_key_slow_inc(&kvm_no_apic_vcpu);
7922
7923         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7924                                        GFP_KERNEL);
7925         if (!vcpu->arch.mce_banks) {
7926                 r = -ENOMEM;
7927                 goto fail_free_lapic;
7928         }
7929         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7930
7931         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7932                 r = -ENOMEM;
7933                 goto fail_free_mce_banks;
7934         }
7935
7936         fx_init(vcpu);
7937
7938         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7939         vcpu->arch.pv_time_enabled = false;
7940
7941         vcpu->arch.guest_supported_xcr0 = 0;
7942         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7943
7944         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7945
7946         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7947
7948         kvm_async_pf_hash_reset(vcpu);
7949         kvm_pmu_init(vcpu);
7950
7951         vcpu->arch.pending_external_vector = -1;
7952
7953         kvm_hv_vcpu_init(vcpu);
7954
7955         return 0;
7956
7957 fail_free_mce_banks:
7958         kfree(vcpu->arch.mce_banks);
7959 fail_free_lapic:
7960         kvm_free_lapic(vcpu);
7961 fail_mmu_destroy:
7962         kvm_mmu_destroy(vcpu);
7963 fail_free_pio_data:
7964         free_page((unsigned long)vcpu->arch.pio_data);
7965 fail:
7966         return r;
7967 }
7968
7969 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7970 {
7971         int idx;
7972
7973         kvm_hv_vcpu_uninit(vcpu);
7974         kvm_pmu_destroy(vcpu);
7975         kfree(vcpu->arch.mce_banks);
7976         kvm_free_lapic(vcpu);
7977         idx = srcu_read_lock(&vcpu->kvm->srcu);
7978         kvm_mmu_destroy(vcpu);
7979         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7980         free_page((unsigned long)vcpu->arch.pio_data);
7981         if (!lapic_in_kernel(vcpu))
7982                 static_key_slow_dec(&kvm_no_apic_vcpu);
7983 }
7984
7985 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7986 {
7987         kvm_x86_ops->sched_in(vcpu, cpu);
7988 }
7989
7990 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7991 {
7992         if (type)
7993                 return -EINVAL;
7994
7995         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7996         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7997         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7998         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7999         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8000
8001         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8002         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8003         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8004         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8005                 &kvm->arch.irq_sources_bitmap);
8006
8007         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8008         mutex_init(&kvm->arch.apic_map_lock);
8009         mutex_init(&kvm->arch.hyperv.hv_lock);
8010         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8011
8012         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8013         pvclock_update_vm_gtod_copy(kvm);
8014
8015         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8016         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8017
8018         kvm_page_track_init(kvm);
8019         kvm_mmu_init_vm(kvm);
8020
8021         if (kvm_x86_ops->vm_init)
8022                 return kvm_x86_ops->vm_init(kvm);
8023
8024         return 0;
8025 }
8026
8027 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8028 {
8029         int r;
8030         r = vcpu_load(vcpu);
8031         BUG_ON(r);
8032         kvm_mmu_unload(vcpu);
8033         vcpu_put(vcpu);
8034 }
8035
8036 static void kvm_free_vcpus(struct kvm *kvm)
8037 {
8038         unsigned int i;
8039         struct kvm_vcpu *vcpu;
8040
8041         /*
8042          * Unpin any mmu pages first.
8043          */
8044         kvm_for_each_vcpu(i, vcpu, kvm) {
8045                 kvm_clear_async_pf_completion_queue(vcpu);
8046                 kvm_unload_vcpu_mmu(vcpu);
8047         }
8048         kvm_for_each_vcpu(i, vcpu, kvm)
8049                 kvm_arch_vcpu_free(vcpu);
8050
8051         mutex_lock(&kvm->lock);
8052         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8053                 kvm->vcpus[i] = NULL;
8054
8055         atomic_set(&kvm->online_vcpus, 0);
8056         mutex_unlock(&kvm->lock);
8057 }
8058
8059 void kvm_arch_sync_events(struct kvm *kvm)
8060 {
8061         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8062         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8063         kvm_free_all_assigned_devices(kvm);
8064         kvm_free_pit(kvm);
8065 }
8066
8067 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8068 {
8069         int i, r;
8070         unsigned long hva;
8071         struct kvm_memslots *slots = kvm_memslots(kvm);
8072         struct kvm_memory_slot *slot, old;
8073
8074         /* Called with kvm->slots_lock held.  */
8075         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8076                 return -EINVAL;
8077
8078         slot = id_to_memslot(slots, id);
8079         if (size) {
8080                 if (slot->npages)
8081                         return -EEXIST;
8082
8083                 /*
8084                  * MAP_SHARED to prevent internal slot pages from being moved
8085                  * by fork()/COW.
8086                  */
8087                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8088                               MAP_SHARED | MAP_ANONYMOUS, 0);
8089                 if (IS_ERR((void *)hva))
8090                         return PTR_ERR((void *)hva);
8091         } else {
8092                 if (!slot->npages)
8093                         return 0;
8094
8095                 hva = 0;
8096         }
8097
8098         old = *slot;
8099         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8100                 struct kvm_userspace_memory_region m;
8101
8102                 m.slot = id | (i << 16);
8103                 m.flags = 0;
8104                 m.guest_phys_addr = gpa;
8105                 m.userspace_addr = hva;
8106                 m.memory_size = size;
8107                 r = __kvm_set_memory_region(kvm, &m);
8108                 if (r < 0)
8109                         return r;
8110         }
8111
8112         if (!size) {
8113                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8114                 WARN_ON(r < 0);
8115         }
8116
8117         return 0;
8118 }
8119 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8120
8121 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8122 {
8123         int r;
8124
8125         mutex_lock(&kvm->slots_lock);
8126         r = __x86_set_memory_region(kvm, id, gpa, size);
8127         mutex_unlock(&kvm->slots_lock);
8128
8129         return r;
8130 }
8131 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8132
8133 void kvm_arch_destroy_vm(struct kvm *kvm)
8134 {
8135         if (current->mm == kvm->mm) {
8136                 /*
8137                  * Free memory regions allocated on behalf of userspace,
8138                  * unless the the memory map has changed due to process exit
8139                  * or fd copying.
8140                  */
8141                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8142                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8143                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8144         }
8145         if (kvm_x86_ops->vm_destroy)
8146                 kvm_x86_ops->vm_destroy(kvm);
8147         kvm_iommu_unmap_guest(kvm);
8148         kfree(kvm->arch.vpic);
8149         kfree(kvm->arch.vioapic);
8150         kvm_free_vcpus(kvm);
8151         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8152         kvm_mmu_uninit_vm(kvm);
8153 }
8154
8155 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8156                            struct kvm_memory_slot *dont)
8157 {
8158         int i;
8159
8160         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8161                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8162                         kvfree(free->arch.rmap[i]);
8163                         free->arch.rmap[i] = NULL;
8164                 }
8165                 if (i == 0)
8166                         continue;
8167
8168                 if (!dont || free->arch.lpage_info[i - 1] !=
8169                              dont->arch.lpage_info[i - 1]) {
8170                         kvfree(free->arch.lpage_info[i - 1]);
8171                         free->arch.lpage_info[i - 1] = NULL;
8172                 }
8173         }
8174
8175         kvm_page_track_free_memslot(free, dont);
8176 }
8177
8178 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8179                             unsigned long npages)
8180 {
8181         int i;
8182
8183         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8184                 struct kvm_lpage_info *linfo;
8185                 unsigned long ugfn;
8186                 int lpages;
8187                 int level = i + 1;
8188
8189                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8190                                       slot->base_gfn, level) + 1;
8191
8192                 slot->arch.rmap[i] =
8193                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8194                 if (!slot->arch.rmap[i])
8195                         goto out_free;
8196                 if (i == 0)
8197                         continue;
8198
8199                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8200                 if (!linfo)
8201                         goto out_free;
8202
8203                 slot->arch.lpage_info[i - 1] = linfo;
8204
8205                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8206                         linfo[0].disallow_lpage = 1;
8207                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8208                         linfo[lpages - 1].disallow_lpage = 1;
8209                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8210                 /*
8211                  * If the gfn and userspace address are not aligned wrt each
8212                  * other, or if explicitly asked to, disable large page
8213                  * support for this slot
8214                  */
8215                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8216                     !kvm_largepages_enabled()) {
8217                         unsigned long j;
8218
8219                         for (j = 0; j < lpages; ++j)
8220                                 linfo[j].disallow_lpage = 1;
8221                 }
8222         }
8223
8224         if (kvm_page_track_create_memslot(slot, npages))
8225                 goto out_free;
8226
8227         return 0;
8228
8229 out_free:
8230         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8231                 kvfree(slot->arch.rmap[i]);
8232                 slot->arch.rmap[i] = NULL;
8233                 if (i == 0)
8234                         continue;
8235
8236                 kvfree(slot->arch.lpage_info[i - 1]);
8237                 slot->arch.lpage_info[i - 1] = NULL;
8238         }
8239         return -ENOMEM;
8240 }
8241
8242 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8243 {
8244         /*
8245          * memslots->generation has been incremented.
8246          * mmio generation may have reached its maximum value.
8247          */
8248         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8249 }
8250
8251 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8252                                 struct kvm_memory_slot *memslot,
8253                                 const struct kvm_userspace_memory_region *mem,
8254                                 enum kvm_mr_change change)
8255 {
8256         return 0;
8257 }
8258
8259 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8260                                      struct kvm_memory_slot *new)
8261 {
8262         /* Still write protect RO slot */
8263         if (new->flags & KVM_MEM_READONLY) {
8264                 kvm_mmu_slot_remove_write_access(kvm, new);
8265                 return;
8266         }
8267
8268         /*
8269          * Call kvm_x86_ops dirty logging hooks when they are valid.
8270          *
8271          * kvm_x86_ops->slot_disable_log_dirty is called when:
8272          *
8273          *  - KVM_MR_CREATE with dirty logging is disabled
8274          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8275          *
8276          * The reason is, in case of PML, we need to set D-bit for any slots
8277          * with dirty logging disabled in order to eliminate unnecessary GPA
8278          * logging in PML buffer (and potential PML buffer full VMEXT). This
8279          * guarantees leaving PML enabled during guest's lifetime won't have
8280          * any additonal overhead from PML when guest is running with dirty
8281          * logging disabled for memory slots.
8282          *
8283          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8284          * to dirty logging mode.
8285          *
8286          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8287          *
8288          * In case of write protect:
8289          *
8290          * Write protect all pages for dirty logging.
8291          *
8292          * All the sptes including the large sptes which point to this
8293          * slot are set to readonly. We can not create any new large
8294          * spte on this slot until the end of the logging.
8295          *
8296          * See the comments in fast_page_fault().
8297          */
8298         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8299                 if (kvm_x86_ops->slot_enable_log_dirty)
8300                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8301                 else
8302                         kvm_mmu_slot_remove_write_access(kvm, new);
8303         } else {
8304                 if (kvm_x86_ops->slot_disable_log_dirty)
8305                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8306         }
8307 }
8308
8309 void kvm_arch_commit_memory_region(struct kvm *kvm,
8310                                 const struct kvm_userspace_memory_region *mem,
8311                                 const struct kvm_memory_slot *old,
8312                                 const struct kvm_memory_slot *new,
8313                                 enum kvm_mr_change change)
8314 {
8315         int nr_mmu_pages = 0;
8316
8317         if (!kvm->arch.n_requested_mmu_pages)
8318                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8319
8320         if (nr_mmu_pages)
8321                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8322
8323         /*
8324          * Dirty logging tracks sptes in 4k granularity, meaning that large
8325          * sptes have to be split.  If live migration is successful, the guest
8326          * in the source machine will be destroyed and large sptes will be
8327          * created in the destination. However, if the guest continues to run
8328          * in the source machine (for example if live migration fails), small
8329          * sptes will remain around and cause bad performance.
8330          *
8331          * Scan sptes if dirty logging has been stopped, dropping those
8332          * which can be collapsed into a single large-page spte.  Later
8333          * page faults will create the large-page sptes.
8334          */
8335         if ((change != KVM_MR_DELETE) &&
8336                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8337                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8338                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8339
8340         /*
8341          * Set up write protection and/or dirty logging for the new slot.
8342          *
8343          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8344          * been zapped so no dirty logging staff is needed for old slot. For
8345          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8346          * new and it's also covered when dealing with the new slot.
8347          *
8348          * FIXME: const-ify all uses of struct kvm_memory_slot.
8349          */
8350         if (change != KVM_MR_DELETE)
8351                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8352 }
8353
8354 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8355 {
8356         kvm_mmu_invalidate_zap_all_pages(kvm);
8357 }
8358
8359 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8360                                    struct kvm_memory_slot *slot)
8361 {
8362         kvm_page_track_flush_slot(kvm, slot);
8363 }
8364
8365 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8366 {
8367         if (!list_empty_careful(&vcpu->async_pf.done))
8368                 return true;
8369
8370         if (kvm_apic_has_events(vcpu))
8371                 return true;
8372
8373         if (vcpu->arch.pv.pv_unhalted)
8374                 return true;
8375
8376         if (atomic_read(&vcpu->arch.nmi_queued))
8377                 return true;
8378
8379         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8380                 return true;
8381
8382         if (kvm_arch_interrupt_allowed(vcpu) &&
8383             kvm_cpu_has_interrupt(vcpu))
8384                 return true;
8385
8386         if (kvm_hv_has_stimer_pending(vcpu))
8387                 return true;
8388
8389         return false;
8390 }
8391
8392 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8393 {
8394         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8395 }
8396
8397 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8398 {
8399         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8400 }
8401
8402 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8403 {
8404         return kvm_x86_ops->interrupt_allowed(vcpu);
8405 }
8406
8407 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8408 {
8409         if (is_64_bit_mode(vcpu))
8410                 return kvm_rip_read(vcpu);
8411         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8412                      kvm_rip_read(vcpu));
8413 }
8414 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8415
8416 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8417 {
8418         return kvm_get_linear_rip(vcpu) == linear_rip;
8419 }
8420 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8421
8422 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8423 {
8424         unsigned long rflags;
8425
8426         rflags = kvm_x86_ops->get_rflags(vcpu);
8427         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8428                 rflags &= ~X86_EFLAGS_TF;
8429         return rflags;
8430 }
8431 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8432
8433 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8434 {
8435         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8436             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8437                 rflags |= X86_EFLAGS_TF;
8438         kvm_x86_ops->set_rflags(vcpu, rflags);
8439 }
8440
8441 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8442 {
8443         __kvm_set_rflags(vcpu, rflags);
8444         kvm_make_request(KVM_REQ_EVENT, vcpu);
8445 }
8446 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8447
8448 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8449 {
8450         int r;
8451
8452         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8453               work->wakeup_all)
8454                 return;
8455
8456         r = kvm_mmu_reload(vcpu);
8457         if (unlikely(r))
8458                 return;
8459
8460         if (!vcpu->arch.mmu.direct_map &&
8461               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8462                 return;
8463
8464         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8465 }
8466
8467 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8468 {
8469         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8470 }
8471
8472 static inline u32 kvm_async_pf_next_probe(u32 key)
8473 {
8474         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8475 }
8476
8477 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8478 {
8479         u32 key = kvm_async_pf_hash_fn(gfn);
8480
8481         while (vcpu->arch.apf.gfns[key] != ~0)
8482                 key = kvm_async_pf_next_probe(key);
8483
8484         vcpu->arch.apf.gfns[key] = gfn;
8485 }
8486
8487 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8488 {
8489         int i;
8490         u32 key = kvm_async_pf_hash_fn(gfn);
8491
8492         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8493                      (vcpu->arch.apf.gfns[key] != gfn &&
8494                       vcpu->arch.apf.gfns[key] != ~0); i++)
8495                 key = kvm_async_pf_next_probe(key);
8496
8497         return key;
8498 }
8499
8500 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8501 {
8502         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8503 }
8504
8505 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8506 {
8507         u32 i, j, k;
8508
8509         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8510         while (true) {
8511                 vcpu->arch.apf.gfns[i] = ~0;
8512                 do {
8513                         j = kvm_async_pf_next_probe(j);
8514                         if (vcpu->arch.apf.gfns[j] == ~0)
8515                                 return;
8516                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8517                         /*
8518                          * k lies cyclically in ]i,j]
8519                          * |    i.k.j |
8520                          * |....j i.k.| or  |.k..j i...|
8521                          */
8522                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8523                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8524                 i = j;
8525         }
8526 }
8527
8528 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8529 {
8530
8531         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8532                                       sizeof(val));
8533 }
8534
8535 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8536                                      struct kvm_async_pf *work)
8537 {
8538         struct x86_exception fault;
8539
8540         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8541         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8542
8543         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8544             (vcpu->arch.apf.send_user_only &&
8545              kvm_x86_ops->get_cpl(vcpu) == 0))
8546                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8547         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8548                 fault.vector = PF_VECTOR;
8549                 fault.error_code_valid = true;
8550                 fault.error_code = 0;
8551                 fault.nested_page_fault = false;
8552                 fault.address = work->arch.token;
8553                 kvm_inject_page_fault(vcpu, &fault);
8554         }
8555 }
8556
8557 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8558                                  struct kvm_async_pf *work)
8559 {
8560         struct x86_exception fault;
8561
8562         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8563         if (work->wakeup_all)
8564                 work->arch.token = ~0; /* broadcast wakeup */
8565         else
8566                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8567
8568         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8569             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8570                 fault.vector = PF_VECTOR;
8571                 fault.error_code_valid = true;
8572                 fault.error_code = 0;
8573                 fault.nested_page_fault = false;
8574                 fault.address = work->arch.token;
8575                 kvm_inject_page_fault(vcpu, &fault);
8576         }
8577         vcpu->arch.apf.halted = false;
8578         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8579 }
8580
8581 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8582 {
8583         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8584                 return true;
8585         else
8586                 return !kvm_event_needs_reinjection(vcpu) &&
8587                         kvm_x86_ops->interrupt_allowed(vcpu);
8588 }
8589
8590 void kvm_arch_start_assignment(struct kvm *kvm)
8591 {
8592         atomic_inc(&kvm->arch.assigned_device_count);
8593 }
8594 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8595
8596 void kvm_arch_end_assignment(struct kvm *kvm)
8597 {
8598         atomic_dec(&kvm->arch.assigned_device_count);
8599 }
8600 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8601
8602 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8603 {
8604         return atomic_read(&kvm->arch.assigned_device_count);
8605 }
8606 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8607
8608 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8609 {
8610         atomic_inc(&kvm->arch.noncoherent_dma_count);
8611 }
8612 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8613
8614 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8615 {
8616         atomic_dec(&kvm->arch.noncoherent_dma_count);
8617 }
8618 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8619
8620 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8621 {
8622         return atomic_read(&kvm->arch.noncoherent_dma_count);
8623 }
8624 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8625
8626 bool kvm_arch_has_irq_bypass(void)
8627 {
8628         return kvm_x86_ops->update_pi_irte != NULL;
8629 }
8630
8631 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8632                                       struct irq_bypass_producer *prod)
8633 {
8634         struct kvm_kernel_irqfd *irqfd =
8635                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8636
8637         irqfd->producer = prod;
8638
8639         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8640                                            prod->irq, irqfd->gsi, 1);
8641 }
8642
8643 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8644                                       struct irq_bypass_producer *prod)
8645 {
8646         int ret;
8647         struct kvm_kernel_irqfd *irqfd =
8648                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8649
8650         WARN_ON(irqfd->producer != prod);
8651         irqfd->producer = NULL;
8652
8653         /*
8654          * When producer of consumer is unregistered, we change back to
8655          * remapped mode, so we can re-use the current implementation
8656          * when the irq is masked/disabled or the consumer side (KVM
8657          * int this case doesn't want to receive the interrupts.
8658         */
8659         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8660         if (ret)
8661                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8662                        " fails: %d\n", irqfd->consumer.token, ret);
8663 }
8664
8665 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8666                                    uint32_t guest_irq, bool set)
8667 {
8668         if (!kvm_x86_ops->update_pi_irte)
8669                 return -EINVAL;
8670
8671         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8672 }
8673
8674 bool kvm_vector_hashing_enabled(void)
8675 {
8676         return vector_hashing;
8677 }
8678 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8679
8680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);