arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return 0 if we want to ignore/silent this failed msr access, or 1 if we want
 259  * to fail the caller.
 260  */
 261 static int kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 262                                  u64 data, bool write)
 263 {
 264         const char *op = write ? "wrmsr" : "rdmsr";
 265
 266         if (ignore_msrs) {
 267                 if (report_ignored_msrs)
 268                         vcpu_unimpl(vcpu, "ignored %s: 0x%x data 0x%llx\n",
 269                                     op, msr, data);
 270                 /* Mask the error */
 271                 return 0;
 272         } else {
 273                 vcpu_debug_ratelimited(vcpu, "unhandled %s: 0x%x data 0x%llx\n",
 274                                        op, msr, data);
 275                 return -ENOENT;
 276         }
 277 }
 278
 279 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 280 {
 281         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 282         unsigned int size = sizeof(struct x86_emulate_ctxt);
 283
 284         return kmem_cache_create_usercopy("x86_emulator", size,
 285                                           __alignof__(struct x86_emulate_ctxt),
 286                                           SLAB_ACCOUNT, useroffset,
 287                                           size - useroffset, NULL);
 288 }
 289
 290 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 291
 292 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 293 {
 294         int i;
 295         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 296                 vcpu->arch.apf.gfns[i] = ~0;
 297 }
 298
 299 static void kvm_on_user_return(struct user_return_notifier *urn)
 300 {
 301         unsigned slot;
 302         struct kvm_user_return_msrs *msrs
 303                 = container_of(urn, struct kvm_user_return_msrs, urn);
 304         struct kvm_user_return_msr_values *values;
 305         unsigned long flags;
 306
 307         /*
 308          * Disabling irqs at this point since the following code could be
 309          * interrupted and executed through kvm_arch_hardware_disable()
 310          */
 311         local_irq_save(flags);
 312         if (msrs->registered) {
 313                 msrs->registered = false;
 314                 user_return_notifier_unregister(urn);
 315         }
 316         local_irq_restore(flags);
 317         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 318                 values = &msrs->values[slot];
 319                 if (values->host != values->curr) {
 320                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 321                         values->curr = values->host;
 322                 }
 323         }
 324 }
 325
 326 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 327 {
 328         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 329         user_return_msrs_global.msrs[slot] = msr;
 330         if (slot >= user_return_msrs_global.nr)
 331                 user_return_msrs_global.nr = slot + 1;
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 334
 335 static void kvm_user_return_msr_cpu_online(void)
 336 {
 337         unsigned int cpu = smp_processor_id();
 338         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 339         u64 value;
 340         int i;
 341
 342         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 343                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 344                 msrs->values[i].host = value;
 345                 msrs->values[i].curr = value;
 346         }
 347 }
 348
 349 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 350 {
 351         unsigned int cpu = smp_processor_id();
 352         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 353         int err;
 354
 355         value = (value & mask) | (msrs->values[slot].host & ~mask);
 356         if (value == msrs->values[slot].curr)
 357                 return 0;
 358         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 359         if (err)
 360                 return 1;
 361
 362         msrs->values[slot].curr = value;
 363         if (!msrs->registered) {
 364                 msrs->urn.on_user_return = kvm_on_user_return;
 365                 user_return_notifier_register(&msrs->urn);
 366                 msrs->registered = true;
 367         }
 368         return 0;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 371
 372 static void drop_user_return_notifiers(void)
 373 {
 374         unsigned int cpu = smp_processor_id();
 375         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 376
 377         if (msrs->registered)
 378                 kvm_on_user_return(&msrs->urn);
 379 }
 380
 381 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 382 {
 383         return vcpu->arch.apic_base;
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 386
 387 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 388 {
 389         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 392
 393 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 394 {
 395         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 396         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 397         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 398                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 399
 400         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 401                 return 1;
 402         if (!msr_info->host_initiated) {
 403                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 404                         return 1;
 405                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 406                         return 1;
 407         }
 408
 409         kvm_lapic_set_base(vcpu, msr_info->data);
 410         kvm_recalculate_apic_map(vcpu->kvm);
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 414
 415 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 416 {
 417         /* Fault while not rebooting.  We want the trace. */
 418         BUG_ON(!kvm_rebooting);
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 421
 422 #define EXCPT_BENIGN            0
 423 #define EXCPT_CONTRIBUTORY      1
 424 #define EXCPT_PF                2
 425
 426 static int exception_class(int vector)
 427 {
 428         switch (vector) {
 429         case PF_VECTOR:
 430                 return EXCPT_PF;
 431         case DE_VECTOR:
 432         case TS_VECTOR:
 433         case NP_VECTOR:
 434         case SS_VECTOR:
 435         case GP_VECTOR:
 436                 return EXCPT_CONTRIBUTORY;
 437         default:
 438                 break;
 439         }
 440         return EXCPT_BENIGN;
 441 }
 442
 443 #define EXCPT_FAULT             0
 444 #define EXCPT_TRAP              1
 445 #define EXCPT_ABORT             2
 446 #define EXCPT_INTERRUPT         3
 447
 448 static int exception_type(int vector)
 449 {
 450         unsigned int mask;
 451
 452         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 453                 return EXCPT_INTERRUPT;
 454
 455         mask = 1 << vector;
 456
 457         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 458         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 459                 return EXCPT_TRAP;
 460
 461         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 462                 return EXCPT_ABORT;
 463
 464         /* Reserved exceptions will result in fault */
 465         return EXCPT_FAULT;
 466 }
 467
 468 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 469 {
 470         unsigned nr = vcpu->arch.exception.nr;
 471         bool has_payload = vcpu->arch.exception.has_payload;
 472         unsigned long payload = vcpu->arch.exception.payload;
 473
 474         if (!has_payload)
 475                 return;
 476
 477         switch (nr) {
 478         case DB_VECTOR:
 479                 /*
 480                  * "Certain debug exceptions may clear bit 0-3.  The
 481                  * remaining contents of the DR6 register are never
 482                  * cleared by the processor".
 483                  */
 484                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 485                 /*
 486                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 487                  */
 488                 vcpu->arch.dr6 |= DR6_RTM;
 489                 vcpu->arch.dr6 |= payload;
 490                 /*
 491                  * Bit 16 should be set in the payload whenever the #DB
 492                  * exception should clear DR6.RTM. This makes the payload
 493                  * compatible with the pending debug exceptions under VMX.
 494                  * Though not currently documented in the SDM, this also
 495                  * makes the payload compatible with the exit qualification
 496                  * for #DB exceptions under VMX.
 497                  */
 498                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 499
 500                 /*
 501                  * The #DB payload is defined as compatible with the 'pending
 502                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 503                  * defined in the 'pending debug exceptions' field (enabled
 504                  * breakpoint), it is reserved and must be zero in DR6.
 505                  */
 506                 vcpu->arch.dr6 &= ~BIT(12);
 507                 break;
 508         case PF_VECTOR:
 509                 vcpu->arch.cr2 = payload;
 510                 break;
 511         }
 512
 513         vcpu->arch.exception.has_payload = false;
 514         vcpu->arch.exception.payload = 0;
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 517
 518 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 519                 unsigned nr, bool has_error, u32 error_code,
 520                 bool has_payload, unsigned long payload, bool reinject)
 521 {
 522         u32 prev_nr;
 523         int class1, class2;
 524
 525         kvm_make_request(KVM_REQ_EVENT, vcpu);
 526
 527         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 528         queue:
 529                 if (has_error && !is_protmode(vcpu))
 530                         has_error = false;
 531                 if (reinject) {
 532                         /*
 533                          * On vmentry, vcpu->arch.exception.pending is only
 534                          * true if an event injection was blocked by
 535                          * nested_run_pending.  In that case, however,
 536                          * vcpu_enter_guest requests an immediate exit,
 537                          * and the guest shouldn't proceed far enough to
 538                          * need reinjection.
 539                          */
 540                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 541                         vcpu->arch.exception.injected = true;
 542                         if (WARN_ON_ONCE(has_payload)) {
 543                                 /*
 544                                  * A reinjected event has already
 545                                  * delivered its payload.
 546                                  */
 547                                 has_payload = false;
 548                                 payload = 0;
 549                         }
 550                 } else {
 551                         vcpu->arch.exception.pending = true;
 552                         vcpu->arch.exception.injected = false;
 553                 }
 554                 vcpu->arch.exception.has_error_code = has_error;
 555                 vcpu->arch.exception.nr = nr;
 556                 vcpu->arch.exception.error_code = error_code;
 557                 vcpu->arch.exception.has_payload = has_payload;
 558                 vcpu->arch.exception.payload = payload;
 559                 if (!is_guest_mode(vcpu))
 560                         kvm_deliver_exception_payload(vcpu);
 561                 return;
 562         }
 563
 564         /* to check exception */
 565         prev_nr = vcpu->arch.exception.nr;
 566         if (prev_nr == DF_VECTOR) {
 567                 /* triple fault -> shutdown */
 568                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 569                 return;
 570         }
 571         class1 = exception_class(prev_nr);
 572         class2 = exception_class(nr);
 573         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 574                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 575                 /*
 576                  * Generate double fault per SDM Table 5-5.  Set
 577                  * exception.pending = true so that the double fault
 578                  * can trigger a nested vmexit.
 579                  */
 580                 vcpu->arch.exception.pending = true;
 581                 vcpu->arch.exception.injected = false;
 582                 vcpu->arch.exception.has_error_code = true;
 583                 vcpu->arch.exception.nr = DF_VECTOR;
 584                 vcpu->arch.exception.error_code = 0;
 585                 vcpu->arch.exception.has_payload = false;
 586                 vcpu->arch.exception.payload = 0;
 587         } else
 588                 /* replace previous exception with a new one in a hope
 589                    that instruction re-execution will regenerate lost
 590                    exception */
 591                 goto queue;
 592 }
 593
 594 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 595 {
 596         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 599
 600 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 601 {
 602         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 605
 606 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 607                            unsigned long payload)
 608 {
 609         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 612
 613 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 614                                     u32 error_code, unsigned long payload)
 615 {
 616         kvm_multiple_exception(vcpu, nr, true, error_code,
 617                                true, payload, false);
 618 }
 619
 620 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 621 {
 622         if (err)
 623                 kvm_inject_gp(vcpu, 0);
 624         else
 625                 return kvm_skip_emulated_instruction(vcpu);
 626
 627         return 1;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 630
 631 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 632 {
 633         ++vcpu->stat.pf_guest;
 634         vcpu->arch.exception.nested_apf =
 635                 is_guest_mode(vcpu) && fault->async_page_fault;
 636         if (vcpu->arch.exception.nested_apf) {
 637                 vcpu->arch.apf.nested_apf_token = fault->address;
 638                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 639         } else {
 640                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 641                                         fault->address);
 642         }
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 645
 646 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 647                                     struct x86_exception *fault)
 648 {
 649         struct kvm_mmu *fault_mmu;
 650         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 651
 652         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 653                                                vcpu->arch.walk_mmu;
 654
 655         /*
 656          * Invalidate the TLB entry for the faulting address, if it exists,
 657          * else the access will fault indefinitely (and to emulate hardware).
 658          */
 659         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 660             !(fault->error_code & PFERR_RSVD_MASK))
 661                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 662                                        fault_mmu->root_hpa);
 663
 664         fault_mmu->inject_page_fault(vcpu, fault);
 665         return fault->nested_page_fault;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 668
 669 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 670 {
 671         atomic_inc(&vcpu->arch.nmi_queued);
 672         kvm_make_request(KVM_REQ_NMI, vcpu);
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 675
 676 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 677 {
 678         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 681
 682 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 683 {
 684         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 687
 688 /*
 689  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 690  * a #GP and return false.
 691  */
 692 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 693 {
 694         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 695                 return true;
 696         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 697         return false;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 700
 701 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 702 {
 703         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 704                 return true;
 705
 706         kvm_queue_exception(vcpu, UD_VECTOR);
 707         return false;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_require_dr);
 710
 711 /*
 712  * This function will be used to read from the physical memory of the currently
 713  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 714  * can read from guest physical or from the guest's guest physical memory.
 715  */
 716 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 717                             gfn_t ngfn, void *data, int offset, int len,
 718                             u32 access)
 719 {
 720         struct x86_exception exception;
 721         gfn_t real_gfn;
 722         gpa_t ngpa;
 723
 724         ngpa     = gfn_to_gpa(ngfn);
 725         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 726         if (real_gfn == UNMAPPED_GVA)
 727                 return -EFAULT;
 728
 729         real_gfn = gpa_to_gfn(real_gfn);
 730
 731         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 732 }
 733 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 734
 735 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 736                                void *data, int offset, int len, u32 access)
 737 {
 738         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 739                                        data, offset, len, access);
 740 }
 741
 742 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 743 {
 744         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 745                rsvd_bits(1, 2);
 746 }
 747
 748 /*
 749  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 750  */
 751 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 752 {
 753         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 754         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 755         int i;
 756         int ret;
 757         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 758
 759         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 760                                       offset * sizeof(u64), sizeof(pdpte),
 761                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 762         if (ret < 0) {
 763                 ret = 0;
 764                 goto out;
 765         }
 766         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 767                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 768                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 769                         ret = 0;
 770                         goto out;
 771                 }
 772         }
 773         ret = 1;
 774
 775         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 776         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 777
 778 out:
 779
 780         return ret;
 781 }
 782 EXPORT_SYMBOL_GPL(load_pdptrs);
 783
 784 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 785 {
 786         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 787         int offset;
 788         gfn_t gfn;
 789         int r;
 790
 791         if (!is_pae_paging(vcpu))
 792                 return false;
 793
 794         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 795                 return true;
 796
 797         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 798         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 799         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 800                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 801         if (r < 0)
 802                 return true;
 803
 804         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 805 }
 806 EXPORT_SYMBOL_GPL(pdptrs_changed);
 807
 808 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 809 {
 810         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 811         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 812         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 813
 814         cr0 |= X86_CR0_ET;
 815
 816 #ifdef CONFIG_X86_64
 817         if (cr0 & 0xffffffff00000000UL)
 818                 return 1;
 819 #endif
 820
 821         cr0 &= ~CR0_RESERVED_BITS;
 822
 823         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 824                 return 1;
 825
 826         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 827                 return 1;
 828
 829 #ifdef CONFIG_X86_64
 830         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 831             (cr0 & X86_CR0_PG)) {
 832                 int cs_db, cs_l;
 833
 834                 if (!is_pae(vcpu))
 835                         return 1;
 836                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 837                 if (cs_l)
 838                         return 1;
 839         }
 840 #endif
 841         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 842             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 843             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 844                 return 1;
 845
 846         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 847                 return 1;
 848
 849         kvm_x86_ops.set_cr0(vcpu, cr0);
 850
 851         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 852                 kvm_clear_async_pf_completion_queue(vcpu);
 853                 kvm_async_pf_hash_reset(vcpu);
 854         }
 855
 856         if ((cr0 ^ old_cr0) & update_bits)
 857                 kvm_mmu_reset_context(vcpu);
 858
 859         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 860             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 861             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 862                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 863
 864         return 0;
 865 }
 866 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 867
 868 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 869 {
 870         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_lmsw);
 873
 874 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 875 {
 876         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 877
 878                 if (vcpu->arch.xcr0 != host_xcr0)
 879                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 880
 881                 if (vcpu->arch.xsaves_enabled &&
 882                     vcpu->arch.ia32_xss != host_xss)
 883                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 884         }
 885
 886         if (static_cpu_has(X86_FEATURE_PKU) &&
 887             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 888              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 889             vcpu->arch.pkru != vcpu->arch.host_pkru)
 890                 __write_pkru(vcpu->arch.pkru);
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 893
 894 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 895 {
 896         if (static_cpu_has(X86_FEATURE_PKU) &&
 897             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 898              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 899                 vcpu->arch.pkru = rdpkru();
 900                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 901                         __write_pkru(vcpu->arch.host_pkru);
 902         }
 903
 904         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 905
 906                 if (vcpu->arch.xcr0 != host_xcr0)
 907                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 908
 909                 if (vcpu->arch.xsaves_enabled &&
 910                     vcpu->arch.ia32_xss != host_xss)
 911                         wrmsrl(MSR_IA32_XSS, host_xss);
 912         }
 913
 914 }
 915 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 916
 917 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 918 {
 919         u64 xcr0 = xcr;
 920         u64 old_xcr0 = vcpu->arch.xcr0;
 921         u64 valid_bits;
 922
 923         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 924         if (index != XCR_XFEATURE_ENABLED_MASK)
 925                 return 1;
 926         if (!(xcr0 & XFEATURE_MASK_FP))
 927                 return 1;
 928         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 929                 return 1;
 930
 931         /*
 932          * Do not allow the guest to set bits that we do not support
 933          * saving.  However, xcr0 bit 0 is always set, even if the
 934          * emulated CPU does not support XSAVE (see fx_init).
 935          */
 936         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 937         if (xcr0 & ~valid_bits)
 938                 return 1;
 939
 940         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 941             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 942                 return 1;
 943
 944         if (xcr0 & XFEATURE_MASK_AVX512) {
 945                 if (!(xcr0 & XFEATURE_MASK_YMM))
 946                         return 1;
 947                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 948                         return 1;
 949         }
 950         vcpu->arch.xcr0 = xcr0;
 951
 952         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 953                 kvm_update_cpuid_runtime(vcpu);
 954         return 0;
 955 }
 956
 957 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 958 {
 959         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 960             __kvm_set_xcr(vcpu, index, xcr)) {
 961                 kvm_inject_gp(vcpu, 0);
 962                 return 1;
 963         }
 964         return 0;
 965 }
 966 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 967
 968 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 969 {
 970         if (cr4 & cr4_reserved_bits)
 971                 return -EINVAL;
 972
 973         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 974                 return -EINVAL;
 975
 976         return 0;
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_valid_cr4);
 979
 980 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 981 {
 982         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 983         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 984                                    X86_CR4_SMEP;
 985
 986         if (kvm_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         if (kvm_x86_ops.set_cr4(vcpu, cr4))
1010                 return 1;
1011
1012         if (((cr4 ^ old_cr4) & pdptr_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015
1016         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1017                 kvm_update_cpuid_runtime(vcpu);
1018
1019         return 0;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1022
1023 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1024 {
1025         bool skip_tlb_flush = false;
1026 #ifdef CONFIG_X86_64
1027         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1028
1029         if (pcid_enabled) {
1030                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1031                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1032         }
1033 #endif
1034
1035         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1036                 if (!skip_tlb_flush) {
1037                         kvm_mmu_sync_roots(vcpu);
1038                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1039                 }
1040                 return 0;
1041         }
1042
1043         if (is_long_mode(vcpu) &&
1044             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
1045                 return 1;
1046         else if (is_pae_paging(vcpu) &&
1047                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1048                 return 1;
1049
1050         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1051         vcpu->arch.cr3 = cr3;
1052         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1053
1054         return 0;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1057
1058 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1059 {
1060         if (cr8 & CR8_RESERVED_BITS)
1061                 return 1;
1062         if (lapic_in_kernel(vcpu))
1063                 kvm_lapic_set_tpr(vcpu, cr8);
1064         else
1065                 vcpu->arch.cr8 = cr8;
1066         return 0;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1069
1070 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1071 {
1072         if (lapic_in_kernel(vcpu))
1073                 return kvm_lapic_get_cr8(vcpu);
1074         else
1075                 return vcpu->arch.cr8;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1078
1079 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1080 {
1081         int i;
1082
1083         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1084                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1085                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1086                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1087         }
1088 }
1089
1090 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1091 {
1092         unsigned long dr7;
1093
1094         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1095                 dr7 = vcpu->arch.guest_debug_dr7;
1096         else
1097                 dr7 = vcpu->arch.dr7;
1098         kvm_x86_ops.set_dr7(vcpu, dr7);
1099         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1100         if (dr7 & DR7_BP_EN_MASK)
1101                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1104
1105 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1106 {
1107         u64 fixed = DR6_FIXED_1;
1108
1109         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1110                 fixed |= DR6_RTM;
1111         return fixed;
1112 }
1113
1114 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1115 {
1116         size_t size = ARRAY_SIZE(vcpu->arch.db);
1117
1118         switch (dr) {
1119         case 0 ... 3:
1120                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1121                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1122                         vcpu->arch.eff_db[dr] = val;
1123                 break;
1124         case 4:
1125         case 6:
1126                 if (!kvm_dr6_valid(val))
1127                         return -1; /* #GP */
1128                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1129                 break;
1130         case 5:
1131         default: /* 7 */
1132                 if (!kvm_dr7_valid(val))
1133                         return -1; /* #GP */
1134                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1135                 kvm_update_dr7(vcpu);
1136                 break;
1137         }
1138
1139         return 0;
1140 }
1141
1142 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1143 {
1144         if (__kvm_set_dr(vcpu, dr, val)) {
1145                 kvm_inject_gp(vcpu, 0);
1146                 return 1;
1147         }
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_set_dr);
1151
1152 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1153 {
1154         size_t size = ARRAY_SIZE(vcpu->arch.db);
1155
1156         switch (dr) {
1157         case 0 ... 3:
1158                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1159                 break;
1160         case 4:
1161         case 6:
1162                 *val = vcpu->arch.dr6;
1163                 break;
1164         case 5:
1165         default: /* 7 */
1166                 *val = vcpu->arch.dr7;
1167                 break;
1168         }
1169         return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_get_dr);
1172
1173 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1174 {
1175         u32 ecx = kvm_rcx_read(vcpu);
1176         u64 data;
1177         int err;
1178
1179         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1180         if (err)
1181                 return err;
1182         kvm_rax_write(vcpu, (u32)data);
1183         kvm_rdx_write(vcpu, data >> 32);
1184         return err;
1185 }
1186 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1187
1188 /*
1189  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1190  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1191  *
1192  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1193  * extract the supported MSRs from the related const lists.
1194  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1195  * capabilities of the host cpu. This capabilities test skips MSRs that are
1196  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1197  * may depend on host virtualization features rather than host cpu features.
1198  */
1199
1200 static const u32 msrs_to_save_all[] = {
1201         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1202         MSR_STAR,
1203 #ifdef CONFIG_X86_64
1204         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1205 #endif
1206         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1207         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1208         MSR_IA32_SPEC_CTRL,
1209         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1210         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1211         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1212         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1213         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1214         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1215         MSR_IA32_UMWAIT_CONTROL,
1216
1217         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1218         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1219         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1220         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1221         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1229         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1230         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1238         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1239 };
1240
1241 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1242 static unsigned num_msrs_to_save;
1243
1244 static const u32 emulated_msrs_all[] = {
1245         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1246         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1247         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1248         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1249         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1250         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1251         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1252         HV_X64_MSR_RESET,
1253         HV_X64_MSR_VP_INDEX,
1254         HV_X64_MSR_VP_RUNTIME,
1255         HV_X64_MSR_SCONTROL,
1256         HV_X64_MSR_STIMER0_CONFIG,
1257         HV_X64_MSR_VP_ASSIST_PAGE,
1258         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1259         HV_X64_MSR_TSC_EMULATION_STATUS,
1260         HV_X64_MSR_SYNDBG_OPTIONS,
1261         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1262         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1263         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1264
1265         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1266         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1267
1268         MSR_IA32_TSC_ADJUST,
1269         MSR_IA32_TSCDEADLINE,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271         MSR_IA32_PERF_CAPABILITIES,
1272         MSR_IA32_MISC_ENABLE,
1273         MSR_IA32_MCG_STATUS,
1274         MSR_IA32_MCG_CTL,
1275         MSR_IA32_MCG_EXT_CTL,
1276         MSR_IA32_SMBASE,
1277         MSR_SMI_COUNT,
1278         MSR_PLATFORM_INFO,
1279         MSR_MISC_FEATURES_ENABLES,
1280         MSR_AMD64_VIRT_SPEC_CTRL,
1281         MSR_IA32_POWER_CTL,
1282         MSR_IA32_UCODE_REV,
1283
1284         /*
1285          * The following list leaves out MSRs whose values are determined
1286          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1287          * We always support the "true" VMX control MSRs, even if the host
1288          * processor does not, so I am putting these registers here rather
1289          * than in msrs_to_save_all.
1290          */
1291         MSR_IA32_VMX_BASIC,
1292         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1294         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1295         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1296         MSR_IA32_VMX_MISC,
1297         MSR_IA32_VMX_CR0_FIXED0,
1298         MSR_IA32_VMX_CR4_FIXED0,
1299         MSR_IA32_VMX_VMCS_ENUM,
1300         MSR_IA32_VMX_PROCBASED_CTLS2,
1301         MSR_IA32_VMX_EPT_VPID_CAP,
1302         MSR_IA32_VMX_VMFUNC,
1303
1304         MSR_K7_HWCR,
1305         MSR_KVM_POLL_CONTROL,
1306 };
1307
1308 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1309 static unsigned num_emulated_msrs;
1310
1311 /*
1312  * List of msr numbers which are used to expose MSR-based features that
1313  * can be used by a hypervisor to validate requested CPU features.
1314  */
1315 static const u32 msr_based_features_all[] = {
1316         MSR_IA32_VMX_BASIC,
1317         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1318         MSR_IA32_VMX_PINBASED_CTLS,
1319         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1320         MSR_IA32_VMX_PROCBASED_CTLS,
1321         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1322         MSR_IA32_VMX_EXIT_CTLS,
1323         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1324         MSR_IA32_VMX_ENTRY_CTLS,
1325         MSR_IA32_VMX_MISC,
1326         MSR_IA32_VMX_CR0_FIXED0,
1327         MSR_IA32_VMX_CR0_FIXED1,
1328         MSR_IA32_VMX_CR4_FIXED0,
1329         MSR_IA32_VMX_CR4_FIXED1,
1330         MSR_IA32_VMX_VMCS_ENUM,
1331         MSR_IA32_VMX_PROCBASED_CTLS2,
1332         MSR_IA32_VMX_EPT_VPID_CAP,
1333         MSR_IA32_VMX_VMFUNC,
1334
1335         MSR_F10H_DECFG,
1336         MSR_IA32_UCODE_REV,
1337         MSR_IA32_ARCH_CAPABILITIES,
1338         MSR_IA32_PERF_CAPABILITIES,
1339 };
1340
1341 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1342 static unsigned int num_msr_based_features;
1343
1344 static u64 kvm_get_arch_capabilities(void)
1345 {
1346         u64 data = 0;
1347
1348         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1349                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1350
1351         /*
1352          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1353          * the nested hypervisor runs with NX huge pages.  If it is not,
1354          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1355          * L1 guests, so it need not worry about its own (L2) guests.
1356          */
1357         data |= ARCH_CAP_PSCHANGE_MC_NO;
1358
1359         /*
1360          * If we're doing cache flushes (either "always" or "cond")
1361          * we will do one whenever the guest does a vmlaunch/vmresume.
1362          * If an outer hypervisor is doing the cache flush for us
1363          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1364          * capability to the guest too, and if EPT is disabled we're not
1365          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1366          * require a nested hypervisor to do a flush of its own.
1367          */
1368         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1369                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1370
1371         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1372                 data |= ARCH_CAP_RDCL_NO;
1373         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1374                 data |= ARCH_CAP_SSB_NO;
1375         if (!boot_cpu_has_bug(X86_BUG_MDS))
1376                 data |= ARCH_CAP_MDS_NO;
1377
1378         /*
1379          * On TAA affected systems:
1380          *      - nothing to do if TSX is disabled on the host.
1381          *      - we emulate TSX_CTRL if present on the host.
1382          *        This lets the guest use VERW to clear CPU buffers.
1383          */
1384         if (!boot_cpu_has(X86_FEATURE_RTM))
1385                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1386         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1387                 data |= ARCH_CAP_TAA_NO;
1388
1389         return data;
1390 }
1391
1392 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1393 {
1394         switch (msr->index) {
1395         case MSR_IA32_ARCH_CAPABILITIES:
1396                 msr->data = kvm_get_arch_capabilities();
1397                 break;
1398         case MSR_IA32_UCODE_REV:
1399                 rdmsrl_safe(msr->index, &msr->data);
1400                 break;
1401         default:
1402                 return kvm_x86_ops.get_msr_feature(msr);
1403         }
1404         return 0;
1405 }
1406
1407 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1408 {
1409         struct kvm_msr_entry msr;
1410         int r;
1411
1412         msr.index = index;
1413         r = kvm_get_msr_feature(&msr);
1414
1415         if (r == KVM_MSR_RET_INVALID) {
1416                 /* Unconditionally clear the output for simplicity */
1417                 *data = 0;
1418                 r = kvm_msr_ignored_check(vcpu, index, 0, false);
1419         }
1420
1421         if (r)
1422                 return r;
1423
1424         *data = msr.data;
1425
1426         return 0;
1427 }
1428
1429 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1430 {
1431         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1432                 return false;
1433
1434         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1435                 return false;
1436
1437         if (efer & (EFER_LME | EFER_LMA) &&
1438             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1439                 return false;
1440
1441         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1442                 return false;
1443
1444         return true;
1445
1446 }
1447 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1448 {
1449         if (efer & efer_reserved_bits)
1450                 return false;
1451
1452         return __kvm_valid_efer(vcpu, efer);
1453 }
1454 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1455
1456 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1457 {
1458         u64 old_efer = vcpu->arch.efer;
1459         u64 efer = msr_info->data;
1460
1461         if (efer & efer_reserved_bits)
1462                 return 1;
1463
1464         if (!msr_info->host_initiated) {
1465                 if (!__kvm_valid_efer(vcpu, efer))
1466                         return 1;
1467
1468                 if (is_paging(vcpu) &&
1469                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1470                         return 1;
1471         }
1472
1473         efer &= ~EFER_LMA;
1474         efer |= vcpu->arch.efer & EFER_LMA;
1475
1476         kvm_x86_ops.set_efer(vcpu, efer);
1477
1478         /* Update reserved bits */
1479         if ((efer ^ old_efer) & EFER_NX)
1480                 kvm_mmu_reset_context(vcpu);
1481
1482         return 0;
1483 }
1484
1485 void kvm_enable_efer_bits(u64 mask)
1486 {
1487        efer_reserved_bits &= ~mask;
1488 }
1489 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1490
1491 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1492 {
1493         struct kvm *kvm = vcpu->kvm;
1494         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1495         u32 count = kvm->arch.msr_filter.count;
1496         u32 i;
1497         bool r = kvm->arch.msr_filter.default_allow;
1498         int idx;
1499
1500         /* MSR filtering not set up, allow everything */
1501         if (!count)
1502                 return true;
1503
1504         /* Prevent collision with set_msr_filter */
1505         idx = srcu_read_lock(&kvm->srcu);
1506
1507         for (i = 0; i < count; i++) {
1508                 u32 start = ranges[i].base;
1509                 u32 end = start + ranges[i].nmsrs;
1510                 u32 flags = ranges[i].flags;
1511                 unsigned long *bitmap = ranges[i].bitmap;
1512
1513                 if ((index >= start) && (index < end) && (flags & type)) {
1514                         r = !!test_bit(index - start, bitmap);
1515                         break;
1516                 }
1517         }
1518
1519         srcu_read_unlock(&kvm->srcu, idx);
1520
1521         return r;
1522 }
1523 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1524
1525 /*
1526  * Write @data into the MSR specified by @index.  Select MSR specific fault
1527  * checks are bypassed if @host_initiated is %true.
1528  * Returns 0 on success, non-0 otherwise.
1529  * Assumes vcpu_load() was already called.
1530  */
1531 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1532                          bool host_initiated)
1533 {
1534         struct msr_data msr;
1535
1536         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1537                 return -EPERM;
1538
1539         switch (index) {
1540         case MSR_FS_BASE:
1541         case MSR_GS_BASE:
1542         case MSR_KERNEL_GS_BASE:
1543         case MSR_CSTAR:
1544         case MSR_LSTAR:
1545                 if (is_noncanonical_address(data, vcpu))
1546                         return 1;
1547                 break;
1548         case MSR_IA32_SYSENTER_EIP:
1549         case MSR_IA32_SYSENTER_ESP:
1550                 /*
1551                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1552                  * non-canonical address is written on Intel but not on
1553                  * AMD (which ignores the top 32-bits, because it does
1554                  * not implement 64-bit SYSENTER).
1555                  *
1556                  * 64-bit code should hence be able to write a non-canonical
1557                  * value on AMD.  Making the address canonical ensures that
1558                  * vmentry does not fail on Intel after writing a non-canonical
1559                  * value, and that something deterministic happens if the guest
1560                  * invokes 64-bit SYSENTER.
1561                  */
1562                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1563         }
1564
1565         msr.data = data;
1566         msr.index = index;
1567         msr.host_initiated = host_initiated;
1568
1569         return kvm_x86_ops.set_msr(vcpu, &msr);
1570 }
1571
1572 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1573                                      u32 index, u64 data, bool host_initiated)
1574 {
1575         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1576
1577         if (ret == KVM_MSR_RET_INVALID)
1578                 ret = kvm_msr_ignored_check(vcpu, index, data, true);
1579
1580         return ret;
1581 }
1582
1583 /*
1584  * Read the MSR specified by @index into @data.  Select MSR specific fault
1585  * checks are bypassed if @host_initiated is %true.
1586  * Returns 0 on success, non-0 otherwise.
1587  * Assumes vcpu_load() was already called.
1588  */
1589 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1590                   bool host_initiated)
1591 {
1592         struct msr_data msr;
1593         int ret;
1594
1595         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1596                 return -EPERM;
1597
1598         msr.index = index;
1599         msr.host_initiated = host_initiated;
1600
1601         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1602         if (!ret)
1603                 *data = msr.data;
1604         return ret;
1605 }
1606
1607 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1608                                      u32 index, u64 *data, bool host_initiated)
1609 {
1610         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1611
1612         if (ret == KVM_MSR_RET_INVALID) {
1613                 /* Unconditionally clear *data for simplicity */
1614                 *data = 0;
1615                 ret = kvm_msr_ignored_check(vcpu, index, 0, false);
1616         }
1617
1618         return ret;
1619 }
1620
1621 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1622 {
1623         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1624 }
1625 EXPORT_SYMBOL_GPL(kvm_get_msr);
1626
1627 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1628 {
1629         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1630 }
1631 EXPORT_SYMBOL_GPL(kvm_set_msr);
1632
1633 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1634 {
1635         if (vcpu->run->msr.error) {
1636                 kvm_inject_gp(vcpu, 0);
1637                 return 1;
1638         } else if (is_read) {
1639                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1640                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1641         }
1642
1643         return kvm_skip_emulated_instruction(vcpu);
1644 }
1645
1646 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1647 {
1648         return complete_emulated_msr(vcpu, true);
1649 }
1650
1651 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1652 {
1653         return complete_emulated_msr(vcpu, false);
1654 }
1655
1656 static u64 kvm_msr_reason(int r)
1657 {
1658         switch (r) {
1659         case -ENOENT:
1660                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1661         case -EPERM:
1662                 return KVM_MSR_EXIT_REASON_FILTER;
1663         default:
1664                 return KVM_MSR_EXIT_REASON_INVAL;
1665         }
1666 }
1667
1668 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1669                               u32 exit_reason, u64 data,
1670                               int (*completion)(struct kvm_vcpu *vcpu),
1671                               int r)
1672 {
1673         u64 msr_reason = kvm_msr_reason(r);
1674
1675         /* Check if the user wanted to know about this MSR fault */
1676         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1677                 return 0;
1678
1679         vcpu->run->exit_reason = exit_reason;
1680         vcpu->run->msr.error = 0;
1681         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1682         vcpu->run->msr.reason = msr_reason;
1683         vcpu->run->msr.index = index;
1684         vcpu->run->msr.data = data;
1685         vcpu->arch.complete_userspace_io = completion;
1686
1687         return 1;
1688 }
1689
1690 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1691 {
1692         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1693                                    complete_emulated_rdmsr, r);
1694 }
1695
1696 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1697 {
1698         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1699                                    complete_emulated_wrmsr, r);
1700 }
1701
1702 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1703 {
1704         u32 ecx = kvm_rcx_read(vcpu);
1705         u64 data;
1706         int r;
1707
1708         r = kvm_get_msr(vcpu, ecx, &data);
1709
1710         /* MSR read failed? See if we should ask user space */
1711         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1712                 /* Bounce to user space */
1713                 return 0;
1714         }
1715
1716         /* MSR read failed? Inject a #GP */
1717         if (r) {
1718                 trace_kvm_msr_read_ex(ecx);
1719                 kvm_inject_gp(vcpu, 0);
1720                 return 1;
1721         }
1722
1723         trace_kvm_msr_read(ecx, data);
1724
1725         kvm_rax_write(vcpu, data & -1u);
1726         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1727         return kvm_skip_emulated_instruction(vcpu);
1728 }
1729 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1730
1731 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1732 {
1733         u32 ecx = kvm_rcx_read(vcpu);
1734         u64 data = kvm_read_edx_eax(vcpu);
1735         int r;
1736
1737         r = kvm_set_msr(vcpu, ecx, data);
1738
1739         /* MSR write failed? See if we should ask user space */
1740         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r)) {
1741                 /* Bounce to user space */
1742                 return 0;
1743         }
1744
1745         /* MSR write failed? Inject a #GP */
1746         if (r) {
1747                 trace_kvm_msr_write_ex(ecx, data);
1748                 kvm_inject_gp(vcpu, 0);
1749                 return 1;
1750         }
1751
1752         trace_kvm_msr_write(ecx, data);
1753         return kvm_skip_emulated_instruction(vcpu);
1754 }
1755 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1756
1757 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1758 {
1759         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1760                 xfer_to_guest_mode_work_pending();
1761 }
1762 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1763
1764 /*
1765  * The fast path for frequent and performance sensitive wrmsr emulation,
1766  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1767  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1768  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1769  * other cases which must be called after interrupts are enabled on the host.
1770  */
1771 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1772 {
1773         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1774                 return 1;
1775
1776         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1777                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1778                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1779                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1780
1781                 data &= ~(1 << 12);
1782                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1783                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1784                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1785                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1786                 return 0;
1787         }
1788
1789         return 1;
1790 }
1791
1792 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1793 {
1794         if (!kvm_can_use_hv_timer(vcpu))
1795                 return 1;
1796
1797         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1798         return 0;
1799 }
1800
1801 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1802 {
1803         u32 msr = kvm_rcx_read(vcpu);
1804         u64 data;
1805         fastpath_t ret = EXIT_FASTPATH_NONE;
1806
1807         switch (msr) {
1808         case APIC_BASE_MSR + (APIC_ICR >> 4):
1809                 data = kvm_read_edx_eax(vcpu);
1810                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1811                         kvm_skip_emulated_instruction(vcpu);
1812                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1813                 }
1814                 break;
1815         case MSR_IA32_TSCDEADLINE:
1816                 data = kvm_read_edx_eax(vcpu);
1817                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1818                         kvm_skip_emulated_instruction(vcpu);
1819                         ret = EXIT_FASTPATH_REENTER_GUEST;
1820                 }
1821                 break;
1822         default:
1823                 break;
1824         }
1825
1826         if (ret != EXIT_FASTPATH_NONE)
1827                 trace_kvm_msr_write(msr, data);
1828
1829         return ret;
1830 }
1831 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1832
1833 /*
1834  * Adapt set_msr() to msr_io()'s calling convention
1835  */
1836 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1837 {
1838         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1839 }
1840
1841 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1842 {
1843         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1844 }
1845
1846 #ifdef CONFIG_X86_64
1847 struct pvclock_clock {
1848         int vclock_mode;
1849         u64 cycle_last;
1850         u64 mask;
1851         u32 mult;
1852         u32 shift;
1853         u64 base_cycles;
1854         u64 offset;
1855 };
1856
1857 struct pvclock_gtod_data {
1858         seqcount_t      seq;
1859
1860         struct pvclock_clock clock; /* extract of a clocksource struct */
1861         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1862
1863         ktime_t         offs_boot;
1864         u64             wall_time_sec;
1865 };
1866
1867 static struct pvclock_gtod_data pvclock_gtod_data;
1868
1869 static void update_pvclock_gtod(struct timekeeper *tk)
1870 {
1871         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1872
1873         write_seqcount_begin(&vdata->seq);
1874
1875         /* copy pvclock gtod data */
1876         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1877         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1878         vdata->clock.mask               = tk->tkr_mono.mask;
1879         vdata->clock.mult               = tk->tkr_mono.mult;
1880         vdata->clock.shift              = tk->tkr_mono.shift;
1881         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1882         vdata->clock.offset             = tk->tkr_mono.base;
1883
1884         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1885         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1886         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1887         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1888         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1889         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1890         vdata->raw_clock.offset         = tk->tkr_raw.base;
1891
1892         vdata->wall_time_sec            = tk->xtime_sec;
1893
1894         vdata->offs_boot                = tk->offs_boot;
1895
1896         write_seqcount_end(&vdata->seq);
1897 }
1898
1899 static s64 get_kvmclock_base_ns(void)
1900 {
1901         /* Count up from boot time, but with the frequency of the raw clock.  */
1902         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1903 }
1904 #else
1905 static s64 get_kvmclock_base_ns(void)
1906 {
1907         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1908         return ktime_get_boottime_ns();
1909 }
1910 #endif
1911
1912 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1913 {
1914         int version;
1915         int r;
1916         struct pvclock_wall_clock wc;
1917         u64 wall_nsec;
1918
1919         if (!wall_clock)
1920                 return;
1921
1922         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1923         if (r)
1924                 return;
1925
1926         if (version & 1)
1927                 ++version;  /* first time write, random junk */
1928
1929         ++version;
1930
1931         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1932                 return;
1933
1934         /*
1935          * The guest calculates current wall clock time by adding
1936          * system time (updated by kvm_guest_time_update below) to the
1937          * wall clock specified here.  We do the reverse here.
1938          */
1939         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1940
1941         wc.nsec = do_div(wall_nsec, 1000000000);
1942         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1943         wc.version = version;
1944
1945         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1946
1947         version++;
1948         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1949 }
1950
1951 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1952 {
1953         do_shl32_div32(dividend, divisor);
1954         return dividend;
1955 }
1956
1957 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1958                                s8 *pshift, u32 *pmultiplier)
1959 {
1960         uint64_t scaled64;
1961         int32_t  shift = 0;
1962         uint64_t tps64;
1963         uint32_t tps32;
1964
1965         tps64 = base_hz;
1966         scaled64 = scaled_hz;
1967         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1968                 tps64 >>= 1;
1969                 shift--;
1970         }
1971
1972         tps32 = (uint32_t)tps64;
1973         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1974                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1975                         scaled64 >>= 1;
1976                 else
1977                         tps32 <<= 1;
1978                 shift++;
1979         }
1980
1981         *pshift = shift;
1982         *pmultiplier = div_frac(scaled64, tps32);
1983 }
1984
1985 #ifdef CONFIG_X86_64
1986 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1987 #endif
1988
1989 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1990 static unsigned long max_tsc_khz;
1991
1992 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1993 {
1994         u64 v = (u64)khz * (1000000 + ppm);
1995         do_div(v, 1000000);
1996         return v;
1997 }
1998
1999 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2000 {
2001         u64 ratio;
2002
2003         /* Guest TSC same frequency as host TSC? */
2004         if (!scale) {
2005                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2006                 return 0;
2007         }
2008
2009         /* TSC scaling supported? */
2010         if (!kvm_has_tsc_control) {
2011                 if (user_tsc_khz > tsc_khz) {
2012                         vcpu->arch.tsc_catchup = 1;
2013                         vcpu->arch.tsc_always_catchup = 1;
2014                         return 0;
2015                 } else {
2016                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2017                         return -1;
2018                 }
2019         }
2020
2021         /* TSC scaling required  - calculate ratio */
2022         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2023                                 user_tsc_khz, tsc_khz);
2024
2025         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2026                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2027                                     user_tsc_khz);
2028                 return -1;
2029         }
2030
2031         vcpu->arch.tsc_scaling_ratio = ratio;
2032         return 0;
2033 }
2034
2035 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2036 {
2037         u32 thresh_lo, thresh_hi;
2038         int use_scaling = 0;
2039
2040         /* tsc_khz can be zero if TSC calibration fails */
2041         if (user_tsc_khz == 0) {
2042                 /* set tsc_scaling_ratio to a safe value */
2043                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2044                 return -1;
2045         }
2046
2047         /* Compute a scale to convert nanoseconds in TSC cycles */
2048         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2049                            &vcpu->arch.virtual_tsc_shift,
2050                            &vcpu->arch.virtual_tsc_mult);
2051         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2052
2053         /*
2054          * Compute the variation in TSC rate which is acceptable
2055          * within the range of tolerance and decide if the
2056          * rate being applied is within that bounds of the hardware
2057          * rate.  If so, no scaling or compensation need be done.
2058          */
2059         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2060         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2061         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2062                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2063                 use_scaling = 1;
2064         }
2065         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2066 }
2067
2068 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2069 {
2070         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2071                                       vcpu->arch.virtual_tsc_mult,
2072                                       vcpu->arch.virtual_tsc_shift);
2073         tsc += vcpu->arch.this_tsc_write;
2074         return tsc;
2075 }
2076
2077 static inline int gtod_is_based_on_tsc(int mode)
2078 {
2079         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2080 }
2081
2082 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2083 {
2084 #ifdef CONFIG_X86_64
2085         bool vcpus_matched;
2086         struct kvm_arch *ka = &vcpu->kvm->arch;
2087         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2088
2089         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2090                          atomic_read(&vcpu->kvm->online_vcpus));
2091
2092         /*
2093          * Once the masterclock is enabled, always perform request in
2094          * order to update it.
2095          *
2096          * In order to enable masterclock, the host clocksource must be TSC
2097          * and the vcpus need to have matched TSCs.  When that happens,
2098          * perform request to enable masterclock.
2099          */
2100         if (ka->use_master_clock ||
2101             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2102                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2103
2104         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2105                             atomic_read(&vcpu->kvm->online_vcpus),
2106                             ka->use_master_clock, gtod->clock.vclock_mode);
2107 #endif
2108 }
2109
2110 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
2111 {
2112         u64 curr_offset = vcpu->arch.l1_tsc_offset;
2113         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
2114 }
2115
2116 /*
2117  * Multiply tsc by a fixed point number represented by ratio.
2118  *
2119  * The most significant 64-N bits (mult) of ratio represent the
2120  * integral part of the fixed point number; the remaining N bits
2121  * (frac) represent the fractional part, ie. ratio represents a fixed
2122  * point number (mult + frac * 2^(-N)).
2123  *
2124  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2125  */
2126 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2127 {
2128         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2129 }
2130
2131 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2132 {
2133         u64 _tsc = tsc;
2134         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2135
2136         if (ratio != kvm_default_tsc_scaling_ratio)
2137                 _tsc = __scale_tsc(ratio, tsc);
2138
2139         return _tsc;
2140 }
2141 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2142
2143 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2144 {
2145         u64 tsc;
2146
2147         tsc = kvm_scale_tsc(vcpu, rdtsc());
2148
2149         return target_tsc - tsc;
2150 }
2151
2152 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2153 {
2154         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2155 }
2156 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2157
2158 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2159 {
2160         vcpu->arch.l1_tsc_offset = offset;
2161         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2162 }
2163
2164 static inline bool kvm_check_tsc_unstable(void)
2165 {
2166 #ifdef CONFIG_X86_64
2167         /*
2168          * TSC is marked unstable when we're running on Hyper-V,
2169          * 'TSC page' clocksource is good.
2170          */
2171         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2172                 return false;
2173 #endif
2174         return check_tsc_unstable();
2175 }
2176
2177 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
2178 {
2179         struct kvm *kvm = vcpu->kvm;
2180         u64 offset, ns, elapsed;
2181         unsigned long flags;
2182         bool matched;
2183         bool already_matched;
2184         u64 data = msr->data;
2185         bool synchronizing = false;
2186
2187         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2188         offset = kvm_compute_tsc_offset(vcpu, data);
2189         ns = get_kvmclock_base_ns();
2190         elapsed = ns - kvm->arch.last_tsc_nsec;
2191
2192         if (vcpu->arch.virtual_tsc_khz) {
2193                 if (data == 0 && msr->host_initiated) {
2194                         /*
2195                          * detection of vcpu initialization -- need to sync
2196                          * with other vCPUs. This particularly helps to keep
2197                          * kvm_clock stable after CPU hotplug
2198                          */
2199                         synchronizing = true;
2200                 } else {
2201                         u64 tsc_exp = kvm->arch.last_tsc_write +
2202                                                 nsec_to_cycles(vcpu, elapsed);
2203                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2204                         /*
2205                          * Special case: TSC write with a small delta (1 second)
2206                          * of virtual cycle time against real time is
2207                          * interpreted as an attempt to synchronize the CPU.
2208                          */
2209                         synchronizing = data < tsc_exp + tsc_hz &&
2210                                         data + tsc_hz > tsc_exp;
2211                 }
2212         }
2213
2214         /*
2215          * For a reliable TSC, we can match TSC offsets, and for an unstable
2216          * TSC, we add elapsed time in this computation.  We could let the
2217          * compensation code attempt to catch up if we fall behind, but
2218          * it's better to try to match offsets from the beginning.
2219          */
2220         if (synchronizing &&
2221             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2222                 if (!kvm_check_tsc_unstable()) {
2223                         offset = kvm->arch.cur_tsc_offset;
2224                 } else {
2225                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2226                         data += delta;
2227                         offset = kvm_compute_tsc_offset(vcpu, data);
2228                 }
2229                 matched = true;
2230                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2231         } else {
2232                 /*
2233                  * We split periods of matched TSC writes into generations.
2234                  * For each generation, we track the original measured
2235                  * nanosecond time, offset, and write, so if TSCs are in
2236                  * sync, we can match exact offset, and if not, we can match
2237                  * exact software computation in compute_guest_tsc()
2238                  *
2239                  * These values are tracked in kvm->arch.cur_xxx variables.
2240                  */
2241                 kvm->arch.cur_tsc_generation++;
2242                 kvm->arch.cur_tsc_nsec = ns;
2243                 kvm->arch.cur_tsc_write = data;
2244                 kvm->arch.cur_tsc_offset = offset;
2245                 matched = false;
2246         }
2247
2248         /*
2249          * We also track th most recent recorded KHZ, write and time to
2250          * allow the matching interval to be extended at each write.
2251          */
2252         kvm->arch.last_tsc_nsec = ns;
2253         kvm->arch.last_tsc_write = data;
2254         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2255
2256         vcpu->arch.last_guest_tsc = data;
2257
2258         /* Keep track of which generation this VCPU has synchronized to */
2259         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2260         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2261         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2262
2263         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
2264                 update_ia32_tsc_adjust_msr(vcpu, offset);
2265
2266         kvm_vcpu_write_tsc_offset(vcpu, offset);
2267         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2268
2269         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2270         if (!matched) {
2271                 kvm->arch.nr_vcpus_matched_tsc = 0;
2272         } else if (!already_matched) {
2273                 kvm->arch.nr_vcpus_matched_tsc++;
2274         }
2275
2276         kvm_track_tsc_matching(vcpu);
2277         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2278 }
2279
2280 EXPORT_SYMBOL_GPL(kvm_write_tsc);
2281
2282 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2283                                            s64 adjustment)
2284 {
2285         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2286         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2287 }
2288
2289 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2290 {
2291         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2292                 WARN_ON(adjustment < 0);
2293         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2294         adjust_tsc_offset_guest(vcpu, adjustment);
2295 }
2296
2297 #ifdef CONFIG_X86_64
2298
2299 static u64 read_tsc(void)
2300 {
2301         u64 ret = (u64)rdtsc_ordered();
2302         u64 last = pvclock_gtod_data.clock.cycle_last;
2303
2304         if (likely(ret >= last))
2305                 return ret;
2306
2307         /*
2308          * GCC likes to generate cmov here, but this branch is extremely
2309          * predictable (it's just a function of time and the likely is
2310          * very likely) and there's a data dependence, so force GCC
2311          * to generate a branch instead.  I don't barrier() because
2312          * we don't actually need a barrier, and if this function
2313          * ever gets inlined it will generate worse code.
2314          */
2315         asm volatile ("");
2316         return last;
2317 }
2318
2319 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2320                           int *mode)
2321 {
2322         long v;
2323         u64 tsc_pg_val;
2324
2325         switch (clock->vclock_mode) {
2326         case VDSO_CLOCKMODE_HVCLOCK:
2327                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2328                                                   tsc_timestamp);
2329                 if (tsc_pg_val != U64_MAX) {
2330                         /* TSC page valid */
2331                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2332                         v = (tsc_pg_val - clock->cycle_last) &
2333                                 clock->mask;
2334                 } else {
2335                         /* TSC page invalid */
2336                         *mode = VDSO_CLOCKMODE_NONE;
2337                 }
2338                 break;
2339         case VDSO_CLOCKMODE_TSC:
2340                 *mode = VDSO_CLOCKMODE_TSC;
2341                 *tsc_timestamp = read_tsc();
2342                 v = (*tsc_timestamp - clock->cycle_last) &
2343                         clock->mask;
2344                 break;
2345         default:
2346                 *mode = VDSO_CLOCKMODE_NONE;
2347         }
2348
2349         if (*mode == VDSO_CLOCKMODE_NONE)
2350                 *tsc_timestamp = v = 0;
2351
2352         return v * clock->mult;
2353 }
2354
2355 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2356 {
2357         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2358         unsigned long seq;
2359         int mode;
2360         u64 ns;
2361
2362         do {
2363                 seq = read_seqcount_begin(&gtod->seq);
2364                 ns = gtod->raw_clock.base_cycles;
2365                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2366                 ns >>= gtod->raw_clock.shift;
2367                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2368         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2369         *t = ns;
2370
2371         return mode;
2372 }
2373
2374 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2375 {
2376         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2377         unsigned long seq;
2378         int mode;
2379         u64 ns;
2380
2381         do {
2382                 seq = read_seqcount_begin(&gtod->seq);
2383                 ts->tv_sec = gtod->wall_time_sec;
2384                 ns = gtod->clock.base_cycles;
2385                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2386                 ns >>= gtod->clock.shift;
2387         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2388
2389         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2390         ts->tv_nsec = ns;
2391
2392         return mode;
2393 }
2394
2395 /* returns true if host is using TSC based clocksource */
2396 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2397 {
2398         /* checked again under seqlock below */
2399         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2400                 return false;
2401
2402         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2403                                                       tsc_timestamp));
2404 }
2405
2406 /* returns true if host is using TSC based clocksource */
2407 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2408                                            u64 *tsc_timestamp)
2409 {
2410         /* checked again under seqlock below */
2411         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2412                 return false;
2413
2414         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2415 }
2416 #endif
2417
2418 /*
2419  *
2420  * Assuming a stable TSC across physical CPUS, and a stable TSC
2421  * across virtual CPUs, the following condition is possible.
2422  * Each numbered line represents an event visible to both
2423  * CPUs at the next numbered event.
2424  *
2425  * "timespecX" represents host monotonic time. "tscX" represents
2426  * RDTSC value.
2427  *
2428  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2429  *
2430  * 1.  read timespec0,tsc0
2431  * 2.                                   | timespec1 = timespec0 + N
2432  *                                      | tsc1 = tsc0 + M
2433  * 3. transition to guest               | transition to guest
2434  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2435  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2436  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2437  *
2438  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2439  *
2440  *      - ret0 < ret1
2441  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2442  *              ...
2443  *      - 0 < N - M => M < N
2444  *
2445  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2446  * always the case (the difference between two distinct xtime instances
2447  * might be smaller then the difference between corresponding TSC reads,
2448  * when updating guest vcpus pvclock areas).
2449  *
2450  * To avoid that problem, do not allow visibility of distinct
2451  * system_timestamp/tsc_timestamp values simultaneously: use a master
2452  * copy of host monotonic time values. Update that master copy
2453  * in lockstep.
2454  *
2455  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2456  *
2457  */
2458
2459 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2460 {
2461 #ifdef CONFIG_X86_64
2462         struct kvm_arch *ka = &kvm->arch;
2463         int vclock_mode;
2464         bool host_tsc_clocksource, vcpus_matched;
2465
2466         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2467                         atomic_read(&kvm->online_vcpus));
2468
2469         /*
2470          * If the host uses TSC clock, then passthrough TSC as stable
2471          * to the guest.
2472          */
2473         host_tsc_clocksource = kvm_get_time_and_clockread(
2474                                         &ka->master_kernel_ns,
2475                                         &ka->master_cycle_now);
2476
2477         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2478                                 && !ka->backwards_tsc_observed
2479                                 && !ka->boot_vcpu_runs_old_kvmclock;
2480
2481         if (ka->use_master_clock)
2482                 atomic_set(&kvm_guest_has_master_clock, 1);
2483
2484         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2485         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2486                                         vcpus_matched);
2487 #endif
2488 }
2489
2490 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2491 {
2492         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2493 }
2494
2495 static void kvm_gen_update_masterclock(struct kvm *kvm)
2496 {
2497 #ifdef CONFIG_X86_64
2498         int i;
2499         struct kvm_vcpu *vcpu;
2500         struct kvm_arch *ka = &kvm->arch;
2501
2502         spin_lock(&ka->pvclock_gtod_sync_lock);
2503         kvm_make_mclock_inprogress_request(kvm);
2504         /* no guest entries from this point */
2505         pvclock_update_vm_gtod_copy(kvm);
2506
2507         kvm_for_each_vcpu(i, vcpu, kvm)
2508                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2509
2510         /* guest entries allowed */
2511         kvm_for_each_vcpu(i, vcpu, kvm)
2512                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2513
2514         spin_unlock(&ka->pvclock_gtod_sync_lock);
2515 #endif
2516 }
2517
2518 u64 get_kvmclock_ns(struct kvm *kvm)
2519 {
2520         struct kvm_arch *ka = &kvm->arch;
2521         struct pvclock_vcpu_time_info hv_clock;
2522         u64 ret;
2523
2524         spin_lock(&ka->pvclock_gtod_sync_lock);
2525         if (!ka->use_master_clock) {
2526                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2527                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2528         }
2529
2530         hv_clock.tsc_timestamp = ka->master_cycle_now;
2531         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2532         spin_unlock(&ka->pvclock_gtod_sync_lock);
2533
2534         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2535         get_cpu();
2536
2537         if (__this_cpu_read(cpu_tsc_khz)) {
2538                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2539                                    &hv_clock.tsc_shift,
2540                                    &hv_clock.tsc_to_system_mul);
2541                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2542         } else
2543                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2544
2545         put_cpu();
2546
2547         return ret;
2548 }
2549
2550 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2551 {
2552         struct kvm_vcpu_arch *vcpu = &v->arch;
2553         struct pvclock_vcpu_time_info guest_hv_clock;
2554
2555         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2556                 &guest_hv_clock, sizeof(guest_hv_clock))))
2557                 return;
2558
2559         /* This VCPU is paused, but it's legal for a guest to read another
2560          * VCPU's kvmclock, so we really have to follow the specification where
2561          * it says that version is odd if data is being modified, and even after
2562          * it is consistent.
2563          *
2564          * Version field updates must be kept separate.  This is because
2565          * kvm_write_guest_cached might use a "rep movs" instruction, and
2566          * writes within a string instruction are weakly ordered.  So there
2567          * are three writes overall.
2568          *
2569          * As a small optimization, only write the version field in the first
2570          * and third write.  The vcpu->pv_time cache is still valid, because the
2571          * version field is the first in the struct.
2572          */
2573         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2574
2575         if (guest_hv_clock.version & 1)
2576                 ++guest_hv_clock.version;  /* first time write, random junk */
2577
2578         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2579         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2580                                 &vcpu->hv_clock,
2581                                 sizeof(vcpu->hv_clock.version));
2582
2583         smp_wmb();
2584
2585         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2586         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2587
2588         if (vcpu->pvclock_set_guest_stopped_request) {
2589                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2590                 vcpu->pvclock_set_guest_stopped_request = false;
2591         }
2592
2593         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2594
2595         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2596                                 &vcpu->hv_clock,
2597                                 sizeof(vcpu->hv_clock));
2598
2599         smp_wmb();
2600
2601         vcpu->hv_clock.version++;
2602         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2603                                 &vcpu->hv_clock,
2604                                 sizeof(vcpu->hv_clock.version));
2605 }
2606
2607 static int kvm_guest_time_update(struct kvm_vcpu *v)
2608 {
2609         unsigned long flags, tgt_tsc_khz;
2610         struct kvm_vcpu_arch *vcpu = &v->arch;
2611         struct kvm_arch *ka = &v->kvm->arch;
2612         s64 kernel_ns;
2613         u64 tsc_timestamp, host_tsc;
2614         u8 pvclock_flags;
2615         bool use_master_clock;
2616
2617         kernel_ns = 0;
2618         host_tsc = 0;
2619
2620         /*
2621          * If the host uses TSC clock, then passthrough TSC as stable
2622          * to the guest.
2623          */
2624         spin_lock(&ka->pvclock_gtod_sync_lock);
2625         use_master_clock = ka->use_master_clock;
2626         if (use_master_clock) {
2627                 host_tsc = ka->master_cycle_now;
2628                 kernel_ns = ka->master_kernel_ns;
2629         }
2630         spin_unlock(&ka->pvclock_gtod_sync_lock);
2631
2632         /* Keep irq disabled to prevent changes to the clock */
2633         local_irq_save(flags);
2634         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2635         if (unlikely(tgt_tsc_khz == 0)) {
2636                 local_irq_restore(flags);
2637                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2638                 return 1;
2639         }
2640         if (!use_master_clock) {
2641                 host_tsc = rdtsc();
2642                 kernel_ns = get_kvmclock_base_ns();
2643         }
2644
2645         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2646
2647         /*
2648          * We may have to catch up the TSC to match elapsed wall clock
2649          * time for two reasons, even if kvmclock is used.
2650          *   1) CPU could have been running below the maximum TSC rate
2651          *   2) Broken TSC compensation resets the base at each VCPU
2652          *      entry to avoid unknown leaps of TSC even when running
2653          *      again on the same CPU.  This may cause apparent elapsed
2654          *      time to disappear, and the guest to stand still or run
2655          *      very slowly.
2656          */
2657         if (vcpu->tsc_catchup) {
2658                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2659                 if (tsc > tsc_timestamp) {
2660                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2661                         tsc_timestamp = tsc;
2662                 }
2663         }
2664
2665         local_irq_restore(flags);
2666
2667         /* With all the info we got, fill in the values */
2668
2669         if (kvm_has_tsc_control)
2670                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2671
2672         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2673                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2674                                    &vcpu->hv_clock.tsc_shift,
2675                                    &vcpu->hv_clock.tsc_to_system_mul);
2676                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2677         }
2678
2679         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2680         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2681         vcpu->last_guest_tsc = tsc_timestamp;
2682
2683         /* If the host uses TSC clocksource, then it is stable */
2684         pvclock_flags = 0;
2685         if (use_master_clock)
2686                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2687
2688         vcpu->hv_clock.flags = pvclock_flags;
2689
2690         if (vcpu->pv_time_enabled)
2691                 kvm_setup_pvclock_page(v);
2692         if (v == kvm_get_vcpu(v->kvm, 0))
2693                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2694         return 0;
2695 }
2696
2697 /*
2698  * kvmclock updates which are isolated to a given vcpu, such as
2699  * vcpu->cpu migration, should not allow system_timestamp from
2700  * the rest of the vcpus to remain static. Otherwise ntp frequency
2701  * correction applies to one vcpu's system_timestamp but not
2702  * the others.
2703  *
2704  * So in those cases, request a kvmclock update for all vcpus.
2705  * We need to rate-limit these requests though, as they can
2706  * considerably slow guests that have a large number of vcpus.
2707  * The time for a remote vcpu to update its kvmclock is bound
2708  * by the delay we use to rate-limit the updates.
2709  */
2710
2711 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2712
2713 static void kvmclock_update_fn(struct work_struct *work)
2714 {
2715         int i;
2716         struct delayed_work *dwork = to_delayed_work(work);
2717         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2718                                            kvmclock_update_work);
2719         struct kvm *kvm = container_of(ka, struct kvm, arch);
2720         struct kvm_vcpu *vcpu;
2721
2722         kvm_for_each_vcpu(i, vcpu, kvm) {
2723                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2724                 kvm_vcpu_kick(vcpu);
2725         }
2726 }
2727
2728 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2729 {
2730         struct kvm *kvm = v->kvm;
2731
2732         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2733         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2734                                         KVMCLOCK_UPDATE_DELAY);
2735 }
2736
2737 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2738
2739 static void kvmclock_sync_fn(struct work_struct *work)
2740 {
2741         struct delayed_work *dwork = to_delayed_work(work);
2742         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2743                                            kvmclock_sync_work);
2744         struct kvm *kvm = container_of(ka, struct kvm, arch);
2745
2746         if (!kvmclock_periodic_sync)
2747                 return;
2748
2749         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2750         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2751                                         KVMCLOCK_SYNC_PERIOD);
2752 }
2753
2754 /*
2755  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2756  */
2757 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2758 {
2759         /* McStatusWrEn enabled? */
2760         if (guest_cpuid_is_amd_or_hygon(vcpu))
2761                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2762
2763         return false;
2764 }
2765
2766 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2767 {
2768         u64 mcg_cap = vcpu->arch.mcg_cap;
2769         unsigned bank_num = mcg_cap & 0xff;
2770         u32 msr = msr_info->index;
2771         u64 data = msr_info->data;
2772
2773         switch (msr) {
2774         case MSR_IA32_MCG_STATUS:
2775                 vcpu->arch.mcg_status = data;
2776                 break;
2777         case MSR_IA32_MCG_CTL:
2778                 if (!(mcg_cap & MCG_CTL_P) &&
2779                     (data || !msr_info->host_initiated))
2780                         return 1;
2781                 if (data != 0 && data != ~(u64)0)
2782                         return 1;
2783                 vcpu->arch.mcg_ctl = data;
2784                 break;
2785         default:
2786                 if (msr >= MSR_IA32_MC0_CTL &&
2787                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2788                         u32 offset = array_index_nospec(
2789                                 msr - MSR_IA32_MC0_CTL,
2790                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2791
2792                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2793                          * some Linux kernels though clear bit 10 in bank 4 to
2794                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2795                          * this to avoid an uncatched #GP in the guest
2796                          */
2797                         if ((offset & 0x3) == 0 &&
2798                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2799                                 return -1;
2800
2801                         /* MCi_STATUS */
2802                         if (!msr_info->host_initiated &&
2803                             (offset & 0x3) == 1 && data != 0) {
2804                                 if (!can_set_mci_status(vcpu))
2805                                         return -1;
2806                         }
2807
2808                         vcpu->arch.mce_banks[offset] = data;
2809                         break;
2810                 }
2811                 return 1;
2812         }
2813         return 0;
2814 }
2815
2816 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2817 {
2818         struct kvm *kvm = vcpu->kvm;
2819         int lm = is_long_mode(vcpu);
2820         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2821                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2822         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2823                 : kvm->arch.xen_hvm_config.blob_size_32;
2824         u32 page_num = data & ~PAGE_MASK;
2825         u64 page_addr = data & PAGE_MASK;
2826         u8 *page;
2827         int r;
2828
2829         r = -E2BIG;
2830         if (page_num >= blob_size)
2831                 goto out;
2832         r = -ENOMEM;
2833         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2834         if (IS_ERR(page)) {
2835                 r = PTR_ERR(page);
2836                 goto out;
2837         }
2838         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2839                 goto out_free;
2840         r = 0;
2841 out_free:
2842         kfree(page);
2843 out:
2844         return r;
2845 }
2846
2847 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2848 {
2849         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2850
2851         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2852 }
2853
2854 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2855 {
2856         gpa_t gpa = data & ~0x3f;
2857
2858         /* Bits 4:5 are reserved, Should be zero */
2859         if (data & 0x30)
2860                 return 1;
2861
2862         if (!lapic_in_kernel(vcpu))
2863                 return data ? 1 : 0;
2864
2865         vcpu->arch.apf.msr_en_val = data;
2866
2867         if (!kvm_pv_async_pf_enabled(vcpu)) {
2868                 kvm_clear_async_pf_completion_queue(vcpu);
2869                 kvm_async_pf_hash_reset(vcpu);
2870                 return 0;
2871         }
2872
2873         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2874                                         sizeof(u64)))
2875                 return 1;
2876
2877         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2878         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2879
2880         kvm_async_pf_wakeup_all(vcpu);
2881
2882         return 0;
2883 }
2884
2885 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2886 {
2887         /* Bits 8-63 are reserved */
2888         if (data >> 8)
2889                 return 1;
2890
2891         if (!lapic_in_kernel(vcpu))
2892                 return 1;
2893
2894         vcpu->arch.apf.msr_int_val = data;
2895
2896         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2897
2898         return 0;
2899 }
2900
2901 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2902 {
2903         vcpu->arch.pv_time_enabled = false;
2904         vcpu->arch.time = 0;
2905 }
2906
2907 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2908 {
2909         ++vcpu->stat.tlb_flush;
2910         kvm_x86_ops.tlb_flush_all(vcpu);
2911 }
2912
2913 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2914 {
2915         ++vcpu->stat.tlb_flush;
2916         kvm_x86_ops.tlb_flush_guest(vcpu);
2917 }
2918
2919 static void record_steal_time(struct kvm_vcpu *vcpu)
2920 {
2921         struct kvm_host_map map;
2922         struct kvm_steal_time *st;
2923
2924         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2925                 return;
2926
2927         /* -EAGAIN is returned in atomic context so we can just return. */
2928         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2929                         &map, &vcpu->arch.st.cache, false))
2930                 return;
2931
2932         st = map.hva +
2933                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2934
2935         /*
2936          * Doing a TLB flush here, on the guest's behalf, can avoid
2937          * expensive IPIs.
2938          */
2939         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2940                 st->preempted & KVM_VCPU_FLUSH_TLB);
2941         if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2942                 kvm_vcpu_flush_tlb_guest(vcpu);
2943
2944         vcpu->arch.st.preempted = 0;
2945
2946         if (st->version & 1)
2947                 st->version += 1;  /* first time write, random junk */
2948
2949         st->version += 1;
2950
2951         smp_wmb();
2952
2953         st->steal += current->sched_info.run_delay -
2954                 vcpu->arch.st.last_steal;
2955         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2956
2957         smp_wmb();
2958
2959         st->version += 1;
2960
2961         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2962 }
2963
2964 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2965 {
2966         bool pr = false;
2967         u32 msr = msr_info->index;
2968         u64 data = msr_info->data;
2969
2970         switch (msr) {
2971         case MSR_AMD64_NB_CFG:
2972         case MSR_IA32_UCODE_WRITE:
2973         case MSR_VM_HSAVE_PA:
2974         case MSR_AMD64_PATCH_LOADER:
2975         case MSR_AMD64_BU_CFG2:
2976         case MSR_AMD64_DC_CFG:
2977         case MSR_F15H_EX_CFG:
2978                 break;
2979
2980         case MSR_IA32_UCODE_REV:
2981                 if (msr_info->host_initiated)
2982                         vcpu->arch.microcode_version = data;
2983                 break;
2984         case MSR_IA32_ARCH_CAPABILITIES:
2985                 if (!msr_info->host_initiated)
2986                         return 1;
2987                 vcpu->arch.arch_capabilities = data;
2988                 break;
2989         case MSR_IA32_PERF_CAPABILITIES: {
2990                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
2991
2992                 if (!msr_info->host_initiated)
2993                         return 1;
2994                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
2995                         return 1;
2996                 if (data & ~msr_ent.data)
2997                         return 1;
2998
2999                 vcpu->arch.perf_capabilities = data;
3000
3001                 return 0;
3002                 }
3003         case MSR_EFER:
3004                 return set_efer(vcpu, msr_info);
3005         case MSR_K7_HWCR:
3006                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3007                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3008                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3009
3010                 /* Handle McStatusWrEn */
3011                 if (data == BIT_ULL(18)) {
3012                         vcpu->arch.msr_hwcr = data;
3013                 } else if (data != 0) {
3014                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3015                                     data);
3016                         return 1;
3017                 }
3018                 break;
3019         case MSR_FAM10H_MMIO_CONF_BASE:
3020                 if (data != 0) {
3021                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3022                                     "0x%llx\n", data);
3023                         return 1;
3024                 }
3025                 break;
3026         case MSR_IA32_DEBUGCTLMSR:
3027                 if (!data) {
3028                         /* We support the non-activated case already */
3029                         break;
3030                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3031                         /* Values other than LBR and BTF are vendor-specific,
3032                            thus reserved and should throw a #GP */
3033                         return 1;
3034                 }
3035                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3036                             __func__, data);
3037                 break;
3038         case 0x200 ... 0x2ff:
3039                 return kvm_mtrr_set_msr(vcpu, msr, data);
3040         case MSR_IA32_APICBASE:
3041                 return kvm_set_apic_base(vcpu, msr_info);
3042         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3043                 return kvm_x2apic_msr_write(vcpu, msr, data);
3044         case MSR_IA32_TSCDEADLINE:
3045                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3046                 break;
3047         case MSR_IA32_TSC_ADJUST:
3048                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3049                         if (!msr_info->host_initiated) {
3050                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3051                                 adjust_tsc_offset_guest(vcpu, adj);
3052                         }
3053                         vcpu->arch.ia32_tsc_adjust_msr = data;
3054                 }
3055                 break;
3056         case MSR_IA32_MISC_ENABLE:
3057                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3058                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3059                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3060                                 return 1;
3061                         vcpu->arch.ia32_misc_enable_msr = data;
3062                         kvm_update_cpuid_runtime(vcpu);
3063                 } else {
3064                         vcpu->arch.ia32_misc_enable_msr = data;
3065                 }
3066                 break;
3067         case MSR_IA32_SMBASE:
3068                 if (!msr_info->host_initiated)
3069                         return 1;
3070                 vcpu->arch.smbase = data;
3071                 break;
3072         case MSR_IA32_POWER_CTL:
3073                 vcpu->arch.msr_ia32_power_ctl = data;
3074                 break;
3075         case MSR_IA32_TSC:
3076                 kvm_write_tsc(vcpu, msr_info);
3077                 break;
3078         case MSR_IA32_XSS:
3079                 if (!msr_info->host_initiated &&
3080                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3081                         return 1;
3082                 /*
3083                  * KVM supports exposing PT to the guest, but does not support
3084                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3085                  * XSAVES/XRSTORS to save/restore PT MSRs.
3086                  */
3087                 if (data & ~supported_xss)
3088                         return 1;
3089                 vcpu->arch.ia32_xss = data;
3090                 break;
3091         case MSR_SMI_COUNT:
3092                 if (!msr_info->host_initiated)
3093                         return 1;
3094                 vcpu->arch.smi_count = data;
3095                 break;
3096         case MSR_KVM_WALL_CLOCK_NEW:
3097         case MSR_KVM_WALL_CLOCK:
3098                 vcpu->kvm->arch.wall_clock = data;
3099                 kvm_write_wall_clock(vcpu->kvm, data);
3100                 break;
3101         case MSR_KVM_SYSTEM_TIME_NEW:
3102         case MSR_KVM_SYSTEM_TIME: {
3103                 struct kvm_arch *ka = &vcpu->kvm->arch;
3104
3105                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
3106                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
3107
3108                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
3109                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
3110
3111                         ka->boot_vcpu_runs_old_kvmclock = tmp;
3112                 }
3113
3114                 vcpu->arch.time = data;
3115                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3116
3117                 /* we verify if the enable bit is set... */
3118                 vcpu->arch.pv_time_enabled = false;
3119                 if (!(data & 1))
3120                         break;
3121
3122                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
3123                      &vcpu->arch.pv_time, data & ~1ULL,
3124                      sizeof(struct pvclock_vcpu_time_info)))
3125                         vcpu->arch.pv_time_enabled = true;
3126
3127                 break;
3128         }
3129         case MSR_KVM_ASYNC_PF_EN:
3130                 if (kvm_pv_enable_async_pf(vcpu, data))
3131                         return 1;
3132                 break;
3133         case MSR_KVM_ASYNC_PF_INT:
3134                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3135                         return 1;
3136                 break;
3137         case MSR_KVM_ASYNC_PF_ACK:
3138                 if (data & 0x1) {
3139                         vcpu->arch.apf.pageready_pending = false;
3140                         kvm_check_async_pf_completion(vcpu);
3141                 }
3142                 break;
3143         case MSR_KVM_STEAL_TIME:
3144
3145                 if (unlikely(!sched_info_on()))
3146                         return 1;
3147
3148                 if (data & KVM_STEAL_RESERVED_MASK)
3149                         return 1;
3150
3151                 vcpu->arch.st.msr_val = data;
3152
3153                 if (!(data & KVM_MSR_ENABLED))
3154                         break;
3155
3156                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3157
3158                 break;
3159         case MSR_KVM_PV_EOI_EN:
3160                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3161                         return 1;
3162                 break;
3163
3164         case MSR_KVM_POLL_CONTROL:
3165                 /* only enable bit supported */
3166                 if (data & (-1ULL << 1))
3167                         return 1;
3168
3169                 vcpu->arch.msr_kvm_poll_control = data;
3170                 break;
3171
3172         case MSR_IA32_MCG_CTL:
3173         case MSR_IA32_MCG_STATUS:
3174         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3175                 return set_msr_mce(vcpu, msr_info);
3176
3177         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3178         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3179                 pr = true;
3180                 fallthrough;
3181         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3182         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3183                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3184                         return kvm_pmu_set_msr(vcpu, msr_info);
3185
3186                 if (pr || data != 0)
3187                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3188                                     "0x%x data 0x%llx\n", msr, data);
3189                 break;
3190         case MSR_K7_CLK_CTL:
3191                 /*
3192                  * Ignore all writes to this no longer documented MSR.
3193                  * Writes are only relevant for old K7 processors,
3194                  * all pre-dating SVM, but a recommended workaround from
3195                  * AMD for these chips. It is possible to specify the
3196                  * affected processor models on the command line, hence
3197                  * the need to ignore the workaround.
3198                  */
3199                 break;
3200         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3201         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3202         case HV_X64_MSR_SYNDBG_OPTIONS:
3203         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3204         case HV_X64_MSR_CRASH_CTL:
3205         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3206         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3207         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3208         case HV_X64_MSR_TSC_EMULATION_STATUS:
3209                 return kvm_hv_set_msr_common(vcpu, msr, data,
3210                                              msr_info->host_initiated);
3211         case MSR_IA32_BBL_CR_CTL3:
3212                 /* Drop writes to this legacy MSR -- see rdmsr
3213                  * counterpart for further detail.
3214                  */
3215                 if (report_ignored_msrs)
3216                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3217                                 msr, data);
3218                 break;
3219         case MSR_AMD64_OSVW_ID_LENGTH:
3220                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3221                         return 1;
3222                 vcpu->arch.osvw.length = data;
3223                 break;
3224         case MSR_AMD64_OSVW_STATUS:
3225                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3226                         return 1;
3227                 vcpu->arch.osvw.status = data;
3228                 break;
3229         case MSR_PLATFORM_INFO:
3230                 if (!msr_info->host_initiated ||
3231                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3232                      cpuid_fault_enabled(vcpu)))
3233                         return 1;
3234                 vcpu->arch.msr_platform_info = data;
3235                 break;
3236         case MSR_MISC_FEATURES_ENABLES:
3237                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3238                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3239                      !supports_cpuid_fault(vcpu)))
3240                         return 1;
3241                 vcpu->arch.msr_misc_features_enables = data;
3242                 break;
3243         default:
3244                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3245                         return xen_hvm_config(vcpu, data);
3246                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3247                         return kvm_pmu_set_msr(vcpu, msr_info);
3248                 return KVM_MSR_RET_INVALID;
3249         }
3250         return 0;
3251 }
3252 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3253
3254 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3255 {
3256         u64 data;
3257         u64 mcg_cap = vcpu->arch.mcg_cap;
3258         unsigned bank_num = mcg_cap & 0xff;
3259
3260         switch (msr) {
3261         case MSR_IA32_P5_MC_ADDR:
3262         case MSR_IA32_P5_MC_TYPE:
3263                 data = 0;
3264                 break;
3265         case MSR_IA32_MCG_CAP:
3266                 data = vcpu->arch.mcg_cap;
3267                 break;
3268         case MSR_IA32_MCG_CTL:
3269                 if (!(mcg_cap & MCG_CTL_P) && !host)
3270                         return 1;
3271                 data = vcpu->arch.mcg_ctl;
3272                 break;
3273         case MSR_IA32_MCG_STATUS:
3274                 data = vcpu->arch.mcg_status;
3275                 break;
3276         default:
3277                 if (msr >= MSR_IA32_MC0_CTL &&
3278                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3279                         u32 offset = array_index_nospec(
3280                                 msr - MSR_IA32_MC0_CTL,
3281                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3282
3283                         data = vcpu->arch.mce_banks[offset];
3284                         break;
3285                 }
3286                 return 1;
3287         }
3288         *pdata = data;
3289         return 0;
3290 }
3291
3292 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3293 {
3294         switch (msr_info->index) {
3295         case MSR_IA32_PLATFORM_ID:
3296         case MSR_IA32_EBL_CR_POWERON:
3297         case MSR_IA32_DEBUGCTLMSR:
3298         case MSR_IA32_LASTBRANCHFROMIP:
3299         case MSR_IA32_LASTBRANCHTOIP:
3300         case MSR_IA32_LASTINTFROMIP:
3301         case MSR_IA32_LASTINTTOIP:
3302         case MSR_K8_SYSCFG:
3303         case MSR_K8_TSEG_ADDR:
3304         case MSR_K8_TSEG_MASK:
3305         case MSR_VM_HSAVE_PA:
3306         case MSR_K8_INT_PENDING_MSG:
3307         case MSR_AMD64_NB_CFG:
3308         case MSR_FAM10H_MMIO_CONF_BASE:
3309         case MSR_AMD64_BU_CFG2:
3310         case MSR_IA32_PERF_CTL:
3311         case MSR_AMD64_DC_CFG:
3312         case MSR_F15H_EX_CFG:
3313         /*
3314          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3315          * limit) MSRs. Just return 0, as we do not want to expose the host
3316          * data here. Do not conditionalize this on CPUID, as KVM does not do
3317          * so for existing CPU-specific MSRs.
3318          */
3319         case MSR_RAPL_POWER_UNIT:
3320         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3321         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3322         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3323         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3324                 msr_info->data = 0;
3325                 break;
3326         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3327         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3328         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3329         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3330         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3331                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3332                         return kvm_pmu_get_msr(vcpu, msr_info);
3333                 msr_info->data = 0;
3334                 break;
3335         case MSR_IA32_UCODE_REV:
3336                 msr_info->data = vcpu->arch.microcode_version;
3337                 break;
3338         case MSR_IA32_ARCH_CAPABILITIES:
3339                 if (!msr_info->host_initiated &&
3340                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3341                         return 1;
3342                 msr_info->data = vcpu->arch.arch_capabilities;
3343                 break;
3344         case MSR_IA32_PERF_CAPABILITIES:
3345                 if (!msr_info->host_initiated &&
3346                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3347                         return 1;
3348                 msr_info->data = vcpu->arch.perf_capabilities;
3349                 break;
3350         case MSR_IA32_POWER_CTL:
3351                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3352                 break;
3353         case MSR_IA32_TSC: {
3354                 /*
3355                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3356                  * even when not intercepted. AMD manual doesn't explicitly
3357                  * state this but appears to behave the same.
3358                  *
3359                  * Unconditionally return L1's TSC offset on userspace reads
3360                  * so that userspace reads and writes always operate on L1's
3361                  * offset, e.g. to ensure deterministic behavior for migration.
3362                  */
3363                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3364                                                             vcpu->arch.tsc_offset;
3365
3366                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3367                 break;
3368         }
3369         case MSR_MTRRcap:
3370         case 0x200 ... 0x2ff:
3371                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3372         case 0xcd: /* fsb frequency */
3373                 msr_info->data = 3;
3374                 break;
3375                 /*
3376                  * MSR_EBC_FREQUENCY_ID
3377                  * Conservative value valid for even the basic CPU models.
3378                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3379                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3380                  * and 266MHz for model 3, or 4. Set Core Clock
3381                  * Frequency to System Bus Frequency Ratio to 1 (bits
3382                  * 31:24) even though these are only valid for CPU
3383                  * models > 2, however guests may end up dividing or
3384                  * multiplying by zero otherwise.
3385                  */
3386         case MSR_EBC_FREQUENCY_ID:
3387                 msr_info->data = 1 << 24;
3388                 break;
3389         case MSR_IA32_APICBASE:
3390                 msr_info->data = kvm_get_apic_base(vcpu);
3391                 break;
3392         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3393                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3394         case MSR_IA32_TSCDEADLINE:
3395                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3396                 break;
3397         case MSR_IA32_TSC_ADJUST:
3398                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3399                 break;
3400         case MSR_IA32_MISC_ENABLE:
3401                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3402                 break;
3403         case MSR_IA32_SMBASE:
3404                 if (!msr_info->host_initiated)
3405                         return 1;
3406                 msr_info->data = vcpu->arch.smbase;
3407                 break;
3408         case MSR_SMI_COUNT:
3409                 msr_info->data = vcpu->arch.smi_count;
3410                 break;
3411         case MSR_IA32_PERF_STATUS:
3412                 /* TSC increment by tick */
3413                 msr_info->data = 1000ULL;
3414                 /* CPU multiplier */
3415                 msr_info->data |= (((uint64_t)4ULL) << 40);
3416                 break;
3417         case MSR_EFER:
3418                 msr_info->data = vcpu->arch.efer;
3419                 break;
3420         case MSR_KVM_WALL_CLOCK:
3421         case MSR_KVM_WALL_CLOCK_NEW:
3422                 msr_info->data = vcpu->kvm->arch.wall_clock;
3423                 break;
3424         case MSR_KVM_SYSTEM_TIME:
3425         case MSR_KVM_SYSTEM_TIME_NEW:
3426                 msr_info->data = vcpu->arch.time;
3427                 break;
3428         case MSR_KVM_ASYNC_PF_EN:
3429                 msr_info->data = vcpu->arch.apf.msr_en_val;
3430                 break;
3431         case MSR_KVM_ASYNC_PF_INT:
3432                 msr_info->data = vcpu->arch.apf.msr_int_val;
3433                 break;
3434         case MSR_KVM_ASYNC_PF_ACK:
3435                 msr_info->data = 0;
3436                 break;
3437         case MSR_KVM_STEAL_TIME:
3438                 msr_info->data = vcpu->arch.st.msr_val;
3439                 break;
3440         case MSR_KVM_PV_EOI_EN:
3441                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3442                 break;
3443         case MSR_KVM_POLL_CONTROL:
3444                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3445                 break;
3446         case MSR_IA32_P5_MC_ADDR:
3447         case MSR_IA32_P5_MC_TYPE:
3448         case MSR_IA32_MCG_CAP:
3449         case MSR_IA32_MCG_CTL:
3450         case MSR_IA32_MCG_STATUS:
3451         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3452                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3453                                    msr_info->host_initiated);
3454         case MSR_IA32_XSS:
3455                 if (!msr_info->host_initiated &&
3456                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3457                         return 1;
3458                 msr_info->data = vcpu->arch.ia32_xss;
3459                 break;
3460         case MSR_K7_CLK_CTL:
3461                 /*
3462                  * Provide expected ramp-up count for K7. All other
3463                  * are set to zero, indicating minimum divisors for
3464                  * every field.
3465                  *
3466                  * This prevents guest kernels on AMD host with CPU
3467                  * type 6, model 8 and higher from exploding due to
3468                  * the rdmsr failing.
3469                  */
3470                 msr_info->data = 0x20000000;
3471                 break;
3472         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3473         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3474         case HV_X64_MSR_SYNDBG_OPTIONS:
3475         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3476         case HV_X64_MSR_CRASH_CTL:
3477         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3478         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3479         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3480         case HV_X64_MSR_TSC_EMULATION_STATUS:
3481                 return kvm_hv_get_msr_common(vcpu,
3482                                              msr_info->index, &msr_info->data,
3483                                              msr_info->host_initiated);
3484         case MSR_IA32_BBL_CR_CTL3:
3485                 /* This legacy MSR exists but isn't fully documented in current
3486                  * silicon.  It is however accessed by winxp in very narrow
3487                  * scenarios where it sets bit #19, itself documented as
3488                  * a "reserved" bit.  Best effort attempt to source coherent
3489                  * read data here should the balance of the register be
3490                  * interpreted by the guest:
3491                  *
3492                  * L2 cache control register 3: 64GB range, 256KB size,
3493                  * enabled, latency 0x1, configured
3494                  */
3495                 msr_info->data = 0xbe702111;
3496                 break;
3497         case MSR_AMD64_OSVW_ID_LENGTH:
3498                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3499                         return 1;
3500                 msr_info->data = vcpu->arch.osvw.length;
3501                 break;
3502         case MSR_AMD64_OSVW_STATUS:
3503                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3504                         return 1;
3505                 msr_info->data = vcpu->arch.osvw.status;
3506                 break;
3507         case MSR_PLATFORM_INFO:
3508                 if (!msr_info->host_initiated &&
3509                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3510                         return 1;
3511                 msr_info->data = vcpu->arch.msr_platform_info;
3512                 break;
3513         case MSR_MISC_FEATURES_ENABLES:
3514                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3515                 break;
3516         case MSR_K7_HWCR:
3517                 msr_info->data = vcpu->arch.msr_hwcr;
3518                 break;
3519         default:
3520                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3521                         return kvm_pmu_get_msr(vcpu, msr_info);
3522                 return KVM_MSR_RET_INVALID;
3523         }
3524         return 0;
3525 }
3526 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3527
3528 /*
3529  * Read or write a bunch of msrs. All parameters are kernel addresses.
3530  *
3531  * @return number of msrs set successfully.
3532  */
3533 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3534                     struct kvm_msr_entry *entries,
3535                     int (*do_msr)(struct kvm_vcpu *vcpu,
3536                                   unsigned index, u64 *data))
3537 {
3538         int i;
3539
3540         for (i = 0; i < msrs->nmsrs; ++i)
3541                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3542                         break;
3543
3544         return i;
3545 }
3546
3547 /*
3548  * Read or write a bunch of msrs. Parameters are user addresses.
3549  *
3550  * @return number of msrs set successfully.
3551  */
3552 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3553                   int (*do_msr)(struct kvm_vcpu *vcpu,
3554                                 unsigned index, u64 *data),
3555                   int writeback)
3556 {
3557         struct kvm_msrs msrs;
3558         struct kvm_msr_entry *entries;
3559         int r, n;
3560         unsigned size;
3561
3562         r = -EFAULT;
3563         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3564                 goto out;
3565
3566         r = -E2BIG;
3567         if (msrs.nmsrs >= MAX_IO_MSRS)
3568                 goto out;
3569
3570         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3571         entries = memdup_user(user_msrs->entries, size);
3572         if (IS_ERR(entries)) {
3573                 r = PTR_ERR(entries);
3574                 goto out;
3575         }
3576
3577         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3578         if (r < 0)
3579                 goto out_free;
3580
3581         r = -EFAULT;
3582         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3583                 goto out_free;
3584
3585         r = n;
3586
3587 out_free:
3588         kfree(entries);
3589 out:
3590         return r;
3591 }
3592
3593 static inline bool kvm_can_mwait_in_guest(void)
3594 {
3595         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3596                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3597                 boot_cpu_has(X86_FEATURE_ARAT);
3598 }
3599
3600 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3601 {
3602         int r = 0;
3603
3604         switch (ext) {
3605         case KVM_CAP_IRQCHIP:
3606         case KVM_CAP_HLT:
3607         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3608         case KVM_CAP_SET_TSS_ADDR:
3609         case KVM_CAP_EXT_CPUID:
3610         case KVM_CAP_EXT_EMUL_CPUID:
3611         case KVM_CAP_CLOCKSOURCE:
3612         case KVM_CAP_PIT:
3613         case KVM_CAP_NOP_IO_DELAY:
3614         case KVM_CAP_MP_STATE:
3615         case KVM_CAP_SYNC_MMU:
3616         case KVM_CAP_USER_NMI:
3617         case KVM_CAP_REINJECT_CONTROL:
3618         case KVM_CAP_IRQ_INJECT_STATUS:
3619         case KVM_CAP_IOEVENTFD:
3620         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3621         case KVM_CAP_PIT2:
3622         case KVM_CAP_PIT_STATE2:
3623         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3624         case KVM_CAP_XEN_HVM:
3625         case KVM_CAP_VCPU_EVENTS:
3626         case KVM_CAP_HYPERV:
3627         case KVM_CAP_HYPERV_VAPIC:
3628         case KVM_CAP_HYPERV_SPIN:
3629         case KVM_CAP_HYPERV_SYNIC:
3630         case KVM_CAP_HYPERV_SYNIC2:
3631         case KVM_CAP_HYPERV_VP_INDEX:
3632         case KVM_CAP_HYPERV_EVENTFD:
3633         case KVM_CAP_HYPERV_TLBFLUSH:
3634         case KVM_CAP_HYPERV_SEND_IPI:
3635         case KVM_CAP_HYPERV_CPUID:
3636         case KVM_CAP_PCI_SEGMENT:
3637         case KVM_CAP_DEBUGREGS:
3638         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3639         case KVM_CAP_XSAVE:
3640         case KVM_CAP_ASYNC_PF:
3641         case KVM_CAP_ASYNC_PF_INT:
3642         case KVM_CAP_GET_TSC_KHZ:
3643         case KVM_CAP_KVMCLOCK_CTRL:
3644         case KVM_CAP_READONLY_MEM:
3645         case KVM_CAP_HYPERV_TIME:
3646         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3647         case KVM_CAP_TSC_DEADLINE_TIMER:
3648         case KVM_CAP_DISABLE_QUIRKS:
3649         case KVM_CAP_SET_BOOT_CPU_ID:
3650         case KVM_CAP_SPLIT_IRQCHIP:
3651         case KVM_CAP_IMMEDIATE_EXIT:
3652         case KVM_CAP_PMU_EVENT_FILTER:
3653         case KVM_CAP_GET_MSR_FEATURES:
3654         case KVM_CAP_MSR_PLATFORM_INFO:
3655         case KVM_CAP_EXCEPTION_PAYLOAD:
3656         case KVM_CAP_SET_GUEST_DEBUG:
3657         case KVM_CAP_LAST_CPU:
3658         case KVM_CAP_X86_USER_SPACE_MSR:
3659         case KVM_CAP_X86_MSR_FILTER:
3660                 r = 1;
3661                 break;
3662         case KVM_CAP_SYNC_REGS:
3663                 r = KVM_SYNC_X86_VALID_FIELDS;
3664                 break;
3665         case KVM_CAP_ADJUST_CLOCK:
3666                 r = KVM_CLOCK_TSC_STABLE;
3667                 break;
3668         case KVM_CAP_X86_DISABLE_EXITS:
3669                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3670                       KVM_X86_DISABLE_EXITS_CSTATE;
3671                 if(kvm_can_mwait_in_guest())
3672                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3673                 break;
3674         case KVM_CAP_X86_SMM:
3675                 /* SMBASE is usually relocated above 1M on modern chipsets,
3676                  * and SMM handlers might indeed rely on 4G segment limits,
3677                  * so do not report SMM to be available if real mode is
3678                  * emulated via vm86 mode.  Still, do not go to great lengths
3679                  * to avoid userspace's usage of the feature, because it is a
3680                  * fringe case that is not enabled except via specific settings
3681                  * of the module parameters.
3682                  */
3683                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3684                 break;
3685         case KVM_CAP_VAPIC:
3686                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3687                 break;
3688         case KVM_CAP_NR_VCPUS:
3689                 r = KVM_SOFT_MAX_VCPUS;
3690                 break;
3691         case KVM_CAP_MAX_VCPUS:
3692                 r = KVM_MAX_VCPUS;
3693                 break;
3694         case KVM_CAP_MAX_VCPU_ID:
3695                 r = KVM_MAX_VCPU_ID;
3696                 break;
3697         case KVM_CAP_PV_MMU:    /* obsolete */
3698                 r = 0;
3699                 break;
3700         case KVM_CAP_MCE:
3701                 r = KVM_MAX_MCE_BANKS;
3702                 break;
3703         case KVM_CAP_XCRS:
3704                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3705                 break;
3706         case KVM_CAP_TSC_CONTROL:
3707                 r = kvm_has_tsc_control;
3708                 break;
3709         case KVM_CAP_X2APIC_API:
3710                 r = KVM_X2APIC_API_VALID_FLAGS;
3711                 break;
3712         case KVM_CAP_NESTED_STATE:
3713                 r = kvm_x86_ops.nested_ops->get_state ?
3714                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3715                 break;
3716         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3717                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3718                 break;
3719         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3720                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3721                 break;
3722         case KVM_CAP_SMALLER_MAXPHYADDR:
3723                 r = (int) allow_smaller_maxphyaddr;
3724                 break;
3725         case KVM_CAP_STEAL_TIME:
3726                 r = sched_info_on();
3727                 break;
3728         default:
3729                 break;
3730         }
3731         return r;
3732
3733 }
3734
3735 long kvm_arch_dev_ioctl(struct file *filp,
3736                         unsigned int ioctl, unsigned long arg)
3737 {
3738         void __user *argp = (void __user *)arg;
3739         long r;
3740
3741         switch (ioctl) {
3742         case KVM_GET_MSR_INDEX_LIST: {
3743                 struct kvm_msr_list __user *user_msr_list = argp;
3744                 struct kvm_msr_list msr_list;
3745                 unsigned n;
3746
3747                 r = -EFAULT;
3748                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3749                         goto out;
3750                 n = msr_list.nmsrs;
3751                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3752                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3753                         goto out;
3754                 r = -E2BIG;
3755                 if (n < msr_list.nmsrs)
3756                         goto out;
3757                 r = -EFAULT;
3758                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3759                                  num_msrs_to_save * sizeof(u32)))
3760                         goto out;
3761                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3762                                  &emulated_msrs,
3763                                  num_emulated_msrs * sizeof(u32)))
3764                         goto out;
3765                 r = 0;
3766                 break;
3767         }
3768         case KVM_GET_SUPPORTED_CPUID:
3769         case KVM_GET_EMULATED_CPUID: {
3770                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3771                 struct kvm_cpuid2 cpuid;
3772
3773                 r = -EFAULT;
3774                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3775                         goto out;
3776
3777                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3778                                             ioctl);
3779                 if (r)
3780                         goto out;
3781
3782                 r = -EFAULT;
3783                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3784                         goto out;
3785                 r = 0;
3786                 break;
3787         }
3788         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3789                 r = -EFAULT;
3790                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3791                                  sizeof(kvm_mce_cap_supported)))
3792                         goto out;
3793                 r = 0;
3794                 break;
3795         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3796                 struct kvm_msr_list __user *user_msr_list = argp;
3797                 struct kvm_msr_list msr_list;
3798                 unsigned int n;
3799
3800                 r = -EFAULT;
3801                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3802                         goto out;
3803                 n = msr_list.nmsrs;
3804                 msr_list.nmsrs = num_msr_based_features;
3805                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3806                         goto out;
3807                 r = -E2BIG;
3808                 if (n < msr_list.nmsrs)
3809                         goto out;
3810                 r = -EFAULT;
3811                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3812                                  num_msr_based_features * sizeof(u32)))
3813                         goto out;
3814                 r = 0;
3815                 break;
3816         }
3817         case KVM_GET_MSRS:
3818                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3819                 break;
3820         default:
3821                 r = -EINVAL;
3822                 break;
3823         }
3824 out:
3825         return r;
3826 }
3827
3828 static void wbinvd_ipi(void *garbage)
3829 {
3830         wbinvd();
3831 }
3832
3833 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3834 {
3835         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3836 }
3837
3838 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3839 {
3840         /* Address WBINVD may be executed by guest */
3841         if (need_emulate_wbinvd(vcpu)) {
3842                 if (kvm_x86_ops.has_wbinvd_exit())
3843                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3844                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3845                         smp_call_function_single(vcpu->cpu,
3846                                         wbinvd_ipi, NULL, 1);
3847         }
3848
3849         kvm_x86_ops.vcpu_load(vcpu, cpu);
3850
3851         /* Save host pkru register if supported */
3852         vcpu->arch.host_pkru = read_pkru();
3853
3854         /* Apply any externally detected TSC adjustments (due to suspend) */
3855         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3856                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3857                 vcpu->arch.tsc_offset_adjustment = 0;
3858                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3859         }
3860
3861         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3862                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3863                                 rdtsc() - vcpu->arch.last_host_tsc;
3864                 if (tsc_delta < 0)
3865                         mark_tsc_unstable("KVM discovered backwards TSC");
3866
3867                 if (kvm_check_tsc_unstable()) {
3868                         u64 offset = kvm_compute_tsc_offset(vcpu,
3869                                                 vcpu->arch.last_guest_tsc);
3870                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3871                         vcpu->arch.tsc_catchup = 1;
3872                 }
3873
3874                 if (kvm_lapic_hv_timer_in_use(vcpu))
3875                         kvm_lapic_restart_hv_timer(vcpu);
3876
3877                 /*
3878                  * On a host with synchronized TSC, there is no need to update
3879                  * kvmclock on vcpu->cpu migration
3880                  */
3881                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3882                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3883                 if (vcpu->cpu != cpu)
3884                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3885                 vcpu->cpu = cpu;
3886         }
3887
3888         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3889 }
3890
3891 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3892 {
3893         struct kvm_host_map map;
3894         struct kvm_steal_time *st;
3895
3896         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3897                 return;
3898
3899         if (vcpu->arch.st.preempted)
3900                 return;
3901
3902         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3903                         &vcpu->arch.st.cache, true))
3904                 return;
3905
3906         st = map.hva +
3907                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3908
3909         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3910
3911         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3912 }
3913
3914 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3915 {
3916         int idx;
3917
3918         if (vcpu->preempted)
3919                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
3920
3921         /*
3922          * Disable page faults because we're in atomic context here.
3923          * kvm_write_guest_offset_cached() would call might_fault()
3924          * that relies on pagefault_disable() to tell if there's a
3925          * bug. NOTE: the write to guest memory may not go through if
3926          * during postcopy live migration or if there's heavy guest
3927          * paging.
3928          */
3929         pagefault_disable();
3930         /*
3931          * kvm_memslots() will be called by
3932          * kvm_write_guest_offset_cached() so take the srcu lock.
3933          */
3934         idx = srcu_read_lock(&vcpu->kvm->srcu);
3935         kvm_steal_time_set_preempted(vcpu);
3936         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3937         pagefault_enable();
3938         kvm_x86_ops.vcpu_put(vcpu);
3939         vcpu->arch.last_host_tsc = rdtsc();
3940         /*
3941          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3942          * on every vmexit, but if not, we might have a stale dr6 from the
3943          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3944          */
3945         set_debugreg(0, 6);
3946 }
3947
3948 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3949                                     struct kvm_lapic_state *s)
3950 {
3951         if (vcpu->arch.apicv_active)
3952                 kvm_x86_ops.sync_pir_to_irr(vcpu);
3953
3954         return kvm_apic_get_state(vcpu, s);
3955 }
3956
3957 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3958                                     struct kvm_lapic_state *s)
3959 {
3960         int r;
3961
3962         r = kvm_apic_set_state(vcpu, s);
3963         if (r)
3964                 return r;
3965         update_cr8_intercept(vcpu);
3966
3967         return 0;
3968 }
3969
3970 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3971 {
3972         return (!lapic_in_kernel(vcpu) ||
3973                 kvm_apic_accept_pic_intr(vcpu));
3974 }
3975
3976 /*
3977  * if userspace requested an interrupt window, check that the
3978  * interrupt window is open.
3979  *
3980  * No need to exit to userspace if we already have an interrupt queued.
3981  */
3982 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3983 {
3984         return kvm_arch_interrupt_allowed(vcpu) &&
3985                 !kvm_cpu_has_interrupt(vcpu) &&
3986                 !kvm_event_needs_reinjection(vcpu) &&
3987                 kvm_cpu_accept_dm_intr(vcpu);
3988 }
3989
3990 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3991                                     struct kvm_interrupt *irq)
3992 {
3993         if (irq->irq >= KVM_NR_INTERRUPTS)
3994                 return -EINVAL;
3995
3996         if (!irqchip_in_kernel(vcpu->kvm)) {
3997                 kvm_queue_interrupt(vcpu, irq->irq, false);
3998                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3999                 return 0;
4000         }
4001
4002         /*
4003          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4004          * fail for in-kernel 8259.
4005          */
4006         if (pic_in_kernel(vcpu->kvm))
4007                 return -ENXIO;
4008
4009         if (vcpu->arch.pending_external_vector != -1)
4010                 return -EEXIST;
4011
4012         vcpu->arch.pending_external_vector = irq->irq;
4013         kvm_make_request(KVM_REQ_EVENT, vcpu);
4014         return 0;
4015 }
4016
4017 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4018 {
4019         kvm_inject_nmi(vcpu);
4020
4021         return 0;
4022 }
4023
4024 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4025 {
4026         kvm_make_request(KVM_REQ_SMI, vcpu);
4027
4028         return 0;
4029 }
4030
4031 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4032                                            struct kvm_tpr_access_ctl *tac)
4033 {
4034         if (tac->flags)
4035                 return -EINVAL;
4036         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4037         return 0;
4038 }
4039
4040 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4041                                         u64 mcg_cap)
4042 {
4043         int r;
4044         unsigned bank_num = mcg_cap & 0xff, bank;
4045
4046         r = -EINVAL;
4047         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4048                 goto out;
4049         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4050                 goto out;
4051         r = 0;
4052         vcpu->arch.mcg_cap = mcg_cap;
4053         /* Init IA32_MCG_CTL to all 1s */
4054         if (mcg_cap & MCG_CTL_P)
4055                 vcpu->arch.mcg_ctl = ~(u64)0;
4056         /* Init IA32_MCi_CTL to all 1s */
4057         for (bank = 0; bank < bank_num; bank++)
4058                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4059
4060         kvm_x86_ops.setup_mce(vcpu);
4061 out:
4062         return r;
4063 }
4064
4065 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4066                                       struct kvm_x86_mce *mce)
4067 {
4068         u64 mcg_cap = vcpu->arch.mcg_cap;
4069         unsigned bank_num = mcg_cap & 0xff;
4070         u64 *banks = vcpu->arch.mce_banks;
4071
4072         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4073                 return -EINVAL;
4074         /*
4075          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4076          * reporting is disabled
4077          */
4078         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4079             vcpu->arch.mcg_ctl != ~(u64)0)
4080                 return 0;
4081         banks += 4 * mce->bank;
4082         /*
4083          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4084          * reporting is disabled for the bank
4085          */
4086         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4087                 return 0;
4088         if (mce->status & MCI_STATUS_UC) {
4089                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4090                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4091                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4092                         return 0;
4093                 }
4094                 if (banks[1] & MCI_STATUS_VAL)
4095                         mce->status |= MCI_STATUS_OVER;
4096                 banks[2] = mce->addr;
4097                 banks[3] = mce->misc;
4098                 vcpu->arch.mcg_status = mce->mcg_status;
4099                 banks[1] = mce->status;
4100                 kvm_queue_exception(vcpu, MC_VECTOR);
4101         } else if (!(banks[1] & MCI_STATUS_VAL)
4102                    || !(banks[1] & MCI_STATUS_UC)) {
4103                 if (banks[1] & MCI_STATUS_VAL)
4104                         mce->status |= MCI_STATUS_OVER;
4105                 banks[2] = mce->addr;
4106                 banks[3] = mce->misc;
4107                 banks[1] = mce->status;
4108         } else
4109                 banks[1] |= MCI_STATUS_OVER;
4110         return 0;
4111 }
4112
4113 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4114                                                struct kvm_vcpu_events *events)
4115 {
4116         process_nmi(vcpu);
4117
4118         /*
4119          * In guest mode, payload delivery should be deferred,
4120          * so that the L1 hypervisor can intercept #PF before
4121          * CR2 is modified (or intercept #DB before DR6 is
4122          * modified under nVMX). Unless the per-VM capability,
4123          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4124          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4125          * opportunistically defer the exception payload, deliver it if the
4126          * capability hasn't been requested before processing a
4127          * KVM_GET_VCPU_EVENTS.
4128          */
4129         if (!vcpu->kvm->arch.exception_payload_enabled &&
4130             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4131                 kvm_deliver_exception_payload(vcpu);
4132
4133         /*
4134          * The API doesn't provide the instruction length for software
4135          * exceptions, so don't report them. As long as the guest RIP
4136          * isn't advanced, we should expect to encounter the exception
4137          * again.
4138          */
4139         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4140                 events->exception.injected = 0;
4141                 events->exception.pending = 0;
4142         } else {
4143                 events->exception.injected = vcpu->arch.exception.injected;
4144                 events->exception.pending = vcpu->arch.exception.pending;
4145                 /*
4146                  * For ABI compatibility, deliberately conflate
4147                  * pending and injected exceptions when
4148                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4149                  */
4150                 if (!vcpu->kvm->arch.exception_payload_enabled)
4151                         events->exception.injected |=
4152                                 vcpu->arch.exception.pending;
4153         }
4154         events->exception.nr = vcpu->arch.exception.nr;
4155         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4156         events->exception.error_code = vcpu->arch.exception.error_code;
4157         events->exception_has_payload = vcpu->arch.exception.has_payload;
4158         events->exception_payload = vcpu->arch.exception.payload;
4159
4160         events->interrupt.injected =
4161                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4162         events->interrupt.nr = vcpu->arch.interrupt.nr;
4163         events->interrupt.soft = 0;
4164         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4165
4166         events->nmi.injected = vcpu->arch.nmi_injected;
4167         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4168         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4169         events->nmi.pad = 0;
4170
4171         events->sipi_vector = 0; /* never valid when reporting to user space */
4172
4173         events->smi.smm = is_smm(vcpu);
4174         events->smi.pending = vcpu->arch.smi_pending;
4175         events->smi.smm_inside_nmi =
4176                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4177         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4178
4179         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4180                          | KVM_VCPUEVENT_VALID_SHADOW
4181                          | KVM_VCPUEVENT_VALID_SMM);
4182         if (vcpu->kvm->arch.exception_payload_enabled)
4183                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4184
4185         memset(&events->reserved, 0, sizeof(events->reserved));
4186 }
4187
4188 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4189
4190 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4191                                               struct kvm_vcpu_events *events)
4192 {
4193         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4194                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4195                               | KVM_VCPUEVENT_VALID_SHADOW
4196                               | KVM_VCPUEVENT_VALID_SMM
4197                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4198                 return -EINVAL;
4199
4200         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4201                 if (!vcpu->kvm->arch.exception_payload_enabled)
4202                         return -EINVAL;
4203                 if (events->exception.pending)
4204                         events->exception.injected = 0;
4205                 else
4206                         events->exception_has_payload = 0;
4207         } else {
4208                 events->exception.pending = 0;
4209                 events->exception_has_payload = 0;
4210         }
4211
4212         if ((events->exception.injected || events->exception.pending) &&
4213             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4214                 return -EINVAL;
4215
4216         /* INITs are latched while in SMM */
4217         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4218             (events->smi.smm || events->smi.pending) &&
4219             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4220                 return -EINVAL;
4221
4222         process_nmi(vcpu);
4223         vcpu->arch.exception.injected = events->exception.injected;
4224         vcpu->arch.exception.pending = events->exception.pending;
4225         vcpu->arch.exception.nr = events->exception.nr;
4226         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4227         vcpu->arch.exception.error_code = events->exception.error_code;
4228         vcpu->arch.exception.has_payload = events->exception_has_payload;
4229         vcpu->arch.exception.payload = events->exception_payload;
4230
4231         vcpu->arch.interrupt.injected = events->interrupt.injected;
4232         vcpu->arch.interrupt.nr = events->interrupt.nr;
4233         vcpu->arch.interrupt.soft = events->interrupt.soft;
4234         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4235                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4236                                                   events->interrupt.shadow);
4237
4238         vcpu->arch.nmi_injected = events->nmi.injected;
4239         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4240                 vcpu->arch.nmi_pending = events->nmi.pending;
4241         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4242
4243         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4244             lapic_in_kernel(vcpu))
4245                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4246
4247         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4248                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4249                         if (events->smi.smm)
4250                                 vcpu->arch.hflags |= HF_SMM_MASK;
4251                         else
4252                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4253                         kvm_smm_changed(vcpu);
4254                 }
4255
4256                 vcpu->arch.smi_pending = events->smi.pending;
4257
4258                 if (events->smi.smm) {
4259                         if (events->smi.smm_inside_nmi)
4260                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4261                         else
4262                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4263                 }
4264
4265                 if (lapic_in_kernel(vcpu)) {
4266                         if (events->smi.latched_init)
4267                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4268                         else
4269                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4270                 }
4271         }
4272
4273         kvm_make_request(KVM_REQ_EVENT, vcpu);
4274
4275         return 0;
4276 }
4277
4278 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4279                                              struct kvm_debugregs *dbgregs)
4280 {
4281         unsigned long val;
4282
4283         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4284         kvm_get_dr(vcpu, 6, &val);
4285         dbgregs->dr6 = val;
4286         dbgregs->dr7 = vcpu->arch.dr7;
4287         dbgregs->flags = 0;
4288         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4289 }
4290
4291 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4292                                             struct kvm_debugregs *dbgregs)
4293 {
4294         if (dbgregs->flags)
4295                 return -EINVAL;
4296
4297         if (dbgregs->dr6 & ~0xffffffffull)
4298                 return -EINVAL;
4299         if (dbgregs->dr7 & ~0xffffffffull)
4300                 return -EINVAL;
4301
4302         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4303         kvm_update_dr0123(vcpu);
4304         vcpu->arch.dr6 = dbgregs->dr6;
4305         vcpu->arch.dr7 = dbgregs->dr7;
4306         kvm_update_dr7(vcpu);
4307
4308         return 0;
4309 }
4310
4311 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4312
4313 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4314 {
4315         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4316         u64 xstate_bv = xsave->header.xfeatures;
4317         u64 valid;
4318
4319         /*
4320          * Copy legacy XSAVE area, to avoid complications with CPUID
4321          * leaves 0 and 1 in the loop below.
4322          */
4323         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4324
4325         /* Set XSTATE_BV */
4326         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4327         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4328
4329         /*
4330          * Copy each region from the possibly compacted offset to the
4331          * non-compacted offset.
4332          */
4333         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4334         while (valid) {
4335                 u64 xfeature_mask = valid & -valid;
4336                 int xfeature_nr = fls64(xfeature_mask) - 1;
4337                 void *src = get_xsave_addr(xsave, xfeature_nr);
4338
4339                 if (src) {
4340                         u32 size, offset, ecx, edx;
4341                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4342                                     &size, &offset, &ecx, &edx);
4343                         if (xfeature_nr == XFEATURE_PKRU)
4344                                 memcpy(dest + offset, &vcpu->arch.pkru,
4345                                        sizeof(vcpu->arch.pkru));
4346                         else
4347                                 memcpy(dest + offset, src, size);
4348
4349                 }
4350
4351                 valid -= xfeature_mask;
4352         }
4353 }
4354
4355 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4356 {
4357         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4358         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4359         u64 valid;
4360
4361         /*
4362          * Copy legacy XSAVE area, to avoid complications with CPUID
4363          * leaves 0 and 1 in the loop below.
4364          */
4365         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4366
4367         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4368         xsave->header.xfeatures = xstate_bv;
4369         if (boot_cpu_has(X86_FEATURE_XSAVES))
4370                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4371
4372         /*
4373          * Copy each region from the non-compacted offset to the
4374          * possibly compacted offset.
4375          */
4376         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4377         while (valid) {
4378                 u64 xfeature_mask = valid & -valid;
4379                 int xfeature_nr = fls64(xfeature_mask) - 1;
4380                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4381
4382                 if (dest) {
4383                         u32 size, offset, ecx, edx;
4384                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4385                                     &size, &offset, &ecx, &edx);
4386                         if (xfeature_nr == XFEATURE_PKRU)
4387                                 memcpy(&vcpu->arch.pkru, src + offset,
4388                                        sizeof(vcpu->arch.pkru));
4389                         else
4390                                 memcpy(dest, src + offset, size);
4391                 }
4392
4393                 valid -= xfeature_mask;
4394         }
4395 }
4396
4397 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4398                                          struct kvm_xsave *guest_xsave)
4399 {
4400         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4401                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4402                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4403         } else {
4404                 memcpy(guest_xsave->region,
4405                         &vcpu->arch.guest_fpu->state.fxsave,
4406                         sizeof(struct fxregs_state));
4407                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4408                         XFEATURE_MASK_FPSSE;
4409         }
4410 }
4411
4412 #define XSAVE_MXCSR_OFFSET 24
4413
4414 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4415                                         struct kvm_xsave *guest_xsave)
4416 {
4417         u64 xstate_bv =
4418                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4419         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4420
4421         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4422                 /*
4423                  * Here we allow setting states that are not present in
4424                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4425                  * with old userspace.
4426                  */
4427                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4428                         return -EINVAL;
4429                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4430         } else {
4431                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4432                         mxcsr & ~mxcsr_feature_mask)
4433                         return -EINVAL;
4434                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4435                         guest_xsave->region, sizeof(struct fxregs_state));
4436         }
4437         return 0;
4438 }
4439
4440 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4441                                         struct kvm_xcrs *guest_xcrs)
4442 {
4443         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4444                 guest_xcrs->nr_xcrs = 0;
4445                 return;
4446         }
4447
4448         guest_xcrs->nr_xcrs = 1;
4449         guest_xcrs->flags = 0;
4450         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4451         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4452 }
4453
4454 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4455                                        struct kvm_xcrs *guest_xcrs)
4456 {
4457         int i, r = 0;
4458
4459         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4460                 return -EINVAL;
4461
4462         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4463                 return -EINVAL;
4464
4465         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4466                 /* Only support XCR0 currently */
4467                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4468                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4469                                 guest_xcrs->xcrs[i].value);
4470                         break;
4471                 }
4472         if (r)
4473                 r = -EINVAL;
4474         return r;
4475 }
4476
4477 /*
4478  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4479  * stopped by the hypervisor.  This function will be called from the host only.
4480  * EINVAL is returned when the host attempts to set the flag for a guest that
4481  * does not support pv clocks.
4482  */
4483 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4484 {
4485         if (!vcpu->arch.pv_time_enabled)
4486                 return -EINVAL;
4487         vcpu->arch.pvclock_set_guest_stopped_request = true;
4488         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4489         return 0;
4490 }
4491
4492 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4493                                      struct kvm_enable_cap *cap)
4494 {
4495         int r;
4496         uint16_t vmcs_version;
4497         void __user *user_ptr;
4498
4499         if (cap->flags)
4500                 return -EINVAL;
4501
4502         switch (cap->cap) {
4503         case KVM_CAP_HYPERV_SYNIC2:
4504                 if (cap->args[0])
4505                         return -EINVAL;
4506                 fallthrough;
4507
4508         case KVM_CAP_HYPERV_SYNIC:
4509                 if (!irqchip_in_kernel(vcpu->kvm))
4510                         return -EINVAL;
4511                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4512                                              KVM_CAP_HYPERV_SYNIC2);
4513         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4514                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4515                         return -ENOTTY;
4516                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4517                 if (!r) {
4518                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4519                         if (copy_to_user(user_ptr, &vmcs_version,
4520                                          sizeof(vmcs_version)))
4521                                 r = -EFAULT;
4522                 }
4523                 return r;
4524         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4525                 if (!kvm_x86_ops.enable_direct_tlbflush)
4526                         return -ENOTTY;
4527
4528                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4529
4530         default:
4531                 return -EINVAL;
4532         }
4533 }
4534
4535 long kvm_arch_vcpu_ioctl(struct file *filp,
4536                          unsigned int ioctl, unsigned long arg)
4537 {
4538         struct kvm_vcpu *vcpu = filp->private_data;
4539         void __user *argp = (void __user *)arg;
4540         int r;
4541         union {
4542                 struct kvm_lapic_state *lapic;
4543                 struct kvm_xsave *xsave;
4544                 struct kvm_xcrs *xcrs;
4545                 void *buffer;
4546         } u;
4547
4548         vcpu_load(vcpu);
4549
4550         u.buffer = NULL;
4551         switch (ioctl) {
4552         case KVM_GET_LAPIC: {
4553                 r = -EINVAL;
4554                 if (!lapic_in_kernel(vcpu))
4555                         goto out;
4556                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4557                                 GFP_KERNEL_ACCOUNT);
4558
4559                 r = -ENOMEM;
4560                 if (!u.lapic)
4561                         goto out;
4562                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4563                 if (r)
4564                         goto out;
4565                 r = -EFAULT;
4566                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4567                         goto out;
4568                 r = 0;
4569                 break;
4570         }
4571         case KVM_SET_LAPIC: {
4572                 r = -EINVAL;
4573                 if (!lapic_in_kernel(vcpu))
4574                         goto out;
4575                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4576                 if (IS_ERR(u.lapic)) {
4577                         r = PTR_ERR(u.lapic);
4578                         goto out_nofree;
4579                 }
4580
4581                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4582                 break;
4583         }
4584         case KVM_INTERRUPT: {
4585                 struct kvm_interrupt irq;
4586
4587                 r = -EFAULT;
4588                 if (copy_from_user(&irq, argp, sizeof(irq)))
4589                         goto out;
4590                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4591                 break;
4592         }
4593         case KVM_NMI: {
4594                 r = kvm_vcpu_ioctl_nmi(vcpu);
4595                 break;
4596         }
4597         case KVM_SMI: {
4598                 r = kvm_vcpu_ioctl_smi(vcpu);
4599                 break;
4600         }
4601         case KVM_SET_CPUID: {
4602                 struct kvm_cpuid __user *cpuid_arg = argp;
4603                 struct kvm_cpuid cpuid;
4604
4605                 r = -EFAULT;
4606                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4607                         goto out;
4608                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4609                 break;
4610         }
4611         case KVM_SET_CPUID2: {
4612                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4613                 struct kvm_cpuid2 cpuid;
4614
4615                 r = -EFAULT;
4616                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4617                         goto out;
4618                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4619                                               cpuid_arg->entries);
4620                 break;
4621         }
4622         case KVM_GET_CPUID2: {
4623                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4624                 struct kvm_cpuid2 cpuid;
4625
4626                 r = -EFAULT;
4627                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4628                         goto out;
4629                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4630                                               cpuid_arg->entries);
4631                 if (r)
4632                         goto out;
4633                 r = -EFAULT;
4634                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4635                         goto out;
4636                 r = 0;
4637                 break;
4638         }
4639         case KVM_GET_MSRS: {
4640                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4641                 r = msr_io(vcpu, argp, do_get_msr, 1);
4642                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4643                 break;
4644         }
4645         case KVM_SET_MSRS: {
4646                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4647                 r = msr_io(vcpu, argp, do_set_msr, 0);
4648                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4649                 break;
4650         }
4651         case KVM_TPR_ACCESS_REPORTING: {
4652                 struct kvm_tpr_access_ctl tac;
4653
4654                 r = -EFAULT;
4655                 if (copy_from_user(&tac, argp, sizeof(tac)))
4656                         goto out;
4657                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4658                 if (r)
4659                         goto out;
4660                 r = -EFAULT;
4661                 if (copy_to_user(argp, &tac, sizeof(tac)))
4662                         goto out;
4663                 r = 0;
4664                 break;
4665         };
4666         case KVM_SET_VAPIC_ADDR: {
4667                 struct kvm_vapic_addr va;
4668                 int idx;
4669
4670                 r = -EINVAL;
4671                 if (!lapic_in_kernel(vcpu))
4672                         goto out;
4673                 r = -EFAULT;
4674                 if (copy_from_user(&va, argp, sizeof(va)))
4675                         goto out;
4676                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4677                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4678                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4679                 break;
4680         }
4681         case KVM_X86_SETUP_MCE: {
4682                 u64 mcg_cap;
4683
4684                 r = -EFAULT;
4685                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4686                         goto out;
4687                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4688                 break;
4689         }
4690         case KVM_X86_SET_MCE: {
4691                 struct kvm_x86_mce mce;
4692
4693                 r = -EFAULT;
4694                 if (copy_from_user(&mce, argp, sizeof(mce)))
4695                         goto out;
4696                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4697                 break;
4698         }
4699         case KVM_GET_VCPU_EVENTS: {
4700                 struct kvm_vcpu_events events;
4701
4702                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4703
4704                 r = -EFAULT;
4705                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4706                         break;
4707                 r = 0;
4708                 break;
4709         }
4710         case KVM_SET_VCPU_EVENTS: {
4711                 struct kvm_vcpu_events events;
4712
4713                 r = -EFAULT;
4714                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4715                         break;
4716
4717                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4718                 break;
4719         }
4720         case KVM_GET_DEBUGREGS: {
4721                 struct kvm_debugregs dbgregs;
4722
4723                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4724
4725                 r = -EFAULT;
4726                 if (copy_to_user(argp, &dbgregs,
4727                                  sizeof(struct kvm_debugregs)))
4728                         break;
4729                 r = 0;
4730                 break;
4731         }
4732         case KVM_SET_DEBUGREGS: {
4733                 struct kvm_debugregs dbgregs;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&dbgregs, argp,
4737                                    sizeof(struct kvm_debugregs)))
4738                         break;
4739
4740                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4741                 break;
4742         }
4743         case KVM_GET_XSAVE: {
4744                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4745                 r = -ENOMEM;
4746                 if (!u.xsave)
4747                         break;
4748
4749                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4750
4751                 r = -EFAULT;
4752                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4753                         break;
4754                 r = 0;
4755                 break;
4756         }
4757         case KVM_SET_XSAVE: {
4758                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4759                 if (IS_ERR(u.xsave)) {
4760                         r = PTR_ERR(u.xsave);
4761                         goto out_nofree;
4762                 }
4763
4764                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4765                 break;
4766         }
4767         case KVM_GET_XCRS: {
4768                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4769                 r = -ENOMEM;
4770                 if (!u.xcrs)
4771                         break;
4772
4773                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4774
4775                 r = -EFAULT;
4776                 if (copy_to_user(argp, u.xcrs,
4777                                  sizeof(struct kvm_xcrs)))
4778                         break;
4779                 r = 0;
4780                 break;
4781         }
4782         case KVM_SET_XCRS: {
4783                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4784                 if (IS_ERR(u.xcrs)) {
4785                         r = PTR_ERR(u.xcrs);
4786                         goto out_nofree;
4787                 }
4788
4789                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4790                 break;
4791         }
4792         case KVM_SET_TSC_KHZ: {
4793                 u32 user_tsc_khz;
4794
4795                 r = -EINVAL;
4796                 user_tsc_khz = (u32)arg;
4797
4798                 if (kvm_has_tsc_control &&
4799                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4800                         goto out;
4801
4802                 if (user_tsc_khz == 0)
4803                         user_tsc_khz = tsc_khz;
4804
4805                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4806                         r = 0;
4807
4808                 goto out;
4809         }
4810         case KVM_GET_TSC_KHZ: {
4811                 r = vcpu->arch.virtual_tsc_khz;
4812                 goto out;
4813         }
4814         case KVM_KVMCLOCK_CTRL: {
4815                 r = kvm_set_guest_paused(vcpu);
4816                 goto out;
4817         }
4818         case KVM_ENABLE_CAP: {
4819                 struct kvm_enable_cap cap;
4820
4821                 r = -EFAULT;
4822                 if (copy_from_user(&cap, argp, sizeof(cap)))
4823                         goto out;
4824                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4825                 break;
4826         }
4827         case KVM_GET_NESTED_STATE: {
4828                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4829                 u32 user_data_size;
4830
4831                 r = -EINVAL;
4832                 if (!kvm_x86_ops.nested_ops->get_state)
4833                         break;
4834
4835                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4836                 r = -EFAULT;
4837                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4838                         break;
4839
4840                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4841                                                      user_data_size);
4842                 if (r < 0)
4843                         break;
4844
4845                 if (r > user_data_size) {
4846                         if (put_user(r, &user_kvm_nested_state->size))
4847                                 r = -EFAULT;
4848                         else
4849                                 r = -E2BIG;
4850                         break;
4851                 }
4852
4853                 r = 0;
4854                 break;
4855         }
4856         case KVM_SET_NESTED_STATE: {
4857                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4858                 struct kvm_nested_state kvm_state;
4859                 int idx;
4860
4861                 r = -EINVAL;
4862                 if (!kvm_x86_ops.nested_ops->set_state)
4863                         break;
4864
4865                 r = -EFAULT;
4866                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4867                         break;
4868
4869                 r = -EINVAL;
4870                 if (kvm_state.size < sizeof(kvm_state))
4871                         break;
4872
4873                 if (kvm_state.flags &
4874                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4875                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4876                       | KVM_STATE_NESTED_GIF_SET))
4877                         break;
4878
4879                 /* nested_run_pending implies guest_mode.  */
4880                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4881                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4882                         break;
4883
4884                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4885                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4886                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4887                 break;
4888         }
4889         case KVM_GET_SUPPORTED_HV_CPUID: {
4890                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4891                 struct kvm_cpuid2 cpuid;
4892
4893                 r = -EFAULT;
4894                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4895                         goto out;
4896
4897                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4898                                                 cpuid_arg->entries);
4899                 if (r)
4900                         goto out;
4901
4902                 r = -EFAULT;
4903                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4904                         goto out;
4905                 r = 0;
4906                 break;
4907         }
4908         default:
4909                 r = -EINVAL;
4910         }
4911 out:
4912         kfree(u.buffer);
4913 out_nofree:
4914         vcpu_put(vcpu);
4915         return r;
4916 }
4917
4918 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4919 {
4920         return VM_FAULT_SIGBUS;
4921 }
4922
4923 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4924 {
4925         int ret;
4926
4927         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4928                 return -EINVAL;
4929         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
4930         return ret;
4931 }
4932
4933 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4934                                               u64 ident_addr)
4935 {
4936         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
4937 }
4938
4939 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4940                                          unsigned long kvm_nr_mmu_pages)
4941 {
4942         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4943                 return -EINVAL;
4944
4945         mutex_lock(&kvm->slots_lock);
4946
4947         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4948         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4949
4950         mutex_unlock(&kvm->slots_lock);
4951         return 0;
4952 }
4953
4954 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4955 {
4956         return kvm->arch.n_max_mmu_pages;
4957 }
4958
4959 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4960 {
4961         struct kvm_pic *pic = kvm->arch.vpic;
4962         int r;
4963
4964         r = 0;
4965         switch (chip->chip_id) {
4966         case KVM_IRQCHIP_PIC_MASTER:
4967                 memcpy(&chip->chip.pic, &pic->pics[0],
4968                         sizeof(struct kvm_pic_state));
4969                 break;
4970         case KVM_IRQCHIP_PIC_SLAVE:
4971                 memcpy(&chip->chip.pic, &pic->pics[1],
4972                         sizeof(struct kvm_pic_state));
4973                 break;
4974         case KVM_IRQCHIP_IOAPIC:
4975                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4976                 break;
4977         default:
4978                 r = -EINVAL;
4979                 break;
4980         }
4981         return r;
4982 }
4983
4984 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4985 {
4986         struct kvm_pic *pic = kvm->arch.vpic;
4987         int r;
4988
4989         r = 0;
4990         switch (chip->chip_id) {
4991         case KVM_IRQCHIP_PIC_MASTER:
4992                 spin_lock(&pic->lock);
4993                 memcpy(&pic->pics[0], &chip->chip.pic,
4994                         sizeof(struct kvm_pic_state));
4995                 spin_unlock(&pic->lock);
4996                 break;
4997         case KVM_IRQCHIP_PIC_SLAVE:
4998                 spin_lock(&pic->lock);
4999                 memcpy(&pic->pics[1], &chip->chip.pic,
5000                         sizeof(struct kvm_pic_state));
5001                 spin_unlock(&pic->lock);
5002                 break;
5003         case KVM_IRQCHIP_IOAPIC:
5004                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5005                 break;
5006         default:
5007                 r = -EINVAL;
5008                 break;
5009         }
5010         kvm_pic_update_irq(pic);
5011         return r;
5012 }
5013
5014 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5015 {
5016         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5017
5018         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5019
5020         mutex_lock(&kps->lock);
5021         memcpy(ps, &kps->channels, sizeof(*ps));
5022         mutex_unlock(&kps->lock);
5023         return 0;
5024 }
5025
5026 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5027 {
5028         int i;
5029         struct kvm_pit *pit = kvm->arch.vpit;
5030
5031         mutex_lock(&pit->pit_state.lock);
5032         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5033         for (i = 0; i < 3; i++)
5034                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5035         mutex_unlock(&pit->pit_state.lock);
5036         return 0;
5037 }
5038
5039 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5040 {
5041         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5042         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5043                 sizeof(ps->channels));
5044         ps->flags = kvm->arch.vpit->pit_state.flags;
5045         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5046         memset(&ps->reserved, 0, sizeof(ps->reserved));
5047         return 0;
5048 }
5049
5050 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5051 {
5052         int start = 0;
5053         int i;
5054         u32 prev_legacy, cur_legacy;
5055         struct kvm_pit *pit = kvm->arch.vpit;
5056
5057         mutex_lock(&pit->pit_state.lock);
5058         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5059         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5060         if (!prev_legacy && cur_legacy)
5061                 start = 1;
5062         memcpy(&pit->pit_state.channels, &ps->channels,
5063                sizeof(pit->pit_state.channels));
5064         pit->pit_state.flags = ps->flags;
5065         for (i = 0; i < 3; i++)
5066                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5067                                    start && i == 0);
5068         mutex_unlock(&pit->pit_state.lock);
5069         return 0;
5070 }
5071
5072 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5073                                  struct kvm_reinject_control *control)
5074 {
5075         struct kvm_pit *pit = kvm->arch.vpit;
5076
5077         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5078          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5079          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5080          */
5081         mutex_lock(&pit->pit_state.lock);
5082         kvm_pit_set_reinject(pit, control->pit_reinject);
5083         mutex_unlock(&pit->pit_state.lock);
5084
5085         return 0;
5086 }
5087
5088 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5089 {
5090         /*
5091          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5092          */
5093         if (kvm_x86_ops.flush_log_dirty)
5094                 kvm_x86_ops.flush_log_dirty(kvm);
5095 }
5096
5097 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5098                         bool line_status)
5099 {
5100         if (!irqchip_in_kernel(kvm))
5101                 return -ENXIO;
5102
5103         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5104                                         irq_event->irq, irq_event->level,
5105                                         line_status);
5106         return 0;
5107 }
5108
5109 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5110                             struct kvm_enable_cap *cap)
5111 {
5112         int r;
5113
5114         if (cap->flags)
5115                 return -EINVAL;
5116
5117         switch (cap->cap) {
5118         case KVM_CAP_DISABLE_QUIRKS:
5119                 kvm->arch.disabled_quirks = cap->args[0];
5120                 r = 0;
5121                 break;
5122         case KVM_CAP_SPLIT_IRQCHIP: {
5123                 mutex_lock(&kvm->lock);
5124                 r = -EINVAL;
5125                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5126                         goto split_irqchip_unlock;
5127                 r = -EEXIST;
5128                 if (irqchip_in_kernel(kvm))
5129                         goto split_irqchip_unlock;
5130                 if (kvm->created_vcpus)
5131                         goto split_irqchip_unlock;
5132                 r = kvm_setup_empty_irq_routing(kvm);
5133                 if (r)
5134                         goto split_irqchip_unlock;
5135                 /* Pairs with irqchip_in_kernel. */
5136                 smp_wmb();
5137                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5138                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5139                 r = 0;
5140 split_irqchip_unlock:
5141                 mutex_unlock(&kvm->lock);
5142                 break;
5143         }
5144         case KVM_CAP_X2APIC_API:
5145                 r = -EINVAL;
5146                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5147                         break;
5148
5149                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5150                         kvm->arch.x2apic_format = true;
5151                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5152                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5153
5154                 r = 0;
5155                 break;
5156         case KVM_CAP_X86_DISABLE_EXITS:
5157                 r = -EINVAL;
5158                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5159                         break;
5160
5161                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5162                         kvm_can_mwait_in_guest())
5163                         kvm->arch.mwait_in_guest = true;
5164                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5165                         kvm->arch.hlt_in_guest = true;
5166                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5167                         kvm->arch.pause_in_guest = true;
5168                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5169                         kvm->arch.cstate_in_guest = true;
5170                 r = 0;
5171                 break;
5172         case KVM_CAP_MSR_PLATFORM_INFO:
5173                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5174                 r = 0;
5175                 break;
5176         case KVM_CAP_EXCEPTION_PAYLOAD:
5177                 kvm->arch.exception_payload_enabled = cap->args[0];
5178                 r = 0;
5179                 break;
5180         case KVM_CAP_X86_USER_SPACE_MSR:
5181                 kvm->arch.user_space_msr_mask = cap->args[0];
5182                 r = 0;
5183                 break;
5184         default:
5185                 r = -EINVAL;
5186                 break;
5187         }
5188         return r;
5189 }
5190
5191 static void kvm_clear_msr_filter(struct kvm *kvm)
5192 {
5193         u32 i;
5194         u32 count = kvm->arch.msr_filter.count;
5195         struct msr_bitmap_range ranges[16];
5196
5197         mutex_lock(&kvm->lock);
5198         kvm->arch.msr_filter.count = 0;
5199         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5200         mutex_unlock(&kvm->lock);
5201         synchronize_srcu(&kvm->srcu);
5202
5203         for (i = 0; i < count; i++)
5204                 kfree(ranges[i].bitmap);
5205 }
5206
5207 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5208 {
5209         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5210         struct msr_bitmap_range range;
5211         unsigned long *bitmap = NULL;
5212         size_t bitmap_size;
5213         int r;
5214
5215         if (!user_range->nmsrs)
5216                 return 0;
5217
5218         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5219         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5220                 return -EINVAL;
5221
5222         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5223         if (IS_ERR(bitmap))
5224                 return PTR_ERR(bitmap);
5225
5226         range = (struct msr_bitmap_range) {
5227                 .flags = user_range->flags,
5228                 .base = user_range->base,
5229                 .nmsrs = user_range->nmsrs,
5230                 .bitmap = bitmap,
5231         };
5232
5233         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5234                 r = -EINVAL;
5235                 goto err;
5236         }
5237
5238         if (!range.flags) {
5239                 r = -EINVAL;
5240                 goto err;
5241         }
5242
5243         /* Everything ok, add this range identifier to our global pool */
5244         ranges[kvm->arch.msr_filter.count] = range;
5245         /* Make sure we filled the array before we tell anyone to walk it */
5246         smp_wmb();
5247         kvm->arch.msr_filter.count++;
5248
5249         return 0;
5250 err:
5251         kfree(bitmap);
5252         return r;
5253 }
5254
5255 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5256 {
5257         struct kvm_msr_filter __user *user_msr_filter = argp;
5258         struct kvm_msr_filter filter;
5259         bool default_allow;
5260         int r = 0;
5261         u32 i;
5262
5263         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5264                 return -EFAULT;
5265
5266         kvm_clear_msr_filter(kvm);
5267
5268         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5269         kvm->arch.msr_filter.default_allow = default_allow;
5270
5271         /*
5272          * Protect from concurrent calls to this function that could trigger
5273          * a TOCTOU violation on kvm->arch.msr_filter.count.
5274          */
5275         mutex_lock(&kvm->lock);
5276         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5277                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5278                 if (r)
5279                         break;
5280         }
5281
5282         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5283         mutex_unlock(&kvm->lock);
5284
5285         return r;
5286 }
5287
5288 long kvm_arch_vm_ioctl(struct file *filp,
5289                        unsigned int ioctl, unsigned long arg)
5290 {
5291         struct kvm *kvm = filp->private_data;
5292         void __user *argp = (void __user *)arg;
5293         int r = -ENOTTY;
5294         /*
5295          * This union makes it completely explicit to gcc-3.x
5296          * that these two variables' stack usage should be
5297          * combined, not added together.
5298          */
5299         union {
5300                 struct kvm_pit_state ps;
5301                 struct kvm_pit_state2 ps2;
5302                 struct kvm_pit_config pit_config;
5303         } u;
5304
5305         switch (ioctl) {
5306         case KVM_SET_TSS_ADDR:
5307                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5308                 break;
5309         case KVM_SET_IDENTITY_MAP_ADDR: {
5310                 u64 ident_addr;
5311
5312                 mutex_lock(&kvm->lock);
5313                 r = -EINVAL;
5314                 if (kvm->created_vcpus)
5315                         goto set_identity_unlock;
5316                 r = -EFAULT;
5317                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5318                         goto set_identity_unlock;
5319                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5320 set_identity_unlock:
5321                 mutex_unlock(&kvm->lock);
5322                 break;
5323         }
5324         case KVM_SET_NR_MMU_PAGES:
5325                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5326                 break;
5327         case KVM_GET_NR_MMU_PAGES:
5328                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5329                 break;
5330         case KVM_CREATE_IRQCHIP: {
5331                 mutex_lock(&kvm->lock);
5332
5333                 r = -EEXIST;
5334                 if (irqchip_in_kernel(kvm))
5335                         goto create_irqchip_unlock;
5336
5337                 r = -EINVAL;
5338                 if (kvm->created_vcpus)
5339                         goto create_irqchip_unlock;
5340
5341                 r = kvm_pic_init(kvm);
5342                 if (r)
5343                         goto create_irqchip_unlock;
5344
5345                 r = kvm_ioapic_init(kvm);
5346                 if (r) {
5347                         kvm_pic_destroy(kvm);
5348                         goto create_irqchip_unlock;
5349                 }
5350
5351                 r = kvm_setup_default_irq_routing(kvm);
5352                 if (r) {
5353                         kvm_ioapic_destroy(kvm);
5354                         kvm_pic_destroy(kvm);
5355                         goto create_irqchip_unlock;
5356                 }
5357                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5358                 smp_wmb();
5359                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5360         create_irqchip_unlock:
5361                 mutex_unlock(&kvm->lock);
5362                 break;
5363         }
5364         case KVM_CREATE_PIT:
5365                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5366                 goto create_pit;
5367         case KVM_CREATE_PIT2:
5368                 r = -EFAULT;
5369                 if (copy_from_user(&u.pit_config, argp,
5370                                    sizeof(struct kvm_pit_config)))
5371                         goto out;
5372         create_pit:
5373                 mutex_lock(&kvm->lock);
5374                 r = -EEXIST;
5375                 if (kvm->arch.vpit)
5376                         goto create_pit_unlock;
5377                 r = -ENOMEM;
5378                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5379                 if (kvm->arch.vpit)
5380                         r = 0;
5381         create_pit_unlock:
5382                 mutex_unlock(&kvm->lock);
5383                 break;
5384         case KVM_GET_IRQCHIP: {
5385                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5386                 struct kvm_irqchip *chip;
5387
5388                 chip = memdup_user(argp, sizeof(*chip));
5389                 if (IS_ERR(chip)) {
5390                         r = PTR_ERR(chip);
5391                         goto out;
5392                 }
5393
5394                 r = -ENXIO;
5395                 if (!irqchip_kernel(kvm))
5396                         goto get_irqchip_out;
5397                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5398                 if (r)
5399                         goto get_irqchip_out;
5400                 r = -EFAULT;
5401                 if (copy_to_user(argp, chip, sizeof(*chip)))
5402                         goto get_irqchip_out;
5403                 r = 0;
5404         get_irqchip_out:
5405                 kfree(chip);
5406                 break;
5407         }
5408         case KVM_SET_IRQCHIP: {
5409                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5410                 struct kvm_irqchip *chip;
5411
5412                 chip = memdup_user(argp, sizeof(*chip));
5413                 if (IS_ERR(chip)) {
5414                         r = PTR_ERR(chip);
5415                         goto out;
5416                 }
5417
5418                 r = -ENXIO;
5419                 if (!irqchip_kernel(kvm))
5420                         goto set_irqchip_out;
5421                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5422         set_irqchip_out:
5423                 kfree(chip);
5424                 break;
5425         }
5426         case KVM_GET_PIT: {
5427                 r = -EFAULT;
5428                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5429                         goto out;
5430                 r = -ENXIO;
5431                 if (!kvm->arch.vpit)
5432                         goto out;
5433                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5434                 if (r)
5435                         goto out;
5436                 r = -EFAULT;
5437                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5438                         goto out;
5439                 r = 0;
5440                 break;
5441         }
5442         case KVM_SET_PIT: {
5443                 r = -EFAULT;
5444                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5445                         goto out;
5446                 mutex_lock(&kvm->lock);
5447                 r = -ENXIO;
5448                 if (!kvm->arch.vpit)
5449                         goto set_pit_out;
5450                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5451 set_pit_out:
5452                 mutex_unlock(&kvm->lock);
5453                 break;
5454         }
5455         case KVM_GET_PIT2: {
5456                 r = -ENXIO;
5457                 if (!kvm->arch.vpit)
5458                         goto out;
5459                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5460                 if (r)
5461                         goto out;
5462                 r = -EFAULT;
5463                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5464                         goto out;
5465                 r = 0;
5466                 break;
5467         }
5468         case KVM_SET_PIT2: {
5469                 r = -EFAULT;
5470                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5471                         goto out;
5472                 mutex_lock(&kvm->lock);
5473                 r = -ENXIO;
5474                 if (!kvm->arch.vpit)
5475                         goto set_pit2_out;
5476                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5477 set_pit2_out:
5478                 mutex_unlock(&kvm->lock);
5479                 break;
5480         }
5481         case KVM_REINJECT_CONTROL: {
5482                 struct kvm_reinject_control control;
5483                 r =  -EFAULT;
5484                 if (copy_from_user(&control, argp, sizeof(control)))
5485                         goto out;
5486                 r = -ENXIO;
5487                 if (!kvm->arch.vpit)
5488                         goto out;
5489                 r = kvm_vm_ioctl_reinject(kvm, &control);
5490                 break;
5491         }
5492         case KVM_SET_BOOT_CPU_ID:
5493                 r = 0;
5494                 mutex_lock(&kvm->lock);
5495                 if (kvm->created_vcpus)
5496                         r = -EBUSY;
5497                 else
5498                         kvm->arch.bsp_vcpu_id = arg;
5499                 mutex_unlock(&kvm->lock);
5500                 break;
5501         case KVM_XEN_HVM_CONFIG: {
5502                 struct kvm_xen_hvm_config xhc;
5503                 r = -EFAULT;
5504                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5505                         goto out;
5506                 r = -EINVAL;
5507                 if (xhc.flags)
5508                         goto out;
5509                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5510                 r = 0;
5511                 break;
5512         }
5513         case KVM_SET_CLOCK: {
5514                 struct kvm_clock_data user_ns;
5515                 u64 now_ns;
5516
5517                 r = -EFAULT;
5518                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5519                         goto out;
5520
5521                 r = -EINVAL;
5522                 if (user_ns.flags)
5523                         goto out;
5524
5525                 r = 0;
5526                 /*
5527                  * TODO: userspace has to take care of races with VCPU_RUN, so
5528                  * kvm_gen_update_masterclock() can be cut down to locked
5529                  * pvclock_update_vm_gtod_copy().
5530                  */
5531                 kvm_gen_update_masterclock(kvm);
5532                 now_ns = get_kvmclock_ns(kvm);
5533                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5534                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5535                 break;
5536         }
5537         case KVM_GET_CLOCK: {
5538                 struct kvm_clock_data user_ns;
5539                 u64 now_ns;
5540
5541                 now_ns = get_kvmclock_ns(kvm);
5542                 user_ns.clock = now_ns;
5543                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5544                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5545
5546                 r = -EFAULT;
5547                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5548                         goto out;
5549                 r = 0;
5550                 break;
5551         }
5552         case KVM_MEMORY_ENCRYPT_OP: {
5553                 r = -ENOTTY;
5554                 if (kvm_x86_ops.mem_enc_op)
5555                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5556                 break;
5557         }
5558         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5559                 struct kvm_enc_region region;
5560
5561                 r = -EFAULT;
5562                 if (copy_from_user(&region, argp, sizeof(region)))
5563                         goto out;
5564
5565                 r = -ENOTTY;
5566                 if (kvm_x86_ops.mem_enc_reg_region)
5567                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5568                 break;
5569         }
5570         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5571                 struct kvm_enc_region region;
5572
5573                 r = -EFAULT;
5574                 if (copy_from_user(&region, argp, sizeof(region)))
5575                         goto out;
5576
5577                 r = -ENOTTY;
5578                 if (kvm_x86_ops.mem_enc_unreg_region)
5579                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5580                 break;
5581         }
5582         case KVM_HYPERV_EVENTFD: {
5583                 struct kvm_hyperv_eventfd hvevfd;
5584
5585                 r = -EFAULT;
5586                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5587                         goto out;
5588                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5589                 break;
5590         }
5591         case KVM_SET_PMU_EVENT_FILTER:
5592                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5593                 break;
5594         case KVM_X86_SET_MSR_FILTER:
5595                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5596                 break;
5597         default:
5598                 r = -ENOTTY;
5599         }
5600 out:
5601         return r;
5602 }
5603
5604 static void kvm_init_msr_list(void)
5605 {
5606         struct x86_pmu_capability x86_pmu;
5607         u32 dummy[2];
5608         unsigned i;
5609
5610         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5611                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5612
5613         perf_get_x86_pmu_capability(&x86_pmu);
5614
5615         num_msrs_to_save = 0;
5616         num_emulated_msrs = 0;
5617         num_msr_based_features = 0;
5618
5619         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5620                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5621                         continue;
5622
5623                 /*
5624                  * Even MSRs that are valid in the host may not be exposed
5625                  * to the guests in some cases.
5626                  */
5627                 switch (msrs_to_save_all[i]) {
5628                 case MSR_IA32_BNDCFGS:
5629                         if (!kvm_mpx_supported())
5630                                 continue;
5631                         break;
5632                 case MSR_TSC_AUX:
5633                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5634                                 continue;
5635                         break;
5636                 case MSR_IA32_UMWAIT_CONTROL:
5637                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5638                                 continue;
5639                         break;
5640                 case MSR_IA32_RTIT_CTL:
5641                 case MSR_IA32_RTIT_STATUS:
5642                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5643                                 continue;
5644                         break;
5645                 case MSR_IA32_RTIT_CR3_MATCH:
5646                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5647                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5648                                 continue;
5649                         break;
5650                 case MSR_IA32_RTIT_OUTPUT_BASE:
5651                 case MSR_IA32_RTIT_OUTPUT_MASK:
5652                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5653                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5654                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5655                                 continue;
5656                         break;
5657                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5658                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5659                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5660                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5661                                 continue;
5662                         break;
5663                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5664                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5665                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5666                                 continue;
5667                         break;
5668                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5669                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5670                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5671                                 continue;
5672                         break;
5673                 default:
5674                         break;
5675                 }
5676
5677                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5678         }
5679
5680         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5681                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5682                         continue;
5683
5684                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5685         }
5686
5687         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5688                 struct kvm_msr_entry msr;
5689
5690                 msr.index = msr_based_features_all[i];
5691                 if (kvm_get_msr_feature(&msr))
5692                         continue;
5693
5694                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5695         }
5696 }
5697
5698 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5699                            const void *v)
5700 {
5701         int handled = 0;
5702         int n;
5703
5704         do {
5705                 n = min(len, 8);
5706                 if (!(lapic_in_kernel(vcpu) &&
5707                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5708                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5709                         break;
5710                 handled += n;
5711                 addr += n;
5712                 len -= n;
5713                 v += n;
5714         } while (len);
5715
5716         return handled;
5717 }
5718
5719 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5720 {
5721         int handled = 0;
5722         int n;
5723
5724         do {
5725                 n = min(len, 8);
5726                 if (!(lapic_in_kernel(vcpu) &&
5727                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5728                                          addr, n, v))
5729                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5730                         break;
5731                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5732                 handled += n;
5733                 addr += n;
5734                 len -= n;
5735                 v += n;
5736         } while (len);
5737
5738         return handled;
5739 }
5740
5741 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5742                         struct kvm_segment *var, int seg)
5743 {
5744         kvm_x86_ops.set_segment(vcpu, var, seg);
5745 }
5746
5747 void kvm_get_segment(struct kvm_vcpu *vcpu,
5748                      struct kvm_segment *var, int seg)
5749 {
5750         kvm_x86_ops.get_segment(vcpu, var, seg);
5751 }
5752
5753 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5754                            struct x86_exception *exception)
5755 {
5756         gpa_t t_gpa;
5757
5758         BUG_ON(!mmu_is_nested(vcpu));
5759
5760         /* NPT walks are always user-walks */
5761         access |= PFERR_USER_MASK;
5762         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5763
5764         return t_gpa;
5765 }
5766
5767 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5768                               struct x86_exception *exception)
5769 {
5770         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5771         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5772 }
5773
5774  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5775                                 struct x86_exception *exception)
5776 {
5777         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5778         access |= PFERR_FETCH_MASK;
5779         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5780 }
5781
5782 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5783                                struct x86_exception *exception)
5784 {
5785         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5786         access |= PFERR_WRITE_MASK;
5787         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5788 }
5789
5790 /* uses this to access any guest's mapped memory without checking CPL */
5791 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5792                                 struct x86_exception *exception)
5793 {
5794         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5795 }
5796
5797 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5798                                       struct kvm_vcpu *vcpu, u32 access,
5799                                       struct x86_exception *exception)
5800 {
5801         void *data = val;
5802         int r = X86EMUL_CONTINUE;
5803
5804         while (bytes) {
5805                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5806                                                             exception);
5807                 unsigned offset = addr & (PAGE_SIZE-1);
5808                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5809                 int ret;
5810
5811                 if (gpa == UNMAPPED_GVA)
5812                         return X86EMUL_PROPAGATE_FAULT;
5813                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5814                                                offset, toread);
5815                 if (ret < 0) {
5816                         r = X86EMUL_IO_NEEDED;
5817                         goto out;
5818                 }
5819
5820                 bytes -= toread;
5821                 data += toread;
5822                 addr += toread;
5823         }
5824 out:
5825         return r;
5826 }
5827
5828 /* used for instruction fetching */
5829 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5830                                 gva_t addr, void *val, unsigned int bytes,
5831                                 struct x86_exception *exception)
5832 {
5833         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5834         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5835         unsigned offset;
5836         int ret;
5837
5838         /* Inline kvm_read_guest_virt_helper for speed.  */
5839         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5840                                                     exception);
5841         if (unlikely(gpa == UNMAPPED_GVA))
5842                 return X86EMUL_PROPAGATE_FAULT;
5843
5844         offset = addr & (PAGE_SIZE-1);
5845         if (WARN_ON(offset + bytes > PAGE_SIZE))
5846                 bytes = (unsigned)PAGE_SIZE - offset;
5847         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5848                                        offset, bytes);
5849         if (unlikely(ret < 0))
5850                 return X86EMUL_IO_NEEDED;
5851
5852         return X86EMUL_CONTINUE;
5853 }
5854
5855 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5856                                gva_t addr, void *val, unsigned int bytes,
5857                                struct x86_exception *exception)
5858 {
5859         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5860
5861         /*
5862          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5863          * is returned, but our callers are not ready for that and they blindly
5864          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5865          * uninitialized kernel stack memory into cr2 and error code.
5866          */
5867         memset(exception, 0, sizeof(*exception));
5868         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5869                                           exception);
5870 }
5871 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5872
5873 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5874                              gva_t addr, void *val, unsigned int bytes,
5875                              struct x86_exception *exception, bool system)
5876 {
5877         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5878         u32 access = 0;
5879
5880         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5881                 access |= PFERR_USER_MASK;
5882
5883         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5884 }
5885
5886 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5887                 unsigned long addr, void *val, unsigned int bytes)
5888 {
5889         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5890         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5891
5892         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5893 }
5894
5895 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5896                                       struct kvm_vcpu *vcpu, u32 access,
5897                                       struct x86_exception *exception)
5898 {
5899         void *data = val;
5900         int r = X86EMUL_CONTINUE;
5901
5902         while (bytes) {
5903                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5904                                                              access,
5905                                                              exception);
5906                 unsigned offset = addr & (PAGE_SIZE-1);
5907                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5908                 int ret;
5909
5910                 if (gpa == UNMAPPED_GVA)
5911                         return X86EMUL_PROPAGATE_FAULT;
5912                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5913                 if (ret < 0) {
5914                         r = X86EMUL_IO_NEEDED;
5915                         goto out;
5916                 }
5917
5918                 bytes -= towrite;
5919                 data += towrite;
5920                 addr += towrite;
5921         }
5922 out:
5923         return r;
5924 }
5925
5926 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5927                               unsigned int bytes, struct x86_exception *exception,
5928                               bool system)
5929 {
5930         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5931         u32 access = PFERR_WRITE_MASK;
5932
5933         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5934                 access |= PFERR_USER_MASK;
5935
5936         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5937                                            access, exception);
5938 }
5939
5940 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5941                                 unsigned int bytes, struct x86_exception *exception)
5942 {
5943         /* kvm_write_guest_virt_system can pull in tons of pages. */
5944         vcpu->arch.l1tf_flush_l1d = true;
5945
5946         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5947                                            PFERR_WRITE_MASK, exception);
5948 }
5949 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5950
5951 int handle_ud(struct kvm_vcpu *vcpu)
5952 {
5953         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
5954         int emul_type = EMULTYPE_TRAP_UD;
5955         char sig[5]; /* ud2; .ascii "kvm" */
5956         struct x86_exception e;
5957
5958         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
5959                 return 1;
5960
5961         if (force_emulation_prefix &&
5962             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5963                                 sig, sizeof(sig), &e) == 0 &&
5964             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
5965                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5966                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5967         }
5968
5969         return kvm_emulate_instruction(vcpu, emul_type);
5970 }
5971 EXPORT_SYMBOL_GPL(handle_ud);
5972
5973 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5974                             gpa_t gpa, bool write)
5975 {
5976         /* For APIC access vmexit */
5977         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5978                 return 1;
5979
5980         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5981                 trace_vcpu_match_mmio(gva, gpa, write, true);
5982                 return 1;
5983         }
5984
5985         return 0;
5986 }
5987
5988 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5989                                 gpa_t *gpa, struct x86_exception *exception,
5990                                 bool write)
5991 {
5992         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5993                 | (write ? PFERR_WRITE_MASK : 0);
5994
5995         /*
5996          * currently PKRU is only applied to ept enabled guest so
5997          * there is no pkey in EPT page table for L1 guest or EPT
5998          * shadow page table for L2 guest.
5999          */
6000         if (vcpu_match_mmio_gva(vcpu, gva)
6001             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6002                                  vcpu->arch.mmio_access, 0, access)) {
6003                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6004                                         (gva & (PAGE_SIZE - 1));
6005                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6006                 return 1;
6007         }
6008
6009         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6010
6011         if (*gpa == UNMAPPED_GVA)
6012                 return -1;
6013
6014         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6015 }
6016
6017 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6018                         const void *val, int bytes)
6019 {
6020         int ret;
6021
6022         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6023         if (ret < 0)
6024                 return 0;
6025         kvm_page_track_write(vcpu, gpa, val, bytes);
6026         return 1;
6027 }
6028
6029 struct read_write_emulator_ops {
6030         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6031                                   int bytes);
6032         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6033                                   void *val, int bytes);
6034         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6035                                int bytes, void *val);
6036         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6037                                     void *val, int bytes);
6038         bool write;
6039 };
6040
6041 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6042 {
6043         if (vcpu->mmio_read_completed) {
6044                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6045                                vcpu->mmio_fragments[0].gpa, val);
6046                 vcpu->mmio_read_completed = 0;
6047                 return 1;
6048         }
6049
6050         return 0;
6051 }
6052
6053 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6054                         void *val, int bytes)
6055 {
6056         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6057 }
6058
6059 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6060                          void *val, int bytes)
6061 {
6062         return emulator_write_phys(vcpu, gpa, val, bytes);
6063 }
6064
6065 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6066 {
6067         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6068         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6069 }
6070
6071 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6072                           void *val, int bytes)
6073 {
6074         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6075         return X86EMUL_IO_NEEDED;
6076 }
6077
6078 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6079                            void *val, int bytes)
6080 {
6081         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6082
6083         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6084         return X86EMUL_CONTINUE;
6085 }
6086
6087 static const struct read_write_emulator_ops read_emultor = {
6088         .read_write_prepare = read_prepare,
6089         .read_write_emulate = read_emulate,
6090         .read_write_mmio = vcpu_mmio_read,
6091         .read_write_exit_mmio = read_exit_mmio,
6092 };
6093
6094 static const struct read_write_emulator_ops write_emultor = {
6095         .read_write_emulate = write_emulate,
6096         .read_write_mmio = write_mmio,
6097         .read_write_exit_mmio = write_exit_mmio,
6098         .write = true,
6099 };
6100
6101 static int emulator_read_write_onepage(unsigned long addr, void *val,
6102                                        unsigned int bytes,
6103                                        struct x86_exception *exception,
6104                                        struct kvm_vcpu *vcpu,
6105                                        const struct read_write_emulator_ops *ops)
6106 {
6107         gpa_t gpa;
6108         int handled, ret;
6109         bool write = ops->write;
6110         struct kvm_mmio_fragment *frag;
6111         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6112
6113         /*
6114          * If the exit was due to a NPF we may already have a GPA.
6115          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6116          * Note, this cannot be used on string operations since string
6117          * operation using rep will only have the initial GPA from the NPF
6118          * occurred.
6119          */
6120         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6121             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6122                 gpa = ctxt->gpa_val;
6123                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6124         } else {
6125                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6126                 if (ret < 0)
6127                         return X86EMUL_PROPAGATE_FAULT;
6128         }
6129
6130         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6131                 return X86EMUL_CONTINUE;
6132
6133         /*
6134          * Is this MMIO handled locally?
6135          */
6136         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6137         if (handled == bytes)
6138                 return X86EMUL_CONTINUE;
6139
6140         gpa += handled;
6141         bytes -= handled;
6142         val += handled;
6143
6144         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6145         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6146         frag->gpa = gpa;
6147         frag->data = val;
6148         frag->len = bytes;
6149         return X86EMUL_CONTINUE;
6150 }
6151
6152 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6153                         unsigned long addr,
6154                         void *val, unsigned int bytes,
6155                         struct x86_exception *exception,
6156                         const struct read_write_emulator_ops *ops)
6157 {
6158         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6159         gpa_t gpa;
6160         int rc;
6161
6162         if (ops->read_write_prepare &&
6163                   ops->read_write_prepare(vcpu, val, bytes))
6164                 return X86EMUL_CONTINUE;
6165
6166         vcpu->mmio_nr_fragments = 0;
6167
6168         /* Crossing a page boundary? */
6169         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6170                 int now;
6171
6172                 now = -addr & ~PAGE_MASK;
6173                 rc = emulator_read_write_onepage(addr, val, now, exception,
6174                                                  vcpu, ops);
6175
6176                 if (rc != X86EMUL_CONTINUE)
6177                         return rc;
6178                 addr += now;
6179                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6180                         addr = (u32)addr;
6181                 val += now;
6182                 bytes -= now;
6183         }
6184
6185         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6186                                          vcpu, ops);
6187         if (rc != X86EMUL_CONTINUE)
6188                 return rc;
6189
6190         if (!vcpu->mmio_nr_fragments)
6191                 return rc;
6192
6193         gpa = vcpu->mmio_fragments[0].gpa;
6194
6195         vcpu->mmio_needed = 1;
6196         vcpu->mmio_cur_fragment = 0;
6197
6198         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6199         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6200         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6201         vcpu->run->mmio.phys_addr = gpa;
6202
6203         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6204 }
6205
6206 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6207                                   unsigned long addr,
6208                                   void *val,
6209                                   unsigned int bytes,
6210                                   struct x86_exception *exception)
6211 {
6212         return emulator_read_write(ctxt, addr, val, bytes,
6213                                    exception, &read_emultor);
6214 }
6215
6216 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6217                             unsigned long addr,
6218                             const void *val,
6219                             unsigned int bytes,
6220                             struct x86_exception *exception)
6221 {
6222         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6223                                    exception, &write_emultor);
6224 }
6225
6226 #define CMPXCHG_TYPE(t, ptr, old, new) \
6227         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6228
6229 #ifdef CONFIG_X86_64
6230 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6231 #else
6232 #  define CMPXCHG64(ptr, old, new) \
6233         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6234 #endif
6235
6236 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6237                                      unsigned long addr,
6238                                      const void *old,
6239                                      const void *new,
6240                                      unsigned int bytes,
6241                                      struct x86_exception *exception)
6242 {
6243         struct kvm_host_map map;
6244         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6245         u64 page_line_mask;
6246         gpa_t gpa;
6247         char *kaddr;
6248         bool exchanged;
6249
6250         /* guests cmpxchg8b have to be emulated atomically */
6251         if (bytes > 8 || (bytes & (bytes - 1)))
6252                 goto emul_write;
6253
6254         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6255
6256         if (gpa == UNMAPPED_GVA ||
6257             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6258                 goto emul_write;
6259
6260         /*
6261          * Emulate the atomic as a straight write to avoid #AC if SLD is
6262          * enabled in the host and the access splits a cache line.
6263          */
6264         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6265                 page_line_mask = ~(cache_line_size() - 1);
6266         else
6267                 page_line_mask = PAGE_MASK;
6268
6269         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6270                 goto emul_write;
6271
6272         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6273                 goto emul_write;
6274
6275         kaddr = map.hva + offset_in_page(gpa);
6276
6277         switch (bytes) {
6278         case 1:
6279                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6280                 break;
6281         case 2:
6282                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6283                 break;
6284         case 4:
6285                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6286                 break;
6287         case 8:
6288                 exchanged = CMPXCHG64(kaddr, old, new);
6289                 break;
6290         default:
6291                 BUG();
6292         }
6293
6294         kvm_vcpu_unmap(vcpu, &map, true);
6295
6296         if (!exchanged)
6297                 return X86EMUL_CMPXCHG_FAILED;
6298
6299         kvm_page_track_write(vcpu, gpa, new, bytes);
6300
6301         return X86EMUL_CONTINUE;
6302
6303 emul_write:
6304         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6305
6306         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6307 }
6308
6309 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6310 {
6311         int r = 0, i;
6312
6313         for (i = 0; i < vcpu->arch.pio.count; i++) {
6314                 if (vcpu->arch.pio.in)
6315                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6316                                             vcpu->arch.pio.size, pd);
6317                 else
6318                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6319                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6320                                              pd);
6321                 if (r)
6322                         break;
6323                 pd += vcpu->arch.pio.size;
6324         }
6325         return r;
6326 }
6327
6328 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6329                                unsigned short port, void *val,
6330                                unsigned int count, bool in)
6331 {
6332         vcpu->arch.pio.port = port;
6333         vcpu->arch.pio.in = in;
6334         vcpu->arch.pio.count  = count;
6335         vcpu->arch.pio.size = size;
6336
6337         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6338                 vcpu->arch.pio.count = 0;
6339                 return 1;
6340         }
6341
6342         vcpu->run->exit_reason = KVM_EXIT_IO;
6343         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6344         vcpu->run->io.size = size;
6345         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6346         vcpu->run->io.count = count;
6347         vcpu->run->io.port = port;
6348
6349         return 0;
6350 }
6351
6352 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6353                            unsigned short port, void *val, unsigned int count)
6354 {
6355         int ret;
6356
6357         if (vcpu->arch.pio.count)
6358                 goto data_avail;
6359
6360         memset(vcpu->arch.pio_data, 0, size * count);
6361
6362         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6363         if (ret) {
6364 data_avail:
6365                 memcpy(val, vcpu->arch.pio_data, size * count);
6366                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6367                 vcpu->arch.pio.count = 0;
6368                 return 1;
6369         }
6370
6371         return 0;
6372 }
6373
6374 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6375                                     int size, unsigned short port, void *val,
6376                                     unsigned int count)
6377 {
6378         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6379
6380 }
6381
6382 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6383                             unsigned short port, const void *val,
6384                             unsigned int count)
6385 {
6386         memcpy(vcpu->arch.pio_data, val, size * count);
6387         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6388         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6389 }
6390
6391 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6392                                      int size, unsigned short port,
6393                                      const void *val, unsigned int count)
6394 {
6395         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6396 }
6397
6398 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6399 {
6400         return kvm_x86_ops.get_segment_base(vcpu, seg);
6401 }
6402
6403 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6404 {
6405         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6406 }
6407
6408 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6409 {
6410         if (!need_emulate_wbinvd(vcpu))
6411                 return X86EMUL_CONTINUE;
6412
6413         if (kvm_x86_ops.has_wbinvd_exit()) {
6414                 int cpu = get_cpu();
6415
6416                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6417                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6418                                 wbinvd_ipi, NULL, 1);
6419                 put_cpu();
6420                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6421         } else
6422                 wbinvd();
6423         return X86EMUL_CONTINUE;
6424 }
6425
6426 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6427 {
6428         kvm_emulate_wbinvd_noskip(vcpu);
6429         return kvm_skip_emulated_instruction(vcpu);
6430 }
6431 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6432
6433
6434
6435 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6436 {
6437         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6438 }
6439
6440 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6441                            unsigned long *dest)
6442 {
6443         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6444 }
6445
6446 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6447                            unsigned long value)
6448 {
6449
6450         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6451 }
6452
6453 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6454 {
6455         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6456 }
6457
6458 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6459 {
6460         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6461         unsigned long value;
6462
6463         switch (cr) {
6464         case 0:
6465                 value = kvm_read_cr0(vcpu);
6466                 break;
6467         case 2:
6468                 value = vcpu->arch.cr2;
6469                 break;
6470         case 3:
6471                 value = kvm_read_cr3(vcpu);
6472                 break;
6473         case 4:
6474                 value = kvm_read_cr4(vcpu);
6475                 break;
6476         case 8:
6477                 value = kvm_get_cr8(vcpu);
6478                 break;
6479         default:
6480                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6481                 return 0;
6482         }
6483
6484         return value;
6485 }
6486
6487 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6488 {
6489         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6490         int res = 0;
6491
6492         switch (cr) {
6493         case 0:
6494                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6495                 break;
6496         case 2:
6497                 vcpu->arch.cr2 = val;
6498                 break;
6499         case 3:
6500                 res = kvm_set_cr3(vcpu, val);
6501                 break;
6502         case 4:
6503                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6504                 break;
6505         case 8:
6506                 res = kvm_set_cr8(vcpu, val);
6507                 break;
6508         default:
6509                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6510                 res = -1;
6511         }
6512
6513         return res;
6514 }
6515
6516 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6517 {
6518         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6519 }
6520
6521 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6522 {
6523         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6524 }
6525
6526 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6527 {
6528         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6529 }
6530
6531 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6532 {
6533         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6534 }
6535
6536 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6537 {
6538         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6539 }
6540
6541 static unsigned long emulator_get_cached_segment_base(
6542         struct x86_emulate_ctxt *ctxt, int seg)
6543 {
6544         return get_segment_base(emul_to_vcpu(ctxt), seg);
6545 }
6546
6547 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6548                                  struct desc_struct *desc, u32 *base3,
6549                                  int seg)
6550 {
6551         struct kvm_segment var;
6552
6553         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6554         *selector = var.selector;
6555
6556         if (var.unusable) {
6557                 memset(desc, 0, sizeof(*desc));
6558                 if (base3)
6559                         *base3 = 0;
6560                 return false;
6561         }
6562
6563         if (var.g)
6564                 var.limit >>= 12;
6565         set_desc_limit(desc, var.limit);
6566         set_desc_base(desc, (unsigned long)var.base);
6567 #ifdef CONFIG_X86_64
6568         if (base3)
6569                 *base3 = var.base >> 32;
6570 #endif
6571         desc->type = var.type;
6572         desc->s = var.s;
6573         desc->dpl = var.dpl;
6574         desc->p = var.present;
6575         desc->avl = var.avl;
6576         desc->l = var.l;
6577         desc->d = var.db;
6578         desc->g = var.g;
6579
6580         return true;
6581 }
6582
6583 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6584                                  struct desc_struct *desc, u32 base3,
6585                                  int seg)
6586 {
6587         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6588         struct kvm_segment var;
6589
6590         var.selector = selector;
6591         var.base = get_desc_base(desc);
6592 #ifdef CONFIG_X86_64
6593         var.base |= ((u64)base3) << 32;
6594 #endif
6595         var.limit = get_desc_limit(desc);
6596         if (desc->g)
6597                 var.limit = (var.limit << 12) | 0xfff;
6598         var.type = desc->type;
6599         var.dpl = desc->dpl;
6600         var.db = desc->d;
6601         var.s = desc->s;
6602         var.l = desc->l;
6603         var.g = desc->g;
6604         var.avl = desc->avl;
6605         var.present = desc->p;
6606         var.unusable = !var.present;
6607         var.padding = 0;
6608
6609         kvm_set_segment(vcpu, &var, seg);
6610         return;
6611 }
6612
6613 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6614                             u32 msr_index, u64 *pdata)
6615 {
6616         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6617         int r;
6618
6619         r = kvm_get_msr(vcpu, msr_index, pdata);
6620
6621         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6622                 /* Bounce to user space */
6623                 return X86EMUL_IO_NEEDED;
6624         }
6625
6626         return r;
6627 }
6628
6629 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6630                             u32 msr_index, u64 data)
6631 {
6632         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6633         int r;
6634
6635         r = kvm_set_msr(vcpu, msr_index, data);
6636
6637         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6638                 /* Bounce to user space */
6639                 return X86EMUL_IO_NEEDED;
6640         }
6641
6642         return r;
6643 }
6644
6645 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6646 {
6647         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6648
6649         return vcpu->arch.smbase;
6650 }
6651
6652 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6653 {
6654         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6655
6656         vcpu->arch.smbase = smbase;
6657 }
6658
6659 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6660                               u32 pmc)
6661 {
6662         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6663 }
6664
6665 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6666                              u32 pmc, u64 *pdata)
6667 {
6668         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6669 }
6670
6671 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6672 {
6673         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6674 }
6675
6676 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6677                               struct x86_instruction_info *info,
6678                               enum x86_intercept_stage stage)
6679 {
6680         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6681                                             &ctxt->exception);
6682 }
6683
6684 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6685                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6686                               bool exact_only)
6687 {
6688         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6689 }
6690
6691 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6692 {
6693         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6694 }
6695
6696 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6697 {
6698         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6699 }
6700
6701 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6702 {
6703         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6704 }
6705
6706 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6707 {
6708         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6709 }
6710
6711 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6712 {
6713         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6714 }
6715
6716 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6717 {
6718         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6719 }
6720
6721 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6722 {
6723         return emul_to_vcpu(ctxt)->arch.hflags;
6724 }
6725
6726 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6727 {
6728         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6729 }
6730
6731 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6732                                   const char *smstate)
6733 {
6734         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6735 }
6736
6737 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6738 {
6739         kvm_smm_changed(emul_to_vcpu(ctxt));
6740 }
6741
6742 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6743 {
6744         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6745 }
6746
6747 static const struct x86_emulate_ops emulate_ops = {
6748         .read_gpr            = emulator_read_gpr,
6749         .write_gpr           = emulator_write_gpr,
6750         .read_std            = emulator_read_std,
6751         .write_std           = emulator_write_std,
6752         .read_phys           = kvm_read_guest_phys_system,
6753         .fetch               = kvm_fetch_guest_virt,
6754         .read_emulated       = emulator_read_emulated,
6755         .write_emulated      = emulator_write_emulated,
6756         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6757         .invlpg              = emulator_invlpg,
6758         .pio_in_emulated     = emulator_pio_in_emulated,
6759         .pio_out_emulated    = emulator_pio_out_emulated,
6760         .get_segment         = emulator_get_segment,
6761         .set_segment         = emulator_set_segment,
6762         .get_cached_segment_base = emulator_get_cached_segment_base,
6763         .get_gdt             = emulator_get_gdt,
6764         .get_idt             = emulator_get_idt,
6765         .set_gdt             = emulator_set_gdt,
6766         .set_idt             = emulator_set_idt,
6767         .get_cr              = emulator_get_cr,
6768         .set_cr              = emulator_set_cr,
6769         .cpl                 = emulator_get_cpl,
6770         .get_dr              = emulator_get_dr,
6771         .set_dr              = emulator_set_dr,
6772         .get_smbase          = emulator_get_smbase,
6773         .set_smbase          = emulator_set_smbase,
6774         .set_msr             = emulator_set_msr,
6775         .get_msr             = emulator_get_msr,
6776         .check_pmc           = emulator_check_pmc,
6777         .read_pmc            = emulator_read_pmc,
6778         .halt                = emulator_halt,
6779         .wbinvd              = emulator_wbinvd,
6780         .fix_hypercall       = emulator_fix_hypercall,
6781         .intercept           = emulator_intercept,
6782         .get_cpuid           = emulator_get_cpuid,
6783         .guest_has_long_mode = emulator_guest_has_long_mode,
6784         .guest_has_movbe     = emulator_guest_has_movbe,
6785         .guest_has_fxsr      = emulator_guest_has_fxsr,
6786         .set_nmi_mask        = emulator_set_nmi_mask,
6787         .get_hflags          = emulator_get_hflags,
6788         .set_hflags          = emulator_set_hflags,
6789         .pre_leave_smm       = emulator_pre_leave_smm,
6790         .post_leave_smm      = emulator_post_leave_smm,
6791         .set_xcr             = emulator_set_xcr,
6792 };
6793
6794 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6795 {
6796         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6797         /*
6798          * an sti; sti; sequence only disable interrupts for the first
6799          * instruction. So, if the last instruction, be it emulated or
6800          * not, left the system with the INT_STI flag enabled, it
6801          * means that the last instruction is an sti. We should not
6802          * leave the flag on in this case. The same goes for mov ss
6803          */
6804         if (int_shadow & mask)
6805                 mask = 0;
6806         if (unlikely(int_shadow || mask)) {
6807                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6808                 if (!mask)
6809                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6810         }
6811 }
6812
6813 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6814 {
6815         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6816         if (ctxt->exception.vector == PF_VECTOR)
6817                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6818
6819         if (ctxt->exception.error_code_valid)
6820                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6821                                       ctxt->exception.error_code);
6822         else
6823                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6824         return false;
6825 }
6826
6827 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6828 {
6829         struct x86_emulate_ctxt *ctxt;
6830
6831         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6832         if (!ctxt) {
6833                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6834                 return NULL;
6835         }
6836
6837         ctxt->vcpu = vcpu;
6838         ctxt->ops = &emulate_ops;
6839         vcpu->arch.emulate_ctxt = ctxt;
6840
6841         return ctxt;
6842 }
6843
6844 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6845 {
6846         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6847         int cs_db, cs_l;
6848
6849         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6850
6851         ctxt->gpa_available = false;
6852         ctxt->eflags = kvm_get_rflags(vcpu);
6853         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6854
6855         ctxt->eip = kvm_rip_read(vcpu);
6856         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6857                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6858                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6859                      cs_db                              ? X86EMUL_MODE_PROT32 :
6860                                                           X86EMUL_MODE_PROT16;
6861         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6862         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6863         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6864
6865         init_decode_cache(ctxt);
6866         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6867 }
6868
6869 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6870 {
6871         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6872         int ret;
6873
6874         init_emulate_ctxt(vcpu);
6875
6876         ctxt->op_bytes = 2;
6877         ctxt->ad_bytes = 2;
6878         ctxt->_eip = ctxt->eip + inc_eip;
6879         ret = emulate_int_real(ctxt, irq);
6880
6881         if (ret != X86EMUL_CONTINUE) {
6882                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6883         } else {
6884                 ctxt->eip = ctxt->_eip;
6885                 kvm_rip_write(vcpu, ctxt->eip);
6886                 kvm_set_rflags(vcpu, ctxt->eflags);
6887         }
6888 }
6889 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6890
6891 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6892 {
6893         ++vcpu->stat.insn_emulation_fail;
6894         trace_kvm_emulate_insn_failed(vcpu);
6895
6896         if (emulation_type & EMULTYPE_VMWARE_GP) {
6897                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6898                 return 1;
6899         }
6900
6901         if (emulation_type & EMULTYPE_SKIP) {
6902                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6903                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6904                 vcpu->run->internal.ndata = 0;
6905                 return 0;
6906         }
6907
6908         kvm_queue_exception(vcpu, UD_VECTOR);
6909
6910         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
6911                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6912                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6913                 vcpu->run->internal.ndata = 0;
6914                 return 0;
6915         }
6916
6917         return 1;
6918 }
6919
6920 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6921                                   bool write_fault_to_shadow_pgtable,
6922                                   int emulation_type)
6923 {
6924         gpa_t gpa = cr2_or_gpa;
6925         kvm_pfn_t pfn;
6926
6927         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
6928                 return false;
6929
6930         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
6931             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
6932                 return false;
6933
6934         if (!vcpu->arch.mmu->direct_map) {
6935                 /*
6936                  * Write permission should be allowed since only
6937                  * write access need to be emulated.
6938                  */
6939                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6940
6941                 /*
6942                  * If the mapping is invalid in guest, let cpu retry
6943                  * it to generate fault.
6944                  */
6945                 if (gpa == UNMAPPED_GVA)
6946                         return true;
6947         }
6948
6949         /*
6950          * Do not retry the unhandleable instruction if it faults on the
6951          * readonly host memory, otherwise it will goto a infinite loop:
6952          * retry instruction -> write #PF -> emulation fail -> retry
6953          * instruction -> ...
6954          */
6955         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6956
6957         /*
6958          * If the instruction failed on the error pfn, it can not be fixed,
6959          * report the error to userspace.
6960          */
6961         if (is_error_noslot_pfn(pfn))
6962                 return false;
6963
6964         kvm_release_pfn_clean(pfn);
6965
6966         /* The instructions are well-emulated on direct mmu. */
6967         if (vcpu->arch.mmu->direct_map) {
6968                 unsigned int indirect_shadow_pages;
6969
6970                 spin_lock(&vcpu->kvm->mmu_lock);
6971                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6972                 spin_unlock(&vcpu->kvm->mmu_lock);
6973
6974                 if (indirect_shadow_pages)
6975                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6976
6977                 return true;
6978         }
6979
6980         /*
6981          * if emulation was due to access to shadowed page table
6982          * and it failed try to unshadow page and re-enter the
6983          * guest to let CPU execute the instruction.
6984          */
6985         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6986
6987         /*
6988          * If the access faults on its page table, it can not
6989          * be fixed by unprotecting shadow page and it should
6990          * be reported to userspace.
6991          */
6992         return !write_fault_to_shadow_pgtable;
6993 }
6994
6995 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6996                               gpa_t cr2_or_gpa,  int emulation_type)
6997 {
6998         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6999         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7000
7001         last_retry_eip = vcpu->arch.last_retry_eip;
7002         last_retry_addr = vcpu->arch.last_retry_addr;
7003
7004         /*
7005          * If the emulation is caused by #PF and it is non-page_table
7006          * writing instruction, it means the VM-EXIT is caused by shadow
7007          * page protected, we can zap the shadow page and retry this
7008          * instruction directly.
7009          *
7010          * Note: if the guest uses a non-page-table modifying instruction
7011          * on the PDE that points to the instruction, then we will unmap
7012          * the instruction and go to an infinite loop. So, we cache the
7013          * last retried eip and the last fault address, if we meet the eip
7014          * and the address again, we can break out of the potential infinite
7015          * loop.
7016          */
7017         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7018
7019         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7020                 return false;
7021
7022         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7023             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7024                 return false;
7025
7026         if (x86_page_table_writing_insn(ctxt))
7027                 return false;
7028
7029         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7030                 return false;
7031
7032         vcpu->arch.last_retry_eip = ctxt->eip;
7033         vcpu->arch.last_retry_addr = cr2_or_gpa;
7034
7035         if (!vcpu->arch.mmu->direct_map)
7036                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7037
7038         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7039
7040         return true;
7041 }
7042
7043 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7044 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7045
7046 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7047 {
7048         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7049                 /* This is a good place to trace that we are exiting SMM.  */
7050                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7051
7052                 /* Process a latched INIT or SMI, if any.  */
7053                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7054         }
7055
7056         kvm_mmu_reset_context(vcpu);
7057 }
7058
7059 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7060                                 unsigned long *db)
7061 {
7062         u32 dr6 = 0;
7063         int i;
7064         u32 enable, rwlen;
7065
7066         enable = dr7;
7067         rwlen = dr7 >> 16;
7068         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7069                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7070                         dr6 |= (1 << i);
7071         return dr6;
7072 }
7073
7074 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7075 {
7076         struct kvm_run *kvm_run = vcpu->run;
7077
7078         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7079                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7080                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7081                 kvm_run->debug.arch.exception = DB_VECTOR;
7082                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7083                 return 0;
7084         }
7085         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7086         return 1;
7087 }
7088
7089 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7090 {
7091         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7092         int r;
7093
7094         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7095         if (unlikely(!r))
7096                 return 0;
7097
7098         /*
7099          * rflags is the old, "raw" value of the flags.  The new value has
7100          * not been saved yet.
7101          *
7102          * This is correct even for TF set by the guest, because "the
7103          * processor will not generate this exception after the instruction
7104          * that sets the TF flag".
7105          */
7106         if (unlikely(rflags & X86_EFLAGS_TF))
7107                 r = kvm_vcpu_do_singlestep(vcpu);
7108         return r;
7109 }
7110 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7111
7112 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7113 {
7114         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7115             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7116                 struct kvm_run *kvm_run = vcpu->run;
7117                 unsigned long eip = kvm_get_linear_rip(vcpu);
7118                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7119                                            vcpu->arch.guest_debug_dr7,
7120                                            vcpu->arch.eff_db);
7121
7122                 if (dr6 != 0) {
7123                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7124                         kvm_run->debug.arch.pc = eip;
7125                         kvm_run->debug.arch.exception = DB_VECTOR;
7126                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7127                         *r = 0;
7128                         return true;
7129                 }
7130         }
7131
7132         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7133             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7134                 unsigned long eip = kvm_get_linear_rip(vcpu);
7135                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7136                                            vcpu->arch.dr7,
7137                                            vcpu->arch.db);
7138
7139                 if (dr6 != 0) {
7140                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7141                         *r = 1;
7142                         return true;
7143                 }
7144         }
7145
7146         return false;
7147 }
7148
7149 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7150 {
7151         switch (ctxt->opcode_len) {
7152         case 1:
7153                 switch (ctxt->b) {
7154                 case 0xe4:      /* IN */
7155                 case 0xe5:
7156                 case 0xec:
7157                 case 0xed:
7158                 case 0xe6:      /* OUT */
7159                 case 0xe7:
7160                 case 0xee:
7161                 case 0xef:
7162                 case 0x6c:      /* INS */
7163                 case 0x6d:
7164                 case 0x6e:      /* OUTS */
7165                 case 0x6f:
7166                         return true;
7167                 }
7168                 break;
7169         case 2:
7170                 switch (ctxt->b) {
7171                 case 0x33:      /* RDPMC */
7172                         return true;
7173                 }
7174                 break;
7175         }
7176
7177         return false;
7178 }
7179
7180 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7181                             int emulation_type, void *insn, int insn_len)
7182 {
7183         int r;
7184         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7185         bool writeback = true;
7186         bool write_fault_to_spt;
7187
7188         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7189                 return 1;
7190
7191         vcpu->arch.l1tf_flush_l1d = true;
7192
7193         /*
7194          * Clear write_fault_to_shadow_pgtable here to ensure it is
7195          * never reused.
7196          */
7197         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7198         vcpu->arch.write_fault_to_shadow_pgtable = false;
7199         kvm_clear_exception_queue(vcpu);
7200
7201         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7202                 init_emulate_ctxt(vcpu);
7203
7204                 /*
7205                  * We will reenter on the same instruction since
7206                  * we do not set complete_userspace_io.  This does not
7207                  * handle watchpoints yet, those would be handled in
7208                  * the emulate_ops.
7209                  */
7210                 if (!(emulation_type & EMULTYPE_SKIP) &&
7211                     kvm_vcpu_check_breakpoint(vcpu, &r))
7212                         return r;
7213
7214                 ctxt->interruptibility = 0;
7215                 ctxt->have_exception = false;
7216                 ctxt->exception.vector = -1;
7217                 ctxt->perm_ok = false;
7218
7219                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7220
7221                 r = x86_decode_insn(ctxt, insn, insn_len);
7222
7223                 trace_kvm_emulate_insn_start(vcpu);
7224                 ++vcpu->stat.insn_emulation;
7225                 if (r != EMULATION_OK)  {
7226                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7227                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7228                                 kvm_queue_exception(vcpu, UD_VECTOR);
7229                                 return 1;
7230                         }
7231                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7232                                                   write_fault_to_spt,
7233                                                   emulation_type))
7234                                 return 1;
7235                         if (ctxt->have_exception) {
7236                                 /*
7237                                  * #UD should result in just EMULATION_FAILED, and trap-like
7238                                  * exception should not be encountered during decode.
7239                                  */
7240                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7241                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7242                                 inject_emulated_exception(vcpu);
7243                                 return 1;
7244                         }
7245                         return handle_emulation_failure(vcpu, emulation_type);
7246                 }
7247         }
7248
7249         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7250             !is_vmware_backdoor_opcode(ctxt)) {
7251                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7252                 return 1;
7253         }
7254
7255         /*
7256          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7257          * for kvm_skip_emulated_instruction().  The caller is responsible for
7258          * updating interruptibility state and injecting single-step #DBs.
7259          */
7260         if (emulation_type & EMULTYPE_SKIP) {
7261                 kvm_rip_write(vcpu, ctxt->_eip);
7262                 if (ctxt->eflags & X86_EFLAGS_RF)
7263                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7264                 return 1;
7265         }
7266
7267         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7268                 return 1;
7269
7270         /* this is needed for vmware backdoor interface to work since it
7271            changes registers values  during IO operation */
7272         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7273                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7274                 emulator_invalidate_register_cache(ctxt);
7275         }
7276
7277 restart:
7278         if (emulation_type & EMULTYPE_PF) {
7279                 /* Save the faulting GPA (cr2) in the address field */
7280                 ctxt->exception.address = cr2_or_gpa;
7281
7282                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7283                 if (vcpu->arch.mmu->direct_map) {
7284                         ctxt->gpa_available = true;
7285                         ctxt->gpa_val = cr2_or_gpa;
7286                 }
7287         } else {
7288                 /* Sanitize the address out of an abundance of paranoia. */
7289                 ctxt->exception.address = 0;
7290         }
7291
7292         r = x86_emulate_insn(ctxt);
7293
7294         if (r == EMULATION_INTERCEPTED)
7295                 return 1;
7296
7297         if (r == EMULATION_FAILED) {
7298                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7299                                         emulation_type))
7300                         return 1;
7301
7302                 return handle_emulation_failure(vcpu, emulation_type);
7303         }
7304
7305         if (ctxt->have_exception) {
7306                 r = 1;
7307                 if (inject_emulated_exception(vcpu))
7308                         return r;
7309         } else if (vcpu->arch.pio.count) {
7310                 if (!vcpu->arch.pio.in) {
7311                         /* FIXME: return into emulator if single-stepping.  */
7312                         vcpu->arch.pio.count = 0;
7313                 } else {
7314                         writeback = false;
7315                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7316                 }
7317                 r = 0;
7318         } else if (vcpu->mmio_needed) {
7319                 ++vcpu->stat.mmio_exits;
7320
7321                 if (!vcpu->mmio_is_write)
7322                         writeback = false;
7323                 r = 0;
7324                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7325         } else if (r == EMULATION_RESTART)
7326                 goto restart;
7327         else
7328                 r = 1;
7329
7330         if (writeback) {
7331                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7332                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7333                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7334                 if (!ctxt->have_exception ||
7335                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7336                         kvm_rip_write(vcpu, ctxt->eip);
7337                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7338                                 r = kvm_vcpu_do_singlestep(vcpu);
7339                         if (kvm_x86_ops.update_emulated_instruction)
7340                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7341                         __kvm_set_rflags(vcpu, ctxt->eflags);
7342                 }
7343
7344                 /*
7345                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7346                  * do nothing, and it will be requested again as soon as
7347                  * the shadow expires.  But we still need to check here,
7348                  * because POPF has no interrupt shadow.
7349                  */
7350                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7351                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7352         } else
7353                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7354
7355         return r;
7356 }
7357
7358 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7359 {
7360         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7361 }
7362 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7363
7364 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7365                                         void *insn, int insn_len)
7366 {
7367         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7368 }
7369 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7370
7371 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7372 {
7373         vcpu->arch.pio.count = 0;
7374         return 1;
7375 }
7376
7377 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7378 {
7379         vcpu->arch.pio.count = 0;
7380
7381         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7382                 return 1;
7383
7384         return kvm_skip_emulated_instruction(vcpu);
7385 }
7386
7387 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7388                             unsigned short port)
7389 {
7390         unsigned long val = kvm_rax_read(vcpu);
7391         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7392
7393         if (ret)
7394                 return ret;
7395
7396         /*
7397          * Workaround userspace that relies on old KVM behavior of %rip being
7398          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7399          */
7400         if (port == 0x7e &&
7401             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7402                 vcpu->arch.complete_userspace_io =
7403                         complete_fast_pio_out_port_0x7e;
7404                 kvm_skip_emulated_instruction(vcpu);
7405         } else {
7406                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7407                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7408         }
7409         return 0;
7410 }
7411
7412 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7413 {
7414         unsigned long val;
7415
7416         /* We should only ever be called with arch.pio.count equal to 1 */
7417         BUG_ON(vcpu->arch.pio.count != 1);
7418
7419         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7420                 vcpu->arch.pio.count = 0;
7421                 return 1;
7422         }
7423
7424         /* For size less than 4 we merge, else we zero extend */
7425         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7426
7427         /*
7428          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7429          * the copy and tracing
7430          */
7431         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7432         kvm_rax_write(vcpu, val);
7433
7434         return kvm_skip_emulated_instruction(vcpu);
7435 }
7436
7437 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7438                            unsigned short port)
7439 {
7440         unsigned long val;
7441         int ret;
7442
7443         /* For size less than 4 we merge, else we zero extend */
7444         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7445
7446         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7447         if (ret) {
7448                 kvm_rax_write(vcpu, val);
7449                 return ret;
7450         }
7451
7452         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7453         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7454
7455         return 0;
7456 }
7457
7458 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7459 {
7460         int ret;
7461
7462         if (in)
7463                 ret = kvm_fast_pio_in(vcpu, size, port);
7464         else
7465                 ret = kvm_fast_pio_out(vcpu, size, port);
7466         return ret && kvm_skip_emulated_instruction(vcpu);
7467 }
7468 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7469
7470 static int kvmclock_cpu_down_prep(unsigned int cpu)
7471 {
7472         __this_cpu_write(cpu_tsc_khz, 0);
7473         return 0;
7474 }
7475
7476 static void tsc_khz_changed(void *data)
7477 {
7478         struct cpufreq_freqs *freq = data;
7479         unsigned long khz = 0;
7480
7481         if (data)
7482                 khz = freq->new;
7483         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7484                 khz = cpufreq_quick_get(raw_smp_processor_id());
7485         if (!khz)
7486                 khz = tsc_khz;
7487         __this_cpu_write(cpu_tsc_khz, khz);
7488 }
7489
7490 #ifdef CONFIG_X86_64
7491 static void kvm_hyperv_tsc_notifier(void)
7492 {
7493         struct kvm *kvm;
7494         struct kvm_vcpu *vcpu;
7495         int cpu;
7496
7497         mutex_lock(&kvm_lock);
7498         list_for_each_entry(kvm, &vm_list, vm_list)
7499                 kvm_make_mclock_inprogress_request(kvm);
7500
7501         hyperv_stop_tsc_emulation();
7502
7503         /* TSC frequency always matches when on Hyper-V */
7504         for_each_present_cpu(cpu)
7505                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7506         kvm_max_guest_tsc_khz = tsc_khz;
7507
7508         list_for_each_entry(kvm, &vm_list, vm_list) {
7509                 struct kvm_arch *ka = &kvm->arch;
7510
7511                 spin_lock(&ka->pvclock_gtod_sync_lock);
7512
7513                 pvclock_update_vm_gtod_copy(kvm);
7514
7515                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7516                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7517
7518                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7519                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7520
7521                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7522         }
7523         mutex_unlock(&kvm_lock);
7524 }
7525 #endif
7526
7527 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7528 {
7529         struct kvm *kvm;
7530         struct kvm_vcpu *vcpu;
7531         int i, send_ipi = 0;
7532
7533         /*
7534          * We allow guests to temporarily run on slowing clocks,
7535          * provided we notify them after, or to run on accelerating
7536          * clocks, provided we notify them before.  Thus time never
7537          * goes backwards.
7538          *
7539          * However, we have a problem.  We can't atomically update
7540          * the frequency of a given CPU from this function; it is
7541          * merely a notifier, which can be called from any CPU.
7542          * Changing the TSC frequency at arbitrary points in time
7543          * requires a recomputation of local variables related to
7544          * the TSC for each VCPU.  We must flag these local variables
7545          * to be updated and be sure the update takes place with the
7546          * new frequency before any guests proceed.
7547          *
7548          * Unfortunately, the combination of hotplug CPU and frequency
7549          * change creates an intractable locking scenario; the order
7550          * of when these callouts happen is undefined with respect to
7551          * CPU hotplug, and they can race with each other.  As such,
7552          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7553          * undefined; you can actually have a CPU frequency change take
7554          * place in between the computation of X and the setting of the
7555          * variable.  To protect against this problem, all updates of
7556          * the per_cpu tsc_khz variable are done in an interrupt
7557          * protected IPI, and all callers wishing to update the value
7558          * must wait for a synchronous IPI to complete (which is trivial
7559          * if the caller is on the CPU already).  This establishes the
7560          * necessary total order on variable updates.
7561          *
7562          * Note that because a guest time update may take place
7563          * anytime after the setting of the VCPU's request bit, the
7564          * correct TSC value must be set before the request.  However,
7565          * to ensure the update actually makes it to any guest which
7566          * starts running in hardware virtualization between the set
7567          * and the acquisition of the spinlock, we must also ping the
7568          * CPU after setting the request bit.
7569          *
7570          */
7571
7572         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7573
7574         mutex_lock(&kvm_lock);
7575         list_for_each_entry(kvm, &vm_list, vm_list) {
7576                 kvm_for_each_vcpu(i, vcpu, kvm) {
7577                         if (vcpu->cpu != cpu)
7578                                 continue;
7579                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7580                         if (vcpu->cpu != raw_smp_processor_id())
7581                                 send_ipi = 1;
7582                 }
7583         }
7584         mutex_unlock(&kvm_lock);
7585
7586         if (freq->old < freq->new && send_ipi) {
7587                 /*
7588                  * We upscale the frequency.  Must make the guest
7589                  * doesn't see old kvmclock values while running with
7590                  * the new frequency, otherwise we risk the guest sees
7591                  * time go backwards.
7592                  *
7593                  * In case we update the frequency for another cpu
7594                  * (which might be in guest context) send an interrupt
7595                  * to kick the cpu out of guest context.  Next time
7596                  * guest context is entered kvmclock will be updated,
7597                  * so the guest will not see stale values.
7598                  */
7599                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7600         }
7601 }
7602
7603 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7604                                      void *data)
7605 {
7606         struct cpufreq_freqs *freq = data;
7607         int cpu;
7608
7609         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7610                 return 0;
7611         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7612                 return 0;
7613
7614         for_each_cpu(cpu, freq->policy->cpus)
7615                 __kvmclock_cpufreq_notifier(freq, cpu);
7616
7617         return 0;
7618 }
7619
7620 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7621         .notifier_call  = kvmclock_cpufreq_notifier
7622 };
7623
7624 static int kvmclock_cpu_online(unsigned int cpu)
7625 {
7626         tsc_khz_changed(NULL);
7627         return 0;
7628 }
7629
7630 static void kvm_timer_init(void)
7631 {
7632         max_tsc_khz = tsc_khz;
7633
7634         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7635 #ifdef CONFIG_CPU_FREQ
7636                 struct cpufreq_policy *policy;
7637                 int cpu;
7638
7639                 cpu = get_cpu();
7640                 policy = cpufreq_cpu_get(cpu);
7641                 if (policy) {
7642                         if (policy->cpuinfo.max_freq)
7643                                 max_tsc_khz = policy->cpuinfo.max_freq;
7644                         cpufreq_cpu_put(policy);
7645                 }
7646                 put_cpu();
7647 #endif
7648                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7649                                           CPUFREQ_TRANSITION_NOTIFIER);
7650         }
7651
7652         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7653                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7654 }
7655
7656 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7657 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7658
7659 int kvm_is_in_guest(void)
7660 {
7661         return __this_cpu_read(current_vcpu) != NULL;
7662 }
7663
7664 static int kvm_is_user_mode(void)
7665 {
7666         int user_mode = 3;
7667
7668         if (__this_cpu_read(current_vcpu))
7669                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7670
7671         return user_mode != 0;
7672 }
7673
7674 static unsigned long kvm_get_guest_ip(void)
7675 {
7676         unsigned long ip = 0;
7677
7678         if (__this_cpu_read(current_vcpu))
7679                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7680
7681         return ip;
7682 }
7683
7684 static void kvm_handle_intel_pt_intr(void)
7685 {
7686         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7687
7688         kvm_make_request(KVM_REQ_PMI, vcpu);
7689         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7690                         (unsigned long *)&vcpu->arch.pmu.global_status);
7691 }
7692
7693 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7694         .is_in_guest            = kvm_is_in_guest,
7695         .is_user_mode           = kvm_is_user_mode,
7696         .get_guest_ip           = kvm_get_guest_ip,
7697         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7698 };
7699
7700 #ifdef CONFIG_X86_64
7701 static void pvclock_gtod_update_fn(struct work_struct *work)
7702 {
7703         struct kvm *kvm;
7704
7705         struct kvm_vcpu *vcpu;
7706         int i;
7707
7708         mutex_lock(&kvm_lock);
7709         list_for_each_entry(kvm, &vm_list, vm_list)
7710                 kvm_for_each_vcpu(i, vcpu, kvm)
7711                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7712         atomic_set(&kvm_guest_has_master_clock, 0);
7713         mutex_unlock(&kvm_lock);
7714 }
7715
7716 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7717
7718 /*
7719  * Notification about pvclock gtod data update.
7720  */
7721 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7722                                void *priv)
7723 {
7724         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7725         struct timekeeper *tk = priv;
7726
7727         update_pvclock_gtod(tk);
7728
7729         /* disable master clock if host does not trust, or does not
7730          * use, TSC based clocksource.
7731          */
7732         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7733             atomic_read(&kvm_guest_has_master_clock) != 0)
7734                 queue_work(system_long_wq, &pvclock_gtod_work);
7735
7736         return 0;
7737 }
7738
7739 static struct notifier_block pvclock_gtod_notifier = {
7740         .notifier_call = pvclock_gtod_notify,
7741 };
7742 #endif
7743
7744 int kvm_arch_init(void *opaque)
7745 {
7746         struct kvm_x86_init_ops *ops = opaque;
7747         int r;
7748
7749         if (kvm_x86_ops.hardware_enable) {
7750                 printk(KERN_ERR "kvm: already loaded the other module\n");
7751                 r = -EEXIST;
7752                 goto out;
7753         }
7754
7755         if (!ops->cpu_has_kvm_support()) {
7756                 pr_err_ratelimited("kvm: no hardware support\n");
7757                 r = -EOPNOTSUPP;
7758                 goto out;
7759         }
7760         if (ops->disabled_by_bios()) {
7761                 pr_err_ratelimited("kvm: disabled by bios\n");
7762                 r = -EOPNOTSUPP;
7763                 goto out;
7764         }
7765
7766         /*
7767          * KVM explicitly assumes that the guest has an FPU and
7768          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7769          * vCPU's FPU state as a fxregs_state struct.
7770          */
7771         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7772                 printk(KERN_ERR "kvm: inadequate fpu\n");
7773                 r = -EOPNOTSUPP;
7774                 goto out;
7775         }
7776
7777         r = -ENOMEM;
7778         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7779                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7780                                           NULL);
7781         if (!x86_fpu_cache) {
7782                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7783                 goto out;
7784         }
7785
7786         x86_emulator_cache = kvm_alloc_emulator_cache();
7787         if (!x86_emulator_cache) {
7788                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7789                 goto out_free_x86_fpu_cache;
7790         }
7791
7792         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7793         if (!user_return_msrs) {
7794                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7795                 goto out_free_x86_emulator_cache;
7796         }
7797
7798         r = kvm_mmu_module_init();
7799         if (r)
7800                 goto out_free_percpu;
7801
7802         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7803                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7804                         PT_PRESENT_MASK, 0, sme_me_mask);
7805         kvm_timer_init();
7806
7807         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7808
7809         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7810                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7811                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7812         }
7813
7814         kvm_lapic_init();
7815         if (pi_inject_timer == -1)
7816                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7817 #ifdef CONFIG_X86_64
7818         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7819
7820         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7821                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7822 #endif
7823
7824         return 0;
7825
7826 out_free_percpu:
7827         free_percpu(user_return_msrs);
7828 out_free_x86_emulator_cache:
7829         kmem_cache_destroy(x86_emulator_cache);
7830 out_free_x86_fpu_cache:
7831         kmem_cache_destroy(x86_fpu_cache);
7832 out:
7833         return r;
7834 }
7835
7836 void kvm_arch_exit(void)
7837 {
7838 #ifdef CONFIG_X86_64
7839         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7840                 clear_hv_tscchange_cb();
7841 #endif
7842         kvm_lapic_exit();
7843         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7844
7845         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7846                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7847                                             CPUFREQ_TRANSITION_NOTIFIER);
7848         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7849 #ifdef CONFIG_X86_64
7850         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7851 #endif
7852         kvm_x86_ops.hardware_enable = NULL;
7853         kvm_mmu_module_exit();
7854         free_percpu(user_return_msrs);
7855         kmem_cache_destroy(x86_fpu_cache);
7856 }
7857
7858 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7859 {
7860         ++vcpu->stat.halt_exits;
7861         if (lapic_in_kernel(vcpu)) {
7862                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7863                 return 1;
7864         } else {
7865                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7866                 return 0;
7867         }
7868 }
7869 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7870
7871 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7872 {
7873         int ret = kvm_skip_emulated_instruction(vcpu);
7874         /*
7875          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7876          * KVM_EXIT_DEBUG here.
7877          */
7878         return kvm_vcpu_halt(vcpu) && ret;
7879 }
7880 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7881
7882 #ifdef CONFIG_X86_64
7883 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7884                                 unsigned long clock_type)
7885 {
7886         struct kvm_clock_pairing clock_pairing;
7887         struct timespec64 ts;
7888         u64 cycle;
7889         int ret;
7890
7891         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7892                 return -KVM_EOPNOTSUPP;
7893
7894         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7895                 return -KVM_EOPNOTSUPP;
7896
7897         clock_pairing.sec = ts.tv_sec;
7898         clock_pairing.nsec = ts.tv_nsec;
7899         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7900         clock_pairing.flags = 0;
7901         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7902
7903         ret = 0;
7904         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7905                             sizeof(struct kvm_clock_pairing)))
7906                 ret = -KVM_EFAULT;
7907
7908         return ret;
7909 }
7910 #endif
7911
7912 /*
7913  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7914  *
7915  * @apicid - apicid of vcpu to be kicked.
7916  */
7917 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7918 {
7919         struct kvm_lapic_irq lapic_irq;
7920
7921         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7922         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7923         lapic_irq.level = 0;
7924         lapic_irq.dest_id = apicid;
7925         lapic_irq.msi_redir_hint = false;
7926
7927         lapic_irq.delivery_mode = APIC_DM_REMRD;
7928         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7929 }
7930
7931 bool kvm_apicv_activated(struct kvm *kvm)
7932 {
7933         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
7934 }
7935 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
7936
7937 void kvm_apicv_init(struct kvm *kvm, bool enable)
7938 {
7939         if (enable)
7940                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
7941                           &kvm->arch.apicv_inhibit_reasons);
7942         else
7943                 set_bit(APICV_INHIBIT_REASON_DISABLE,
7944                         &kvm->arch.apicv_inhibit_reasons);
7945 }
7946 EXPORT_SYMBOL_GPL(kvm_apicv_init);
7947
7948 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7949 {
7950         struct kvm_vcpu *target = NULL;
7951         struct kvm_apic_map *map;
7952
7953         rcu_read_lock();
7954         map = rcu_dereference(kvm->arch.apic_map);
7955
7956         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7957                 target = map->phys_map[dest_id]->vcpu;
7958
7959         rcu_read_unlock();
7960
7961         if (target && READ_ONCE(target->ready))
7962                 kvm_vcpu_yield_to(target);
7963 }
7964
7965 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7966 {
7967         unsigned long nr, a0, a1, a2, a3, ret;
7968         int op_64_bit;
7969
7970         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7971                 return kvm_hv_hypercall(vcpu);
7972
7973         nr = kvm_rax_read(vcpu);
7974         a0 = kvm_rbx_read(vcpu);
7975         a1 = kvm_rcx_read(vcpu);
7976         a2 = kvm_rdx_read(vcpu);
7977         a3 = kvm_rsi_read(vcpu);
7978
7979         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7980
7981         op_64_bit = is_64_bit_mode(vcpu);
7982         if (!op_64_bit) {
7983                 nr &= 0xFFFFFFFF;
7984                 a0 &= 0xFFFFFFFF;
7985                 a1 &= 0xFFFFFFFF;
7986                 a2 &= 0xFFFFFFFF;
7987                 a3 &= 0xFFFFFFFF;
7988         }
7989
7990         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
7991                 ret = -KVM_EPERM;
7992                 goto out;
7993         }
7994
7995         switch (nr) {
7996         case KVM_HC_VAPIC_POLL_IRQ:
7997                 ret = 0;
7998                 break;
7999         case KVM_HC_KICK_CPU:
8000                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8001                 kvm_sched_yield(vcpu->kvm, a1);
8002                 ret = 0;
8003                 break;
8004 #ifdef CONFIG_X86_64
8005         case KVM_HC_CLOCK_PAIRING:
8006                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8007                 break;
8008 #endif
8009         case KVM_HC_SEND_IPI:
8010                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8011                 break;
8012         case KVM_HC_SCHED_YIELD:
8013                 kvm_sched_yield(vcpu->kvm, a0);
8014                 ret = 0;
8015                 break;
8016         default:
8017                 ret = -KVM_ENOSYS;
8018                 break;
8019         }
8020 out:
8021         if (!op_64_bit)
8022                 ret = (u32)ret;
8023         kvm_rax_write(vcpu, ret);
8024
8025         ++vcpu->stat.hypercalls;
8026         return kvm_skip_emulated_instruction(vcpu);
8027 }
8028 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8029
8030 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8031 {
8032         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8033         char instruction[3];
8034         unsigned long rip = kvm_rip_read(vcpu);
8035
8036         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8037
8038         return emulator_write_emulated(ctxt, rip, instruction, 3,
8039                 &ctxt->exception);
8040 }
8041
8042 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8043 {
8044         return vcpu->run->request_interrupt_window &&
8045                 likely(!pic_in_kernel(vcpu->kvm));
8046 }
8047
8048 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8049 {
8050         struct kvm_run *kvm_run = vcpu->run;
8051
8052         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8053         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8054         kvm_run->cr8 = kvm_get_cr8(vcpu);
8055         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8056         kvm_run->ready_for_interrupt_injection =
8057                 pic_in_kernel(vcpu->kvm) ||
8058                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8059 }
8060
8061 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8062 {
8063         int max_irr, tpr;
8064
8065         if (!kvm_x86_ops.update_cr8_intercept)
8066                 return;
8067
8068         if (!lapic_in_kernel(vcpu))
8069                 return;
8070
8071         if (vcpu->arch.apicv_active)
8072                 return;
8073
8074         if (!vcpu->arch.apic->vapic_addr)
8075                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8076         else
8077                 max_irr = -1;
8078
8079         if (max_irr != -1)
8080                 max_irr >>= 4;
8081
8082         tpr = kvm_lapic_get_cr8(vcpu);
8083
8084         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8085 }
8086
8087 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8088 {
8089         int r;
8090         bool can_inject = true;
8091
8092         /* try to reinject previous events if any */
8093
8094         if (vcpu->arch.exception.injected) {
8095                 kvm_x86_ops.queue_exception(vcpu);
8096                 can_inject = false;
8097         }
8098         /*
8099          * Do not inject an NMI or interrupt if there is a pending
8100          * exception.  Exceptions and interrupts are recognized at
8101          * instruction boundaries, i.e. the start of an instruction.
8102          * Trap-like exceptions, e.g. #DB, have higher priority than
8103          * NMIs and interrupts, i.e. traps are recognized before an
8104          * NMI/interrupt that's pending on the same instruction.
8105          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8106          * priority, but are only generated (pended) during instruction
8107          * execution, i.e. a pending fault-like exception means the
8108          * fault occurred on the *previous* instruction and must be
8109          * serviced prior to recognizing any new events in order to
8110          * fully complete the previous instruction.
8111          */
8112         else if (!vcpu->arch.exception.pending) {
8113                 if (vcpu->arch.nmi_injected) {
8114                         kvm_x86_ops.set_nmi(vcpu);
8115                         can_inject = false;
8116                 } else if (vcpu->arch.interrupt.injected) {
8117                         kvm_x86_ops.set_irq(vcpu);
8118                         can_inject = false;
8119                 }
8120         }
8121
8122         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8123                      vcpu->arch.exception.pending);
8124
8125         /*
8126          * Call check_nested_events() even if we reinjected a previous event
8127          * in order for caller to determine if it should require immediate-exit
8128          * from L2 to L1 due to pending L1 events which require exit
8129          * from L2 to L1.
8130          */
8131         if (is_guest_mode(vcpu)) {
8132                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8133                 if (r < 0)
8134                         goto busy;
8135         }
8136
8137         /* try to inject new event if pending */
8138         if (vcpu->arch.exception.pending) {
8139                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8140                                         vcpu->arch.exception.has_error_code,
8141                                         vcpu->arch.exception.error_code);
8142
8143                 vcpu->arch.exception.pending = false;
8144                 vcpu->arch.exception.injected = true;
8145
8146                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8147                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8148                                              X86_EFLAGS_RF);
8149
8150                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8151                         kvm_deliver_exception_payload(vcpu);
8152                         if (vcpu->arch.dr7 & DR7_GD) {
8153                                 vcpu->arch.dr7 &= ~DR7_GD;
8154                                 kvm_update_dr7(vcpu);
8155                         }
8156                 }
8157
8158                 kvm_x86_ops.queue_exception(vcpu);
8159                 can_inject = false;
8160         }
8161
8162         /*
8163          * Finally, inject interrupt events.  If an event cannot be injected
8164          * due to architectural conditions (e.g. IF=0) a window-open exit
8165          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8166          * and can architecturally be injected, but we cannot do it right now:
8167          * an interrupt could have arrived just now and we have to inject it
8168          * as a vmexit, or there could already an event in the queue, which is
8169          * indicated by can_inject.  In that case we request an immediate exit
8170          * in order to make progress and get back here for another iteration.
8171          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8172          */
8173         if (vcpu->arch.smi_pending) {
8174                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8175                 if (r < 0)
8176                         goto busy;
8177                 if (r) {
8178                         vcpu->arch.smi_pending = false;
8179                         ++vcpu->arch.smi_count;
8180                         enter_smm(vcpu);
8181                         can_inject = false;
8182                 } else
8183                         kvm_x86_ops.enable_smi_window(vcpu);
8184         }
8185
8186         if (vcpu->arch.nmi_pending) {
8187                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8188                 if (r < 0)
8189                         goto busy;
8190                 if (r) {
8191                         --vcpu->arch.nmi_pending;
8192                         vcpu->arch.nmi_injected = true;
8193                         kvm_x86_ops.set_nmi(vcpu);
8194                         can_inject = false;
8195                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8196                 }
8197                 if (vcpu->arch.nmi_pending)
8198                         kvm_x86_ops.enable_nmi_window(vcpu);
8199         }
8200
8201         if (kvm_cpu_has_injectable_intr(vcpu)) {
8202                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8203                 if (r < 0)
8204                         goto busy;
8205                 if (r) {
8206                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8207                         kvm_x86_ops.set_irq(vcpu);
8208                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8209                 }
8210                 if (kvm_cpu_has_injectable_intr(vcpu))
8211                         kvm_x86_ops.enable_irq_window(vcpu);
8212         }
8213
8214         if (is_guest_mode(vcpu) &&
8215             kvm_x86_ops.nested_ops->hv_timer_pending &&
8216             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8217                 *req_immediate_exit = true;
8218
8219         WARN_ON(vcpu->arch.exception.pending);
8220         return;
8221
8222 busy:
8223         *req_immediate_exit = true;
8224         return;
8225 }
8226
8227 static void process_nmi(struct kvm_vcpu *vcpu)
8228 {
8229         unsigned limit = 2;
8230
8231         /*
8232          * x86 is limited to one NMI running, and one NMI pending after it.
8233          * If an NMI is already in progress, limit further NMIs to just one.
8234          * Otherwise, allow two (and we'll inject the first one immediately).
8235          */
8236         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8237                 limit = 1;
8238
8239         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8240         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8241         kvm_make_request(KVM_REQ_EVENT, vcpu);
8242 }
8243
8244 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8245 {
8246         u32 flags = 0;
8247         flags |= seg->g       << 23;
8248         flags |= seg->db      << 22;
8249         flags |= seg->l       << 21;
8250         flags |= seg->avl     << 20;
8251         flags |= seg->present << 15;
8252         flags |= seg->dpl     << 13;
8253         flags |= seg->s       << 12;
8254         flags |= seg->type    << 8;
8255         return flags;
8256 }
8257
8258 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8259 {
8260         struct kvm_segment seg;
8261         int offset;
8262
8263         kvm_get_segment(vcpu, &seg, n);
8264         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8265
8266         if (n < 3)
8267                 offset = 0x7f84 + n * 12;
8268         else
8269                 offset = 0x7f2c + (n - 3) * 12;
8270
8271         put_smstate(u32, buf, offset + 8, seg.base);
8272         put_smstate(u32, buf, offset + 4, seg.limit);
8273         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8274 }
8275
8276 #ifdef CONFIG_X86_64
8277 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8278 {
8279         struct kvm_segment seg;
8280         int offset;
8281         u16 flags;
8282
8283         kvm_get_segment(vcpu, &seg, n);
8284         offset = 0x7e00 + n * 16;
8285
8286         flags = enter_smm_get_segment_flags(&seg) >> 8;
8287         put_smstate(u16, buf, offset, seg.selector);
8288         put_smstate(u16, buf, offset + 2, flags);
8289         put_smstate(u32, buf, offset + 4, seg.limit);
8290         put_smstate(u64, buf, offset + 8, seg.base);
8291 }
8292 #endif
8293
8294 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8295 {
8296         struct desc_ptr dt;
8297         struct kvm_segment seg;
8298         unsigned long val;
8299         int i;
8300
8301         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8302         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8303         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8304         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8305
8306         for (i = 0; i < 8; i++)
8307                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8308
8309         kvm_get_dr(vcpu, 6, &val);
8310         put_smstate(u32, buf, 0x7fcc, (u32)val);
8311         kvm_get_dr(vcpu, 7, &val);
8312         put_smstate(u32, buf, 0x7fc8, (u32)val);
8313
8314         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8315         put_smstate(u32, buf, 0x7fc4, seg.selector);
8316         put_smstate(u32, buf, 0x7f64, seg.base);
8317         put_smstate(u32, buf, 0x7f60, seg.limit);
8318         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8319
8320         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8321         put_smstate(u32, buf, 0x7fc0, seg.selector);
8322         put_smstate(u32, buf, 0x7f80, seg.base);
8323         put_smstate(u32, buf, 0x7f7c, seg.limit);
8324         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8325
8326         kvm_x86_ops.get_gdt(vcpu, &dt);
8327         put_smstate(u32, buf, 0x7f74, dt.address);
8328         put_smstate(u32, buf, 0x7f70, dt.size);
8329
8330         kvm_x86_ops.get_idt(vcpu, &dt);
8331         put_smstate(u32, buf, 0x7f58, dt.address);
8332         put_smstate(u32, buf, 0x7f54, dt.size);
8333
8334         for (i = 0; i < 6; i++)
8335                 enter_smm_save_seg_32(vcpu, buf, i);
8336
8337         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8338
8339         /* revision id */
8340         put_smstate(u32, buf, 0x7efc, 0x00020000);
8341         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8342 }
8343
8344 #ifdef CONFIG_X86_64
8345 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8346 {
8347         struct desc_ptr dt;
8348         struct kvm_segment seg;
8349         unsigned long val;
8350         int i;
8351
8352         for (i = 0; i < 16; i++)
8353                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8354
8355         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8356         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8357
8358         kvm_get_dr(vcpu, 6, &val);
8359         put_smstate(u64, buf, 0x7f68, val);
8360         kvm_get_dr(vcpu, 7, &val);
8361         put_smstate(u64, buf, 0x7f60, val);
8362
8363         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8364         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8365         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8366
8367         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8368
8369         /* revision id */
8370         put_smstate(u32, buf, 0x7efc, 0x00020064);
8371
8372         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8373
8374         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8375         put_smstate(u16, buf, 0x7e90, seg.selector);
8376         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8377         put_smstate(u32, buf, 0x7e94, seg.limit);
8378         put_smstate(u64, buf, 0x7e98, seg.base);
8379
8380         kvm_x86_ops.get_idt(vcpu, &dt);
8381         put_smstate(u32, buf, 0x7e84, dt.size);
8382         put_smstate(u64, buf, 0x7e88, dt.address);
8383
8384         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8385         put_smstate(u16, buf, 0x7e70, seg.selector);
8386         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8387         put_smstate(u32, buf, 0x7e74, seg.limit);
8388         put_smstate(u64, buf, 0x7e78, seg.base);
8389
8390         kvm_x86_ops.get_gdt(vcpu, &dt);
8391         put_smstate(u32, buf, 0x7e64, dt.size);
8392         put_smstate(u64, buf, 0x7e68, dt.address);
8393
8394         for (i = 0; i < 6; i++)
8395                 enter_smm_save_seg_64(vcpu, buf, i);
8396 }
8397 #endif
8398
8399 static void enter_smm(struct kvm_vcpu *vcpu)
8400 {
8401         struct kvm_segment cs, ds;
8402         struct desc_ptr dt;
8403         char buf[512];
8404         u32 cr0;
8405
8406         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8407         memset(buf, 0, 512);
8408 #ifdef CONFIG_X86_64
8409         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8410                 enter_smm_save_state_64(vcpu, buf);
8411         else
8412 #endif
8413                 enter_smm_save_state_32(vcpu, buf);
8414
8415         /*
8416          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8417          * vCPU state (e.g. leave guest mode) after we've saved the state into
8418          * the SMM state-save area.
8419          */
8420         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8421
8422         vcpu->arch.hflags |= HF_SMM_MASK;
8423         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8424
8425         if (kvm_x86_ops.get_nmi_mask(vcpu))
8426                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8427         else
8428                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8429
8430         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8431         kvm_rip_write(vcpu, 0x8000);
8432
8433         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8434         kvm_x86_ops.set_cr0(vcpu, cr0);
8435         vcpu->arch.cr0 = cr0;
8436
8437         kvm_x86_ops.set_cr4(vcpu, 0);
8438
8439         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8440         dt.address = dt.size = 0;
8441         kvm_x86_ops.set_idt(vcpu, &dt);
8442
8443         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8444
8445         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8446         cs.base = vcpu->arch.smbase;
8447
8448         ds.selector = 0;
8449         ds.base = 0;
8450
8451         cs.limit    = ds.limit = 0xffffffff;
8452         cs.type     = ds.type = 0x3;
8453         cs.dpl      = ds.dpl = 0;
8454         cs.db       = ds.db = 0;
8455         cs.s        = ds.s = 1;
8456         cs.l        = ds.l = 0;
8457         cs.g        = ds.g = 1;
8458         cs.avl      = ds.avl = 0;
8459         cs.present  = ds.present = 1;
8460         cs.unusable = ds.unusable = 0;
8461         cs.padding  = ds.padding = 0;
8462
8463         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8464         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8465         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8466         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8467         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8468         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8469
8470 #ifdef CONFIG_X86_64
8471         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8472                 kvm_x86_ops.set_efer(vcpu, 0);
8473 #endif
8474
8475         kvm_update_cpuid_runtime(vcpu);
8476         kvm_mmu_reset_context(vcpu);
8477 }
8478
8479 static void process_smi(struct kvm_vcpu *vcpu)
8480 {
8481         vcpu->arch.smi_pending = true;
8482         kvm_make_request(KVM_REQ_EVENT, vcpu);
8483 }
8484
8485 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8486                                        unsigned long *vcpu_bitmap)
8487 {
8488         cpumask_var_t cpus;
8489
8490         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8491
8492         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8493                                     NULL, vcpu_bitmap, cpus);
8494
8495         free_cpumask_var(cpus);
8496 }
8497
8498 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8499 {
8500         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8501 }
8502
8503 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8504 {
8505         if (!lapic_in_kernel(vcpu))
8506                 return;
8507
8508         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8509         kvm_apic_update_apicv(vcpu);
8510         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8511 }
8512 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8513
8514 /*
8515  * NOTE: Do not hold any lock prior to calling this.
8516  *
8517  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8518  * locked, because it calls __x86_set_memory_region() which does
8519  * synchronize_srcu(&kvm->srcu).
8520  */
8521 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8522 {
8523         struct kvm_vcpu *except;
8524         unsigned long old, new, expected;
8525
8526         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8527             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8528                 return;
8529
8530         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8531         do {
8532                 expected = new = old;
8533                 if (activate)
8534                         __clear_bit(bit, &new);
8535                 else
8536                         __set_bit(bit, &new);
8537                 if (new == old)
8538                         break;
8539                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8540         } while (old != expected);
8541
8542         if (!!old == !!new)
8543                 return;
8544
8545         trace_kvm_apicv_update_request(activate, bit);
8546         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8547                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8548
8549         /*
8550          * Sending request to update APICV for all other vcpus,
8551          * while update the calling vcpu immediately instead of
8552          * waiting for another #VMEXIT to handle the request.
8553          */
8554         except = kvm_get_running_vcpu();
8555         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8556                                          except);
8557         if (except)
8558                 kvm_vcpu_update_apicv(except);
8559 }
8560 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8561
8562 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8563 {
8564         if (!kvm_apic_present(vcpu))
8565                 return;
8566
8567         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8568
8569         if (irqchip_split(vcpu->kvm))
8570                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8571         else {
8572                 if (vcpu->arch.apicv_active)
8573                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8574                 if (ioapic_in_kernel(vcpu->kvm))
8575                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8576         }
8577
8578         if (is_guest_mode(vcpu))
8579                 vcpu->arch.load_eoi_exitmap_pending = true;
8580         else
8581                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8582 }
8583
8584 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8585 {
8586         u64 eoi_exit_bitmap[4];
8587
8588         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8589                 return;
8590
8591         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8592                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8593         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8594 }
8595
8596 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8597                                             unsigned long start, unsigned long end)
8598 {
8599         unsigned long apic_address;
8600
8601         /*
8602          * The physical address of apic access page is stored in the VMCS.
8603          * Update it when it becomes invalid.
8604          */
8605         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8606         if (start <= apic_address && apic_address < end)
8607                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8608 }
8609
8610 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8611 {
8612         if (!lapic_in_kernel(vcpu))
8613                 return;
8614
8615         if (!kvm_x86_ops.set_apic_access_page_addr)
8616                 return;
8617
8618         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8619 }
8620
8621 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8622 {
8623         smp_send_reschedule(vcpu->cpu);
8624 }
8625 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8626
8627 /*
8628  * Returns 1 to let vcpu_run() continue the guest execution loop without
8629  * exiting to the userspace.  Otherwise, the value will be returned to the
8630  * userspace.
8631  */
8632 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8633 {
8634         int r;
8635         bool req_int_win =
8636                 dm_request_for_irq_injection(vcpu) &&
8637                 kvm_cpu_accept_dm_intr(vcpu);
8638         fastpath_t exit_fastpath;
8639
8640         bool req_immediate_exit = false;
8641
8642         if (kvm_request_pending(vcpu)) {
8643                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
8644                         if (unlikely(!kvm_x86_ops.nested_ops->get_vmcs12_pages(vcpu))) {
8645                                 r = 0;
8646                                 goto out;
8647                         }
8648                 }
8649                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8650                         kvm_mmu_unload(vcpu);
8651                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8652                         __kvm_migrate_timers(vcpu);
8653                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8654                         kvm_gen_update_masterclock(vcpu->kvm);
8655                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8656                         kvm_gen_kvmclock_update(vcpu);
8657                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8658                         r = kvm_guest_time_update(vcpu);
8659                         if (unlikely(r))
8660                                 goto out;
8661                 }
8662                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8663                         kvm_mmu_sync_roots(vcpu);
8664                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8665                         kvm_mmu_load_pgd(vcpu);
8666                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8667                         kvm_vcpu_flush_tlb_all(vcpu);
8668
8669                         /* Flushing all ASIDs flushes the current ASID... */
8670                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8671                 }
8672                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8673                         kvm_vcpu_flush_tlb_current(vcpu);
8674                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8675                         kvm_vcpu_flush_tlb_guest(vcpu);
8676
8677                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8678                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8679                         r = 0;
8680                         goto out;
8681                 }
8682                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8683                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8684                         vcpu->mmio_needed = 0;
8685                         r = 0;
8686                         goto out;
8687                 }
8688                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8689                         /* Page is swapped out. Do synthetic halt */
8690                         vcpu->arch.apf.halted = true;
8691                         r = 1;
8692                         goto out;
8693                 }
8694                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8695                         record_steal_time(vcpu);
8696                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8697                         process_smi(vcpu);
8698                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8699                         process_nmi(vcpu);
8700                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8701                         kvm_pmu_handle_event(vcpu);
8702                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8703                         kvm_pmu_deliver_pmi(vcpu);
8704                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8705                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8706                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8707                                      vcpu->arch.ioapic_handled_vectors)) {
8708                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8709                                 vcpu->run->eoi.vector =
8710                                                 vcpu->arch.pending_ioapic_eoi;
8711                                 r = 0;
8712                                 goto out;
8713                         }
8714                 }
8715                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8716                         vcpu_scan_ioapic(vcpu);
8717                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8718                         vcpu_load_eoi_exitmap(vcpu);
8719                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8720                         kvm_vcpu_reload_apic_access_page(vcpu);
8721                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8722                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8723                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8724                         r = 0;
8725                         goto out;
8726                 }
8727                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8728                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8729                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8730                         r = 0;
8731                         goto out;
8732                 }
8733                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8734                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8735                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8736                         r = 0;
8737                         goto out;
8738                 }
8739
8740                 /*
8741                  * KVM_REQ_HV_STIMER has to be processed after
8742                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8743                  * depend on the guest clock being up-to-date
8744                  */
8745                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8746                         kvm_hv_process_stimers(vcpu);
8747                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8748                         kvm_vcpu_update_apicv(vcpu);
8749                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8750                         kvm_check_async_pf_completion(vcpu);
8751                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8752                         kvm_x86_ops.msr_filter_changed(vcpu);
8753         }
8754
8755         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8756                 ++vcpu->stat.req_event;
8757                 kvm_apic_accept_events(vcpu);
8758                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8759                         r = 1;
8760                         goto out;
8761                 }
8762
8763                 inject_pending_event(vcpu, &req_immediate_exit);
8764                 if (req_int_win)
8765                         kvm_x86_ops.enable_irq_window(vcpu);
8766
8767                 if (kvm_lapic_enabled(vcpu)) {
8768                         update_cr8_intercept(vcpu);
8769                         kvm_lapic_sync_to_vapic(vcpu);
8770                 }
8771         }
8772
8773         r = kvm_mmu_reload(vcpu);
8774         if (unlikely(r)) {
8775                 goto cancel_injection;
8776         }
8777
8778         preempt_disable();
8779
8780         kvm_x86_ops.prepare_guest_switch(vcpu);
8781
8782         /*
8783          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8784          * IPI are then delayed after guest entry, which ensures that they
8785          * result in virtual interrupt delivery.
8786          */
8787         local_irq_disable();
8788         vcpu->mode = IN_GUEST_MODE;
8789
8790         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8791
8792         /*
8793          * 1) We should set ->mode before checking ->requests.  Please see
8794          * the comment in kvm_vcpu_exiting_guest_mode().
8795          *
8796          * 2) For APICv, we should set ->mode before checking PID.ON. This
8797          * pairs with the memory barrier implicit in pi_test_and_set_on
8798          * (see vmx_deliver_posted_interrupt).
8799          *
8800          * 3) This also orders the write to mode from any reads to the page
8801          * tables done while the VCPU is running.  Please see the comment
8802          * in kvm_flush_remote_tlbs.
8803          */
8804         smp_mb__after_srcu_read_unlock();
8805
8806         /*
8807          * This handles the case where a posted interrupt was
8808          * notified with kvm_vcpu_kick.
8809          */
8810         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8811                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8812
8813         if (kvm_vcpu_exit_request(vcpu)) {
8814                 vcpu->mode = OUTSIDE_GUEST_MODE;
8815                 smp_wmb();
8816                 local_irq_enable();
8817                 preempt_enable();
8818                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8819                 r = 1;
8820                 goto cancel_injection;
8821         }
8822
8823         if (req_immediate_exit) {
8824                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8825                 kvm_x86_ops.request_immediate_exit(vcpu);
8826         }
8827
8828         trace_kvm_entry(vcpu);
8829
8830         fpregs_assert_state_consistent();
8831         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8832                 switch_fpu_return();
8833
8834         if (unlikely(vcpu->arch.switch_db_regs)) {
8835                 set_debugreg(0, 7);
8836                 set_debugreg(vcpu->arch.eff_db[0], 0);
8837                 set_debugreg(vcpu->arch.eff_db[1], 1);
8838                 set_debugreg(vcpu->arch.eff_db[2], 2);
8839                 set_debugreg(vcpu->arch.eff_db[3], 3);
8840                 set_debugreg(vcpu->arch.dr6, 6);
8841                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8842         }
8843
8844         exit_fastpath = kvm_x86_ops.run(vcpu);
8845
8846         /*
8847          * Do this here before restoring debug registers on the host.  And
8848          * since we do this before handling the vmexit, a DR access vmexit
8849          * can (a) read the correct value of the debug registers, (b) set
8850          * KVM_DEBUGREG_WONT_EXIT again.
8851          */
8852         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8853                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8854                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8855                 kvm_update_dr0123(vcpu);
8856                 kvm_update_dr7(vcpu);
8857                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8858         }
8859
8860         /*
8861          * If the guest has used debug registers, at least dr7
8862          * will be disabled while returning to the host.
8863          * If we don't have active breakpoints in the host, we don't
8864          * care about the messed up debug address registers. But if
8865          * we have some of them active, restore the old state.
8866          */
8867         if (hw_breakpoint_active())
8868                 hw_breakpoint_restore();
8869
8870         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8871         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8872
8873         vcpu->mode = OUTSIDE_GUEST_MODE;
8874         smp_wmb();
8875
8876         kvm_x86_ops.handle_exit_irqoff(vcpu);
8877
8878         /*
8879          * Consume any pending interrupts, including the possible source of
8880          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8881          * An instruction is required after local_irq_enable() to fully unblock
8882          * interrupts on processors that implement an interrupt shadow, the
8883          * stat.exits increment will do nicely.
8884          */
8885         kvm_before_interrupt(vcpu);
8886         local_irq_enable();
8887         ++vcpu->stat.exits;
8888         local_irq_disable();
8889         kvm_after_interrupt(vcpu);
8890
8891         if (lapic_in_kernel(vcpu)) {
8892                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8893                 if (delta != S64_MIN) {
8894                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8895                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8896                 }
8897         }
8898
8899         local_irq_enable();
8900         preempt_enable();
8901
8902         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8903
8904         /*
8905          * Profile KVM exit RIPs:
8906          */
8907         if (unlikely(prof_on == KVM_PROFILING)) {
8908                 unsigned long rip = kvm_rip_read(vcpu);
8909                 profile_hit(KVM_PROFILING, (void *)rip);
8910         }
8911
8912         if (unlikely(vcpu->arch.tsc_always_catchup))
8913                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8914
8915         if (vcpu->arch.apic_attention)
8916                 kvm_lapic_sync_from_vapic(vcpu);
8917
8918         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
8919         return r;
8920
8921 cancel_injection:
8922         if (req_immediate_exit)
8923                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8924         kvm_x86_ops.cancel_injection(vcpu);
8925         if (unlikely(vcpu->arch.apic_attention))
8926                 kvm_lapic_sync_from_vapic(vcpu);
8927 out:
8928         return r;
8929 }
8930
8931 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8932 {
8933         if (!kvm_arch_vcpu_runnable(vcpu) &&
8934             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
8935                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8936                 kvm_vcpu_block(vcpu);
8937                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8938
8939                 if (kvm_x86_ops.post_block)
8940                         kvm_x86_ops.post_block(vcpu);
8941
8942                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8943                         return 1;
8944         }
8945
8946         kvm_apic_accept_events(vcpu);
8947         switch(vcpu->arch.mp_state) {
8948         case KVM_MP_STATE_HALTED:
8949                 vcpu->arch.pv.pv_unhalted = false;
8950                 vcpu->arch.mp_state =
8951                         KVM_MP_STATE_RUNNABLE;
8952                 fallthrough;
8953         case KVM_MP_STATE_RUNNABLE:
8954                 vcpu->arch.apf.halted = false;
8955                 break;
8956         case KVM_MP_STATE_INIT_RECEIVED:
8957                 break;
8958         default:
8959                 return -EINTR;
8960         }
8961         return 1;
8962 }
8963
8964 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8965 {
8966         if (is_guest_mode(vcpu))
8967                 kvm_x86_ops.nested_ops->check_events(vcpu);
8968
8969         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8970                 !vcpu->arch.apf.halted);
8971 }
8972
8973 static int vcpu_run(struct kvm_vcpu *vcpu)
8974 {
8975         int r;
8976         struct kvm *kvm = vcpu->kvm;
8977
8978         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8979         vcpu->arch.l1tf_flush_l1d = true;
8980
8981         for (;;) {
8982                 if (kvm_vcpu_running(vcpu)) {
8983                         r = vcpu_enter_guest(vcpu);
8984                 } else {
8985                         r = vcpu_block(kvm, vcpu);
8986                 }
8987
8988                 if (r <= 0)
8989                         break;
8990
8991                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8992                 if (kvm_cpu_has_pending_timer(vcpu))
8993                         kvm_inject_pending_timer_irqs(vcpu);
8994
8995                 if (dm_request_for_irq_injection(vcpu) &&
8996                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8997                         r = 0;
8998                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8999                         ++vcpu->stat.request_irq_exits;
9000                         break;
9001                 }
9002
9003                 if (__xfer_to_guest_mode_work_pending()) {
9004                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9005                         r = xfer_to_guest_mode_handle_work(vcpu);
9006                         if (r)
9007                                 return r;
9008                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9009                 }
9010         }
9011
9012         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9013
9014         return r;
9015 }
9016
9017 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9018 {
9019         int r;
9020
9021         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9022         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9023         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9024         return r;
9025 }
9026
9027 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9028 {
9029         BUG_ON(!vcpu->arch.pio.count);
9030
9031         return complete_emulated_io(vcpu);
9032 }
9033
9034 /*
9035  * Implements the following, as a state machine:
9036  *
9037  * read:
9038  *   for each fragment
9039  *     for each mmio piece in the fragment
9040  *       write gpa, len
9041  *       exit
9042  *       copy data
9043  *   execute insn
9044  *
9045  * write:
9046  *   for each fragment
9047  *     for each mmio piece in the fragment
9048  *       write gpa, len
9049  *       copy data
9050  *       exit
9051  */
9052 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9053 {
9054         struct kvm_run *run = vcpu->run;
9055         struct kvm_mmio_fragment *frag;
9056         unsigned len;
9057
9058         BUG_ON(!vcpu->mmio_needed);
9059
9060         /* Complete previous fragment */
9061         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9062         len = min(8u, frag->len);
9063         if (!vcpu->mmio_is_write)
9064                 memcpy(frag->data, run->mmio.data, len);
9065
9066         if (frag->len <= 8) {
9067                 /* Switch to the next fragment. */
9068                 frag++;
9069                 vcpu->mmio_cur_fragment++;
9070         } else {
9071                 /* Go forward to the next mmio piece. */
9072                 frag->data += len;
9073                 frag->gpa += len;
9074                 frag->len -= len;
9075         }
9076
9077         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9078                 vcpu->mmio_needed = 0;
9079
9080                 /* FIXME: return into emulator if single-stepping.  */
9081                 if (vcpu->mmio_is_write)
9082                         return 1;
9083                 vcpu->mmio_read_completed = 1;
9084                 return complete_emulated_io(vcpu);
9085         }
9086
9087         run->exit_reason = KVM_EXIT_MMIO;
9088         run->mmio.phys_addr = frag->gpa;
9089         if (vcpu->mmio_is_write)
9090                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9091         run->mmio.len = min(8u, frag->len);
9092         run->mmio.is_write = vcpu->mmio_is_write;
9093         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9094         return 0;
9095 }
9096
9097 static void kvm_save_current_fpu(struct fpu *fpu)
9098 {
9099         /*
9100          * If the target FPU state is not resident in the CPU registers, just
9101          * memcpy() from current, else save CPU state directly to the target.
9102          */
9103         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9104                 memcpy(&fpu->state, &current->thread.fpu.state,
9105                        fpu_kernel_xstate_size);
9106         else
9107                 copy_fpregs_to_fpstate(fpu);
9108 }
9109
9110 /* Swap (qemu) user FPU context for the guest FPU context. */
9111 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9112 {
9113         fpregs_lock();
9114
9115         kvm_save_current_fpu(vcpu->arch.user_fpu);
9116
9117         /* PKRU is separately restored in kvm_x86_ops.run.  */
9118         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9119                                 ~XFEATURE_MASK_PKRU);
9120
9121         fpregs_mark_activate();
9122         fpregs_unlock();
9123
9124         trace_kvm_fpu(1);
9125 }
9126
9127 /* When vcpu_run ends, restore user space FPU context. */
9128 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9129 {
9130         fpregs_lock();
9131
9132         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9133
9134         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9135
9136         fpregs_mark_activate();
9137         fpregs_unlock();
9138
9139         ++vcpu->stat.fpu_reload;
9140         trace_kvm_fpu(0);
9141 }
9142
9143 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9144 {
9145         struct kvm_run *kvm_run = vcpu->run;
9146         int r;
9147
9148         vcpu_load(vcpu);
9149         kvm_sigset_activate(vcpu);
9150         kvm_load_guest_fpu(vcpu);
9151
9152         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9153                 if (kvm_run->immediate_exit) {
9154                         r = -EINTR;
9155                         goto out;
9156                 }
9157                 kvm_vcpu_block(vcpu);
9158                 kvm_apic_accept_events(vcpu);
9159                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9160                 r = -EAGAIN;
9161                 if (signal_pending(current)) {
9162                         r = -EINTR;
9163                         kvm_run->exit_reason = KVM_EXIT_INTR;
9164                         ++vcpu->stat.signal_exits;
9165                 }
9166                 goto out;
9167         }
9168
9169         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9170                 r = -EINVAL;
9171                 goto out;
9172         }
9173
9174         if (kvm_run->kvm_dirty_regs) {
9175                 r = sync_regs(vcpu);
9176                 if (r != 0)
9177                         goto out;
9178         }
9179
9180         /* re-sync apic's tpr */
9181         if (!lapic_in_kernel(vcpu)) {
9182                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9183                         r = -EINVAL;
9184                         goto out;
9185                 }
9186         }
9187
9188         if (unlikely(vcpu->arch.complete_userspace_io)) {
9189                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9190                 vcpu->arch.complete_userspace_io = NULL;
9191                 r = cui(vcpu);
9192                 if (r <= 0)
9193                         goto out;
9194         } else
9195                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9196
9197         if (kvm_run->immediate_exit)
9198                 r = -EINTR;
9199         else
9200                 r = vcpu_run(vcpu);
9201
9202 out:
9203         kvm_put_guest_fpu(vcpu);
9204         if (kvm_run->kvm_valid_regs)
9205                 store_regs(vcpu);
9206         post_kvm_run_save(vcpu);
9207         kvm_sigset_deactivate(vcpu);
9208
9209         vcpu_put(vcpu);
9210         return r;
9211 }
9212
9213 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9214 {
9215         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9216                 /*
9217                  * We are here if userspace calls get_regs() in the middle of
9218                  * instruction emulation. Registers state needs to be copied
9219                  * back from emulation context to vcpu. Userspace shouldn't do
9220                  * that usually, but some bad designed PV devices (vmware
9221                  * backdoor interface) need this to work
9222                  */
9223                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9224                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9225         }
9226         regs->rax = kvm_rax_read(vcpu);
9227         regs->rbx = kvm_rbx_read(vcpu);
9228         regs->rcx = kvm_rcx_read(vcpu);
9229         regs->rdx = kvm_rdx_read(vcpu);
9230         regs->rsi = kvm_rsi_read(vcpu);
9231         regs->rdi = kvm_rdi_read(vcpu);
9232         regs->rsp = kvm_rsp_read(vcpu);
9233         regs->rbp = kvm_rbp_read(vcpu);
9234 #ifdef CONFIG_X86_64
9235         regs->r8 = kvm_r8_read(vcpu);
9236         regs->r9 = kvm_r9_read(vcpu);
9237         regs->r10 = kvm_r10_read(vcpu);
9238         regs->r11 = kvm_r11_read(vcpu);
9239         regs->r12 = kvm_r12_read(vcpu);
9240         regs->r13 = kvm_r13_read(vcpu);
9241         regs->r14 = kvm_r14_read(vcpu);
9242         regs->r15 = kvm_r15_read(vcpu);
9243 #endif
9244
9245         regs->rip = kvm_rip_read(vcpu);
9246         regs->rflags = kvm_get_rflags(vcpu);
9247 }
9248
9249 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9250 {
9251         vcpu_load(vcpu);
9252         __get_regs(vcpu, regs);
9253         vcpu_put(vcpu);
9254         return 0;
9255 }
9256
9257 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9258 {
9259         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9260         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9261
9262         kvm_rax_write(vcpu, regs->rax);
9263         kvm_rbx_write(vcpu, regs->rbx);
9264         kvm_rcx_write(vcpu, regs->rcx);
9265         kvm_rdx_write(vcpu, regs->rdx);
9266         kvm_rsi_write(vcpu, regs->rsi);
9267         kvm_rdi_write(vcpu, regs->rdi);
9268         kvm_rsp_write(vcpu, regs->rsp);
9269         kvm_rbp_write(vcpu, regs->rbp);
9270 #ifdef CONFIG_X86_64
9271         kvm_r8_write(vcpu, regs->r8);
9272         kvm_r9_write(vcpu, regs->r9);
9273         kvm_r10_write(vcpu, regs->r10);
9274         kvm_r11_write(vcpu, regs->r11);
9275         kvm_r12_write(vcpu, regs->r12);
9276         kvm_r13_write(vcpu, regs->r13);
9277         kvm_r14_write(vcpu, regs->r14);
9278         kvm_r15_write(vcpu, regs->r15);
9279 #endif
9280
9281         kvm_rip_write(vcpu, regs->rip);
9282         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9283
9284         vcpu->arch.exception.pending = false;
9285
9286         kvm_make_request(KVM_REQ_EVENT, vcpu);
9287 }
9288
9289 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9290 {
9291         vcpu_load(vcpu);
9292         __set_regs(vcpu, regs);
9293         vcpu_put(vcpu);
9294         return 0;
9295 }
9296
9297 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9298 {
9299         struct kvm_segment cs;
9300
9301         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9302         *db = cs.db;
9303         *l = cs.l;
9304 }
9305 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9306
9307 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9308 {
9309         struct desc_ptr dt;
9310
9311         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9312         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9313         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9314         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9315         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9316         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9317
9318         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9319         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9320
9321         kvm_x86_ops.get_idt(vcpu, &dt);
9322         sregs->idt.limit = dt.size;
9323         sregs->idt.base = dt.address;
9324         kvm_x86_ops.get_gdt(vcpu, &dt);
9325         sregs->gdt.limit = dt.size;
9326         sregs->gdt.base = dt.address;
9327
9328         sregs->cr0 = kvm_read_cr0(vcpu);
9329         sregs->cr2 = vcpu->arch.cr2;
9330         sregs->cr3 = kvm_read_cr3(vcpu);
9331         sregs->cr4 = kvm_read_cr4(vcpu);
9332         sregs->cr8 = kvm_get_cr8(vcpu);
9333         sregs->efer = vcpu->arch.efer;
9334         sregs->apic_base = kvm_get_apic_base(vcpu);
9335
9336         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9337
9338         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9339                 set_bit(vcpu->arch.interrupt.nr,
9340                         (unsigned long *)sregs->interrupt_bitmap);
9341 }
9342
9343 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9344                                   struct kvm_sregs *sregs)
9345 {
9346         vcpu_load(vcpu);
9347         __get_sregs(vcpu, sregs);
9348         vcpu_put(vcpu);
9349         return 0;
9350 }
9351
9352 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9353                                     struct kvm_mp_state *mp_state)
9354 {
9355         vcpu_load(vcpu);
9356         if (kvm_mpx_supported())
9357                 kvm_load_guest_fpu(vcpu);
9358
9359         kvm_apic_accept_events(vcpu);
9360         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9361                                         vcpu->arch.pv.pv_unhalted)
9362                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9363         else
9364                 mp_state->mp_state = vcpu->arch.mp_state;
9365
9366         if (kvm_mpx_supported())
9367                 kvm_put_guest_fpu(vcpu);
9368         vcpu_put(vcpu);
9369         return 0;
9370 }
9371
9372 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9373                                     struct kvm_mp_state *mp_state)
9374 {
9375         int ret = -EINVAL;
9376
9377         vcpu_load(vcpu);
9378
9379         if (!lapic_in_kernel(vcpu) &&
9380             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9381                 goto out;
9382
9383         /*
9384          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9385          * INIT state; latched init should be reported using
9386          * KVM_SET_VCPU_EVENTS, so reject it here.
9387          */
9388         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9389             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9390              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9391                 goto out;
9392
9393         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9394                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9395                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9396         } else
9397                 vcpu->arch.mp_state = mp_state->mp_state;
9398         kvm_make_request(KVM_REQ_EVENT, vcpu);
9399
9400         ret = 0;
9401 out:
9402         vcpu_put(vcpu);
9403         return ret;
9404 }
9405
9406 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9407                     int reason, bool has_error_code, u32 error_code)
9408 {
9409         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9410         int ret;
9411
9412         init_emulate_ctxt(vcpu);
9413
9414         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9415                                    has_error_code, error_code);
9416         if (ret) {
9417                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9418                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9419                 vcpu->run->internal.ndata = 0;
9420                 return 0;
9421         }
9422
9423         kvm_rip_write(vcpu, ctxt->eip);
9424         kvm_set_rflags(vcpu, ctxt->eflags);
9425         return 1;
9426 }
9427 EXPORT_SYMBOL_GPL(kvm_task_switch);
9428
9429 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9430 {
9431         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9432                 /*
9433                  * When EFER.LME and CR0.PG are set, the processor is in
9434                  * 64-bit mode (though maybe in a 32-bit code segment).
9435                  * CR4.PAE and EFER.LMA must be set.
9436                  */
9437                 if (!(sregs->cr4 & X86_CR4_PAE)
9438                     || !(sregs->efer & EFER_LMA))
9439                         return -EINVAL;
9440         } else {
9441                 /*
9442                  * Not in 64-bit mode: EFER.LMA is clear and the code
9443                  * segment cannot be 64-bit.
9444                  */
9445                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9446                         return -EINVAL;
9447         }
9448
9449         return kvm_valid_cr4(vcpu, sregs->cr4);
9450 }
9451
9452 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9453 {
9454         struct msr_data apic_base_msr;
9455         int mmu_reset_needed = 0;
9456         int cpuid_update_needed = 0;
9457         int pending_vec, max_bits, idx;
9458         struct desc_ptr dt;
9459         int ret = -EINVAL;
9460
9461         if (kvm_valid_sregs(vcpu, sregs))
9462                 goto out;
9463
9464         apic_base_msr.data = sregs->apic_base;
9465         apic_base_msr.host_initiated = true;
9466         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9467                 goto out;
9468
9469         dt.size = sregs->idt.limit;
9470         dt.address = sregs->idt.base;
9471         kvm_x86_ops.set_idt(vcpu, &dt);
9472         dt.size = sregs->gdt.limit;
9473         dt.address = sregs->gdt.base;
9474         kvm_x86_ops.set_gdt(vcpu, &dt);
9475
9476         vcpu->arch.cr2 = sregs->cr2;
9477         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9478         vcpu->arch.cr3 = sregs->cr3;
9479         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9480
9481         kvm_set_cr8(vcpu, sregs->cr8);
9482
9483         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9484         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9485
9486         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9487         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9488         vcpu->arch.cr0 = sregs->cr0;
9489
9490         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9491         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9492                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9493         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9494         if (cpuid_update_needed)
9495                 kvm_update_cpuid_runtime(vcpu);
9496
9497         idx = srcu_read_lock(&vcpu->kvm->srcu);
9498         if (is_pae_paging(vcpu)) {
9499                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9500                 mmu_reset_needed = 1;
9501         }
9502         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9503
9504         if (mmu_reset_needed)
9505                 kvm_mmu_reset_context(vcpu);
9506
9507         max_bits = KVM_NR_INTERRUPTS;
9508         pending_vec = find_first_bit(
9509                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9510         if (pending_vec < max_bits) {
9511                 kvm_queue_interrupt(vcpu, pending_vec, false);
9512                 pr_debug("Set back pending irq %d\n", pending_vec);
9513         }
9514
9515         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9516         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9517         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9518         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9519         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9520         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9521
9522         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9523         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9524
9525         update_cr8_intercept(vcpu);
9526
9527         /* Older userspace won't unhalt the vcpu on reset. */
9528         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9529             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9530             !is_protmode(vcpu))
9531                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9532
9533         kvm_make_request(KVM_REQ_EVENT, vcpu);
9534
9535         ret = 0;
9536 out:
9537         return ret;
9538 }
9539
9540 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9541                                   struct kvm_sregs *sregs)
9542 {
9543         int ret;
9544
9545         vcpu_load(vcpu);
9546         ret = __set_sregs(vcpu, sregs);
9547         vcpu_put(vcpu);
9548         return ret;
9549 }
9550
9551 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9552                                         struct kvm_guest_debug *dbg)
9553 {
9554         unsigned long rflags;
9555         int i, r;
9556
9557         vcpu_load(vcpu);
9558
9559         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9560                 r = -EBUSY;
9561                 if (vcpu->arch.exception.pending)
9562                         goto out;
9563                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9564                         kvm_queue_exception(vcpu, DB_VECTOR);
9565                 else
9566                         kvm_queue_exception(vcpu, BP_VECTOR);
9567         }
9568
9569         /*
9570          * Read rflags as long as potentially injected trace flags are still
9571          * filtered out.
9572          */
9573         rflags = kvm_get_rflags(vcpu);
9574
9575         vcpu->guest_debug = dbg->control;
9576         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9577                 vcpu->guest_debug = 0;
9578
9579         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9580                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9581                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9582                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9583         } else {
9584                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9585                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9586         }
9587         kvm_update_dr7(vcpu);
9588
9589         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9590                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9591                         get_segment_base(vcpu, VCPU_SREG_CS);
9592
9593         /*
9594          * Trigger an rflags update that will inject or remove the trace
9595          * flags.
9596          */
9597         kvm_set_rflags(vcpu, rflags);
9598
9599         kvm_x86_ops.update_exception_bitmap(vcpu);
9600
9601         r = 0;
9602
9603 out:
9604         vcpu_put(vcpu);
9605         return r;
9606 }
9607
9608 /*
9609  * Translate a guest virtual address to a guest physical address.
9610  */
9611 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9612                                     struct kvm_translation *tr)
9613 {
9614         unsigned long vaddr = tr->linear_address;
9615         gpa_t gpa;
9616         int idx;
9617
9618         vcpu_load(vcpu);
9619
9620         idx = srcu_read_lock(&vcpu->kvm->srcu);
9621         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9622         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9623         tr->physical_address = gpa;
9624         tr->valid = gpa != UNMAPPED_GVA;
9625         tr->writeable = 1;
9626         tr->usermode = 0;
9627
9628         vcpu_put(vcpu);
9629         return 0;
9630 }
9631
9632 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9633 {
9634         struct fxregs_state *fxsave;
9635
9636         vcpu_load(vcpu);
9637
9638         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9639         memcpy(fpu->fpr, fxsave->st_space, 128);
9640         fpu->fcw = fxsave->cwd;
9641         fpu->fsw = fxsave->swd;
9642         fpu->ftwx = fxsave->twd;
9643         fpu->last_opcode = fxsave->fop;
9644         fpu->last_ip = fxsave->rip;
9645         fpu->last_dp = fxsave->rdp;
9646         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9647
9648         vcpu_put(vcpu);
9649         return 0;
9650 }
9651
9652 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9653 {
9654         struct fxregs_state *fxsave;
9655
9656         vcpu_load(vcpu);
9657
9658         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9659
9660         memcpy(fxsave->st_space, fpu->fpr, 128);
9661         fxsave->cwd = fpu->fcw;
9662         fxsave->swd = fpu->fsw;
9663         fxsave->twd = fpu->ftwx;
9664         fxsave->fop = fpu->last_opcode;
9665         fxsave->rip = fpu->last_ip;
9666         fxsave->rdp = fpu->last_dp;
9667         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9668
9669         vcpu_put(vcpu);
9670         return 0;
9671 }
9672
9673 static void store_regs(struct kvm_vcpu *vcpu)
9674 {
9675         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9676
9677         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9678                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9679
9680         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9681                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9682
9683         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9684                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9685                                 vcpu, &vcpu->run->s.regs.events);
9686 }
9687
9688 static int sync_regs(struct kvm_vcpu *vcpu)
9689 {
9690         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9691                 return -EINVAL;
9692
9693         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9694                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9695                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9696         }
9697         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9698                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9699                         return -EINVAL;
9700                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9701         }
9702         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9703                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9704                                 vcpu, &vcpu->run->s.regs.events))
9705                         return -EINVAL;
9706                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9707         }
9708
9709         return 0;
9710 }
9711
9712 static void fx_init(struct kvm_vcpu *vcpu)
9713 {
9714         fpstate_init(&vcpu->arch.guest_fpu->state);
9715         if (boot_cpu_has(X86_FEATURE_XSAVES))
9716                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9717                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9718
9719         /*
9720          * Ensure guest xcr0 is valid for loading
9721          */
9722         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9723
9724         vcpu->arch.cr0 |= X86_CR0_ET;
9725 }
9726
9727 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9728 {
9729         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9730                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9731                              "guest TSC will not be reliable\n");
9732
9733         return 0;
9734 }
9735
9736 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9737 {
9738         struct page *page;
9739         int r;
9740
9741         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9742                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9743         else
9744                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9745
9746         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9747
9748         r = kvm_mmu_create(vcpu);
9749         if (r < 0)
9750                 return r;
9751
9752         if (irqchip_in_kernel(vcpu->kvm)) {
9753                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9754                 if (r < 0)
9755                         goto fail_mmu_destroy;
9756                 if (kvm_apicv_activated(vcpu->kvm))
9757                         vcpu->arch.apicv_active = true;
9758         } else
9759                 static_key_slow_inc(&kvm_no_apic_vcpu);
9760
9761         r = -ENOMEM;
9762
9763         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9764         if (!page)
9765                 goto fail_free_lapic;
9766         vcpu->arch.pio_data = page_address(page);
9767
9768         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9769                                        GFP_KERNEL_ACCOUNT);
9770         if (!vcpu->arch.mce_banks)
9771                 goto fail_free_pio_data;
9772         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9773
9774         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9775                                 GFP_KERNEL_ACCOUNT))
9776                 goto fail_free_mce_banks;
9777
9778         if (!alloc_emulate_ctxt(vcpu))
9779                 goto free_wbinvd_dirty_mask;
9780
9781         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9782                                                 GFP_KERNEL_ACCOUNT);
9783         if (!vcpu->arch.user_fpu) {
9784                 pr_err("kvm: failed to allocate userspace's fpu\n");
9785                 goto free_emulate_ctxt;
9786         }
9787
9788         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9789                                                  GFP_KERNEL_ACCOUNT);
9790         if (!vcpu->arch.guest_fpu) {
9791                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9792                 goto free_user_fpu;
9793         }
9794         fx_init(vcpu);
9795
9796         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9797
9798         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9799
9800         kvm_async_pf_hash_reset(vcpu);
9801         kvm_pmu_init(vcpu);
9802
9803         vcpu->arch.pending_external_vector = -1;
9804         vcpu->arch.preempted_in_kernel = false;
9805
9806         kvm_hv_vcpu_init(vcpu);
9807
9808         r = kvm_x86_ops.vcpu_create(vcpu);
9809         if (r)
9810                 goto free_guest_fpu;
9811
9812         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9813         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9814         kvm_vcpu_mtrr_init(vcpu);
9815         vcpu_load(vcpu);
9816         kvm_vcpu_reset(vcpu, false);
9817         kvm_init_mmu(vcpu, false);
9818         vcpu_put(vcpu);
9819         return 0;
9820
9821 free_guest_fpu:
9822         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9823 free_user_fpu:
9824         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9825 free_emulate_ctxt:
9826         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9827 free_wbinvd_dirty_mask:
9828         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9829 fail_free_mce_banks:
9830         kfree(vcpu->arch.mce_banks);
9831 fail_free_pio_data:
9832         free_page((unsigned long)vcpu->arch.pio_data);
9833 fail_free_lapic:
9834         kvm_free_lapic(vcpu);
9835 fail_mmu_destroy:
9836         kvm_mmu_destroy(vcpu);
9837         return r;
9838 }
9839
9840 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9841 {
9842         struct msr_data msr;
9843         struct kvm *kvm = vcpu->kvm;
9844
9845         kvm_hv_vcpu_postcreate(vcpu);
9846
9847         if (mutex_lock_killable(&vcpu->mutex))
9848                 return;
9849         vcpu_load(vcpu);
9850         msr.data = 0x0;
9851         msr.index = MSR_IA32_TSC;
9852         msr.host_initiated = true;
9853         kvm_write_tsc(vcpu, &msr);
9854         vcpu_put(vcpu);
9855
9856         /* poll control enabled by default */
9857         vcpu->arch.msr_kvm_poll_control = 1;
9858
9859         mutex_unlock(&vcpu->mutex);
9860
9861         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9862                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9863                                                 KVMCLOCK_SYNC_PERIOD);
9864 }
9865
9866 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9867 {
9868         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9869         int idx;
9870
9871         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9872
9873         kvmclock_reset(vcpu);
9874
9875         kvm_x86_ops.vcpu_free(vcpu);
9876
9877         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9878         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9879         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9880         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9881
9882         kvm_hv_vcpu_uninit(vcpu);
9883         kvm_pmu_destroy(vcpu);
9884         kfree(vcpu->arch.mce_banks);
9885         kvm_free_lapic(vcpu);
9886         idx = srcu_read_lock(&vcpu->kvm->srcu);
9887         kvm_mmu_destroy(vcpu);
9888         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9889         free_page((unsigned long)vcpu->arch.pio_data);
9890         if (!lapic_in_kernel(vcpu))
9891                 static_key_slow_dec(&kvm_no_apic_vcpu);
9892 }
9893
9894 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9895 {
9896         kvm_lapic_reset(vcpu, init_event);
9897
9898         vcpu->arch.hflags = 0;
9899
9900         vcpu->arch.smi_pending = 0;
9901         vcpu->arch.smi_count = 0;
9902         atomic_set(&vcpu->arch.nmi_queued, 0);
9903         vcpu->arch.nmi_pending = 0;
9904         vcpu->arch.nmi_injected = false;
9905         kvm_clear_interrupt_queue(vcpu);
9906         kvm_clear_exception_queue(vcpu);
9907
9908         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9909         kvm_update_dr0123(vcpu);
9910         vcpu->arch.dr6 = DR6_INIT;
9911         vcpu->arch.dr7 = DR7_FIXED_1;
9912         kvm_update_dr7(vcpu);
9913
9914         vcpu->arch.cr2 = 0;
9915
9916         kvm_make_request(KVM_REQ_EVENT, vcpu);
9917         vcpu->arch.apf.msr_en_val = 0;
9918         vcpu->arch.apf.msr_int_val = 0;
9919         vcpu->arch.st.msr_val = 0;
9920
9921         kvmclock_reset(vcpu);
9922
9923         kvm_clear_async_pf_completion_queue(vcpu);
9924         kvm_async_pf_hash_reset(vcpu);
9925         vcpu->arch.apf.halted = false;
9926
9927         if (kvm_mpx_supported()) {
9928                 void *mpx_state_buffer;
9929
9930                 /*
9931                  * To avoid have the INIT path from kvm_apic_has_events() that be
9932                  * called with loaded FPU and does not let userspace fix the state.
9933                  */
9934                 if (init_event)
9935                         kvm_put_guest_fpu(vcpu);
9936                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9937                                         XFEATURE_BNDREGS);
9938                 if (mpx_state_buffer)
9939                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9940                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9941                                         XFEATURE_BNDCSR);
9942                 if (mpx_state_buffer)
9943                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9944                 if (init_event)
9945                         kvm_load_guest_fpu(vcpu);
9946         }
9947
9948         if (!init_event) {
9949                 kvm_pmu_reset(vcpu);
9950                 vcpu->arch.smbase = 0x30000;
9951
9952                 vcpu->arch.msr_misc_features_enables = 0;
9953
9954                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9955         }
9956
9957         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9958         vcpu->arch.regs_avail = ~0;
9959         vcpu->arch.regs_dirty = ~0;
9960
9961         vcpu->arch.ia32_xss = 0;
9962
9963         kvm_x86_ops.vcpu_reset(vcpu, init_event);
9964 }
9965
9966 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9967 {
9968         struct kvm_segment cs;
9969
9970         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9971         cs.selector = vector << 8;
9972         cs.base = vector << 12;
9973         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9974         kvm_rip_write(vcpu, 0);
9975 }
9976
9977 int kvm_arch_hardware_enable(void)
9978 {
9979         struct kvm *kvm;
9980         struct kvm_vcpu *vcpu;
9981         int i;
9982         int ret;
9983         u64 local_tsc;
9984         u64 max_tsc = 0;
9985         bool stable, backwards_tsc = false;
9986
9987         kvm_user_return_msr_cpu_online();
9988         ret = kvm_x86_ops.hardware_enable();
9989         if (ret != 0)
9990                 return ret;
9991
9992         local_tsc = rdtsc();
9993         stable = !kvm_check_tsc_unstable();
9994         list_for_each_entry(kvm, &vm_list, vm_list) {
9995                 kvm_for_each_vcpu(i, vcpu, kvm) {
9996                         if (!stable && vcpu->cpu == smp_processor_id())
9997                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9998                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9999                                 backwards_tsc = true;
10000                                 if (vcpu->arch.last_host_tsc > max_tsc)
10001                                         max_tsc = vcpu->arch.last_host_tsc;
10002                         }
10003                 }
10004         }
10005
10006         /*
10007          * Sometimes, even reliable TSCs go backwards.  This happens on
10008          * platforms that reset TSC during suspend or hibernate actions, but
10009          * maintain synchronization.  We must compensate.  Fortunately, we can
10010          * detect that condition here, which happens early in CPU bringup,
10011          * before any KVM threads can be running.  Unfortunately, we can't
10012          * bring the TSCs fully up to date with real time, as we aren't yet far
10013          * enough into CPU bringup that we know how much real time has actually
10014          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10015          * variables that haven't been updated yet.
10016          *
10017          * So we simply find the maximum observed TSC above, then record the
10018          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10019          * the adjustment will be applied.  Note that we accumulate
10020          * adjustments, in case multiple suspend cycles happen before some VCPU
10021          * gets a chance to run again.  In the event that no KVM threads get a
10022          * chance to run, we will miss the entire elapsed period, as we'll have
10023          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10024          * loose cycle time.  This isn't too big a deal, since the loss will be
10025          * uniform across all VCPUs (not to mention the scenario is extremely
10026          * unlikely). It is possible that a second hibernate recovery happens
10027          * much faster than a first, causing the observed TSC here to be
10028          * smaller; this would require additional padding adjustment, which is
10029          * why we set last_host_tsc to the local tsc observed here.
10030          *
10031          * N.B. - this code below runs only on platforms with reliable TSC,
10032          * as that is the only way backwards_tsc is set above.  Also note
10033          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10034          * have the same delta_cyc adjustment applied if backwards_tsc
10035          * is detected.  Note further, this adjustment is only done once,
10036          * as we reset last_host_tsc on all VCPUs to stop this from being
10037          * called multiple times (one for each physical CPU bringup).
10038          *
10039          * Platforms with unreliable TSCs don't have to deal with this, they
10040          * will be compensated by the logic in vcpu_load, which sets the TSC to
10041          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10042          * guarantee that they stay in perfect synchronization.
10043          */
10044         if (backwards_tsc) {
10045                 u64 delta_cyc = max_tsc - local_tsc;
10046                 list_for_each_entry(kvm, &vm_list, vm_list) {
10047                         kvm->arch.backwards_tsc_observed = true;
10048                         kvm_for_each_vcpu(i, vcpu, kvm) {
10049                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10050                                 vcpu->arch.last_host_tsc = local_tsc;
10051                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10052                         }
10053
10054                         /*
10055                          * We have to disable TSC offset matching.. if you were
10056                          * booting a VM while issuing an S4 host suspend....
10057                          * you may have some problem.  Solving this issue is
10058                          * left as an exercise to the reader.
10059                          */
10060                         kvm->arch.last_tsc_nsec = 0;
10061                         kvm->arch.last_tsc_write = 0;
10062                 }
10063
10064         }
10065         return 0;
10066 }
10067
10068 void kvm_arch_hardware_disable(void)
10069 {
10070         kvm_x86_ops.hardware_disable();
10071         drop_user_return_notifiers();
10072 }
10073
10074 int kvm_arch_hardware_setup(void *opaque)
10075 {
10076         struct kvm_x86_init_ops *ops = opaque;
10077         int r;
10078
10079         rdmsrl_safe(MSR_EFER, &host_efer);
10080
10081         if (boot_cpu_has(X86_FEATURE_XSAVES))
10082                 rdmsrl(MSR_IA32_XSS, host_xss);
10083
10084         r = ops->hardware_setup();
10085         if (r != 0)
10086                 return r;
10087
10088         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10089
10090         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10091                 supported_xss = 0;
10092
10093 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10094         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10095 #undef __kvm_cpu_cap_has
10096
10097         if (kvm_has_tsc_control) {
10098                 /*
10099                  * Make sure the user can only configure tsc_khz values that
10100                  * fit into a signed integer.
10101                  * A min value is not calculated because it will always
10102                  * be 1 on all machines.
10103                  */
10104                 u64 max = min(0x7fffffffULL,
10105                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10106                 kvm_max_guest_tsc_khz = max;
10107
10108                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10109         }
10110
10111         kvm_init_msr_list();
10112         return 0;
10113 }
10114
10115 void kvm_arch_hardware_unsetup(void)
10116 {
10117         kvm_x86_ops.hardware_unsetup();
10118 }
10119
10120 int kvm_arch_check_processor_compat(void *opaque)
10121 {
10122         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10123         struct kvm_x86_init_ops *ops = opaque;
10124
10125         WARN_ON(!irqs_disabled());
10126
10127         if (__cr4_reserved_bits(cpu_has, c) !=
10128             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10129                 return -EIO;
10130
10131         return ops->check_processor_compatibility();
10132 }
10133
10134 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10135 {
10136         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10137 }
10138 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10139
10140 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10141 {
10142         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10143 }
10144
10145 struct static_key kvm_no_apic_vcpu __read_mostly;
10146 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10147
10148 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10149 {
10150         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10151
10152         vcpu->arch.l1tf_flush_l1d = true;
10153         if (pmu->version && unlikely(pmu->event_count)) {
10154                 pmu->need_cleanup = true;
10155                 kvm_make_request(KVM_REQ_PMU, vcpu);
10156         }
10157         kvm_x86_ops.sched_in(vcpu, cpu);
10158 }
10159
10160 void kvm_arch_free_vm(struct kvm *kvm)
10161 {
10162         kfree(kvm->arch.hyperv.hv_pa_pg);
10163         vfree(kvm);
10164 }
10165
10166
10167 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10168 {
10169         if (type)
10170                 return -EINVAL;
10171
10172         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10173         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10174         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10175         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10176         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10177         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10178
10179         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10180         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10181         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10182         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10183                 &kvm->arch.irq_sources_bitmap);
10184
10185         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10186         mutex_init(&kvm->arch.apic_map_lock);
10187         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10188
10189         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10190         pvclock_update_vm_gtod_copy(kvm);
10191
10192         kvm->arch.guest_can_read_msr_platform_info = true;
10193
10194         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10195         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10196
10197         kvm_hv_init_vm(kvm);
10198         kvm_page_track_init(kvm);
10199         kvm_mmu_init_vm(kvm);
10200
10201         return kvm_x86_ops.vm_init(kvm);
10202 }
10203
10204 int kvm_arch_post_init_vm(struct kvm *kvm)
10205 {
10206         return kvm_mmu_post_init_vm(kvm);
10207 }
10208
10209 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10210 {
10211         vcpu_load(vcpu);
10212         kvm_mmu_unload(vcpu);
10213         vcpu_put(vcpu);
10214 }
10215
10216 static void kvm_free_vcpus(struct kvm *kvm)
10217 {
10218         unsigned int i;
10219         struct kvm_vcpu *vcpu;
10220
10221         /*
10222          * Unpin any mmu pages first.
10223          */
10224         kvm_for_each_vcpu(i, vcpu, kvm) {
10225                 kvm_clear_async_pf_completion_queue(vcpu);
10226                 kvm_unload_vcpu_mmu(vcpu);
10227         }
10228         kvm_for_each_vcpu(i, vcpu, kvm)
10229                 kvm_vcpu_destroy(vcpu);
10230
10231         mutex_lock(&kvm->lock);
10232         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10233                 kvm->vcpus[i] = NULL;
10234
10235         atomic_set(&kvm->online_vcpus, 0);
10236         mutex_unlock(&kvm->lock);
10237 }
10238
10239 void kvm_arch_sync_events(struct kvm *kvm)
10240 {
10241         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10242         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10243         kvm_free_pit(kvm);
10244 }
10245
10246 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10247 {
10248         int i, r;
10249         unsigned long hva, old_npages;
10250         struct kvm_memslots *slots = kvm_memslots(kvm);
10251         struct kvm_memory_slot *slot;
10252
10253         /* Called with kvm->slots_lock held.  */
10254         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10255                 return -EINVAL;
10256
10257         slot = id_to_memslot(slots, id);
10258         if (size) {
10259                 if (slot && slot->npages)
10260                         return -EEXIST;
10261
10262                 /*
10263                  * MAP_SHARED to prevent internal slot pages from being moved
10264                  * by fork()/COW.
10265                  */
10266                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10267                               MAP_SHARED | MAP_ANONYMOUS, 0);
10268                 if (IS_ERR((void *)hva))
10269                         return PTR_ERR((void *)hva);
10270         } else {
10271                 if (!slot || !slot->npages)
10272                         return 0;
10273
10274                 old_npages = slot->npages;
10275                 hva = 0;
10276         }
10277
10278         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10279                 struct kvm_userspace_memory_region m;
10280
10281                 m.slot = id | (i << 16);
10282                 m.flags = 0;
10283                 m.guest_phys_addr = gpa;
10284                 m.userspace_addr = hva;
10285                 m.memory_size = size;
10286                 r = __kvm_set_memory_region(kvm, &m);
10287                 if (r < 0)
10288                         return r;
10289         }
10290
10291         if (!size)
10292                 vm_munmap(hva, old_npages * PAGE_SIZE);
10293
10294         return 0;
10295 }
10296 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10297
10298 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10299 {
10300         kvm_mmu_pre_destroy_vm(kvm);
10301 }
10302
10303 void kvm_arch_destroy_vm(struct kvm *kvm)
10304 {
10305         u32 i;
10306
10307         if (current->mm == kvm->mm) {
10308                 /*
10309                  * Free memory regions allocated on behalf of userspace,
10310                  * unless the the memory map has changed due to process exit
10311                  * or fd copying.
10312                  */
10313                 mutex_lock(&kvm->slots_lock);
10314                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10315                                         0, 0);
10316                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10317                                         0, 0);
10318                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10319                 mutex_unlock(&kvm->slots_lock);
10320         }
10321         if (kvm_x86_ops.vm_destroy)
10322                 kvm_x86_ops.vm_destroy(kvm);
10323         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10324                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10325         kvm_pic_destroy(kvm);
10326         kvm_ioapic_destroy(kvm);
10327         kvm_free_vcpus(kvm);
10328         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10329         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10330         kvm_mmu_uninit_vm(kvm);
10331         kvm_page_track_cleanup(kvm);
10332         kvm_hv_destroy_vm(kvm);
10333 }
10334
10335 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10336 {
10337         int i;
10338
10339         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10340                 kvfree(slot->arch.rmap[i]);
10341                 slot->arch.rmap[i] = NULL;
10342
10343                 if (i == 0)
10344                         continue;
10345
10346                 kvfree(slot->arch.lpage_info[i - 1]);
10347                 slot->arch.lpage_info[i - 1] = NULL;
10348         }
10349
10350         kvm_page_track_free_memslot(slot);
10351 }
10352
10353 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10354                                       unsigned long npages)
10355 {
10356         int i;
10357
10358         /*
10359          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10360          * old arrays will be freed by __kvm_set_memory_region() if installing
10361          * the new memslot is successful.
10362          */
10363         memset(&slot->arch, 0, sizeof(slot->arch));
10364
10365         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10366                 struct kvm_lpage_info *linfo;
10367                 unsigned long ugfn;
10368                 int lpages;
10369                 int level = i + 1;
10370
10371                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10372                                       slot->base_gfn, level) + 1;
10373
10374                 slot->arch.rmap[i] =
10375                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10376                                  GFP_KERNEL_ACCOUNT);
10377                 if (!slot->arch.rmap[i])
10378                         goto out_free;
10379                 if (i == 0)
10380                         continue;
10381
10382                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10383                 if (!linfo)
10384                         goto out_free;
10385
10386                 slot->arch.lpage_info[i - 1] = linfo;
10387
10388                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10389                         linfo[0].disallow_lpage = 1;
10390                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10391                         linfo[lpages - 1].disallow_lpage = 1;
10392                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10393                 /*
10394                  * If the gfn and userspace address are not aligned wrt each
10395                  * other, disable large page support for this slot.
10396                  */
10397                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10398                         unsigned long j;
10399
10400                         for (j = 0; j < lpages; ++j)
10401                                 linfo[j].disallow_lpage = 1;
10402                 }
10403         }
10404
10405         if (kvm_page_track_create_memslot(slot, npages))
10406                 goto out_free;
10407
10408         return 0;
10409
10410 out_free:
10411         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10412                 kvfree(slot->arch.rmap[i]);
10413                 slot->arch.rmap[i] = NULL;
10414                 if (i == 0)
10415                         continue;
10416
10417                 kvfree(slot->arch.lpage_info[i - 1]);
10418                 slot->arch.lpage_info[i - 1] = NULL;
10419         }
10420         return -ENOMEM;
10421 }
10422
10423 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10424 {
10425         struct kvm_vcpu *vcpu;
10426         int i;
10427
10428         /*
10429          * memslots->generation has been incremented.
10430          * mmio generation may have reached its maximum value.
10431          */
10432         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10433
10434         /* Force re-initialization of steal_time cache */
10435         kvm_for_each_vcpu(i, vcpu, kvm)
10436                 kvm_vcpu_kick(vcpu);
10437 }
10438
10439 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10440                                 struct kvm_memory_slot *memslot,
10441                                 const struct kvm_userspace_memory_region *mem,
10442                                 enum kvm_mr_change change)
10443 {
10444         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10445                 return kvm_alloc_memslot_metadata(memslot,
10446                                                   mem->memory_size >> PAGE_SHIFT);
10447         return 0;
10448 }
10449
10450 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10451                                      struct kvm_memory_slot *old,
10452                                      struct kvm_memory_slot *new,
10453                                      enum kvm_mr_change change)
10454 {
10455         /*
10456          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10457          * See comments below.
10458          */
10459         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10460                 return;
10461
10462         /*
10463          * Dirty logging tracks sptes in 4k granularity, meaning that large
10464          * sptes have to be split.  If live migration is successful, the guest
10465          * in the source machine will be destroyed and large sptes will be
10466          * created in the destination. However, if the guest continues to run
10467          * in the source machine (for example if live migration fails), small
10468          * sptes will remain around and cause bad performance.
10469          *
10470          * Scan sptes if dirty logging has been stopped, dropping those
10471          * which can be collapsed into a single large-page spte.  Later
10472          * page faults will create the large-page sptes.
10473          *
10474          * There is no need to do this in any of the following cases:
10475          * CREATE:      No dirty mappings will already exist.
10476          * MOVE/DELETE: The old mappings will already have been cleaned up by
10477          *              kvm_arch_flush_shadow_memslot()
10478          */
10479         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10480             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10481                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10482
10483         /*
10484          * Enable or disable dirty logging for the slot.
10485          *
10486          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10487          * slot have been zapped so no dirty logging updates are needed for
10488          * the old slot.
10489          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10490          * any mappings that might be created in it will consume the
10491          * properties of the new slot and do not need to be updated here.
10492          *
10493          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10494          * called to enable/disable dirty logging.
10495          *
10496          * When disabling dirty logging with PML enabled, the D-bit is set
10497          * for sptes in the slot in order to prevent unnecessary GPA
10498          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10499          * This guarantees leaving PML enabled for the guest's lifetime
10500          * won't have any additional overhead from PML when the guest is
10501          * running with dirty logging disabled.
10502          *
10503          * When enabling dirty logging, large sptes are write-protected
10504          * so they can be split on first write.  New large sptes cannot
10505          * be created for this slot until the end of the logging.
10506          * See the comments in fast_page_fault().
10507          * For small sptes, nothing is done if the dirty log is in the
10508          * initial-all-set state.  Otherwise, depending on whether pml
10509          * is enabled the D-bit or the W-bit will be cleared.
10510          */
10511         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10512                 if (kvm_x86_ops.slot_enable_log_dirty) {
10513                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10514                 } else {
10515                         int level =
10516                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10517                                 PG_LEVEL_2M : PG_LEVEL_4K;
10518
10519                         /*
10520                          * If we're with initial-all-set, we don't need
10521                          * to write protect any small page because
10522                          * they're reported as dirty already.  However
10523                          * we still need to write-protect huge pages
10524                          * so that the page split can happen lazily on
10525                          * the first write to the huge page.
10526                          */
10527                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10528                 }
10529         } else {
10530                 if (kvm_x86_ops.slot_disable_log_dirty)
10531                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10532         }
10533 }
10534
10535 void kvm_arch_commit_memory_region(struct kvm *kvm,
10536                                 const struct kvm_userspace_memory_region *mem,
10537                                 struct kvm_memory_slot *old,
10538                                 const struct kvm_memory_slot *new,
10539                                 enum kvm_mr_change change)
10540 {
10541         if (!kvm->arch.n_requested_mmu_pages)
10542                 kvm_mmu_change_mmu_pages(kvm,
10543                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10544
10545         /*
10546          * FIXME: const-ify all uses of struct kvm_memory_slot.
10547          */
10548         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10549
10550         /* Free the arrays associated with the old memslot. */
10551         if (change == KVM_MR_MOVE)
10552                 kvm_arch_free_memslot(kvm, old);
10553 }
10554
10555 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10556 {
10557         kvm_mmu_zap_all(kvm);
10558 }
10559
10560 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10561                                    struct kvm_memory_slot *slot)
10562 {
10563         kvm_page_track_flush_slot(kvm, slot);
10564 }
10565
10566 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10567 {
10568         return (is_guest_mode(vcpu) &&
10569                         kvm_x86_ops.guest_apic_has_interrupt &&
10570                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10571 }
10572
10573 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10574 {
10575         if (!list_empty_careful(&vcpu->async_pf.done))
10576                 return true;
10577
10578         if (kvm_apic_has_events(vcpu))
10579                 return true;
10580
10581         if (vcpu->arch.pv.pv_unhalted)
10582                 return true;
10583
10584         if (vcpu->arch.exception.pending)
10585                 return true;
10586
10587         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10588             (vcpu->arch.nmi_pending &&
10589              kvm_x86_ops.nmi_allowed(vcpu, false)))
10590                 return true;
10591
10592         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10593             (vcpu->arch.smi_pending &&
10594              kvm_x86_ops.smi_allowed(vcpu, false)))
10595                 return true;
10596
10597         if (kvm_arch_interrupt_allowed(vcpu) &&
10598             (kvm_cpu_has_interrupt(vcpu) ||
10599             kvm_guest_apic_has_interrupt(vcpu)))
10600                 return true;
10601
10602         if (kvm_hv_has_stimer_pending(vcpu))
10603                 return true;
10604
10605         if (is_guest_mode(vcpu) &&
10606             kvm_x86_ops.nested_ops->hv_timer_pending &&
10607             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10608                 return true;
10609
10610         return false;
10611 }
10612
10613 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10614 {
10615         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10616 }
10617
10618 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10619 {
10620         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10621                 return true;
10622
10623         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10624                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10625                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10626                 return true;
10627
10628         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10629                 return true;
10630
10631         return false;
10632 }
10633
10634 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10635 {
10636         return vcpu->arch.preempted_in_kernel;
10637 }
10638
10639 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10640 {
10641         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10642 }
10643
10644 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10645 {
10646         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10647 }
10648
10649 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10650 {
10651         if (is_64_bit_mode(vcpu))
10652                 return kvm_rip_read(vcpu);
10653         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10654                      kvm_rip_read(vcpu));
10655 }
10656 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10657
10658 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10659 {
10660         return kvm_get_linear_rip(vcpu) == linear_rip;
10661 }
10662 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10663
10664 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10665 {
10666         unsigned long rflags;
10667
10668         rflags = kvm_x86_ops.get_rflags(vcpu);
10669         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10670                 rflags &= ~X86_EFLAGS_TF;
10671         return rflags;
10672 }
10673 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10674
10675 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10676 {
10677         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10678             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10679                 rflags |= X86_EFLAGS_TF;
10680         kvm_x86_ops.set_rflags(vcpu, rflags);
10681 }
10682
10683 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10684 {
10685         __kvm_set_rflags(vcpu, rflags);
10686         kvm_make_request(KVM_REQ_EVENT, vcpu);
10687 }
10688 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10689
10690 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10691 {
10692         int r;
10693
10694         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10695               work->wakeup_all)
10696                 return;
10697
10698         r = kvm_mmu_reload(vcpu);
10699         if (unlikely(r))
10700                 return;
10701
10702         if (!vcpu->arch.mmu->direct_map &&
10703               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10704                 return;
10705
10706         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10707 }
10708
10709 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10710 {
10711         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10712
10713         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10714 }
10715
10716 static inline u32 kvm_async_pf_next_probe(u32 key)
10717 {
10718         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10719 }
10720
10721 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10722 {
10723         u32 key = kvm_async_pf_hash_fn(gfn);
10724
10725         while (vcpu->arch.apf.gfns[key] != ~0)
10726                 key = kvm_async_pf_next_probe(key);
10727
10728         vcpu->arch.apf.gfns[key] = gfn;
10729 }
10730
10731 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10732 {
10733         int i;
10734         u32 key = kvm_async_pf_hash_fn(gfn);
10735
10736         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10737                      (vcpu->arch.apf.gfns[key] != gfn &&
10738                       vcpu->arch.apf.gfns[key] != ~0); i++)
10739                 key = kvm_async_pf_next_probe(key);
10740
10741         return key;
10742 }
10743
10744 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10745 {
10746         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10747 }
10748
10749 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10750 {
10751         u32 i, j, k;
10752
10753         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10754
10755         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10756                 return;
10757
10758         while (true) {
10759                 vcpu->arch.apf.gfns[i] = ~0;
10760                 do {
10761                         j = kvm_async_pf_next_probe(j);
10762                         if (vcpu->arch.apf.gfns[j] == ~0)
10763                                 return;
10764                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10765                         /*
10766                          * k lies cyclically in ]i,j]
10767                          * |    i.k.j |
10768                          * |....j i.k.| or  |.k..j i...|
10769                          */
10770                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10771                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10772                 i = j;
10773         }
10774 }
10775
10776 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10777 {
10778         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10779
10780         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10781                                       sizeof(reason));
10782 }
10783
10784 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10785 {
10786         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10787
10788         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10789                                              &token, offset, sizeof(token));
10790 }
10791
10792 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10793 {
10794         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10795         u32 val;
10796
10797         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10798                                          &val, offset, sizeof(val)))
10799                 return false;
10800
10801         return !val;
10802 }
10803
10804 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10805 {
10806         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10807                 return false;
10808
10809         if (!kvm_pv_async_pf_enabled(vcpu) ||
10810             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10811                 return false;
10812
10813         return true;
10814 }
10815
10816 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10817 {
10818         if (unlikely(!lapic_in_kernel(vcpu) ||
10819                      kvm_event_needs_reinjection(vcpu) ||
10820                      vcpu->arch.exception.pending))
10821                 return false;
10822
10823         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10824                 return false;
10825
10826         /*
10827          * If interrupts are off we cannot even use an artificial
10828          * halt state.
10829          */
10830         return kvm_arch_interrupt_allowed(vcpu);
10831 }
10832
10833 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10834                                      struct kvm_async_pf *work)
10835 {
10836         struct x86_exception fault;
10837
10838         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10839         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10840
10841         if (kvm_can_deliver_async_pf(vcpu) &&
10842             !apf_put_user_notpresent(vcpu)) {
10843                 fault.vector = PF_VECTOR;
10844                 fault.error_code_valid = true;
10845                 fault.error_code = 0;
10846                 fault.nested_page_fault = false;
10847                 fault.address = work->arch.token;
10848                 fault.async_page_fault = true;
10849                 kvm_inject_page_fault(vcpu, &fault);
10850                 return true;
10851         } else {
10852                 /*
10853                  * It is not possible to deliver a paravirtualized asynchronous
10854                  * page fault, but putting the guest in an artificial halt state
10855                  * can be beneficial nevertheless: if an interrupt arrives, we
10856                  * can deliver it timely and perhaps the guest will schedule
10857                  * another process.  When the instruction that triggered a page
10858                  * fault is retried, hopefully the page will be ready in the host.
10859                  */
10860                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10861                 return false;
10862         }
10863 }
10864
10865 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10866                                  struct kvm_async_pf *work)
10867 {
10868         struct kvm_lapic_irq irq = {
10869                 .delivery_mode = APIC_DM_FIXED,
10870                 .vector = vcpu->arch.apf.vec
10871         };
10872
10873         if (work->wakeup_all)
10874                 work->arch.token = ~0; /* broadcast wakeup */
10875         else
10876                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10877         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10878
10879         if ((work->wakeup_all || work->notpresent_injected) &&
10880             kvm_pv_async_pf_enabled(vcpu) &&
10881             !apf_put_user_ready(vcpu, work->arch.token)) {
10882                 vcpu->arch.apf.pageready_pending = true;
10883                 kvm_apic_set_irq(vcpu, &irq, NULL);
10884         }
10885
10886         vcpu->arch.apf.halted = false;
10887         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10888 }
10889
10890 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10891 {
10892         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10893         if (!vcpu->arch.apf.pageready_pending)
10894                 kvm_vcpu_kick(vcpu);
10895 }
10896
10897 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
10898 {
10899         if (!kvm_pv_async_pf_enabled(vcpu))
10900                 return true;
10901         else
10902                 return apf_pageready_slot_free(vcpu);
10903 }
10904
10905 void kvm_arch_start_assignment(struct kvm *kvm)
10906 {
10907         atomic_inc(&kvm->arch.assigned_device_count);
10908 }
10909 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10910
10911 void kvm_arch_end_assignment(struct kvm *kvm)
10912 {
10913         atomic_dec(&kvm->arch.assigned_device_count);
10914 }
10915 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10916
10917 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10918 {
10919         return atomic_read(&kvm->arch.assigned_device_count);
10920 }
10921 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10922
10923 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10924 {
10925         atomic_inc(&kvm->arch.noncoherent_dma_count);
10926 }
10927 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10928
10929 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10930 {
10931         atomic_dec(&kvm->arch.noncoherent_dma_count);
10932 }
10933 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10934
10935 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10936 {
10937         return atomic_read(&kvm->arch.noncoherent_dma_count);
10938 }
10939 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10940
10941 bool kvm_arch_has_irq_bypass(void)
10942 {
10943         return true;
10944 }
10945
10946 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10947                                       struct irq_bypass_producer *prod)
10948 {
10949         struct kvm_kernel_irqfd *irqfd =
10950                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10951         int ret;
10952
10953         irqfd->producer = prod;
10954         kvm_arch_start_assignment(irqfd->kvm);
10955         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
10956                                          prod->irq, irqfd->gsi, 1);
10957
10958         if (ret)
10959                 kvm_arch_end_assignment(irqfd->kvm);
10960
10961         return ret;
10962 }
10963
10964 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10965                                       struct irq_bypass_producer *prod)
10966 {
10967         int ret;
10968         struct kvm_kernel_irqfd *irqfd =
10969                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10970
10971         WARN_ON(irqfd->producer != prod);
10972         irqfd->producer = NULL;
10973
10974         /*
10975          * When producer of consumer is unregistered, we change back to
10976          * remapped mode, so we can re-use the current implementation
10977          * when the irq is masked/disabled or the consumer side (KVM
10978          * int this case doesn't want to receive the interrupts.
10979         */
10980         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10981         if (ret)
10982                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10983                        " fails: %d\n", irqfd->consumer.token, ret);
10984
10985         kvm_arch_end_assignment(irqfd->kvm);
10986 }
10987
10988 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10989                                    uint32_t guest_irq, bool set)
10990 {
10991         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
10992 }
10993
10994 bool kvm_vector_hashing_enabled(void)
10995 {
10996         return vector_hashing;
10997 }
10998
10999 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11000 {
11001         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11002 }
11003 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11004
11005
11006 int kvm_spec_ctrl_test_value(u64 value)
11007 {
11008         /*
11009          * test that setting IA32_SPEC_CTRL to given value
11010          * is allowed by the host processor
11011          */
11012
11013         u64 saved_value;
11014         unsigned long flags;
11015         int ret = 0;
11016
11017         local_irq_save(flags);
11018
11019         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11020                 ret = 1;
11021         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11022                 ret = 1;
11023         else
11024                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11025
11026         local_irq_restore(flags);
11027
11028         return ret;
11029 }
11030 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11031
11032 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11033 {
11034         struct x86_exception fault;
11035         u32 access = error_code &
11036                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11037
11038         if (!(error_code & PFERR_PRESENT_MASK) ||
11039             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11040                 /*
11041                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11042                  * tables probably do not match the TLB.  Just proceed
11043                  * with the error code that the processor gave.
11044                  */
11045                 fault.vector = PF_VECTOR;
11046                 fault.error_code_valid = true;
11047                 fault.error_code = error_code;
11048                 fault.nested_page_fault = false;
11049                 fault.address = gva;
11050         }
11051         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11052 }
11053 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11054
11055 /*
11056  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11057  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11058  * indicates whether exit to userspace is needed.
11059  */
11060 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11061                               struct x86_exception *e)
11062 {
11063         if (r == X86EMUL_PROPAGATE_FAULT) {
11064                 kvm_inject_emulated_page_fault(vcpu, e);
11065                 return 1;
11066         }
11067
11068         /*
11069          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11070          * while handling a VMX instruction KVM could've handled the request
11071          * correctly by exiting to userspace and performing I/O but there
11072          * doesn't seem to be a real use-case behind such requests, just return
11073          * KVM_EXIT_INTERNAL_ERROR for now.
11074          */
11075         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11076         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11077         vcpu->run->internal.ndata = 0;
11078
11079         return 0;
11080 }
11081 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11082
11083 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11084 {
11085         bool pcid_enabled;
11086         struct x86_exception e;
11087         unsigned i;
11088         unsigned long roots_to_free = 0;
11089         struct {
11090                 u64 pcid;
11091                 u64 gla;
11092         } operand;
11093         int r;
11094
11095         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11096         if (r != X86EMUL_CONTINUE)
11097                 return kvm_handle_memory_failure(vcpu, r, &e);
11098
11099         if (operand.pcid >> 12 != 0) {
11100                 kvm_inject_gp(vcpu, 0);
11101                 return 1;
11102         }
11103
11104         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11105
11106         switch (type) {
11107         case INVPCID_TYPE_INDIV_ADDR:
11108                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11109                     is_noncanonical_address(operand.gla, vcpu)) {
11110                         kvm_inject_gp(vcpu, 0);
11111                         return 1;
11112                 }
11113                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11114                 return kvm_skip_emulated_instruction(vcpu);
11115
11116         case INVPCID_TYPE_SINGLE_CTXT:
11117                 if (!pcid_enabled && (operand.pcid != 0)) {
11118                         kvm_inject_gp(vcpu, 0);
11119                         return 1;
11120                 }
11121
11122                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11123                         kvm_mmu_sync_roots(vcpu);
11124                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11125                 }
11126
11127                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11128                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11129                             == operand.pcid)
11130                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11131
11132                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11133                 /*
11134                  * If neither the current cr3 nor any of the prev_roots use the
11135                  * given PCID, then nothing needs to be done here because a
11136                  * resync will happen anyway before switching to any other CR3.
11137                  */
11138
11139                 return kvm_skip_emulated_instruction(vcpu);
11140
11141         case INVPCID_TYPE_ALL_NON_GLOBAL:
11142                 /*
11143                  * Currently, KVM doesn't mark global entries in the shadow
11144                  * page tables, so a non-global flush just degenerates to a
11145                  * global flush. If needed, we could optimize this later by
11146                  * keeping track of global entries in shadow page tables.
11147                  */
11148
11149                 fallthrough;
11150         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11151                 kvm_mmu_unload(vcpu);
11152                 return kvm_skip_emulated_instruction(vcpu);
11153
11154         default:
11155                 BUG(); /* We have already checked above that type <= 3 */
11156         }
11157 }
11158 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11159
11160 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11161 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11162 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11163 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11164 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11165 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11166 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11167 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11168 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11169 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11170 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11172 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11173 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11174 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11175 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11176 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11177 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11178 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11179 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11180 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11181 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);