arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68
  69 #define CREATE_TRACE_POINTS
  70 #include "trace.h"
  71
  72 #define MAX_IO_MSRS 256
  73 #define KVM_MAX_MCE_BANKS 32
  74 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  76
  77 #define emul_to_vcpu(ctxt) \
  78         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  79
  80 /* EFER defaults:
  81  * - enable syscall per default because its emulated by KVM
  82  * - enable LME and LMA per default on 64 bit KVM
  83  */
  84 #ifdef CONFIG_X86_64
  85 static
  86 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  87 #else
  88 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  89 #endif
  90
  91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  93
  94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  95                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  96
  97 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  98 static void process_nmi(struct kvm_vcpu *vcpu);
  99 static void enter_smm(struct kvm_vcpu *vcpu);
 100 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 101
 102 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 103 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 104
 105 static bool __read_mostly ignore_msrs = 0;
 106 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 107
 108 unsigned int min_timer_period_us = 500;
 109 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 110
 111 static bool __read_mostly kvmclock_periodic_sync = true;
 112 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 113
 114 bool __read_mostly kvm_has_tsc_control;
 115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 116 u32  __read_mostly kvm_max_guest_tsc_khz;
 117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 118 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 120 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 122 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 124
 125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 126 static u32 __read_mostly tsc_tolerance_ppm = 250;
 127 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 128
 129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 130 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 131 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 132
 133 static bool __read_mostly vector_hashing = true;
 134 module_param(vector_hashing, bool, S_IRUGO);
 135
 136 static bool __read_mostly backwards_tsc_observed = false;
 137
 138 #define KVM_NR_SHARED_MSRS 16
 139
 140 struct kvm_shared_msrs_global {
 141         int nr;
 142         u32 msrs[KVM_NR_SHARED_MSRS];
 143 };
 144
 145 struct kvm_shared_msrs {
 146         struct user_return_notifier urn;
 147         bool registered;
 148         struct kvm_shared_msr_values {
 149                 u64 host;
 150                 u64 curr;
 151         } values[KVM_NR_SHARED_MSRS];
 152 };
 153
 154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 155 static struct kvm_shared_msrs __percpu *shared_msrs;
 156
 157 struct kvm_stats_debugfs_item debugfs_entries[] = {
 158         { "pf_fixed", VCPU_STAT(pf_fixed) },
 159         { "pf_guest", VCPU_STAT(pf_guest) },
 160         { "tlb_flush", VCPU_STAT(tlb_flush) },
 161         { "invlpg", VCPU_STAT(invlpg) },
 162         { "exits", VCPU_STAT(exits) },
 163         { "io_exits", VCPU_STAT(io_exits) },
 164         { "mmio_exits", VCPU_STAT(mmio_exits) },
 165         { "signal_exits", VCPU_STAT(signal_exits) },
 166         { "irq_window", VCPU_STAT(irq_window_exits) },
 167         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 168         { "halt_exits", VCPU_STAT(halt_exits) },
 169         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 170         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 171         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 172         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 173         { "hypercalls", VCPU_STAT(hypercalls) },
 174         { "request_irq", VCPU_STAT(request_irq_exits) },
 175         { "irq_exits", VCPU_STAT(irq_exits) },
 176         { "host_state_reload", VCPU_STAT(host_state_reload) },
 177         { "efer_reload", VCPU_STAT(efer_reload) },
 178         { "fpu_reload", VCPU_STAT(fpu_reload) },
 179         { "insn_emulation", VCPU_STAT(insn_emulation) },
 180         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 181         { "irq_injections", VCPU_STAT(irq_injections) },
 182         { "nmi_injections", VCPU_STAT(nmi_injections) },
 183         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 184         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 185         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 186         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 187         { "mmu_flooded", VM_STAT(mmu_flooded) },
 188         { "mmu_recycled", VM_STAT(mmu_recycled) },
 189         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 190         { "mmu_unsync", VM_STAT(mmu_unsync) },
 191         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 192         { "largepages", VM_STAT(lpages) },
 193         { NULL }
 194 };
 195
 196 u64 __read_mostly host_xcr0;
 197
 198 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 199
 200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 201 {
 202         int i;
 203         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 204                 vcpu->arch.apf.gfns[i] = ~0;
 205 }
 206
 207 static void kvm_on_user_return(struct user_return_notifier *urn)
 208 {
 209         unsigned slot;
 210         struct kvm_shared_msrs *locals
 211                 = container_of(urn, struct kvm_shared_msrs, urn);
 212         struct kvm_shared_msr_values *values;
 213         unsigned long flags;
 214
 215         /*
 216          * Disabling irqs at this point since the following code could be
 217          * interrupted and executed through kvm_arch_hardware_disable()
 218          */
 219         local_irq_save(flags);
 220         if (locals->registered) {
 221                 locals->registered = false;
 222                 user_return_notifier_unregister(urn);
 223         }
 224         local_irq_restore(flags);
 225         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 226                 values = &locals->values[slot];
 227                 if (values->host != values->curr) {
 228                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 229                         values->curr = values->host;
 230                 }
 231         }
 232 }
 233
 234 static void shared_msr_update(unsigned slot, u32 msr)
 235 {
 236         u64 value;
 237         unsigned int cpu = smp_processor_id();
 238         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 239
 240         /* only read, and nobody should modify it at this time,
 241          * so don't need lock */
 242         if (slot >= shared_msrs_global.nr) {
 243                 printk(KERN_ERR "kvm: invalid MSR slot!");
 244                 return;
 245         }
 246         rdmsrl_safe(msr, &value);
 247         smsr->values[slot].host = value;
 248         smsr->values[slot].curr = value;
 249 }
 250
 251 void kvm_define_shared_msr(unsigned slot, u32 msr)
 252 {
 253         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 254         shared_msrs_global.msrs[slot] = msr;
 255         if (slot >= shared_msrs_global.nr)
 256                 shared_msrs_global.nr = slot + 1;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 259
 260 static void kvm_shared_msr_cpu_online(void)
 261 {
 262         unsigned i;
 263
 264         for (i = 0; i < shared_msrs_global.nr; ++i)
 265                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 266 }
 267
 268 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 269 {
 270         unsigned int cpu = smp_processor_id();
 271         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 272         int err;
 273
 274         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 275                 return 0;
 276         smsr->values[slot].curr = value;
 277         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 278         if (err)
 279                 return 1;
 280
 281         if (!smsr->registered) {
 282                 smsr->urn.on_user_return = kvm_on_user_return;
 283                 user_return_notifier_register(&smsr->urn);
 284                 smsr->registered = true;
 285         }
 286         return 0;
 287 }
 288 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 289
 290 static void drop_user_return_notifiers(void)
 291 {
 292         unsigned int cpu = smp_processor_id();
 293         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 294
 295         if (smsr->registered)
 296                 kvm_on_user_return(&smsr->urn);
 297 }
 298
 299 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 300 {
 301         return vcpu->arch.apic_base;
 302 }
 303 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 304
 305 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 306 {
 307         u64 old_state = vcpu->arch.apic_base &
 308                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 309         u64 new_state = msr_info->data &
 310                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 311         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 312                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 313
 314         if (!msr_info->host_initiated &&
 315             ((msr_info->data & reserved_bits) != 0 ||
 316              new_state == X2APIC_ENABLE ||
 317              (new_state == MSR_IA32_APICBASE_ENABLE &&
 318               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 319              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 320               old_state == 0)))
 321                 return 1;
 322
 323         kvm_lapic_set_base(vcpu, msr_info->data);
 324         return 0;
 325 }
 326 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 327
 328 asmlinkage __visible void kvm_spurious_fault(void)
 329 {
 330         /* Fault while not rebooting.  We want the trace. */
 331         BUG();
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 334
 335 #define EXCPT_BENIGN            0
 336 #define EXCPT_CONTRIBUTORY      1
 337 #define EXCPT_PF                2
 338
 339 static int exception_class(int vector)
 340 {
 341         switch (vector) {
 342         case PF_VECTOR:
 343                 return EXCPT_PF;
 344         case DE_VECTOR:
 345         case TS_VECTOR:
 346         case NP_VECTOR:
 347         case SS_VECTOR:
 348         case GP_VECTOR:
 349                 return EXCPT_CONTRIBUTORY;
 350         default:
 351                 break;
 352         }
 353         return EXCPT_BENIGN;
 354 }
 355
 356 #define EXCPT_FAULT             0
 357 #define EXCPT_TRAP              1
 358 #define EXCPT_ABORT             2
 359 #define EXCPT_INTERRUPT         3
 360
 361 static int exception_type(int vector)
 362 {
 363         unsigned int mask;
 364
 365         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 366                 return EXCPT_INTERRUPT;
 367
 368         mask = 1 << vector;
 369
 370         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 371         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 372                 return EXCPT_TRAP;
 373
 374         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 375                 return EXCPT_ABORT;
 376
 377         /* Reserved exceptions will result in fault */
 378         return EXCPT_FAULT;
 379 }
 380
 381 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 382                 unsigned nr, bool has_error, u32 error_code,
 383                 bool reinject)
 384 {
 385         u32 prev_nr;
 386         int class1, class2;
 387
 388         kvm_make_request(KVM_REQ_EVENT, vcpu);
 389
 390         if (!vcpu->arch.exception.pending) {
 391         queue:
 392                 if (has_error && !is_protmode(vcpu))
 393                         has_error = false;
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = has_error;
 396                 vcpu->arch.exception.nr = nr;
 397                 vcpu->arch.exception.error_code = error_code;
 398                 vcpu->arch.exception.reinject = reinject;
 399                 return;
 400         }
 401
 402         /* to check exception */
 403         prev_nr = vcpu->arch.exception.nr;
 404         if (prev_nr == DF_VECTOR) {
 405                 /* triple fault -> shutdown */
 406                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 407                 return;
 408         }
 409         class1 = exception_class(prev_nr);
 410         class2 = exception_class(nr);
 411         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 412                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 413                 /* generate double fault per SDM Table 5-5 */
 414                 vcpu->arch.exception.pending = true;
 415                 vcpu->arch.exception.has_error_code = true;
 416                 vcpu->arch.exception.nr = DF_VECTOR;
 417                 vcpu->arch.exception.error_code = 0;
 418         } else
 419                 /* replace previous exception with a new one in a hope
 420                    that instruction re-execution will regenerate lost
 421                    exception */
 422                 goto queue;
 423 }
 424
 425 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 426 {
 427         kvm_multiple_exception(vcpu, nr, false, 0, false);
 428 }
 429 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 430
 431 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 432 {
 433         kvm_multiple_exception(vcpu, nr, false, 0, true);
 434 }
 435 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 436
 437 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 438 {
 439         if (err)
 440                 kvm_inject_gp(vcpu, 0);
 441         else
 442                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 443 }
 444 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 445
 446 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 447 {
 448         ++vcpu->stat.pf_guest;
 449         vcpu->arch.cr2 = fault->address;
 450         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 453
 454 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 455 {
 456         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 457                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 458         else
 459                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 460
 461         return fault->nested_page_fault;
 462 }
 463
 464 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 465 {
 466         atomic_inc(&vcpu->arch.nmi_queued);
 467         kvm_make_request(KVM_REQ_NMI, vcpu);
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 470
 471 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 472 {
 473         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 476
 477 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 478 {
 479         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 482
 483 /*
 484  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 485  * a #GP and return false.
 486  */
 487 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 488 {
 489         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 490                 return true;
 491         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 492         return false;
 493 }
 494 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 495
 496 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 497 {
 498         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 499                 return true;
 500
 501         kvm_queue_exception(vcpu, UD_VECTOR);
 502         return false;
 503 }
 504 EXPORT_SYMBOL_GPL(kvm_require_dr);
 505
 506 /*
 507  * This function will be used to read from the physical memory of the currently
 508  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 509  * can read from guest physical or from the guest's guest physical memory.
 510  */
 511 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 512                             gfn_t ngfn, void *data, int offset, int len,
 513                             u32 access)
 514 {
 515         struct x86_exception exception;
 516         gfn_t real_gfn;
 517         gpa_t ngpa;
 518
 519         ngpa     = gfn_to_gpa(ngfn);
 520         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 521         if (real_gfn == UNMAPPED_GVA)
 522                 return -EFAULT;
 523
 524         real_gfn = gpa_to_gfn(real_gfn);
 525
 526         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 527 }
 528 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 529
 530 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 531                                void *data, int offset, int len, u32 access)
 532 {
 533         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 534                                        data, offset, len, access);
 535 }
 536
 537 /*
 538  * Load the pae pdptrs.  Return true is they are all valid.
 539  */
 540 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 541 {
 542         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 543         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 544         int i;
 545         int ret;
 546         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 547
 548         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 549                                       offset * sizeof(u64), sizeof(pdpte),
 550                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 551         if (ret < 0) {
 552                 ret = 0;
 553                 goto out;
 554         }
 555         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 556                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 557                     (pdpte[i] &
 558                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 559                         ret = 0;
 560                         goto out;
 561                 }
 562         }
 563         ret = 1;
 564
 565         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 566         __set_bit(VCPU_EXREG_PDPTR,
 567                   (unsigned long *)&vcpu->arch.regs_avail);
 568         __set_bit(VCPU_EXREG_PDPTR,
 569                   (unsigned long *)&vcpu->arch.regs_dirty);
 570 out:
 571
 572         return ret;
 573 }
 574 EXPORT_SYMBOL_GPL(load_pdptrs);
 575
 576 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 577 {
 578         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 579         bool changed = true;
 580         int offset;
 581         gfn_t gfn;
 582         int r;
 583
 584         if (is_long_mode(vcpu) || !is_pae(vcpu))
 585                 return false;
 586
 587         if (!test_bit(VCPU_EXREG_PDPTR,
 588                       (unsigned long *)&vcpu->arch.regs_avail))
 589                 return true;
 590
 591         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 592         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 593         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 594                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 595         if (r < 0)
 596                 goto out;
 597         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 598 out:
 599
 600         return changed;
 601 }
 602
 603 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 604 {
 605         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 606         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 607
 608         cr0 |= X86_CR0_ET;
 609
 610 #ifdef CONFIG_X86_64
 611         if (cr0 & 0xffffffff00000000UL)
 612                 return 1;
 613 #endif
 614
 615         cr0 &= ~CR0_RESERVED_BITS;
 616
 617         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 618                 return 1;
 619
 620         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 621                 return 1;
 622
 623         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 624 #ifdef CONFIG_X86_64
 625                 if ((vcpu->arch.efer & EFER_LME)) {
 626                         int cs_db, cs_l;
 627
 628                         if (!is_pae(vcpu))
 629                                 return 1;
 630                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 631                         if (cs_l)
 632                                 return 1;
 633                 } else
 634 #endif
 635                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 636                                                  kvm_read_cr3(vcpu)))
 637                         return 1;
 638         }
 639
 640         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 641                 return 1;
 642
 643         kvm_x86_ops->set_cr0(vcpu, cr0);
 644
 645         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 646                 kvm_clear_async_pf_completion_queue(vcpu);
 647                 kvm_async_pf_hash_reset(vcpu);
 648         }
 649
 650         if ((cr0 ^ old_cr0) & update_bits)
 651                 kvm_mmu_reset_context(vcpu);
 652
 653         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 654             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 655             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 656                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 657
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 661
 662 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 663 {
 664         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_lmsw);
 667
 668 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 669 {
 670         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 671                         !vcpu->guest_xcr0_loaded) {
 672                 /* kvm_set_xcr() also depends on this */
 673                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 674                 vcpu->guest_xcr0_loaded = 1;
 675         }
 676 }
 677
 678 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 679 {
 680         if (vcpu->guest_xcr0_loaded) {
 681                 if (vcpu->arch.xcr0 != host_xcr0)
 682                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 683                 vcpu->guest_xcr0_loaded = 0;
 684         }
 685 }
 686
 687 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 688 {
 689         u64 xcr0 = xcr;
 690         u64 old_xcr0 = vcpu->arch.xcr0;
 691         u64 valid_bits;
 692
 693         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 694         if (index != XCR_XFEATURE_ENABLED_MASK)
 695                 return 1;
 696         if (!(xcr0 & XFEATURE_MASK_FP))
 697                 return 1;
 698         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 699                 return 1;
 700
 701         /*
 702          * Do not allow the guest to set bits that we do not support
 703          * saving.  However, xcr0 bit 0 is always set, even if the
 704          * emulated CPU does not support XSAVE (see fx_init).
 705          */
 706         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 707         if (xcr0 & ~valid_bits)
 708                 return 1;
 709
 710         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 711             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 712                 return 1;
 713
 714         if (xcr0 & XFEATURE_MASK_AVX512) {
 715                 if (!(xcr0 & XFEATURE_MASK_YMM))
 716                         return 1;
 717                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 718                         return 1;
 719         }
 720         vcpu->arch.xcr0 = xcr0;
 721
 722         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 723                 kvm_update_cpuid(vcpu);
 724         return 0;
 725 }
 726
 727 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 728 {
 729         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 730             __kvm_set_xcr(vcpu, index, xcr)) {
 731                 kvm_inject_gp(vcpu, 0);
 732                 return 1;
 733         }
 734         return 0;
 735 }
 736 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 737
 738 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 739 {
 740         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 741         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 742                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 743
 744         if (cr4 & CR4_RESERVED_BITS)
 745                 return 1;
 746
 747         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 748                 return 1;
 749
 750         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 751                 return 1;
 752
 753         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 754                 return 1;
 755
 756         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 757                 return 1;
 758
 759         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 760                 return 1;
 761
 762         if (is_long_mode(vcpu)) {
 763                 if (!(cr4 & X86_CR4_PAE))
 764                         return 1;
 765         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 766                    && ((cr4 ^ old_cr4) & pdptr_bits)
 767                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 768                                    kvm_read_cr3(vcpu)))
 769                 return 1;
 770
 771         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 772                 if (!guest_cpuid_has_pcid(vcpu))
 773                         return 1;
 774
 775                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 776                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 777                         return 1;
 778         }
 779
 780         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 781                 return 1;
 782
 783         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 784             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 785                 kvm_mmu_reset_context(vcpu);
 786
 787         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 788                 kvm_update_cpuid(vcpu);
 789
 790         return 0;
 791 }
 792 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 793
 794 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 795 {
 796 #ifdef CONFIG_X86_64
 797         cr3 &= ~CR3_PCID_INVD;
 798 #endif
 799
 800         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 801                 kvm_mmu_sync_roots(vcpu);
 802                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 803                 return 0;
 804         }
 805
 806         if (is_long_mode(vcpu)) {
 807                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 808                         return 1;
 809         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 810                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 811                 return 1;
 812
 813         vcpu->arch.cr3 = cr3;
 814         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 815         kvm_mmu_new_cr3(vcpu);
 816         return 0;
 817 }
 818 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 819
 820 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 821 {
 822         if (cr8 & CR8_RESERVED_BITS)
 823                 return 1;
 824         if (lapic_in_kernel(vcpu))
 825                 kvm_lapic_set_tpr(vcpu, cr8);
 826         else
 827                 vcpu->arch.cr8 = cr8;
 828         return 0;
 829 }
 830 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 831
 832 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 833 {
 834         if (lapic_in_kernel(vcpu))
 835                 return kvm_lapic_get_cr8(vcpu);
 836         else
 837                 return vcpu->arch.cr8;
 838 }
 839 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 840
 841 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 842 {
 843         int i;
 844
 845         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 846                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 847                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 848                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 849         }
 850 }
 851
 852 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 853 {
 854         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 855                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 856 }
 857
 858 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 859 {
 860         unsigned long dr7;
 861
 862         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 863                 dr7 = vcpu->arch.guest_debug_dr7;
 864         else
 865                 dr7 = vcpu->arch.dr7;
 866         kvm_x86_ops->set_dr7(vcpu, dr7);
 867         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 868         if (dr7 & DR7_BP_EN_MASK)
 869                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 870 }
 871
 872 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 873 {
 874         u64 fixed = DR6_FIXED_1;
 875
 876         if (!guest_cpuid_has_rtm(vcpu))
 877                 fixed |= DR6_RTM;
 878         return fixed;
 879 }
 880
 881 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 882 {
 883         switch (dr) {
 884         case 0 ... 3:
 885                 vcpu->arch.db[dr] = val;
 886                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 887                         vcpu->arch.eff_db[dr] = val;
 888                 break;
 889         case 4:
 890                 /* fall through */
 891         case 6:
 892                 if (val & 0xffffffff00000000ULL)
 893                         return -1; /* #GP */
 894                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 895                 kvm_update_dr6(vcpu);
 896                 break;
 897         case 5:
 898                 /* fall through */
 899         default: /* 7 */
 900                 if (val & 0xffffffff00000000ULL)
 901                         return -1; /* #GP */
 902                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 903                 kvm_update_dr7(vcpu);
 904                 break;
 905         }
 906
 907         return 0;
 908 }
 909
 910 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 911 {
 912         if (__kvm_set_dr(vcpu, dr, val)) {
 913                 kvm_inject_gp(vcpu, 0);
 914                 return 1;
 915         }
 916         return 0;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_set_dr);
 919
 920 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 921 {
 922         switch (dr) {
 923         case 0 ... 3:
 924                 *val = vcpu->arch.db[dr];
 925                 break;
 926         case 4:
 927                 /* fall through */
 928         case 6:
 929                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 930                         *val = vcpu->arch.dr6;
 931                 else
 932                         *val = kvm_x86_ops->get_dr6(vcpu);
 933                 break;
 934         case 5:
 935                 /* fall through */
 936         default: /* 7 */
 937                 *val = vcpu->arch.dr7;
 938                 break;
 939         }
 940         return 0;
 941 }
 942 EXPORT_SYMBOL_GPL(kvm_get_dr);
 943
 944 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 945 {
 946         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 947         u64 data;
 948         int err;
 949
 950         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 951         if (err)
 952                 return err;
 953         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 954         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 955         return err;
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 958
 959 /*
 960  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 961  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 962  *
 963  * This list is modified at module load time to reflect the
 964  * capabilities of the host cpu. This capabilities test skips MSRs that are
 965  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 966  * may depend on host virtualization features rather than host cpu features.
 967  */
 968
 969 static u32 msrs_to_save[] = {
 970         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 971         MSR_STAR,
 972 #ifdef CONFIG_X86_64
 973         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 974 #endif
 975         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 976         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 977 };
 978
 979 static unsigned num_msrs_to_save;
 980
 981 static u32 emulated_msrs[] = {
 982         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 983         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 984         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 985         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 986         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 987         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 988         HV_X64_MSR_RESET,
 989         HV_X64_MSR_VP_INDEX,
 990         HV_X64_MSR_VP_RUNTIME,
 991         HV_X64_MSR_SCONTROL,
 992         HV_X64_MSR_STIMER0_CONFIG,
 993         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 994         MSR_KVM_PV_EOI_EN,
 995
 996         MSR_IA32_TSC_ADJUST,
 997         MSR_IA32_TSCDEADLINE,
 998         MSR_IA32_MISC_ENABLE,
 999         MSR_IA32_MCG_STATUS,
1000         MSR_IA32_MCG_CTL,
1001         MSR_IA32_MCG_EXT_CTL,
1002         MSR_IA32_SMBASE,
1003 };
1004
1005 static unsigned num_emulated_msrs;
1006
1007 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1008 {
1009         if (efer & efer_reserved_bits)
1010                 return false;
1011
1012         if (efer & EFER_FFXSR) {
1013                 struct kvm_cpuid_entry2 *feat;
1014
1015                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1016                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1017                         return false;
1018         }
1019
1020         if (efer & EFER_SVME) {
1021                 struct kvm_cpuid_entry2 *feat;
1022
1023                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1024                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1025                         return false;
1026         }
1027
1028         return true;
1029 }
1030 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1031
1032 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1033 {
1034         u64 old_efer = vcpu->arch.efer;
1035
1036         if (!kvm_valid_efer(vcpu, efer))
1037                 return 1;
1038
1039         if (is_paging(vcpu)
1040             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1041                 return 1;
1042
1043         efer &= ~EFER_LMA;
1044         efer |= vcpu->arch.efer & EFER_LMA;
1045
1046         kvm_x86_ops->set_efer(vcpu, efer);
1047
1048         /* Update reserved bits */
1049         if ((efer ^ old_efer) & EFER_NX)
1050                 kvm_mmu_reset_context(vcpu);
1051
1052         return 0;
1053 }
1054
1055 void kvm_enable_efer_bits(u64 mask)
1056 {
1057        efer_reserved_bits &= ~mask;
1058 }
1059 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1060
1061 /*
1062  * Writes msr value into into the appropriate "register".
1063  * Returns 0 on success, non-0 otherwise.
1064  * Assumes vcpu_load() was already called.
1065  */
1066 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1067 {
1068         switch (msr->index) {
1069         case MSR_FS_BASE:
1070         case MSR_GS_BASE:
1071         case MSR_KERNEL_GS_BASE:
1072         case MSR_CSTAR:
1073         case MSR_LSTAR:
1074                 if (is_noncanonical_address(msr->data))
1075                         return 1;
1076                 break;
1077         case MSR_IA32_SYSENTER_EIP:
1078         case MSR_IA32_SYSENTER_ESP:
1079                 /*
1080                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1081                  * non-canonical address is written on Intel but not on
1082                  * AMD (which ignores the top 32-bits, because it does
1083                  * not implement 64-bit SYSENTER).
1084                  *
1085                  * 64-bit code should hence be able to write a non-canonical
1086                  * value on AMD.  Making the address canonical ensures that
1087                  * vmentry does not fail on Intel after writing a non-canonical
1088                  * value, and that something deterministic happens if the guest
1089                  * invokes 64-bit SYSENTER.
1090                  */
1091                 msr->data = get_canonical(msr->data);
1092         }
1093         return kvm_x86_ops->set_msr(vcpu, msr);
1094 }
1095 EXPORT_SYMBOL_GPL(kvm_set_msr);
1096
1097 /*
1098  * Adapt set_msr() to msr_io()'s calling convention
1099  */
1100 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1101 {
1102         struct msr_data msr;
1103         int r;
1104
1105         msr.index = index;
1106         msr.host_initiated = true;
1107         r = kvm_get_msr(vcpu, &msr);
1108         if (r)
1109                 return r;
1110
1111         *data = msr.data;
1112         return 0;
1113 }
1114
1115 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1116 {
1117         struct msr_data msr;
1118
1119         msr.data = *data;
1120         msr.index = index;
1121         msr.host_initiated = true;
1122         return kvm_set_msr(vcpu, &msr);
1123 }
1124
1125 #ifdef CONFIG_X86_64
1126 struct pvclock_gtod_data {
1127         seqcount_t      seq;
1128
1129         struct { /* extract of a clocksource struct */
1130                 int vclock_mode;
1131                 cycle_t cycle_last;
1132                 cycle_t mask;
1133                 u32     mult;
1134                 u32     shift;
1135         } clock;
1136
1137         u64             boot_ns;
1138         u64             nsec_base;
1139 };
1140
1141 static struct pvclock_gtod_data pvclock_gtod_data;
1142
1143 static void update_pvclock_gtod(struct timekeeper *tk)
1144 {
1145         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1146         u64 boot_ns;
1147
1148         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1149
1150         write_seqcount_begin(&vdata->seq);
1151
1152         /* copy pvclock gtod data */
1153         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1154         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1155         vdata->clock.mask               = tk->tkr_mono.mask;
1156         vdata->clock.mult               = tk->tkr_mono.mult;
1157         vdata->clock.shift              = tk->tkr_mono.shift;
1158
1159         vdata->boot_ns                  = boot_ns;
1160         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1161
1162         write_seqcount_end(&vdata->seq);
1163 }
1164 #endif
1165
1166 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1167 {
1168         /*
1169          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1170          * vcpu_enter_guest.  This function is only called from
1171          * the physical CPU that is running vcpu.
1172          */
1173         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1174 }
1175
1176 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1177 {
1178         int version;
1179         int r;
1180         struct pvclock_wall_clock wc;
1181         struct timespec64 boot;
1182
1183         if (!wall_clock)
1184                 return;
1185
1186         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1187         if (r)
1188                 return;
1189
1190         if (version & 1)
1191                 ++version;  /* first time write, random junk */
1192
1193         ++version;
1194
1195         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1196                 return;
1197
1198         /*
1199          * The guest calculates current wall clock time by adding
1200          * system time (updated by kvm_guest_time_update below) to the
1201          * wall clock specified here.  guest system time equals host
1202          * system time for us, thus we must fill in host boot time here.
1203          */
1204         getboottime64(&boot);
1205
1206         if (kvm->arch.kvmclock_offset) {
1207                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1208                 boot = timespec64_sub(boot, ts);
1209         }
1210         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1211         wc.nsec = boot.tv_nsec;
1212         wc.version = version;
1213
1214         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1215
1216         version++;
1217         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1218 }
1219
1220 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1221 {
1222         do_shl32_div32(dividend, divisor);
1223         return dividend;
1224 }
1225
1226 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1227                                s8 *pshift, u32 *pmultiplier)
1228 {
1229         uint64_t scaled64;
1230         int32_t  shift = 0;
1231         uint64_t tps64;
1232         uint32_t tps32;
1233
1234         tps64 = base_hz;
1235         scaled64 = scaled_hz;
1236         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1237                 tps64 >>= 1;
1238                 shift--;
1239         }
1240
1241         tps32 = (uint32_t)tps64;
1242         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1243                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1244                         scaled64 >>= 1;
1245                 else
1246                         tps32 <<= 1;
1247                 shift++;
1248         }
1249
1250         *pshift = shift;
1251         *pmultiplier = div_frac(scaled64, tps32);
1252
1253         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1254                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1255 }
1256
1257 #ifdef CONFIG_X86_64
1258 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1259 #endif
1260
1261 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1262 static unsigned long max_tsc_khz;
1263
1264 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1265 {
1266         u64 v = (u64)khz * (1000000 + ppm);
1267         do_div(v, 1000000);
1268         return v;
1269 }
1270
1271 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1272 {
1273         u64 ratio;
1274
1275         /* Guest TSC same frequency as host TSC? */
1276         if (!scale) {
1277                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1278                 return 0;
1279         }
1280
1281         /* TSC scaling supported? */
1282         if (!kvm_has_tsc_control) {
1283                 if (user_tsc_khz > tsc_khz) {
1284                         vcpu->arch.tsc_catchup = 1;
1285                         vcpu->arch.tsc_always_catchup = 1;
1286                         return 0;
1287                 } else {
1288                         WARN(1, "user requested TSC rate below hardware speed\n");
1289                         return -1;
1290                 }
1291         }
1292
1293         /* TSC scaling required  - calculate ratio */
1294         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1295                                 user_tsc_khz, tsc_khz);
1296
1297         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1298                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1299                           user_tsc_khz);
1300                 return -1;
1301         }
1302
1303         vcpu->arch.tsc_scaling_ratio = ratio;
1304         return 0;
1305 }
1306
1307 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1308 {
1309         u32 thresh_lo, thresh_hi;
1310         int use_scaling = 0;
1311
1312         /* tsc_khz can be zero if TSC calibration fails */
1313         if (user_tsc_khz == 0) {
1314                 /* set tsc_scaling_ratio to a safe value */
1315                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1316                 return -1;
1317         }
1318
1319         /* Compute a scale to convert nanoseconds in TSC cycles */
1320         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1321                            &vcpu->arch.virtual_tsc_shift,
1322                            &vcpu->arch.virtual_tsc_mult);
1323         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1324
1325         /*
1326          * Compute the variation in TSC rate which is acceptable
1327          * within the range of tolerance and decide if the
1328          * rate being applied is within that bounds of the hardware
1329          * rate.  If so, no scaling or compensation need be done.
1330          */
1331         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1332         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1333         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1334                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1335                 use_scaling = 1;
1336         }
1337         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1338 }
1339
1340 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1341 {
1342         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1343                                       vcpu->arch.virtual_tsc_mult,
1344                                       vcpu->arch.virtual_tsc_shift);
1345         tsc += vcpu->arch.this_tsc_write;
1346         return tsc;
1347 }
1348
1349 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1350 {
1351 #ifdef CONFIG_X86_64
1352         bool vcpus_matched;
1353         struct kvm_arch *ka = &vcpu->kvm->arch;
1354         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1355
1356         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1357                          atomic_read(&vcpu->kvm->online_vcpus));
1358
1359         /*
1360          * Once the masterclock is enabled, always perform request in
1361          * order to update it.
1362          *
1363          * In order to enable masterclock, the host clocksource must be TSC
1364          * and the vcpus need to have matched TSCs.  When that happens,
1365          * perform request to enable masterclock.
1366          */
1367         if (ka->use_master_clock ||
1368             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1369                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1370
1371         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1372                             atomic_read(&vcpu->kvm->online_vcpus),
1373                             ka->use_master_clock, gtod->clock.vclock_mode);
1374 #endif
1375 }
1376
1377 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1378 {
1379         u64 curr_offset = vcpu->arch.tsc_offset;
1380         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1381 }
1382
1383 /*
1384  * Multiply tsc by a fixed point number represented by ratio.
1385  *
1386  * The most significant 64-N bits (mult) of ratio represent the
1387  * integral part of the fixed point number; the remaining N bits
1388  * (frac) represent the fractional part, ie. ratio represents a fixed
1389  * point number (mult + frac * 2^(-N)).
1390  *
1391  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1392  */
1393 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1394 {
1395         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1396 }
1397
1398 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1399 {
1400         u64 _tsc = tsc;
1401         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1402
1403         if (ratio != kvm_default_tsc_scaling_ratio)
1404                 _tsc = __scale_tsc(ratio, tsc);
1405
1406         return _tsc;
1407 }
1408 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1409
1410 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1411 {
1412         u64 tsc;
1413
1414         tsc = kvm_scale_tsc(vcpu, rdtsc());
1415
1416         return target_tsc - tsc;
1417 }
1418
1419 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1420 {
1421         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1422 }
1423 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1424
1425 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1426 {
1427         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1428         vcpu->arch.tsc_offset = offset;
1429 }
1430
1431 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1432 {
1433         struct kvm *kvm = vcpu->kvm;
1434         u64 offset, ns, elapsed;
1435         unsigned long flags;
1436         s64 usdiff;
1437         bool matched;
1438         bool already_matched;
1439         u64 data = msr->data;
1440
1441         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1442         offset = kvm_compute_tsc_offset(vcpu, data);
1443         ns = ktime_get_boot_ns();
1444         elapsed = ns - kvm->arch.last_tsc_nsec;
1445
1446         if (vcpu->arch.virtual_tsc_khz) {
1447                 int faulted = 0;
1448
1449                 /* n.b - signed multiplication and division required */
1450                 usdiff = data - kvm->arch.last_tsc_write;
1451 #ifdef CONFIG_X86_64
1452                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1453 #else
1454                 /* do_div() only does unsigned */
1455                 asm("1: idivl %[divisor]\n"
1456                     "2: xor %%edx, %%edx\n"
1457                     "   movl $0, %[faulted]\n"
1458                     "3:\n"
1459                     ".section .fixup,\"ax\"\n"
1460                     "4: movl $1, %[faulted]\n"
1461                     "   jmp  3b\n"
1462                     ".previous\n"
1463
1464                 _ASM_EXTABLE(1b, 4b)
1465
1466                 : "=A"(usdiff), [faulted] "=r" (faulted)
1467                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1468
1469 #endif
1470                 do_div(elapsed, 1000);
1471                 usdiff -= elapsed;
1472                 if (usdiff < 0)
1473                         usdiff = -usdiff;
1474
1475                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1476                 if (faulted)
1477                         usdiff = USEC_PER_SEC;
1478         } else
1479                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1480
1481         /*
1482          * Special case: TSC write with a small delta (1 second) of virtual
1483          * cycle time against real time is interpreted as an attempt to
1484          * synchronize the CPU.
1485          *
1486          * For a reliable TSC, we can match TSC offsets, and for an unstable
1487          * TSC, we add elapsed time in this computation.  We could let the
1488          * compensation code attempt to catch up if we fall behind, but
1489          * it's better to try to match offsets from the beginning.
1490          */
1491         if (usdiff < USEC_PER_SEC &&
1492             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1493                 if (!check_tsc_unstable()) {
1494                         offset = kvm->arch.cur_tsc_offset;
1495                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1496                 } else {
1497                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1498                         data += delta;
1499                         offset = kvm_compute_tsc_offset(vcpu, data);
1500                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1501                 }
1502                 matched = true;
1503                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1504         } else {
1505                 /*
1506                  * We split periods of matched TSC writes into generations.
1507                  * For each generation, we track the original measured
1508                  * nanosecond time, offset, and write, so if TSCs are in
1509                  * sync, we can match exact offset, and if not, we can match
1510                  * exact software computation in compute_guest_tsc()
1511                  *
1512                  * These values are tracked in kvm->arch.cur_xxx variables.
1513                  */
1514                 kvm->arch.cur_tsc_generation++;
1515                 kvm->arch.cur_tsc_nsec = ns;
1516                 kvm->arch.cur_tsc_write = data;
1517                 kvm->arch.cur_tsc_offset = offset;
1518                 matched = false;
1519                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1520                          kvm->arch.cur_tsc_generation, data);
1521         }
1522
1523         /*
1524          * We also track th most recent recorded KHZ, write and time to
1525          * allow the matching interval to be extended at each write.
1526          */
1527         kvm->arch.last_tsc_nsec = ns;
1528         kvm->arch.last_tsc_write = data;
1529         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1530
1531         vcpu->arch.last_guest_tsc = data;
1532
1533         /* Keep track of which generation this VCPU has synchronized to */
1534         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1535         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1536         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1537
1538         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1539                 update_ia32_tsc_adjust_msr(vcpu, offset);
1540         kvm_vcpu_write_tsc_offset(vcpu, offset);
1541         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1542
1543         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1544         if (!matched) {
1545                 kvm->arch.nr_vcpus_matched_tsc = 0;
1546         } else if (!already_matched) {
1547                 kvm->arch.nr_vcpus_matched_tsc++;
1548         }
1549
1550         kvm_track_tsc_matching(vcpu);
1551         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1552 }
1553
1554 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1555
1556 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1557                                            s64 adjustment)
1558 {
1559         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1560 }
1561
1562 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1563 {
1564         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1565                 WARN_ON(adjustment < 0);
1566         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1567         adjust_tsc_offset_guest(vcpu, adjustment);
1568 }
1569
1570 #ifdef CONFIG_X86_64
1571
1572 static cycle_t read_tsc(void)
1573 {
1574         cycle_t ret = (cycle_t)rdtsc_ordered();
1575         u64 last = pvclock_gtod_data.clock.cycle_last;
1576
1577         if (likely(ret >= last))
1578                 return ret;
1579
1580         /*
1581          * GCC likes to generate cmov here, but this branch is extremely
1582          * predictable (it's just a function of time and the likely is
1583          * very likely) and there's a data dependence, so force GCC
1584          * to generate a branch instead.  I don't barrier() because
1585          * we don't actually need a barrier, and if this function
1586          * ever gets inlined it will generate worse code.
1587          */
1588         asm volatile ("");
1589         return last;
1590 }
1591
1592 static inline u64 vgettsc(cycle_t *cycle_now)
1593 {
1594         long v;
1595         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1596
1597         *cycle_now = read_tsc();
1598
1599         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1600         return v * gtod->clock.mult;
1601 }
1602
1603 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1604 {
1605         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1606         unsigned long seq;
1607         int mode;
1608         u64 ns;
1609
1610         do {
1611                 seq = read_seqcount_begin(&gtod->seq);
1612                 mode = gtod->clock.vclock_mode;
1613                 ns = gtod->nsec_base;
1614                 ns += vgettsc(cycle_now);
1615                 ns >>= gtod->clock.shift;
1616                 ns += gtod->boot_ns;
1617         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1618         *t = ns;
1619
1620         return mode;
1621 }
1622
1623 /* returns true if host is using tsc clocksource */
1624 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1625 {
1626         /* checked again under seqlock below */
1627         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1628                 return false;
1629
1630         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1631 }
1632 #endif
1633
1634 /*
1635  *
1636  * Assuming a stable TSC across physical CPUS, and a stable TSC
1637  * across virtual CPUs, the following condition is possible.
1638  * Each numbered line represents an event visible to both
1639  * CPUs at the next numbered event.
1640  *
1641  * "timespecX" represents host monotonic time. "tscX" represents
1642  * RDTSC value.
1643  *
1644  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1645  *
1646  * 1.  read timespec0,tsc0
1647  * 2.                                   | timespec1 = timespec0 + N
1648  *                                      | tsc1 = tsc0 + M
1649  * 3. transition to guest               | transition to guest
1650  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1651  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1652  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1653  *
1654  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1655  *
1656  *      - ret0 < ret1
1657  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1658  *              ...
1659  *      - 0 < N - M => M < N
1660  *
1661  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1662  * always the case (the difference between two distinct xtime instances
1663  * might be smaller then the difference between corresponding TSC reads,
1664  * when updating guest vcpus pvclock areas).
1665  *
1666  * To avoid that problem, do not allow visibility of distinct
1667  * system_timestamp/tsc_timestamp values simultaneously: use a master
1668  * copy of host monotonic time values. Update that master copy
1669  * in lockstep.
1670  *
1671  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1672  *
1673  */
1674
1675 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1676 {
1677 #ifdef CONFIG_X86_64
1678         struct kvm_arch *ka = &kvm->arch;
1679         int vclock_mode;
1680         bool host_tsc_clocksource, vcpus_matched;
1681
1682         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1683                         atomic_read(&kvm->online_vcpus));
1684
1685         /*
1686          * If the host uses TSC clock, then passthrough TSC as stable
1687          * to the guest.
1688          */
1689         host_tsc_clocksource = kvm_get_time_and_clockread(
1690                                         &ka->master_kernel_ns,
1691                                         &ka->master_cycle_now);
1692
1693         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1694                                 && !backwards_tsc_observed
1695                                 && !ka->boot_vcpu_runs_old_kvmclock;
1696
1697         if (ka->use_master_clock)
1698                 atomic_set(&kvm_guest_has_master_clock, 1);
1699
1700         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1701         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1702                                         vcpus_matched);
1703 #endif
1704 }
1705
1706 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1707 {
1708         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1709 }
1710
1711 static void kvm_gen_update_masterclock(struct kvm *kvm)
1712 {
1713 #ifdef CONFIG_X86_64
1714         int i;
1715         struct kvm_vcpu *vcpu;
1716         struct kvm_arch *ka = &kvm->arch;
1717
1718         spin_lock(&ka->pvclock_gtod_sync_lock);
1719         kvm_make_mclock_inprogress_request(kvm);
1720         /* no guest entries from this point */
1721         pvclock_update_vm_gtod_copy(kvm);
1722
1723         kvm_for_each_vcpu(i, vcpu, kvm)
1724                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1725
1726         /* guest entries allowed */
1727         kvm_for_each_vcpu(i, vcpu, kvm)
1728                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1729
1730         spin_unlock(&ka->pvclock_gtod_sync_lock);
1731 #endif
1732 }
1733
1734 static u64 __get_kvmclock_ns(struct kvm *kvm)
1735 {
1736         struct kvm_arch *ka = &kvm->arch;
1737         struct pvclock_vcpu_time_info hv_clock;
1738
1739         spin_lock(&ka->pvclock_gtod_sync_lock);
1740         if (!ka->use_master_clock) {
1741                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1742                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1743         }
1744
1745         hv_clock.tsc_timestamp = ka->master_cycle_now;
1746         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1747         spin_unlock(&ka->pvclock_gtod_sync_lock);
1748
1749         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1750                            &hv_clock.tsc_shift,
1751                            &hv_clock.tsc_to_system_mul);
1752         return __pvclock_read_cycles(&hv_clock, rdtsc());
1753 }
1754
1755 u64 get_kvmclock_ns(struct kvm *kvm)
1756 {
1757         unsigned long flags;
1758         s64 ns;
1759
1760         local_irq_save(flags);
1761         ns = __get_kvmclock_ns(kvm);
1762         local_irq_restore(flags);
1763
1764         return ns;
1765 }
1766
1767 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1768 {
1769         struct kvm_vcpu_arch *vcpu = &v->arch;
1770         struct pvclock_vcpu_time_info guest_hv_clock;
1771
1772         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1773                 &guest_hv_clock, sizeof(guest_hv_clock))))
1774                 return;
1775
1776         /* This VCPU is paused, but it's legal for a guest to read another
1777          * VCPU's kvmclock, so we really have to follow the specification where
1778          * it says that version is odd if data is being modified, and even after
1779          * it is consistent.
1780          *
1781          * Version field updates must be kept separate.  This is because
1782          * kvm_write_guest_cached might use a "rep movs" instruction, and
1783          * writes within a string instruction are weakly ordered.  So there
1784          * are three writes overall.
1785          *
1786          * As a small optimization, only write the version field in the first
1787          * and third write.  The vcpu->pv_time cache is still valid, because the
1788          * version field is the first in the struct.
1789          */
1790         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1791
1792         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1793         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1794                                 &vcpu->hv_clock,
1795                                 sizeof(vcpu->hv_clock.version));
1796
1797         smp_wmb();
1798
1799         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1800         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1801
1802         if (vcpu->pvclock_set_guest_stopped_request) {
1803                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1804                 vcpu->pvclock_set_guest_stopped_request = false;
1805         }
1806
1807         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1808
1809         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1810                                 &vcpu->hv_clock,
1811                                 sizeof(vcpu->hv_clock));
1812
1813         smp_wmb();
1814
1815         vcpu->hv_clock.version++;
1816         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1817                                 &vcpu->hv_clock,
1818                                 sizeof(vcpu->hv_clock.version));
1819 }
1820
1821 static int kvm_guest_time_update(struct kvm_vcpu *v)
1822 {
1823         unsigned long flags, tgt_tsc_khz;
1824         struct kvm_vcpu_arch *vcpu = &v->arch;
1825         struct kvm_arch *ka = &v->kvm->arch;
1826         s64 kernel_ns;
1827         u64 tsc_timestamp, host_tsc;
1828         u8 pvclock_flags;
1829         bool use_master_clock;
1830
1831         kernel_ns = 0;
1832         host_tsc = 0;
1833
1834         /*
1835          * If the host uses TSC clock, then passthrough TSC as stable
1836          * to the guest.
1837          */
1838         spin_lock(&ka->pvclock_gtod_sync_lock);
1839         use_master_clock = ka->use_master_clock;
1840         if (use_master_clock) {
1841                 host_tsc = ka->master_cycle_now;
1842                 kernel_ns = ka->master_kernel_ns;
1843         }
1844         spin_unlock(&ka->pvclock_gtod_sync_lock);
1845
1846         /* Keep irq disabled to prevent changes to the clock */
1847         local_irq_save(flags);
1848         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1849         if (unlikely(tgt_tsc_khz == 0)) {
1850                 local_irq_restore(flags);
1851                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1852                 return 1;
1853         }
1854         if (!use_master_clock) {
1855                 host_tsc = rdtsc();
1856                 kernel_ns = ktime_get_boot_ns();
1857         }
1858
1859         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1860
1861         /*
1862          * We may have to catch up the TSC to match elapsed wall clock
1863          * time for two reasons, even if kvmclock is used.
1864          *   1) CPU could have been running below the maximum TSC rate
1865          *   2) Broken TSC compensation resets the base at each VCPU
1866          *      entry to avoid unknown leaps of TSC even when running
1867          *      again on the same CPU.  This may cause apparent elapsed
1868          *      time to disappear, and the guest to stand still or run
1869          *      very slowly.
1870          */
1871         if (vcpu->tsc_catchup) {
1872                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1873                 if (tsc > tsc_timestamp) {
1874                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1875                         tsc_timestamp = tsc;
1876                 }
1877         }
1878
1879         local_irq_restore(flags);
1880
1881         /* With all the info we got, fill in the values */
1882
1883         if (kvm_has_tsc_control)
1884                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1885
1886         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1887                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1888                                    &vcpu->hv_clock.tsc_shift,
1889                                    &vcpu->hv_clock.tsc_to_system_mul);
1890                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1891         }
1892
1893         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1894         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1895         vcpu->last_guest_tsc = tsc_timestamp;
1896
1897         /* If the host uses TSC clocksource, then it is stable */
1898         pvclock_flags = 0;
1899         if (use_master_clock)
1900                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1901
1902         vcpu->hv_clock.flags = pvclock_flags;
1903
1904         if (vcpu->pv_time_enabled)
1905                 kvm_setup_pvclock_page(v);
1906         if (v == kvm_get_vcpu(v->kvm, 0))
1907                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1908         return 0;
1909 }
1910
1911 /*
1912  * kvmclock updates which are isolated to a given vcpu, such as
1913  * vcpu->cpu migration, should not allow system_timestamp from
1914  * the rest of the vcpus to remain static. Otherwise ntp frequency
1915  * correction applies to one vcpu's system_timestamp but not
1916  * the others.
1917  *
1918  * So in those cases, request a kvmclock update for all vcpus.
1919  * We need to rate-limit these requests though, as they can
1920  * considerably slow guests that have a large number of vcpus.
1921  * The time for a remote vcpu to update its kvmclock is bound
1922  * by the delay we use to rate-limit the updates.
1923  */
1924
1925 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1926
1927 static void kvmclock_update_fn(struct work_struct *work)
1928 {
1929         int i;
1930         struct delayed_work *dwork = to_delayed_work(work);
1931         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1932                                            kvmclock_update_work);
1933         struct kvm *kvm = container_of(ka, struct kvm, arch);
1934         struct kvm_vcpu *vcpu;
1935
1936         kvm_for_each_vcpu(i, vcpu, kvm) {
1937                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1938                 kvm_vcpu_kick(vcpu);
1939         }
1940 }
1941
1942 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1943 {
1944         struct kvm *kvm = v->kvm;
1945
1946         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1947         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1948                                         KVMCLOCK_UPDATE_DELAY);
1949 }
1950
1951 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1952
1953 static void kvmclock_sync_fn(struct work_struct *work)
1954 {
1955         struct delayed_work *dwork = to_delayed_work(work);
1956         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1957                                            kvmclock_sync_work);
1958         struct kvm *kvm = container_of(ka, struct kvm, arch);
1959
1960         if (!kvmclock_periodic_sync)
1961                 return;
1962
1963         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1964         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1965                                         KVMCLOCK_SYNC_PERIOD);
1966 }
1967
1968 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1969 {
1970         u64 mcg_cap = vcpu->arch.mcg_cap;
1971         unsigned bank_num = mcg_cap & 0xff;
1972
1973         switch (msr) {
1974         case MSR_IA32_MCG_STATUS:
1975                 vcpu->arch.mcg_status = data;
1976                 break;
1977         case MSR_IA32_MCG_CTL:
1978                 if (!(mcg_cap & MCG_CTL_P))
1979                         return 1;
1980                 if (data != 0 && data != ~(u64)0)
1981                         return -1;
1982                 vcpu->arch.mcg_ctl = data;
1983                 break;
1984         default:
1985                 if (msr >= MSR_IA32_MC0_CTL &&
1986                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1987                         u32 offset = msr - MSR_IA32_MC0_CTL;
1988                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1989                          * some Linux kernels though clear bit 10 in bank 4 to
1990                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1991                          * this to avoid an uncatched #GP in the guest
1992                          */
1993                         if ((offset & 0x3) == 0 &&
1994                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1995                                 return -1;
1996                         vcpu->arch.mce_banks[offset] = data;
1997                         break;
1998                 }
1999                 return 1;
2000         }
2001         return 0;
2002 }
2003
2004 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2005 {
2006         struct kvm *kvm = vcpu->kvm;
2007         int lm = is_long_mode(vcpu);
2008         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2009                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2010         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2011                 : kvm->arch.xen_hvm_config.blob_size_32;
2012         u32 page_num = data & ~PAGE_MASK;
2013         u64 page_addr = data & PAGE_MASK;
2014         u8 *page;
2015         int r;
2016
2017         r = -E2BIG;
2018         if (page_num >= blob_size)
2019                 goto out;
2020         r = -ENOMEM;
2021         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2022         if (IS_ERR(page)) {
2023                 r = PTR_ERR(page);
2024                 goto out;
2025         }
2026         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2027                 goto out_free;
2028         r = 0;
2029 out_free:
2030         kfree(page);
2031 out:
2032         return r;
2033 }
2034
2035 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2036 {
2037         gpa_t gpa = data & ~0x3f;
2038
2039         /* Bits 2:5 are reserved, Should be zero */
2040         if (data & 0x3c)
2041                 return 1;
2042
2043         vcpu->arch.apf.msr_val = data;
2044
2045         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2046                 kvm_clear_async_pf_completion_queue(vcpu);
2047                 kvm_async_pf_hash_reset(vcpu);
2048                 return 0;
2049         }
2050
2051         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2052                                         sizeof(u32)))
2053                 return 1;
2054
2055         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2056         kvm_async_pf_wakeup_all(vcpu);
2057         return 0;
2058 }
2059
2060 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2061 {
2062         vcpu->arch.pv_time_enabled = false;
2063 }
2064
2065 static void record_steal_time(struct kvm_vcpu *vcpu)
2066 {
2067         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2068                 return;
2069
2070         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2071                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2072                 return;
2073
2074         if (vcpu->arch.st.steal.version & 1)
2075                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2076
2077         vcpu->arch.st.steal.version += 1;
2078
2079         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2080                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2081
2082         smp_wmb();
2083
2084         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2085                 vcpu->arch.st.last_steal;
2086         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2087
2088         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2089                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2090
2091         smp_wmb();
2092
2093         vcpu->arch.st.steal.version += 1;
2094
2095         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2096                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2097 }
2098
2099 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2100 {
2101         bool pr = false;
2102         u32 msr = msr_info->index;
2103         u64 data = msr_info->data;
2104
2105         switch (msr) {
2106         case MSR_AMD64_NB_CFG:
2107         case MSR_IA32_UCODE_REV:
2108         case MSR_IA32_UCODE_WRITE:
2109         case MSR_VM_HSAVE_PA:
2110         case MSR_AMD64_PATCH_LOADER:
2111         case MSR_AMD64_BU_CFG2:
2112                 break;
2113
2114         case MSR_EFER:
2115                 return set_efer(vcpu, data);
2116         case MSR_K7_HWCR:
2117                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2118                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2119                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2120                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2121                 if (data != 0) {
2122                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2123                                     data);
2124                         return 1;
2125                 }
2126                 break;
2127         case MSR_FAM10H_MMIO_CONF_BASE:
2128                 if (data != 0) {
2129                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2130                                     "0x%llx\n", data);
2131                         return 1;
2132                 }
2133                 break;
2134         case MSR_IA32_DEBUGCTLMSR:
2135                 if (!data) {
2136                         /* We support the non-activated case already */
2137                         break;
2138                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2139                         /* Values other than LBR and BTF are vendor-specific,
2140                            thus reserved and should throw a #GP */
2141                         return 1;
2142                 }
2143                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2144                             __func__, data);
2145                 break;
2146         case 0x200 ... 0x2ff:
2147                 return kvm_mtrr_set_msr(vcpu, msr, data);
2148         case MSR_IA32_APICBASE:
2149                 return kvm_set_apic_base(vcpu, msr_info);
2150         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2151                 return kvm_x2apic_msr_write(vcpu, msr, data);
2152         case MSR_IA32_TSCDEADLINE:
2153                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2154                 break;
2155         case MSR_IA32_TSC_ADJUST:
2156                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2157                         if (!msr_info->host_initiated) {
2158                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2159                                 adjust_tsc_offset_guest(vcpu, adj);
2160                         }
2161                         vcpu->arch.ia32_tsc_adjust_msr = data;
2162                 }
2163                 break;
2164         case MSR_IA32_MISC_ENABLE:
2165                 vcpu->arch.ia32_misc_enable_msr = data;
2166                 break;
2167         case MSR_IA32_SMBASE:
2168                 if (!msr_info->host_initiated)
2169                         return 1;
2170                 vcpu->arch.smbase = data;
2171                 break;
2172         case MSR_KVM_WALL_CLOCK_NEW:
2173         case MSR_KVM_WALL_CLOCK:
2174                 vcpu->kvm->arch.wall_clock = data;
2175                 kvm_write_wall_clock(vcpu->kvm, data);
2176                 break;
2177         case MSR_KVM_SYSTEM_TIME_NEW:
2178         case MSR_KVM_SYSTEM_TIME: {
2179                 u64 gpa_offset;
2180                 struct kvm_arch *ka = &vcpu->kvm->arch;
2181
2182                 kvmclock_reset(vcpu);
2183
2184                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2185                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2186
2187                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2188                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2189                                         &vcpu->requests);
2190
2191                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2192                 }
2193
2194                 vcpu->arch.time = data;
2195                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2196
2197                 /* we verify if the enable bit is set... */
2198                 if (!(data & 1))
2199                         break;
2200
2201                 gpa_offset = data & ~(PAGE_MASK | 1);
2202
2203                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2204                      &vcpu->arch.pv_time, data & ~1ULL,
2205                      sizeof(struct pvclock_vcpu_time_info)))
2206                         vcpu->arch.pv_time_enabled = false;
2207                 else
2208                         vcpu->arch.pv_time_enabled = true;
2209
2210                 break;
2211         }
2212         case MSR_KVM_ASYNC_PF_EN:
2213                 if (kvm_pv_enable_async_pf(vcpu, data))
2214                         return 1;
2215                 break;
2216         case MSR_KVM_STEAL_TIME:
2217
2218                 if (unlikely(!sched_info_on()))
2219                         return 1;
2220
2221                 if (data & KVM_STEAL_RESERVED_MASK)
2222                         return 1;
2223
2224                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2225                                                 data & KVM_STEAL_VALID_BITS,
2226                                                 sizeof(struct kvm_steal_time)))
2227                         return 1;
2228
2229                 vcpu->arch.st.msr_val = data;
2230
2231                 if (!(data & KVM_MSR_ENABLED))
2232                         break;
2233
2234                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2235
2236                 break;
2237         case MSR_KVM_PV_EOI_EN:
2238                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2239                         return 1;
2240                 break;
2241
2242         case MSR_IA32_MCG_CTL:
2243         case MSR_IA32_MCG_STATUS:
2244         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2245                 return set_msr_mce(vcpu, msr, data);
2246
2247         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2248         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2249                 pr = true; /* fall through */
2250         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2251         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2252                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2253                         return kvm_pmu_set_msr(vcpu, msr_info);
2254
2255                 if (pr || data != 0)
2256                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2257                                     "0x%x data 0x%llx\n", msr, data);
2258                 break;
2259         case MSR_K7_CLK_CTL:
2260                 /*
2261                  * Ignore all writes to this no longer documented MSR.
2262                  * Writes are only relevant for old K7 processors,
2263                  * all pre-dating SVM, but a recommended workaround from
2264                  * AMD for these chips. It is possible to specify the
2265                  * affected processor models on the command line, hence
2266                  * the need to ignore the workaround.
2267                  */
2268                 break;
2269         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2270         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2271         case HV_X64_MSR_CRASH_CTL:
2272         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2273                 return kvm_hv_set_msr_common(vcpu, msr, data,
2274                                              msr_info->host_initiated);
2275         case MSR_IA32_BBL_CR_CTL3:
2276                 /* Drop writes to this legacy MSR -- see rdmsr
2277                  * counterpart for further detail.
2278                  */
2279                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2280                 break;
2281         case MSR_AMD64_OSVW_ID_LENGTH:
2282                 if (!guest_cpuid_has_osvw(vcpu))
2283                         return 1;
2284                 vcpu->arch.osvw.length = data;
2285                 break;
2286         case MSR_AMD64_OSVW_STATUS:
2287                 if (!guest_cpuid_has_osvw(vcpu))
2288                         return 1;
2289                 vcpu->arch.osvw.status = data;
2290                 break;
2291         default:
2292                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2293                         return xen_hvm_config(vcpu, data);
2294                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2295                         return kvm_pmu_set_msr(vcpu, msr_info);
2296                 if (!ignore_msrs) {
2297                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2298                                     msr, data);
2299                         return 1;
2300                 } else {
2301                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2302                                     msr, data);
2303                         break;
2304                 }
2305         }
2306         return 0;
2307 }
2308 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2309
2310
2311 /*
2312  * Reads an msr value (of 'msr_index') into 'pdata'.
2313  * Returns 0 on success, non-0 otherwise.
2314  * Assumes vcpu_load() was already called.
2315  */
2316 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2317 {
2318         return kvm_x86_ops->get_msr(vcpu, msr);
2319 }
2320 EXPORT_SYMBOL_GPL(kvm_get_msr);
2321
2322 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2323 {
2324         u64 data;
2325         u64 mcg_cap = vcpu->arch.mcg_cap;
2326         unsigned bank_num = mcg_cap & 0xff;
2327
2328         switch (msr) {
2329         case MSR_IA32_P5_MC_ADDR:
2330         case MSR_IA32_P5_MC_TYPE:
2331                 data = 0;
2332                 break;
2333         case MSR_IA32_MCG_CAP:
2334                 data = vcpu->arch.mcg_cap;
2335                 break;
2336         case MSR_IA32_MCG_CTL:
2337                 if (!(mcg_cap & MCG_CTL_P))
2338                         return 1;
2339                 data = vcpu->arch.mcg_ctl;
2340                 break;
2341         case MSR_IA32_MCG_STATUS:
2342                 data = vcpu->arch.mcg_status;
2343                 break;
2344         default:
2345                 if (msr >= MSR_IA32_MC0_CTL &&
2346                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2347                         u32 offset = msr - MSR_IA32_MC0_CTL;
2348                         data = vcpu->arch.mce_banks[offset];
2349                         break;
2350                 }
2351                 return 1;
2352         }
2353         *pdata = data;
2354         return 0;
2355 }
2356
2357 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2358 {
2359         switch (msr_info->index) {
2360         case MSR_IA32_PLATFORM_ID:
2361         case MSR_IA32_EBL_CR_POWERON:
2362         case MSR_IA32_DEBUGCTLMSR:
2363         case MSR_IA32_LASTBRANCHFROMIP:
2364         case MSR_IA32_LASTBRANCHTOIP:
2365         case MSR_IA32_LASTINTFROMIP:
2366         case MSR_IA32_LASTINTTOIP:
2367         case MSR_K8_SYSCFG:
2368         case MSR_K8_TSEG_ADDR:
2369         case MSR_K8_TSEG_MASK:
2370         case MSR_K7_HWCR:
2371         case MSR_VM_HSAVE_PA:
2372         case MSR_K8_INT_PENDING_MSG:
2373         case MSR_AMD64_NB_CFG:
2374         case MSR_FAM10H_MMIO_CONF_BASE:
2375         case MSR_AMD64_BU_CFG2:
2376         case MSR_IA32_PERF_CTL:
2377                 msr_info->data = 0;
2378                 break;
2379         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2380         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2381         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2382         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2383                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2384                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2385                 msr_info->data = 0;
2386                 break;
2387         case MSR_IA32_UCODE_REV:
2388                 msr_info->data = 0x100000000ULL;
2389                 break;
2390         case MSR_MTRRcap:
2391         case 0x200 ... 0x2ff:
2392                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2393         case 0xcd: /* fsb frequency */
2394                 msr_info->data = 3;
2395                 break;
2396                 /*
2397                  * MSR_EBC_FREQUENCY_ID
2398                  * Conservative value valid for even the basic CPU models.
2399                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2400                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2401                  * and 266MHz for model 3, or 4. Set Core Clock
2402                  * Frequency to System Bus Frequency Ratio to 1 (bits
2403                  * 31:24) even though these are only valid for CPU
2404                  * models > 2, however guests may end up dividing or
2405                  * multiplying by zero otherwise.
2406                  */
2407         case MSR_EBC_FREQUENCY_ID:
2408                 msr_info->data = 1 << 24;
2409                 break;
2410         case MSR_IA32_APICBASE:
2411                 msr_info->data = kvm_get_apic_base(vcpu);
2412                 break;
2413         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2414                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2415                 break;
2416         case MSR_IA32_TSCDEADLINE:
2417                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2418                 break;
2419         case MSR_IA32_TSC_ADJUST:
2420                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2421                 break;
2422         case MSR_IA32_MISC_ENABLE:
2423                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2424                 break;
2425         case MSR_IA32_SMBASE:
2426                 if (!msr_info->host_initiated)
2427                         return 1;
2428                 msr_info->data = vcpu->arch.smbase;
2429                 break;
2430         case MSR_IA32_PERF_STATUS:
2431                 /* TSC increment by tick */
2432                 msr_info->data = 1000ULL;
2433                 /* CPU multiplier */
2434                 msr_info->data |= (((uint64_t)4ULL) << 40);
2435                 break;
2436         case MSR_EFER:
2437                 msr_info->data = vcpu->arch.efer;
2438                 break;
2439         case MSR_KVM_WALL_CLOCK:
2440         case MSR_KVM_WALL_CLOCK_NEW:
2441                 msr_info->data = vcpu->kvm->arch.wall_clock;
2442                 break;
2443         case MSR_KVM_SYSTEM_TIME:
2444         case MSR_KVM_SYSTEM_TIME_NEW:
2445                 msr_info->data = vcpu->arch.time;
2446                 break;
2447         case MSR_KVM_ASYNC_PF_EN:
2448                 msr_info->data = vcpu->arch.apf.msr_val;
2449                 break;
2450         case MSR_KVM_STEAL_TIME:
2451                 msr_info->data = vcpu->arch.st.msr_val;
2452                 break;
2453         case MSR_KVM_PV_EOI_EN:
2454                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2455                 break;
2456         case MSR_IA32_P5_MC_ADDR:
2457         case MSR_IA32_P5_MC_TYPE:
2458         case MSR_IA32_MCG_CAP:
2459         case MSR_IA32_MCG_CTL:
2460         case MSR_IA32_MCG_STATUS:
2461         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2462                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2463         case MSR_K7_CLK_CTL:
2464                 /*
2465                  * Provide expected ramp-up count for K7. All other
2466                  * are set to zero, indicating minimum divisors for
2467                  * every field.
2468                  *
2469                  * This prevents guest kernels on AMD host with CPU
2470                  * type 6, model 8 and higher from exploding due to
2471                  * the rdmsr failing.
2472                  */
2473                 msr_info->data = 0x20000000;
2474                 break;
2475         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2476         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2477         case HV_X64_MSR_CRASH_CTL:
2478         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2479                 return kvm_hv_get_msr_common(vcpu,
2480                                              msr_info->index, &msr_info->data);
2481                 break;
2482         case MSR_IA32_BBL_CR_CTL3:
2483                 /* This legacy MSR exists but isn't fully documented in current
2484                  * silicon.  It is however accessed by winxp in very narrow
2485                  * scenarios where it sets bit #19, itself documented as
2486                  * a "reserved" bit.  Best effort attempt to source coherent
2487                  * read data here should the balance of the register be
2488                  * interpreted by the guest:
2489                  *
2490                  * L2 cache control register 3: 64GB range, 256KB size,
2491                  * enabled, latency 0x1, configured
2492                  */
2493                 msr_info->data = 0xbe702111;
2494                 break;
2495         case MSR_AMD64_OSVW_ID_LENGTH:
2496                 if (!guest_cpuid_has_osvw(vcpu))
2497                         return 1;
2498                 msr_info->data = vcpu->arch.osvw.length;
2499                 break;
2500         case MSR_AMD64_OSVW_STATUS:
2501                 if (!guest_cpuid_has_osvw(vcpu))
2502                         return 1;
2503                 msr_info->data = vcpu->arch.osvw.status;
2504                 break;
2505         default:
2506                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2507                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2508                 if (!ignore_msrs) {
2509                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2510                         return 1;
2511                 } else {
2512                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2513                         msr_info->data = 0;
2514                 }
2515                 break;
2516         }
2517         return 0;
2518 }
2519 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2520
2521 /*
2522  * Read or write a bunch of msrs. All parameters are kernel addresses.
2523  *
2524  * @return number of msrs set successfully.
2525  */
2526 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2527                     struct kvm_msr_entry *entries,
2528                     int (*do_msr)(struct kvm_vcpu *vcpu,
2529                                   unsigned index, u64 *data))
2530 {
2531         int i, idx;
2532
2533         idx = srcu_read_lock(&vcpu->kvm->srcu);
2534         for (i = 0; i < msrs->nmsrs; ++i)
2535                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2536                         break;
2537         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2538
2539         return i;
2540 }
2541
2542 /*
2543  * Read or write a bunch of msrs. Parameters are user addresses.
2544  *
2545  * @return number of msrs set successfully.
2546  */
2547 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2548                   int (*do_msr)(struct kvm_vcpu *vcpu,
2549                                 unsigned index, u64 *data),
2550                   int writeback)
2551 {
2552         struct kvm_msrs msrs;
2553         struct kvm_msr_entry *entries;
2554         int r, n;
2555         unsigned size;
2556
2557         r = -EFAULT;
2558         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2559                 goto out;
2560
2561         r = -E2BIG;
2562         if (msrs.nmsrs >= MAX_IO_MSRS)
2563                 goto out;
2564
2565         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2566         entries = memdup_user(user_msrs->entries, size);
2567         if (IS_ERR(entries)) {
2568                 r = PTR_ERR(entries);
2569                 goto out;
2570         }
2571
2572         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2573         if (r < 0)
2574                 goto out_free;
2575
2576         r = -EFAULT;
2577         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2578                 goto out_free;
2579
2580         r = n;
2581
2582 out_free:
2583         kfree(entries);
2584 out:
2585         return r;
2586 }
2587
2588 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2589 {
2590         int r;
2591
2592         switch (ext) {
2593         case KVM_CAP_IRQCHIP:
2594         case KVM_CAP_HLT:
2595         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2596         case KVM_CAP_SET_TSS_ADDR:
2597         case KVM_CAP_EXT_CPUID:
2598         case KVM_CAP_EXT_EMUL_CPUID:
2599         case KVM_CAP_CLOCKSOURCE:
2600         case KVM_CAP_PIT:
2601         case KVM_CAP_NOP_IO_DELAY:
2602         case KVM_CAP_MP_STATE:
2603         case KVM_CAP_SYNC_MMU:
2604         case KVM_CAP_USER_NMI:
2605         case KVM_CAP_REINJECT_CONTROL:
2606         case KVM_CAP_IRQ_INJECT_STATUS:
2607         case KVM_CAP_IOEVENTFD:
2608         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2609         case KVM_CAP_PIT2:
2610         case KVM_CAP_PIT_STATE2:
2611         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2612         case KVM_CAP_XEN_HVM:
2613         case KVM_CAP_ADJUST_CLOCK:
2614         case KVM_CAP_VCPU_EVENTS:
2615         case KVM_CAP_HYPERV:
2616         case KVM_CAP_HYPERV_VAPIC:
2617         case KVM_CAP_HYPERV_SPIN:
2618         case KVM_CAP_HYPERV_SYNIC:
2619         case KVM_CAP_PCI_SEGMENT:
2620         case KVM_CAP_DEBUGREGS:
2621         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2622         case KVM_CAP_XSAVE:
2623         case KVM_CAP_ASYNC_PF:
2624         case KVM_CAP_GET_TSC_KHZ:
2625         case KVM_CAP_KVMCLOCK_CTRL:
2626         case KVM_CAP_READONLY_MEM:
2627         case KVM_CAP_HYPERV_TIME:
2628         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2629         case KVM_CAP_TSC_DEADLINE_TIMER:
2630         case KVM_CAP_ENABLE_CAP_VM:
2631         case KVM_CAP_DISABLE_QUIRKS:
2632         case KVM_CAP_SET_BOOT_CPU_ID:
2633         case KVM_CAP_SPLIT_IRQCHIP:
2634 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2635         case KVM_CAP_ASSIGN_DEV_IRQ:
2636         case KVM_CAP_PCI_2_3:
2637 #endif
2638                 r = 1;
2639                 break;
2640         case KVM_CAP_X86_SMM:
2641                 /* SMBASE is usually relocated above 1M on modern chipsets,
2642                  * and SMM handlers might indeed rely on 4G segment limits,
2643                  * so do not report SMM to be available if real mode is
2644                  * emulated via vm86 mode.  Still, do not go to great lengths
2645                  * to avoid userspace's usage of the feature, because it is a
2646                  * fringe case that is not enabled except via specific settings
2647                  * of the module parameters.
2648                  */
2649                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2650                 break;
2651         case KVM_CAP_COALESCED_MMIO:
2652                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2653                 break;
2654         case KVM_CAP_VAPIC:
2655                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2656                 break;
2657         case KVM_CAP_NR_VCPUS:
2658                 r = KVM_SOFT_MAX_VCPUS;
2659                 break;
2660         case KVM_CAP_MAX_VCPUS:
2661                 r = KVM_MAX_VCPUS;
2662                 break;
2663         case KVM_CAP_NR_MEMSLOTS:
2664                 r = KVM_USER_MEM_SLOTS;
2665                 break;
2666         case KVM_CAP_PV_MMU:    /* obsolete */
2667                 r = 0;
2668                 break;
2669 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2670         case KVM_CAP_IOMMU:
2671                 r = iommu_present(&pci_bus_type);
2672                 break;
2673 #endif
2674         case KVM_CAP_MCE:
2675                 r = KVM_MAX_MCE_BANKS;
2676                 break;
2677         case KVM_CAP_XCRS:
2678                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2679                 break;
2680         case KVM_CAP_TSC_CONTROL:
2681                 r = kvm_has_tsc_control;
2682                 break;
2683         case KVM_CAP_X2APIC_API:
2684                 r = KVM_X2APIC_API_VALID_FLAGS;
2685                 break;
2686         default:
2687                 r = 0;
2688                 break;
2689         }
2690         return r;
2691
2692 }
2693
2694 long kvm_arch_dev_ioctl(struct file *filp,
2695                         unsigned int ioctl, unsigned long arg)
2696 {
2697         void __user *argp = (void __user *)arg;
2698         long r;
2699
2700         switch (ioctl) {
2701         case KVM_GET_MSR_INDEX_LIST: {
2702                 struct kvm_msr_list __user *user_msr_list = argp;
2703                 struct kvm_msr_list msr_list;
2704                 unsigned n;
2705
2706                 r = -EFAULT;
2707                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2708                         goto out;
2709                 n = msr_list.nmsrs;
2710                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2711                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2712                         goto out;
2713                 r = -E2BIG;
2714                 if (n < msr_list.nmsrs)
2715                         goto out;
2716                 r = -EFAULT;
2717                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2718                                  num_msrs_to_save * sizeof(u32)))
2719                         goto out;
2720                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2721                                  &emulated_msrs,
2722                                  num_emulated_msrs * sizeof(u32)))
2723                         goto out;
2724                 r = 0;
2725                 break;
2726         }
2727         case KVM_GET_SUPPORTED_CPUID:
2728         case KVM_GET_EMULATED_CPUID: {
2729                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2730                 struct kvm_cpuid2 cpuid;
2731
2732                 r = -EFAULT;
2733                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2734                         goto out;
2735
2736                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2737                                             ioctl);
2738                 if (r)
2739                         goto out;
2740
2741                 r = -EFAULT;
2742                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2743                         goto out;
2744                 r = 0;
2745                 break;
2746         }
2747         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2748                 r = -EFAULT;
2749                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2750                                  sizeof(kvm_mce_cap_supported)))
2751                         goto out;
2752                 r = 0;
2753                 break;
2754         }
2755         default:
2756                 r = -EINVAL;
2757         }
2758 out:
2759         return r;
2760 }
2761
2762 static void wbinvd_ipi(void *garbage)
2763 {
2764         wbinvd();
2765 }
2766
2767 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2768 {
2769         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2770 }
2771
2772 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2773 {
2774         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2775 }
2776
2777 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2778 {
2779         /* Address WBINVD may be executed by guest */
2780         if (need_emulate_wbinvd(vcpu)) {
2781                 if (kvm_x86_ops->has_wbinvd_exit())
2782                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2783                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2784                         smp_call_function_single(vcpu->cpu,
2785                                         wbinvd_ipi, NULL, 1);
2786         }
2787
2788         kvm_x86_ops->vcpu_load(vcpu, cpu);
2789
2790         /* Apply any externally detected TSC adjustments (due to suspend) */
2791         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2792                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2793                 vcpu->arch.tsc_offset_adjustment = 0;
2794                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2795         }
2796
2797         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2798                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2799                                 rdtsc() - vcpu->arch.last_host_tsc;
2800                 if (tsc_delta < 0)
2801                         mark_tsc_unstable("KVM discovered backwards TSC");
2802
2803                 if (check_tsc_unstable()) {
2804                         u64 offset = kvm_compute_tsc_offset(vcpu,
2805                                                 vcpu->arch.last_guest_tsc);
2806                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2807                         vcpu->arch.tsc_catchup = 1;
2808                 }
2809                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2810                                 kvm_x86_ops->set_hv_timer(vcpu,
2811                                         kvm_get_lapic_tscdeadline_msr(vcpu)))
2812                         kvm_lapic_switch_to_sw_timer(vcpu);
2813                 /*
2814                  * On a host with synchronized TSC, there is no need to update
2815                  * kvmclock on vcpu->cpu migration
2816                  */
2817                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2818                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2819                 if (vcpu->cpu != cpu)
2820                         kvm_migrate_timers(vcpu);
2821                 vcpu->cpu = cpu;
2822         }
2823
2824         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2825 }
2826
2827 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2828 {
2829         kvm_x86_ops->vcpu_put(vcpu);
2830         kvm_put_guest_fpu(vcpu);
2831         vcpu->arch.last_host_tsc = rdtsc();
2832 }
2833
2834 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2835                                     struct kvm_lapic_state *s)
2836 {
2837         if (vcpu->arch.apicv_active)
2838                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2839
2840         return kvm_apic_get_state(vcpu, s);
2841 }
2842
2843 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2844                                     struct kvm_lapic_state *s)
2845 {
2846         int r;
2847
2848         r = kvm_apic_set_state(vcpu, s);
2849         if (r)
2850                 return r;
2851         update_cr8_intercept(vcpu);
2852
2853         return 0;
2854 }
2855
2856 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2857 {
2858         return (!lapic_in_kernel(vcpu) ||
2859                 kvm_apic_accept_pic_intr(vcpu));
2860 }
2861
2862 /*
2863  * if userspace requested an interrupt window, check that the
2864  * interrupt window is open.
2865  *
2866  * No need to exit to userspace if we already have an interrupt queued.
2867  */
2868 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2869 {
2870         return kvm_arch_interrupt_allowed(vcpu) &&
2871                 !kvm_cpu_has_interrupt(vcpu) &&
2872                 !kvm_event_needs_reinjection(vcpu) &&
2873                 kvm_cpu_accept_dm_intr(vcpu);
2874 }
2875
2876 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2877                                     struct kvm_interrupt *irq)
2878 {
2879         if (irq->irq >= KVM_NR_INTERRUPTS)
2880                 return -EINVAL;
2881
2882         if (!irqchip_in_kernel(vcpu->kvm)) {
2883                 kvm_queue_interrupt(vcpu, irq->irq, false);
2884                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2885                 return 0;
2886         }
2887
2888         /*
2889          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2890          * fail for in-kernel 8259.
2891          */
2892         if (pic_in_kernel(vcpu->kvm))
2893                 return -ENXIO;
2894
2895         if (vcpu->arch.pending_external_vector != -1)
2896                 return -EEXIST;
2897
2898         vcpu->arch.pending_external_vector = irq->irq;
2899         kvm_make_request(KVM_REQ_EVENT, vcpu);
2900         return 0;
2901 }
2902
2903 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2904 {
2905         kvm_inject_nmi(vcpu);
2906
2907         return 0;
2908 }
2909
2910 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2911 {
2912         kvm_make_request(KVM_REQ_SMI, vcpu);
2913
2914         return 0;
2915 }
2916
2917 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2918                                            struct kvm_tpr_access_ctl *tac)
2919 {
2920         if (tac->flags)
2921                 return -EINVAL;
2922         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2923         return 0;
2924 }
2925
2926 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2927                                         u64 mcg_cap)
2928 {
2929         int r;
2930         unsigned bank_num = mcg_cap & 0xff, bank;
2931
2932         r = -EINVAL;
2933         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2934                 goto out;
2935         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
2936                 goto out;
2937         r = 0;
2938         vcpu->arch.mcg_cap = mcg_cap;
2939         /* Init IA32_MCG_CTL to all 1s */
2940         if (mcg_cap & MCG_CTL_P)
2941                 vcpu->arch.mcg_ctl = ~(u64)0;
2942         /* Init IA32_MCi_CTL to all 1s */
2943         for (bank = 0; bank < bank_num; bank++)
2944                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2945
2946         if (kvm_x86_ops->setup_mce)
2947                 kvm_x86_ops->setup_mce(vcpu);
2948 out:
2949         return r;
2950 }
2951
2952 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2953                                       struct kvm_x86_mce *mce)
2954 {
2955         u64 mcg_cap = vcpu->arch.mcg_cap;
2956         unsigned bank_num = mcg_cap & 0xff;
2957         u64 *banks = vcpu->arch.mce_banks;
2958
2959         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2960                 return -EINVAL;
2961         /*
2962          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2963          * reporting is disabled
2964          */
2965         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2966             vcpu->arch.mcg_ctl != ~(u64)0)
2967                 return 0;
2968         banks += 4 * mce->bank;
2969         /*
2970          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2971          * reporting is disabled for the bank
2972          */
2973         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2974                 return 0;
2975         if (mce->status & MCI_STATUS_UC) {
2976                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2977                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2978                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2979                         return 0;
2980                 }
2981                 if (banks[1] & MCI_STATUS_VAL)
2982                         mce->status |= MCI_STATUS_OVER;
2983                 banks[2] = mce->addr;
2984                 banks[3] = mce->misc;
2985                 vcpu->arch.mcg_status = mce->mcg_status;
2986                 banks[1] = mce->status;
2987                 kvm_queue_exception(vcpu, MC_VECTOR);
2988         } else if (!(banks[1] & MCI_STATUS_VAL)
2989                    || !(banks[1] & MCI_STATUS_UC)) {
2990                 if (banks[1] & MCI_STATUS_VAL)
2991                         mce->status |= MCI_STATUS_OVER;
2992                 banks[2] = mce->addr;
2993                 banks[3] = mce->misc;
2994                 banks[1] = mce->status;
2995         } else
2996                 banks[1] |= MCI_STATUS_OVER;
2997         return 0;
2998 }
2999
3000 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3001                                                struct kvm_vcpu_events *events)
3002 {
3003         process_nmi(vcpu);
3004         events->exception.injected =
3005                 vcpu->arch.exception.pending &&
3006                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3007         events->exception.nr = vcpu->arch.exception.nr;
3008         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3009         events->exception.pad = 0;
3010         events->exception.error_code = vcpu->arch.exception.error_code;
3011
3012         events->interrupt.injected =
3013                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3014         events->interrupt.nr = vcpu->arch.interrupt.nr;
3015         events->interrupt.soft = 0;
3016         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3017
3018         events->nmi.injected = vcpu->arch.nmi_injected;
3019         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3020         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3021         events->nmi.pad = 0;
3022
3023         events->sipi_vector = 0; /* never valid when reporting to user space */
3024
3025         events->smi.smm = is_smm(vcpu);
3026         events->smi.pending = vcpu->arch.smi_pending;
3027         events->smi.smm_inside_nmi =
3028                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3029         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3030
3031         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3032                          | KVM_VCPUEVENT_VALID_SHADOW
3033                          | KVM_VCPUEVENT_VALID_SMM);
3034         memset(&events->reserved, 0, sizeof(events->reserved));
3035 }
3036
3037 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3038                                               struct kvm_vcpu_events *events)
3039 {
3040         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3041                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3042                               | KVM_VCPUEVENT_VALID_SHADOW
3043                               | KVM_VCPUEVENT_VALID_SMM))
3044                 return -EINVAL;
3045
3046         if (events->exception.injected &&
3047             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3048                 return -EINVAL;
3049
3050         process_nmi(vcpu);
3051         vcpu->arch.exception.pending = events->exception.injected;
3052         vcpu->arch.exception.nr = events->exception.nr;
3053         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3054         vcpu->arch.exception.error_code = events->exception.error_code;
3055
3056         vcpu->arch.interrupt.pending = events->interrupt.injected;
3057         vcpu->arch.interrupt.nr = events->interrupt.nr;
3058         vcpu->arch.interrupt.soft = events->interrupt.soft;
3059         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3060                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3061                                                   events->interrupt.shadow);
3062
3063         vcpu->arch.nmi_injected = events->nmi.injected;
3064         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3065                 vcpu->arch.nmi_pending = events->nmi.pending;
3066         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3067
3068         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3069             lapic_in_kernel(vcpu))
3070                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3071
3072         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3073                 if (events->smi.smm)
3074                         vcpu->arch.hflags |= HF_SMM_MASK;
3075                 else
3076                         vcpu->arch.hflags &= ~HF_SMM_MASK;
3077                 vcpu->arch.smi_pending = events->smi.pending;
3078                 if (events->smi.smm_inside_nmi)
3079                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3080                 else
3081                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3082                 if (lapic_in_kernel(vcpu)) {
3083                         if (events->smi.latched_init)
3084                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3085                         else
3086                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3087                 }
3088         }
3089
3090         kvm_make_request(KVM_REQ_EVENT, vcpu);
3091
3092         return 0;
3093 }
3094
3095 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3096                                              struct kvm_debugregs *dbgregs)
3097 {
3098         unsigned long val;
3099
3100         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3101         kvm_get_dr(vcpu, 6, &val);
3102         dbgregs->dr6 = val;
3103         dbgregs->dr7 = vcpu->arch.dr7;
3104         dbgregs->flags = 0;
3105         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3106 }
3107
3108 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3109                                             struct kvm_debugregs *dbgregs)
3110 {
3111         if (dbgregs->flags)
3112                 return -EINVAL;
3113
3114         if (dbgregs->dr6 & ~0xffffffffull)
3115                 return -EINVAL;
3116         if (dbgregs->dr7 & ~0xffffffffull)
3117                 return -EINVAL;
3118
3119         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3120         kvm_update_dr0123(vcpu);
3121         vcpu->arch.dr6 = dbgregs->dr6;
3122         kvm_update_dr6(vcpu);
3123         vcpu->arch.dr7 = dbgregs->dr7;
3124         kvm_update_dr7(vcpu);
3125
3126         return 0;
3127 }
3128
3129 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3130
3131 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3132 {
3133         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3134         u64 xstate_bv = xsave->header.xfeatures;
3135         u64 valid;
3136
3137         /*
3138          * Copy legacy XSAVE area, to avoid complications with CPUID
3139          * leaves 0 and 1 in the loop below.
3140          */
3141         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3142
3143         /* Set XSTATE_BV */
3144         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3145
3146         /*
3147          * Copy each region from the possibly compacted offset to the
3148          * non-compacted offset.
3149          */
3150         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3151         while (valid) {
3152                 u64 feature = valid & -valid;
3153                 int index = fls64(feature) - 1;
3154                 void *src = get_xsave_addr(xsave, feature);
3155
3156                 if (src) {
3157                         u32 size, offset, ecx, edx;
3158                         cpuid_count(XSTATE_CPUID, index,
3159                                     &size, &offset, &ecx, &edx);
3160                         memcpy(dest + offset, src, size);
3161                 }
3162
3163                 valid -= feature;
3164         }
3165 }
3166
3167 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3168 {
3169         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3170         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3171         u64 valid;
3172
3173         /*
3174          * Copy legacy XSAVE area, to avoid complications with CPUID
3175          * leaves 0 and 1 in the loop below.
3176          */
3177         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3178
3179         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3180         xsave->header.xfeatures = xstate_bv;
3181         if (boot_cpu_has(X86_FEATURE_XSAVES))
3182                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3183
3184         /*
3185          * Copy each region from the non-compacted offset to the
3186          * possibly compacted offset.
3187          */
3188         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3189         while (valid) {
3190                 u64 feature = valid & -valid;
3191                 int index = fls64(feature) - 1;
3192                 void *dest = get_xsave_addr(xsave, feature);
3193
3194                 if (dest) {
3195                         u32 size, offset, ecx, edx;
3196                         cpuid_count(XSTATE_CPUID, index,
3197                                     &size, &offset, &ecx, &edx);
3198                         memcpy(dest, src + offset, size);
3199                 }
3200
3201                 valid -= feature;
3202         }
3203 }
3204
3205 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3206                                          struct kvm_xsave *guest_xsave)
3207 {
3208         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3209                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3210                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3211         } else {
3212                 memcpy(guest_xsave->region,
3213                         &vcpu->arch.guest_fpu.state.fxsave,
3214                         sizeof(struct fxregs_state));
3215                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3216                         XFEATURE_MASK_FPSSE;
3217         }
3218 }
3219
3220 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3221                                         struct kvm_xsave *guest_xsave)
3222 {
3223         u64 xstate_bv =
3224                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3225
3226         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3227                 /*
3228                  * Here we allow setting states that are not present in
3229                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3230                  * with old userspace.
3231                  */
3232                 if (xstate_bv & ~kvm_supported_xcr0())
3233                         return -EINVAL;
3234                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3235         } else {
3236                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3237                         return -EINVAL;
3238                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3239                         guest_xsave->region, sizeof(struct fxregs_state));
3240         }
3241         return 0;
3242 }
3243
3244 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3245                                         struct kvm_xcrs *guest_xcrs)
3246 {
3247         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3248                 guest_xcrs->nr_xcrs = 0;
3249                 return;
3250         }
3251
3252         guest_xcrs->nr_xcrs = 1;
3253         guest_xcrs->flags = 0;
3254         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3255         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3256 }
3257
3258 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3259                                        struct kvm_xcrs *guest_xcrs)
3260 {
3261         int i, r = 0;
3262
3263         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3264                 return -EINVAL;
3265
3266         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3267                 return -EINVAL;
3268
3269         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3270                 /* Only support XCR0 currently */
3271                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3272                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3273                                 guest_xcrs->xcrs[i].value);
3274                         break;
3275                 }
3276         if (r)
3277                 r = -EINVAL;
3278         return r;
3279 }
3280
3281 /*
3282  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3283  * stopped by the hypervisor.  This function will be called from the host only.
3284  * EINVAL is returned when the host attempts to set the flag for a guest that
3285  * does not support pv clocks.
3286  */
3287 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3288 {
3289         if (!vcpu->arch.pv_time_enabled)
3290                 return -EINVAL;
3291         vcpu->arch.pvclock_set_guest_stopped_request = true;
3292         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3293         return 0;
3294 }
3295
3296 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3297                                      struct kvm_enable_cap *cap)
3298 {
3299         if (cap->flags)
3300                 return -EINVAL;
3301
3302         switch (cap->cap) {
3303         case KVM_CAP_HYPERV_SYNIC:
3304                 return kvm_hv_activate_synic(vcpu);
3305         default:
3306                 return -EINVAL;
3307         }
3308 }
3309
3310 long kvm_arch_vcpu_ioctl(struct file *filp,
3311                          unsigned int ioctl, unsigned long arg)
3312 {
3313         struct kvm_vcpu *vcpu = filp->private_data;
3314         void __user *argp = (void __user *)arg;
3315         int r;
3316         union {
3317                 struct kvm_lapic_state *lapic;
3318                 struct kvm_xsave *xsave;
3319                 struct kvm_xcrs *xcrs;
3320                 void *buffer;
3321         } u;
3322
3323         u.buffer = NULL;
3324         switch (ioctl) {
3325         case KVM_GET_LAPIC: {
3326                 r = -EINVAL;
3327                 if (!lapic_in_kernel(vcpu))
3328                         goto out;
3329                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3330
3331                 r = -ENOMEM;
3332                 if (!u.lapic)
3333                         goto out;
3334                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3335                 if (r)
3336                         goto out;
3337                 r = -EFAULT;
3338                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3339                         goto out;
3340                 r = 0;
3341                 break;
3342         }
3343         case KVM_SET_LAPIC: {
3344                 r = -EINVAL;
3345                 if (!lapic_in_kernel(vcpu))
3346                         goto out;
3347                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3348                 if (IS_ERR(u.lapic))
3349                         return PTR_ERR(u.lapic);
3350
3351                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3352                 break;
3353         }
3354         case KVM_INTERRUPT: {
3355                 struct kvm_interrupt irq;
3356
3357                 r = -EFAULT;
3358                 if (copy_from_user(&irq, argp, sizeof irq))
3359                         goto out;
3360                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3361                 break;
3362         }
3363         case KVM_NMI: {
3364                 r = kvm_vcpu_ioctl_nmi(vcpu);
3365                 break;
3366         }
3367         case KVM_SMI: {
3368                 r = kvm_vcpu_ioctl_smi(vcpu);
3369                 break;
3370         }
3371         case KVM_SET_CPUID: {
3372                 struct kvm_cpuid __user *cpuid_arg = argp;
3373                 struct kvm_cpuid cpuid;
3374
3375                 r = -EFAULT;
3376                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3377                         goto out;
3378                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3379                 break;
3380         }
3381         case KVM_SET_CPUID2: {
3382                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3383                 struct kvm_cpuid2 cpuid;
3384
3385                 r = -EFAULT;
3386                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3387                         goto out;
3388                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3389                                               cpuid_arg->entries);
3390                 break;
3391         }
3392         case KVM_GET_CPUID2: {
3393                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3394                 struct kvm_cpuid2 cpuid;
3395
3396                 r = -EFAULT;
3397                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3398                         goto out;
3399                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3400                                               cpuid_arg->entries);
3401                 if (r)
3402                         goto out;
3403                 r = -EFAULT;
3404                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3405                         goto out;
3406                 r = 0;
3407                 break;
3408         }
3409         case KVM_GET_MSRS:
3410                 r = msr_io(vcpu, argp, do_get_msr, 1);
3411                 break;
3412         case KVM_SET_MSRS:
3413                 r = msr_io(vcpu, argp, do_set_msr, 0);
3414                 break;
3415         case KVM_TPR_ACCESS_REPORTING: {
3416                 struct kvm_tpr_access_ctl tac;
3417
3418                 r = -EFAULT;
3419                 if (copy_from_user(&tac, argp, sizeof tac))
3420                         goto out;
3421                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3422                 if (r)
3423                         goto out;
3424                 r = -EFAULT;
3425                 if (copy_to_user(argp, &tac, sizeof tac))
3426                         goto out;
3427                 r = 0;
3428                 break;
3429         };
3430         case KVM_SET_VAPIC_ADDR: {
3431                 struct kvm_vapic_addr va;
3432
3433                 r = -EINVAL;
3434                 if (!lapic_in_kernel(vcpu))
3435                         goto out;
3436                 r = -EFAULT;
3437                 if (copy_from_user(&va, argp, sizeof va))
3438                         goto out;
3439                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3440                 break;
3441         }
3442         case KVM_X86_SETUP_MCE: {
3443                 u64 mcg_cap;
3444
3445                 r = -EFAULT;
3446                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3447                         goto out;
3448                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3449                 break;
3450         }
3451         case KVM_X86_SET_MCE: {
3452                 struct kvm_x86_mce mce;
3453
3454                 r = -EFAULT;
3455                 if (copy_from_user(&mce, argp, sizeof mce))
3456                         goto out;
3457                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3458                 break;
3459         }
3460         case KVM_GET_VCPU_EVENTS: {
3461                 struct kvm_vcpu_events events;
3462
3463                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3464
3465                 r = -EFAULT;
3466                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3467                         break;
3468                 r = 0;
3469                 break;
3470         }
3471         case KVM_SET_VCPU_EVENTS: {
3472                 struct kvm_vcpu_events events;
3473
3474                 r = -EFAULT;
3475                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3476                         break;
3477
3478                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3479                 break;
3480         }
3481         case KVM_GET_DEBUGREGS: {
3482                 struct kvm_debugregs dbgregs;
3483
3484                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3485
3486                 r = -EFAULT;
3487                 if (copy_to_user(argp, &dbgregs,
3488                                  sizeof(struct kvm_debugregs)))
3489                         break;
3490                 r = 0;
3491                 break;
3492         }
3493         case KVM_SET_DEBUGREGS: {
3494                 struct kvm_debugregs dbgregs;
3495
3496                 r = -EFAULT;
3497                 if (copy_from_user(&dbgregs, argp,
3498                                    sizeof(struct kvm_debugregs)))
3499                         break;
3500
3501                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3502                 break;
3503         }
3504         case KVM_GET_XSAVE: {
3505                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3506                 r = -ENOMEM;
3507                 if (!u.xsave)
3508                         break;
3509
3510                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3511
3512                 r = -EFAULT;
3513                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3514                         break;
3515                 r = 0;
3516                 break;
3517         }
3518         case KVM_SET_XSAVE: {
3519                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3520                 if (IS_ERR(u.xsave))
3521                         return PTR_ERR(u.xsave);
3522
3523                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3524                 break;
3525         }
3526         case KVM_GET_XCRS: {
3527                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3528                 r = -ENOMEM;
3529                 if (!u.xcrs)
3530                         break;
3531
3532                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3533
3534                 r = -EFAULT;
3535                 if (copy_to_user(argp, u.xcrs,
3536                                  sizeof(struct kvm_xcrs)))
3537                         break;
3538                 r = 0;
3539                 break;
3540         }
3541         case KVM_SET_XCRS: {
3542                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3543                 if (IS_ERR(u.xcrs))
3544                         return PTR_ERR(u.xcrs);
3545
3546                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3547                 break;
3548         }
3549         case KVM_SET_TSC_KHZ: {
3550                 u32 user_tsc_khz;
3551
3552                 r = -EINVAL;
3553                 user_tsc_khz = (u32)arg;
3554
3555                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3556                         goto out;
3557
3558                 if (user_tsc_khz == 0)
3559                         user_tsc_khz = tsc_khz;
3560
3561                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3562                         r = 0;
3563
3564                 goto out;
3565         }
3566         case KVM_GET_TSC_KHZ: {
3567                 r = vcpu->arch.virtual_tsc_khz;
3568                 goto out;
3569         }
3570         case KVM_KVMCLOCK_CTRL: {
3571                 r = kvm_set_guest_paused(vcpu);
3572                 goto out;
3573         }
3574         case KVM_ENABLE_CAP: {
3575                 struct kvm_enable_cap cap;
3576
3577                 r = -EFAULT;
3578                 if (copy_from_user(&cap, argp, sizeof(cap)))
3579                         goto out;
3580                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3581                 break;
3582         }
3583         default:
3584                 r = -EINVAL;
3585         }
3586 out:
3587         kfree(u.buffer);
3588         return r;
3589 }
3590
3591 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3592 {
3593         return VM_FAULT_SIGBUS;
3594 }
3595
3596 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3597 {
3598         int ret;
3599
3600         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3601                 return -EINVAL;
3602         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3603         return ret;
3604 }
3605
3606 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3607                                               u64 ident_addr)
3608 {
3609         kvm->arch.ept_identity_map_addr = ident_addr;
3610         return 0;
3611 }
3612
3613 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3614                                           u32 kvm_nr_mmu_pages)
3615 {
3616         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3617                 return -EINVAL;
3618
3619         mutex_lock(&kvm->slots_lock);
3620
3621         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3622         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3623
3624         mutex_unlock(&kvm->slots_lock);
3625         return 0;
3626 }
3627
3628 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3629 {
3630         return kvm->arch.n_max_mmu_pages;
3631 }
3632
3633 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3634 {
3635         int r;
3636
3637         r = 0;
3638         switch (chip->chip_id) {
3639         case KVM_IRQCHIP_PIC_MASTER:
3640                 memcpy(&chip->chip.pic,
3641                         &pic_irqchip(kvm)->pics[0],
3642                         sizeof(struct kvm_pic_state));
3643                 break;
3644         case KVM_IRQCHIP_PIC_SLAVE:
3645                 memcpy(&chip->chip.pic,
3646                         &pic_irqchip(kvm)->pics[1],
3647                         sizeof(struct kvm_pic_state));
3648                 break;
3649         case KVM_IRQCHIP_IOAPIC:
3650                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3651                 break;
3652         default:
3653                 r = -EINVAL;
3654                 break;
3655         }
3656         return r;
3657 }
3658
3659 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3660 {
3661         int r;
3662
3663         r = 0;
3664         switch (chip->chip_id) {
3665         case KVM_IRQCHIP_PIC_MASTER:
3666                 spin_lock(&pic_irqchip(kvm)->lock);
3667                 memcpy(&pic_irqchip(kvm)->pics[0],
3668                         &chip->chip.pic,
3669                         sizeof(struct kvm_pic_state));
3670                 spin_unlock(&pic_irqchip(kvm)->lock);
3671                 break;
3672         case KVM_IRQCHIP_PIC_SLAVE:
3673                 spin_lock(&pic_irqchip(kvm)->lock);
3674                 memcpy(&pic_irqchip(kvm)->pics[1],
3675                         &chip->chip.pic,
3676                         sizeof(struct kvm_pic_state));
3677                 spin_unlock(&pic_irqchip(kvm)->lock);
3678                 break;
3679         case KVM_IRQCHIP_IOAPIC:
3680                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3681                 break;
3682         default:
3683                 r = -EINVAL;
3684                 break;
3685         }
3686         kvm_pic_update_irq(pic_irqchip(kvm));
3687         return r;
3688 }
3689
3690 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3691 {
3692         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3693
3694         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3695
3696         mutex_lock(&kps->lock);
3697         memcpy(ps, &kps->channels, sizeof(*ps));
3698         mutex_unlock(&kps->lock);
3699         return 0;
3700 }
3701
3702 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3703 {
3704         int i;
3705         struct kvm_pit *pit = kvm->arch.vpit;
3706
3707         mutex_lock(&pit->pit_state.lock);
3708         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3709         for (i = 0; i < 3; i++)
3710                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3711         mutex_unlock(&pit->pit_state.lock);
3712         return 0;
3713 }
3714
3715 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3716 {
3717         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3718         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3719                 sizeof(ps->channels));
3720         ps->flags = kvm->arch.vpit->pit_state.flags;
3721         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3722         memset(&ps->reserved, 0, sizeof(ps->reserved));
3723         return 0;
3724 }
3725
3726 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3727 {
3728         int start = 0;
3729         int i;
3730         u32 prev_legacy, cur_legacy;
3731         struct kvm_pit *pit = kvm->arch.vpit;
3732
3733         mutex_lock(&pit->pit_state.lock);
3734         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3735         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3736         if (!prev_legacy && cur_legacy)
3737                 start = 1;
3738         memcpy(&pit->pit_state.channels, &ps->channels,
3739                sizeof(pit->pit_state.channels));
3740         pit->pit_state.flags = ps->flags;
3741         for (i = 0; i < 3; i++)
3742                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3743                                    start && i == 0);
3744         mutex_unlock(&pit->pit_state.lock);
3745         return 0;
3746 }
3747
3748 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3749                                  struct kvm_reinject_control *control)
3750 {
3751         struct kvm_pit *pit = kvm->arch.vpit;
3752
3753         if (!pit)
3754                 return -ENXIO;
3755
3756         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3757          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3758          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3759          */
3760         mutex_lock(&pit->pit_state.lock);
3761         kvm_pit_set_reinject(pit, control->pit_reinject);
3762         mutex_unlock(&pit->pit_state.lock);
3763
3764         return 0;
3765 }
3766
3767 /**
3768  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3769  * @kvm: kvm instance
3770  * @log: slot id and address to which we copy the log
3771  *
3772  * Steps 1-4 below provide general overview of dirty page logging. See
3773  * kvm_get_dirty_log_protect() function description for additional details.
3774  *
3775  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3776  * always flush the TLB (step 4) even if previous step failed  and the dirty
3777  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3778  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3779  * writes will be marked dirty for next log read.
3780  *
3781  *   1. Take a snapshot of the bit and clear it if needed.
3782  *   2. Write protect the corresponding page.
3783  *   3. Copy the snapshot to the userspace.
3784  *   4. Flush TLB's if needed.
3785  */
3786 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3787 {
3788         bool is_dirty = false;
3789         int r;
3790
3791         mutex_lock(&kvm->slots_lock);
3792
3793         /*
3794          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3795          */
3796         if (kvm_x86_ops->flush_log_dirty)
3797                 kvm_x86_ops->flush_log_dirty(kvm);
3798
3799         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3800
3801         /*
3802          * All the TLBs can be flushed out of mmu lock, see the comments in
3803          * kvm_mmu_slot_remove_write_access().
3804          */
3805         lockdep_assert_held(&kvm->slots_lock);
3806         if (is_dirty)
3807                 kvm_flush_remote_tlbs(kvm);
3808
3809         mutex_unlock(&kvm->slots_lock);
3810         return r;
3811 }
3812
3813 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3814                         bool line_status)
3815 {
3816         if (!irqchip_in_kernel(kvm))
3817                 return -ENXIO;
3818
3819         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3820                                         irq_event->irq, irq_event->level,
3821                                         line_status);
3822         return 0;
3823 }
3824
3825 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3826                                    struct kvm_enable_cap *cap)
3827 {
3828         int r;
3829
3830         if (cap->flags)
3831                 return -EINVAL;
3832
3833         switch (cap->cap) {
3834         case KVM_CAP_DISABLE_QUIRKS:
3835                 kvm->arch.disabled_quirks = cap->args[0];
3836                 r = 0;
3837                 break;
3838         case KVM_CAP_SPLIT_IRQCHIP: {
3839                 mutex_lock(&kvm->lock);
3840                 r = -EINVAL;
3841                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3842                         goto split_irqchip_unlock;
3843                 r = -EEXIST;
3844                 if (irqchip_in_kernel(kvm))
3845                         goto split_irqchip_unlock;
3846                 if (kvm->created_vcpus)
3847                         goto split_irqchip_unlock;
3848                 r = kvm_setup_empty_irq_routing(kvm);
3849                 if (r)
3850                         goto split_irqchip_unlock;
3851                 /* Pairs with irqchip_in_kernel. */
3852                 smp_wmb();
3853                 kvm->arch.irqchip_split = true;
3854                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3855                 r = 0;
3856 split_irqchip_unlock:
3857                 mutex_unlock(&kvm->lock);
3858                 break;
3859         }
3860         case KVM_CAP_X2APIC_API:
3861                 r = -EINVAL;
3862                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3863                         break;
3864
3865                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3866                         kvm->arch.x2apic_format = true;
3867                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3868                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3869
3870                 r = 0;
3871                 break;
3872         default:
3873                 r = -EINVAL;
3874                 break;
3875         }
3876         return r;
3877 }
3878
3879 long kvm_arch_vm_ioctl(struct file *filp,
3880                        unsigned int ioctl, unsigned long arg)
3881 {
3882         struct kvm *kvm = filp->private_data;
3883         void __user *argp = (void __user *)arg;
3884         int r = -ENOTTY;
3885         /*
3886          * This union makes it completely explicit to gcc-3.x
3887          * that these two variables' stack usage should be
3888          * combined, not added together.
3889          */
3890         union {
3891                 struct kvm_pit_state ps;
3892                 struct kvm_pit_state2 ps2;
3893                 struct kvm_pit_config pit_config;
3894         } u;
3895
3896         switch (ioctl) {
3897         case KVM_SET_TSS_ADDR:
3898                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3899                 break;
3900         case KVM_SET_IDENTITY_MAP_ADDR: {
3901                 u64 ident_addr;
3902
3903                 r = -EFAULT;
3904                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3905                         goto out;
3906                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3907                 break;
3908         }
3909         case KVM_SET_NR_MMU_PAGES:
3910                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3911                 break;
3912         case KVM_GET_NR_MMU_PAGES:
3913                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3914                 break;
3915         case KVM_CREATE_IRQCHIP: {
3916                 struct kvm_pic *vpic;
3917
3918                 mutex_lock(&kvm->lock);
3919                 r = -EEXIST;
3920                 if (kvm->arch.vpic)
3921                         goto create_irqchip_unlock;
3922                 r = -EINVAL;
3923                 if (kvm->created_vcpus)
3924                         goto create_irqchip_unlock;
3925                 r = -ENOMEM;
3926                 vpic = kvm_create_pic(kvm);
3927                 if (vpic) {
3928                         r = kvm_ioapic_init(kvm);
3929                         if (r) {
3930                                 mutex_lock(&kvm->slots_lock);
3931                                 kvm_destroy_pic(vpic);
3932                                 mutex_unlock(&kvm->slots_lock);
3933                                 goto create_irqchip_unlock;
3934                         }
3935                 } else
3936                         goto create_irqchip_unlock;
3937                 r = kvm_setup_default_irq_routing(kvm);
3938                 if (r) {
3939                         mutex_lock(&kvm->slots_lock);
3940                         mutex_lock(&kvm->irq_lock);
3941                         kvm_ioapic_destroy(kvm);
3942                         kvm_destroy_pic(vpic);
3943                         mutex_unlock(&kvm->irq_lock);
3944                         mutex_unlock(&kvm->slots_lock);
3945                         goto create_irqchip_unlock;
3946                 }
3947                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3948                 smp_wmb();
3949                 kvm->arch.vpic = vpic;
3950         create_irqchip_unlock:
3951                 mutex_unlock(&kvm->lock);
3952                 break;
3953         }
3954         case KVM_CREATE_PIT:
3955                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3956                 goto create_pit;
3957         case KVM_CREATE_PIT2:
3958                 r = -EFAULT;
3959                 if (copy_from_user(&u.pit_config, argp,
3960                                    sizeof(struct kvm_pit_config)))
3961                         goto out;
3962         create_pit:
3963                 mutex_lock(&kvm->lock);
3964                 r = -EEXIST;
3965                 if (kvm->arch.vpit)
3966                         goto create_pit_unlock;
3967                 r = -ENOMEM;
3968                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3969                 if (kvm->arch.vpit)
3970                         r = 0;
3971         create_pit_unlock:
3972                 mutex_unlock(&kvm->lock);
3973                 break;
3974         case KVM_GET_IRQCHIP: {
3975                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3976                 struct kvm_irqchip *chip;
3977
3978                 chip = memdup_user(argp, sizeof(*chip));
3979                 if (IS_ERR(chip)) {
3980                         r = PTR_ERR(chip);
3981                         goto out;
3982                 }
3983
3984                 r = -ENXIO;
3985                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3986                         goto get_irqchip_out;
3987                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3988                 if (r)
3989                         goto get_irqchip_out;
3990                 r = -EFAULT;
3991                 if (copy_to_user(argp, chip, sizeof *chip))
3992                         goto get_irqchip_out;
3993                 r = 0;
3994         get_irqchip_out:
3995                 kfree(chip);
3996                 break;
3997         }
3998         case KVM_SET_IRQCHIP: {
3999                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4000                 struct kvm_irqchip *chip;
4001
4002                 chip = memdup_user(argp, sizeof(*chip));
4003                 if (IS_ERR(chip)) {
4004                         r = PTR_ERR(chip);
4005                         goto out;
4006                 }
4007
4008                 r = -ENXIO;
4009                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
4010                         goto set_irqchip_out;
4011                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4012                 if (r)
4013                         goto set_irqchip_out;
4014                 r = 0;
4015         set_irqchip_out:
4016                 kfree(chip);
4017                 break;
4018         }
4019         case KVM_GET_PIT: {
4020                 r = -EFAULT;
4021                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4022                         goto out;
4023                 r = -ENXIO;
4024                 if (!kvm->arch.vpit)
4025                         goto out;
4026                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4027                 if (r)
4028                         goto out;
4029                 r = -EFAULT;
4030                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4031                         goto out;
4032                 r = 0;
4033                 break;
4034         }
4035         case KVM_SET_PIT: {
4036                 r = -EFAULT;
4037                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4038                         goto out;
4039                 r = -ENXIO;
4040                 if (!kvm->arch.vpit)
4041                         goto out;
4042                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4043                 break;
4044         }
4045         case KVM_GET_PIT2: {
4046                 r = -ENXIO;
4047                 if (!kvm->arch.vpit)
4048                         goto out;
4049                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4050                 if (r)
4051                         goto out;
4052                 r = -EFAULT;
4053                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4054                         goto out;
4055                 r = 0;
4056                 break;
4057         }
4058         case KVM_SET_PIT2: {
4059                 r = -EFAULT;
4060                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4061                         goto out;
4062                 r = -ENXIO;
4063                 if (!kvm->arch.vpit)
4064                         goto out;
4065                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4066                 break;
4067         }
4068         case KVM_REINJECT_CONTROL: {
4069                 struct kvm_reinject_control control;
4070                 r =  -EFAULT;
4071                 if (copy_from_user(&control, argp, sizeof(control)))
4072                         goto out;
4073                 r = kvm_vm_ioctl_reinject(kvm, &control);
4074                 break;
4075         }
4076         case KVM_SET_BOOT_CPU_ID:
4077                 r = 0;
4078                 mutex_lock(&kvm->lock);
4079                 if (kvm->created_vcpus)
4080                         r = -EBUSY;
4081                 else
4082                         kvm->arch.bsp_vcpu_id = arg;
4083                 mutex_unlock(&kvm->lock);
4084                 break;
4085         case KVM_XEN_HVM_CONFIG: {
4086                 r = -EFAULT;
4087                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4088                                    sizeof(struct kvm_xen_hvm_config)))
4089                         goto out;
4090                 r = -EINVAL;
4091                 if (kvm->arch.xen_hvm_config.flags)
4092                         goto out;
4093                 r = 0;
4094                 break;
4095         }
4096         case KVM_SET_CLOCK: {
4097                 struct kvm_clock_data user_ns;
4098                 u64 now_ns;
4099
4100                 r = -EFAULT;
4101                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4102                         goto out;
4103
4104                 r = -EINVAL;
4105                 if (user_ns.flags)
4106                         goto out;
4107
4108                 r = 0;
4109                 local_irq_disable();
4110                 now_ns = __get_kvmclock_ns(kvm);
4111                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4112                 local_irq_enable();
4113                 kvm_gen_update_masterclock(kvm);
4114                 break;
4115         }
4116         case KVM_GET_CLOCK: {
4117                 struct kvm_clock_data user_ns;
4118                 u64 now_ns;
4119
4120                 now_ns = get_kvmclock_ns(kvm);
4121                 user_ns.clock = now_ns;
4122                 user_ns.flags = 0;
4123                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4124
4125                 r = -EFAULT;
4126                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4127                         goto out;
4128                 r = 0;
4129                 break;
4130         }
4131         case KVM_ENABLE_CAP: {
4132                 struct kvm_enable_cap cap;
4133
4134                 r = -EFAULT;
4135                 if (copy_from_user(&cap, argp, sizeof(cap)))
4136                         goto out;
4137                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4138                 break;
4139         }
4140         default:
4141                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4142         }
4143 out:
4144         return r;
4145 }
4146
4147 static void kvm_init_msr_list(void)
4148 {
4149         u32 dummy[2];
4150         unsigned i, j;
4151
4152         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4153                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4154                         continue;
4155
4156                 /*
4157                  * Even MSRs that are valid in the host may not be exposed
4158                  * to the guests in some cases.
4159                  */
4160                 switch (msrs_to_save[i]) {
4161                 case MSR_IA32_BNDCFGS:
4162                         if (!kvm_x86_ops->mpx_supported())
4163                                 continue;
4164                         break;
4165                 case MSR_TSC_AUX:
4166                         if (!kvm_x86_ops->rdtscp_supported())
4167                                 continue;
4168                         break;
4169                 default:
4170                         break;
4171                 }
4172
4173                 if (j < i)
4174                         msrs_to_save[j] = msrs_to_save[i];
4175                 j++;
4176         }
4177         num_msrs_to_save = j;
4178
4179         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4180                 switch (emulated_msrs[i]) {
4181                 case MSR_IA32_SMBASE:
4182                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4183                                 continue;
4184                         break;
4185                 default:
4186                         break;
4187                 }
4188
4189                 if (j < i)
4190                         emulated_msrs[j] = emulated_msrs[i];
4191                 j++;
4192         }
4193         num_emulated_msrs = j;
4194 }
4195
4196 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4197                            const void *v)
4198 {
4199         int handled = 0;
4200         int n;
4201
4202         do {
4203                 n = min(len, 8);
4204                 if (!(lapic_in_kernel(vcpu) &&
4205                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4206                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4207                         break;
4208                 handled += n;
4209                 addr += n;
4210                 len -= n;
4211                 v += n;
4212         } while (len);
4213
4214         return handled;
4215 }
4216
4217 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4218 {
4219         int handled = 0;
4220         int n;
4221
4222         do {
4223                 n = min(len, 8);
4224                 if (!(lapic_in_kernel(vcpu) &&
4225                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4226                                          addr, n, v))
4227                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4228                         break;
4229                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4230                 handled += n;
4231                 addr += n;
4232                 len -= n;
4233                 v += n;
4234         } while (len);
4235
4236         return handled;
4237 }
4238
4239 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4240                         struct kvm_segment *var, int seg)
4241 {
4242         kvm_x86_ops->set_segment(vcpu, var, seg);
4243 }
4244
4245 void kvm_get_segment(struct kvm_vcpu *vcpu,
4246                      struct kvm_segment *var, int seg)
4247 {
4248         kvm_x86_ops->get_segment(vcpu, var, seg);
4249 }
4250
4251 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4252                            struct x86_exception *exception)
4253 {
4254         gpa_t t_gpa;
4255
4256         BUG_ON(!mmu_is_nested(vcpu));
4257
4258         /* NPT walks are always user-walks */
4259         access |= PFERR_USER_MASK;
4260         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4261
4262         return t_gpa;
4263 }
4264
4265 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4266                               struct x86_exception *exception)
4267 {
4268         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4269         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4270 }
4271
4272  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4273                                 struct x86_exception *exception)
4274 {
4275         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4276         access |= PFERR_FETCH_MASK;
4277         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4278 }
4279
4280 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4281                                struct x86_exception *exception)
4282 {
4283         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4284         access |= PFERR_WRITE_MASK;
4285         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4286 }
4287
4288 /* uses this to access any guest's mapped memory without checking CPL */
4289 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4290                                 struct x86_exception *exception)
4291 {
4292         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4293 }
4294
4295 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4296                                       struct kvm_vcpu *vcpu, u32 access,
4297                                       struct x86_exception *exception)
4298 {
4299         void *data = val;
4300         int r = X86EMUL_CONTINUE;
4301
4302         while (bytes) {
4303                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4304                                                             exception);
4305                 unsigned offset = addr & (PAGE_SIZE-1);
4306                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4307                 int ret;
4308
4309                 if (gpa == UNMAPPED_GVA)
4310                         return X86EMUL_PROPAGATE_FAULT;
4311                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4312                                                offset, toread);
4313                 if (ret < 0) {
4314                         r = X86EMUL_IO_NEEDED;
4315                         goto out;
4316                 }
4317
4318                 bytes -= toread;
4319                 data += toread;
4320                 addr += toread;
4321         }
4322 out:
4323         return r;
4324 }
4325
4326 /* used for instruction fetching */
4327 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4328                                 gva_t addr, void *val, unsigned int bytes,
4329                                 struct x86_exception *exception)
4330 {
4331         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4332         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4333         unsigned offset;
4334         int ret;
4335
4336         /* Inline kvm_read_guest_virt_helper for speed.  */
4337         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4338                                                     exception);
4339         if (unlikely(gpa == UNMAPPED_GVA))
4340                 return X86EMUL_PROPAGATE_FAULT;
4341
4342         offset = addr & (PAGE_SIZE-1);
4343         if (WARN_ON(offset + bytes > PAGE_SIZE))
4344                 bytes = (unsigned)PAGE_SIZE - offset;
4345         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4346                                        offset, bytes);
4347         if (unlikely(ret < 0))
4348                 return X86EMUL_IO_NEEDED;
4349
4350         return X86EMUL_CONTINUE;
4351 }
4352
4353 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4354                                gva_t addr, void *val, unsigned int bytes,
4355                                struct x86_exception *exception)
4356 {
4357         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4358         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4359
4360         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4361                                           exception);
4362 }
4363 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4364
4365 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4366                                       gva_t addr, void *val, unsigned int bytes,
4367                                       struct x86_exception *exception)
4368 {
4369         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4370         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4371 }
4372
4373 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4374                 unsigned long addr, void *val, unsigned int bytes)
4375 {
4376         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4377         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4378
4379         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4380 }
4381
4382 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4383                                        gva_t addr, void *val,
4384                                        unsigned int bytes,
4385                                        struct x86_exception *exception)
4386 {
4387         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4388         void *data = val;
4389         int r = X86EMUL_CONTINUE;
4390
4391         while (bytes) {
4392                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4393                                                              PFERR_WRITE_MASK,
4394                                                              exception);
4395                 unsigned offset = addr & (PAGE_SIZE-1);
4396                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4397                 int ret;
4398
4399                 if (gpa == UNMAPPED_GVA)
4400                         return X86EMUL_PROPAGATE_FAULT;
4401                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4402                 if (ret < 0) {
4403                         r = X86EMUL_IO_NEEDED;
4404                         goto out;
4405                 }
4406
4407                 bytes -= towrite;
4408                 data += towrite;
4409                 addr += towrite;
4410         }
4411 out:
4412         return r;
4413 }
4414 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4415
4416 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4417                                 gpa_t *gpa, struct x86_exception *exception,
4418                                 bool write)
4419 {
4420         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4421                 | (write ? PFERR_WRITE_MASK : 0);
4422
4423         /*
4424          * currently PKRU is only applied to ept enabled guest so
4425          * there is no pkey in EPT page table for L1 guest or EPT
4426          * shadow page table for L2 guest.
4427          */
4428         if (vcpu_match_mmio_gva(vcpu, gva)
4429             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4430                                  vcpu->arch.access, 0, access)) {
4431                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4432                                         (gva & (PAGE_SIZE - 1));
4433                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4434                 return 1;
4435         }
4436
4437         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4438
4439         if (*gpa == UNMAPPED_GVA)
4440                 return -1;
4441
4442         /* For APIC access vmexit */
4443         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4444                 return 1;
4445
4446         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4447                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4448                 return 1;
4449         }
4450
4451         return 0;
4452 }
4453
4454 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4455                         const void *val, int bytes)
4456 {
4457         int ret;
4458
4459         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4460         if (ret < 0)
4461                 return 0;
4462         kvm_page_track_write(vcpu, gpa, val, bytes);
4463         return 1;
4464 }
4465
4466 struct read_write_emulator_ops {
4467         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4468                                   int bytes);
4469         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4470                                   void *val, int bytes);
4471         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4472                                int bytes, void *val);
4473         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4474                                     void *val, int bytes);
4475         bool write;
4476 };
4477
4478 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4479 {
4480         if (vcpu->mmio_read_completed) {
4481                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4482                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4483                 vcpu->mmio_read_completed = 0;
4484                 return 1;
4485         }
4486
4487         return 0;
4488 }
4489
4490 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4491                         void *val, int bytes)
4492 {
4493         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4494 }
4495
4496 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4497                          void *val, int bytes)
4498 {
4499         return emulator_write_phys(vcpu, gpa, val, bytes);
4500 }
4501
4502 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4503 {
4504         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4505         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4506 }
4507
4508 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4509                           void *val, int bytes)
4510 {
4511         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4512         return X86EMUL_IO_NEEDED;
4513 }
4514
4515 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4516                            void *val, int bytes)
4517 {
4518         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4519
4520         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4521         return X86EMUL_CONTINUE;
4522 }
4523
4524 static const struct read_write_emulator_ops read_emultor = {
4525         .read_write_prepare = read_prepare,
4526         .read_write_emulate = read_emulate,
4527         .read_write_mmio = vcpu_mmio_read,
4528         .read_write_exit_mmio = read_exit_mmio,
4529 };
4530
4531 static const struct read_write_emulator_ops write_emultor = {
4532         .read_write_emulate = write_emulate,
4533         .read_write_mmio = write_mmio,
4534         .read_write_exit_mmio = write_exit_mmio,
4535         .write = true,
4536 };
4537
4538 static int emulator_read_write_onepage(unsigned long addr, void *val,
4539                                        unsigned int bytes,
4540                                        struct x86_exception *exception,
4541                                        struct kvm_vcpu *vcpu,
4542                                        const struct read_write_emulator_ops *ops)
4543 {
4544         gpa_t gpa;
4545         int handled, ret;
4546         bool write = ops->write;
4547         struct kvm_mmio_fragment *frag;
4548
4549         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4550
4551         if (ret < 0)
4552                 return X86EMUL_PROPAGATE_FAULT;
4553
4554         /* For APIC access vmexit */
4555         if (ret)
4556                 goto mmio;
4557
4558         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4559                 return X86EMUL_CONTINUE;
4560
4561 mmio:
4562         /*
4563          * Is this MMIO handled locally?
4564          */
4565         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4566         if (handled == bytes)
4567                 return X86EMUL_CONTINUE;
4568
4569         gpa += handled;
4570         bytes -= handled;
4571         val += handled;
4572
4573         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4574         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4575         frag->gpa = gpa;
4576         frag->data = val;
4577         frag->len = bytes;
4578         return X86EMUL_CONTINUE;
4579 }
4580
4581 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4582                         unsigned long addr,
4583                         void *val, unsigned int bytes,
4584                         struct x86_exception *exception,
4585                         const struct read_write_emulator_ops *ops)
4586 {
4587         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4588         gpa_t gpa;
4589         int rc;
4590
4591         if (ops->read_write_prepare &&
4592                   ops->read_write_prepare(vcpu, val, bytes))
4593                 return X86EMUL_CONTINUE;
4594
4595         vcpu->mmio_nr_fragments = 0;
4596
4597         /* Crossing a page boundary? */
4598         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4599                 int now;
4600
4601                 now = -addr & ~PAGE_MASK;
4602                 rc = emulator_read_write_onepage(addr, val, now, exception,
4603                                                  vcpu, ops);
4604
4605                 if (rc != X86EMUL_CONTINUE)
4606                         return rc;
4607                 addr += now;
4608                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4609                         addr = (u32)addr;
4610                 val += now;
4611                 bytes -= now;
4612         }
4613
4614         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4615                                          vcpu, ops);
4616         if (rc != X86EMUL_CONTINUE)
4617                 return rc;
4618
4619         if (!vcpu->mmio_nr_fragments)
4620                 return rc;
4621
4622         gpa = vcpu->mmio_fragments[0].gpa;
4623
4624         vcpu->mmio_needed = 1;
4625         vcpu->mmio_cur_fragment = 0;
4626
4627         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4628         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4629         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4630         vcpu->run->mmio.phys_addr = gpa;
4631
4632         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4633 }
4634
4635 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4636                                   unsigned long addr,
4637                                   void *val,
4638                                   unsigned int bytes,
4639                                   struct x86_exception *exception)
4640 {
4641         return emulator_read_write(ctxt, addr, val, bytes,
4642                                    exception, &read_emultor);
4643 }
4644
4645 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4646                             unsigned long addr,
4647                             const void *val,
4648                             unsigned int bytes,
4649                             struct x86_exception *exception)
4650 {
4651         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4652                                    exception, &write_emultor);
4653 }
4654
4655 #define CMPXCHG_TYPE(t, ptr, old, new) \
4656         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4657
4658 #ifdef CONFIG_X86_64
4659 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4660 #else
4661 #  define CMPXCHG64(ptr, old, new) \
4662         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4663 #endif
4664
4665 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4666                                      unsigned long addr,
4667                                      const void *old,
4668                                      const void *new,
4669                                      unsigned int bytes,
4670                                      struct x86_exception *exception)
4671 {
4672         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4673         gpa_t gpa;
4674         struct page *page;
4675         char *kaddr;
4676         bool exchanged;
4677
4678         /* guests cmpxchg8b have to be emulated atomically */
4679         if (bytes > 8 || (bytes & (bytes - 1)))
4680                 goto emul_write;
4681
4682         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4683
4684         if (gpa == UNMAPPED_GVA ||
4685             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4686                 goto emul_write;
4687
4688         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4689                 goto emul_write;
4690
4691         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4692         if (is_error_page(page))
4693                 goto emul_write;
4694
4695         kaddr = kmap_atomic(page);
4696         kaddr += offset_in_page(gpa);
4697         switch (bytes) {
4698         case 1:
4699                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4700                 break;
4701         case 2:
4702                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4703                 break;
4704         case 4:
4705                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4706                 break;
4707         case 8:
4708                 exchanged = CMPXCHG64(kaddr, old, new);
4709                 break;
4710         default:
4711                 BUG();
4712         }
4713         kunmap_atomic(kaddr);
4714         kvm_release_page_dirty(page);
4715
4716         if (!exchanged)
4717                 return X86EMUL_CMPXCHG_FAILED;
4718
4719         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4720         kvm_page_track_write(vcpu, gpa, new, bytes);
4721
4722         return X86EMUL_CONTINUE;
4723
4724 emul_write:
4725         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4726
4727         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4728 }
4729
4730 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4731 {
4732         /* TODO: String I/O for in kernel device */
4733         int r;
4734
4735         if (vcpu->arch.pio.in)
4736                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4737                                     vcpu->arch.pio.size, pd);
4738         else
4739                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4740                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4741                                      pd);
4742         return r;
4743 }
4744
4745 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4746                                unsigned short port, void *val,
4747                                unsigned int count, bool in)
4748 {
4749         vcpu->arch.pio.port = port;
4750         vcpu->arch.pio.in = in;
4751         vcpu->arch.pio.count  = count;
4752         vcpu->arch.pio.size = size;
4753
4754         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4755                 vcpu->arch.pio.count = 0;
4756                 return 1;
4757         }
4758
4759         vcpu->run->exit_reason = KVM_EXIT_IO;
4760         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4761         vcpu->run->io.size = size;
4762         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4763         vcpu->run->io.count = count;
4764         vcpu->run->io.port = port;
4765
4766         return 0;
4767 }
4768
4769 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4770                                     int size, unsigned short port, void *val,
4771                                     unsigned int count)
4772 {
4773         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4774         int ret;
4775
4776         if (vcpu->arch.pio.count)
4777                 goto data_avail;
4778
4779         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4780         if (ret) {
4781 data_avail:
4782                 memcpy(val, vcpu->arch.pio_data, size * count);
4783                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4784                 vcpu->arch.pio.count = 0;
4785                 return 1;
4786         }
4787
4788         return 0;
4789 }
4790
4791 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4792                                      int size, unsigned short port,
4793                                      const void *val, unsigned int count)
4794 {
4795         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4796
4797         memcpy(vcpu->arch.pio_data, val, size * count);
4798         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4799         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4800 }
4801
4802 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4803 {
4804         return kvm_x86_ops->get_segment_base(vcpu, seg);
4805 }
4806
4807 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4808 {
4809         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4810 }
4811
4812 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4813 {
4814         if (!need_emulate_wbinvd(vcpu))
4815                 return X86EMUL_CONTINUE;
4816
4817         if (kvm_x86_ops->has_wbinvd_exit()) {
4818                 int cpu = get_cpu();
4819
4820                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4821                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4822                                 wbinvd_ipi, NULL, 1);
4823                 put_cpu();
4824                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4825         } else
4826                 wbinvd();
4827         return X86EMUL_CONTINUE;
4828 }
4829
4830 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4831 {
4832         kvm_x86_ops->skip_emulated_instruction(vcpu);
4833         return kvm_emulate_wbinvd_noskip(vcpu);
4834 }
4835 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4836
4837
4838
4839 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4840 {
4841         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4842 }
4843
4844 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4845                            unsigned long *dest)
4846 {
4847         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4848 }
4849
4850 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4851                            unsigned long value)
4852 {
4853
4854         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4855 }
4856
4857 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4858 {
4859         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4860 }
4861
4862 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4863 {
4864         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4865         unsigned long value;
4866
4867         switch (cr) {
4868         case 0:
4869                 value = kvm_read_cr0(vcpu);
4870                 break;
4871         case 2:
4872                 value = vcpu->arch.cr2;
4873                 break;
4874         case 3:
4875                 value = kvm_read_cr3(vcpu);
4876                 break;
4877         case 4:
4878                 value = kvm_read_cr4(vcpu);
4879                 break;
4880         case 8:
4881                 value = kvm_get_cr8(vcpu);
4882                 break;
4883         default:
4884                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4885                 return 0;
4886         }
4887
4888         return value;
4889 }
4890
4891 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4892 {
4893         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4894         int res = 0;
4895
4896         switch (cr) {
4897         case 0:
4898                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4899                 break;
4900         case 2:
4901                 vcpu->arch.cr2 = val;
4902                 break;
4903         case 3:
4904                 res = kvm_set_cr3(vcpu, val);
4905                 break;
4906         case 4:
4907                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4908                 break;
4909         case 8:
4910                 res = kvm_set_cr8(vcpu, val);
4911                 break;
4912         default:
4913                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4914                 res = -1;
4915         }
4916
4917         return res;
4918 }
4919
4920 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4921 {
4922         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4923 }
4924
4925 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4926 {
4927         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4928 }
4929
4930 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4931 {
4932         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4933 }
4934
4935 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4936 {
4937         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4938 }
4939
4940 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4941 {
4942         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4943 }
4944
4945 static unsigned long emulator_get_cached_segment_base(
4946         struct x86_emulate_ctxt *ctxt, int seg)
4947 {
4948         return get_segment_base(emul_to_vcpu(ctxt), seg);
4949 }
4950
4951 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4952                                  struct desc_struct *desc, u32 *base3,
4953                                  int seg)
4954 {
4955         struct kvm_segment var;
4956
4957         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4958         *selector = var.selector;
4959
4960         if (var.unusable) {
4961                 memset(desc, 0, sizeof(*desc));
4962                 return false;
4963         }
4964
4965         if (var.g)
4966                 var.limit >>= 12;
4967         set_desc_limit(desc, var.limit);
4968         set_desc_base(desc, (unsigned long)var.base);
4969 #ifdef CONFIG_X86_64
4970         if (base3)
4971                 *base3 = var.base >> 32;
4972 #endif
4973         desc->type = var.type;
4974         desc->s = var.s;
4975         desc->dpl = var.dpl;
4976         desc->p = var.present;
4977         desc->avl = var.avl;
4978         desc->l = var.l;
4979         desc->d = var.db;
4980         desc->g = var.g;
4981
4982         return true;
4983 }
4984
4985 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4986                                  struct desc_struct *desc, u32 base3,
4987                                  int seg)
4988 {
4989         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4990         struct kvm_segment var;
4991
4992         var.selector = selector;
4993         var.base = get_desc_base(desc);
4994 #ifdef CONFIG_X86_64
4995         var.base |= ((u64)base3) << 32;
4996 #endif
4997         var.limit = get_desc_limit(desc);
4998         if (desc->g)
4999                 var.limit = (var.limit << 12) | 0xfff;
5000         var.type = desc->type;
5001         var.dpl = desc->dpl;
5002         var.db = desc->d;
5003         var.s = desc->s;
5004         var.l = desc->l;
5005         var.g = desc->g;
5006         var.avl = desc->avl;
5007         var.present = desc->p;
5008         var.unusable = !var.present;
5009         var.padding = 0;
5010
5011         kvm_set_segment(vcpu, &var, seg);
5012         return;
5013 }
5014
5015 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5016                             u32 msr_index, u64 *pdata)
5017 {
5018         struct msr_data msr;
5019         int r;
5020
5021         msr.index = msr_index;
5022         msr.host_initiated = false;
5023         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5024         if (r)
5025                 return r;
5026
5027         *pdata = msr.data;
5028         return 0;
5029 }
5030
5031 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5032                             u32 msr_index, u64 data)
5033 {
5034         struct msr_data msr;
5035
5036         msr.data = data;
5037         msr.index = msr_index;
5038         msr.host_initiated = false;
5039         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5040 }
5041
5042 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5043 {
5044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5045
5046         return vcpu->arch.smbase;
5047 }
5048
5049 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5050 {
5051         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5052
5053         vcpu->arch.smbase = smbase;
5054 }
5055
5056 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5057                               u32 pmc)
5058 {
5059         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5060 }
5061
5062 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5063                              u32 pmc, u64 *pdata)
5064 {
5065         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5066 }
5067
5068 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5069 {
5070         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5071 }
5072
5073 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5074 {
5075         preempt_disable();
5076         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5077         /*
5078          * CR0.TS may reference the host fpu state, not the guest fpu state,
5079          * so it may be clear at this point.
5080          */
5081         clts();
5082 }
5083
5084 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5085 {
5086         preempt_enable();
5087 }
5088
5089 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5090                               struct x86_instruction_info *info,
5091                               enum x86_intercept_stage stage)
5092 {
5093         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5094 }
5095
5096 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5097                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5098 {
5099         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5100 }
5101
5102 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5103 {
5104         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5105 }
5106
5107 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5108 {
5109         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5110 }
5111
5112 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5113 {
5114         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5115 }
5116
5117 static const struct x86_emulate_ops emulate_ops = {
5118         .read_gpr            = emulator_read_gpr,
5119         .write_gpr           = emulator_write_gpr,
5120         .read_std            = kvm_read_guest_virt_system,
5121         .write_std           = kvm_write_guest_virt_system,
5122         .read_phys           = kvm_read_guest_phys_system,
5123         .fetch               = kvm_fetch_guest_virt,
5124         .read_emulated       = emulator_read_emulated,
5125         .write_emulated      = emulator_write_emulated,
5126         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5127         .invlpg              = emulator_invlpg,
5128         .pio_in_emulated     = emulator_pio_in_emulated,
5129         .pio_out_emulated    = emulator_pio_out_emulated,
5130         .get_segment         = emulator_get_segment,
5131         .set_segment         = emulator_set_segment,
5132         .get_cached_segment_base = emulator_get_cached_segment_base,
5133         .get_gdt             = emulator_get_gdt,
5134         .get_idt             = emulator_get_idt,
5135         .set_gdt             = emulator_set_gdt,
5136         .set_idt             = emulator_set_idt,
5137         .get_cr              = emulator_get_cr,
5138         .set_cr              = emulator_set_cr,
5139         .cpl                 = emulator_get_cpl,
5140         .get_dr              = emulator_get_dr,
5141         .set_dr              = emulator_set_dr,
5142         .get_smbase          = emulator_get_smbase,
5143         .set_smbase          = emulator_set_smbase,
5144         .set_msr             = emulator_set_msr,
5145         .get_msr             = emulator_get_msr,
5146         .check_pmc           = emulator_check_pmc,
5147         .read_pmc            = emulator_read_pmc,
5148         .halt                = emulator_halt,
5149         .wbinvd              = emulator_wbinvd,
5150         .fix_hypercall       = emulator_fix_hypercall,
5151         .get_fpu             = emulator_get_fpu,
5152         .put_fpu             = emulator_put_fpu,
5153         .intercept           = emulator_intercept,
5154         .get_cpuid           = emulator_get_cpuid,
5155         .set_nmi_mask        = emulator_set_nmi_mask,
5156 };
5157
5158 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5159 {
5160         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5161         /*
5162          * an sti; sti; sequence only disable interrupts for the first
5163          * instruction. So, if the last instruction, be it emulated or
5164          * not, left the system with the INT_STI flag enabled, it
5165          * means that the last instruction is an sti. We should not
5166          * leave the flag on in this case. The same goes for mov ss
5167          */
5168         if (int_shadow & mask)
5169                 mask = 0;
5170         if (unlikely(int_shadow || mask)) {
5171                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5172                 if (!mask)
5173                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5174         }
5175 }
5176
5177 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5178 {
5179         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5180         if (ctxt->exception.vector == PF_VECTOR)
5181                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5182
5183         if (ctxt->exception.error_code_valid)
5184                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5185                                       ctxt->exception.error_code);
5186         else
5187                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5188         return false;
5189 }
5190
5191 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5192 {
5193         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5194         int cs_db, cs_l;
5195
5196         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5197
5198         ctxt->eflags = kvm_get_rflags(vcpu);
5199         ctxt->eip = kvm_rip_read(vcpu);
5200         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5201                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5202                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5203                      cs_db                              ? X86EMUL_MODE_PROT32 :
5204                                                           X86EMUL_MODE_PROT16;
5205         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5206         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5207         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5208         ctxt->emul_flags = vcpu->arch.hflags;
5209
5210         init_decode_cache(ctxt);
5211         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5212 }
5213
5214 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5215 {
5216         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5217         int ret;
5218
5219         init_emulate_ctxt(vcpu);
5220
5221         ctxt->op_bytes = 2;
5222         ctxt->ad_bytes = 2;
5223         ctxt->_eip = ctxt->eip + inc_eip;
5224         ret = emulate_int_real(ctxt, irq);
5225
5226         if (ret != X86EMUL_CONTINUE)
5227                 return EMULATE_FAIL;
5228
5229         ctxt->eip = ctxt->_eip;
5230         kvm_rip_write(vcpu, ctxt->eip);
5231         kvm_set_rflags(vcpu, ctxt->eflags);
5232
5233         if (irq == NMI_VECTOR)
5234                 vcpu->arch.nmi_pending = 0;
5235         else
5236                 vcpu->arch.interrupt.pending = false;
5237
5238         return EMULATE_DONE;
5239 }
5240 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5241
5242 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5243 {
5244         int r = EMULATE_DONE;
5245
5246         ++vcpu->stat.insn_emulation_fail;
5247         trace_kvm_emulate_insn_failed(vcpu);
5248         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5249                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5250                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5251                 vcpu->run->internal.ndata = 0;
5252                 r = EMULATE_FAIL;
5253         }
5254         kvm_queue_exception(vcpu, UD_VECTOR);
5255
5256         return r;
5257 }
5258
5259 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5260                                   bool write_fault_to_shadow_pgtable,
5261                                   int emulation_type)
5262 {
5263         gpa_t gpa = cr2;
5264         kvm_pfn_t pfn;
5265
5266         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5267                 return false;
5268
5269         if (!vcpu->arch.mmu.direct_map) {
5270                 /*
5271                  * Write permission should be allowed since only
5272                  * write access need to be emulated.
5273                  */
5274                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5275
5276                 /*
5277                  * If the mapping is invalid in guest, let cpu retry
5278                  * it to generate fault.
5279                  */
5280                 if (gpa == UNMAPPED_GVA)
5281                         return true;
5282         }
5283
5284         /*
5285          * Do not retry the unhandleable instruction if it faults on the
5286          * readonly host memory, otherwise it will goto a infinite loop:
5287          * retry instruction -> write #PF -> emulation fail -> retry
5288          * instruction -> ...
5289          */
5290         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5291
5292         /*
5293          * If the instruction failed on the error pfn, it can not be fixed,
5294          * report the error to userspace.
5295          */
5296         if (is_error_noslot_pfn(pfn))
5297                 return false;
5298
5299         kvm_release_pfn_clean(pfn);
5300
5301         /* The instructions are well-emulated on direct mmu. */
5302         if (vcpu->arch.mmu.direct_map) {
5303                 unsigned int indirect_shadow_pages;
5304
5305                 spin_lock(&vcpu->kvm->mmu_lock);
5306                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5307                 spin_unlock(&vcpu->kvm->mmu_lock);
5308
5309                 if (indirect_shadow_pages)
5310                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5311
5312                 return true;
5313         }
5314
5315         /*
5316          * if emulation was due to access to shadowed page table
5317          * and it failed try to unshadow page and re-enter the
5318          * guest to let CPU execute the instruction.
5319          */
5320         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5321
5322         /*
5323          * If the access faults on its page table, it can not
5324          * be fixed by unprotecting shadow page and it should
5325          * be reported to userspace.
5326          */
5327         return !write_fault_to_shadow_pgtable;
5328 }
5329
5330 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5331                               unsigned long cr2,  int emulation_type)
5332 {
5333         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5334         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5335
5336         last_retry_eip = vcpu->arch.last_retry_eip;
5337         last_retry_addr = vcpu->arch.last_retry_addr;
5338
5339         /*
5340          * If the emulation is caused by #PF and it is non-page_table
5341          * writing instruction, it means the VM-EXIT is caused by shadow
5342          * page protected, we can zap the shadow page and retry this
5343          * instruction directly.
5344          *
5345          * Note: if the guest uses a non-page-table modifying instruction
5346          * on the PDE that points to the instruction, then we will unmap
5347          * the instruction and go to an infinite loop. So, we cache the
5348          * last retried eip and the last fault address, if we meet the eip
5349          * and the address again, we can break out of the potential infinite
5350          * loop.
5351          */
5352         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5353
5354         if (!(emulation_type & EMULTYPE_RETRY))
5355                 return false;
5356
5357         if (x86_page_table_writing_insn(ctxt))
5358                 return false;
5359
5360         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5361                 return false;
5362
5363         vcpu->arch.last_retry_eip = ctxt->eip;
5364         vcpu->arch.last_retry_addr = cr2;
5365
5366         if (!vcpu->arch.mmu.direct_map)
5367                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5368
5369         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5370
5371         return true;
5372 }
5373
5374 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5375 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5376
5377 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5378 {
5379         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5380                 /* This is a good place to trace that we are exiting SMM.  */
5381                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5382
5383                 /* Process a latched INIT or SMI, if any.  */
5384                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5385         }
5386
5387         kvm_mmu_reset_context(vcpu);
5388 }
5389
5390 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5391 {
5392         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5393
5394         vcpu->arch.hflags = emul_flags;
5395
5396         if (changed & HF_SMM_MASK)
5397                 kvm_smm_changed(vcpu);
5398 }
5399
5400 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5401                                 unsigned long *db)
5402 {
5403         u32 dr6 = 0;
5404         int i;
5405         u32 enable, rwlen;
5406
5407         enable = dr7;
5408         rwlen = dr7 >> 16;
5409         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5410                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5411                         dr6 |= (1 << i);
5412         return dr6;
5413 }
5414
5415 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5416 {
5417         struct kvm_run *kvm_run = vcpu->run;
5418
5419         /*
5420          * rflags is the old, "raw" value of the flags.  The new value has
5421          * not been saved yet.
5422          *
5423          * This is correct even for TF set by the guest, because "the
5424          * processor will not generate this exception after the instruction
5425          * that sets the TF flag".
5426          */
5427         if (unlikely(rflags & X86_EFLAGS_TF)) {
5428                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5429                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5430                                                   DR6_RTM;
5431                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5432                         kvm_run->debug.arch.exception = DB_VECTOR;
5433                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5434                         *r = EMULATE_USER_EXIT;
5435                 } else {
5436                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5437                         /*
5438                          * "Certain debug exceptions may clear bit 0-3.  The
5439                          * remaining contents of the DR6 register are never
5440                          * cleared by the processor".
5441                          */
5442                         vcpu->arch.dr6 &= ~15;
5443                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5444                         kvm_queue_exception(vcpu, DB_VECTOR);
5445                 }
5446         }
5447 }
5448
5449 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5450 {
5451         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5452             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5453                 struct kvm_run *kvm_run = vcpu->run;
5454                 unsigned long eip = kvm_get_linear_rip(vcpu);
5455                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5456                                            vcpu->arch.guest_debug_dr7,
5457                                            vcpu->arch.eff_db);
5458
5459                 if (dr6 != 0) {
5460                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5461                         kvm_run->debug.arch.pc = eip;
5462                         kvm_run->debug.arch.exception = DB_VECTOR;
5463                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5464                         *r = EMULATE_USER_EXIT;
5465                         return true;
5466                 }
5467         }
5468
5469         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5470             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5471                 unsigned long eip = kvm_get_linear_rip(vcpu);
5472                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5473                                            vcpu->arch.dr7,
5474                                            vcpu->arch.db);
5475
5476                 if (dr6 != 0) {
5477                         vcpu->arch.dr6 &= ~15;
5478                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5479                         kvm_queue_exception(vcpu, DB_VECTOR);
5480                         *r = EMULATE_DONE;
5481                         return true;
5482                 }
5483         }
5484
5485         return false;
5486 }
5487
5488 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5489                             unsigned long cr2,
5490                             int emulation_type,
5491                             void *insn,
5492                             int insn_len)
5493 {
5494         int r;
5495         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5496         bool writeback = true;
5497         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5498
5499         /*
5500          * Clear write_fault_to_shadow_pgtable here to ensure it is
5501          * never reused.
5502          */
5503         vcpu->arch.write_fault_to_shadow_pgtable = false;
5504         kvm_clear_exception_queue(vcpu);
5505
5506         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5507                 init_emulate_ctxt(vcpu);
5508
5509                 /*
5510                  * We will reenter on the same instruction since
5511                  * we do not set complete_userspace_io.  This does not
5512                  * handle watchpoints yet, those would be handled in
5513                  * the emulate_ops.
5514                  */
5515                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5516                         return r;
5517
5518                 ctxt->interruptibility = 0;
5519                 ctxt->have_exception = false;
5520                 ctxt->exception.vector = -1;
5521                 ctxt->perm_ok = false;
5522
5523                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5524
5525                 r = x86_decode_insn(ctxt, insn, insn_len);
5526
5527                 trace_kvm_emulate_insn_start(vcpu);
5528                 ++vcpu->stat.insn_emulation;
5529                 if (r != EMULATION_OK)  {
5530                         if (emulation_type & EMULTYPE_TRAP_UD)
5531                                 return EMULATE_FAIL;
5532                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5533                                                 emulation_type))
5534                                 return EMULATE_DONE;
5535                         if (emulation_type & EMULTYPE_SKIP)
5536                                 return EMULATE_FAIL;
5537                         return handle_emulation_failure(vcpu);
5538                 }
5539         }
5540
5541         if (emulation_type & EMULTYPE_SKIP) {
5542                 kvm_rip_write(vcpu, ctxt->_eip);
5543                 if (ctxt->eflags & X86_EFLAGS_RF)
5544                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5545                 return EMULATE_DONE;
5546         }
5547
5548         if (retry_instruction(ctxt, cr2, emulation_type))
5549                 return EMULATE_DONE;
5550
5551         /* this is needed for vmware backdoor interface to work since it
5552            changes registers values  during IO operation */
5553         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5554                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5555                 emulator_invalidate_register_cache(ctxt);
5556         }
5557
5558 restart:
5559         r = x86_emulate_insn(ctxt);
5560
5561         if (r == EMULATION_INTERCEPTED)
5562                 return EMULATE_DONE;
5563
5564         if (r == EMULATION_FAILED) {
5565                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5566                                         emulation_type))
5567                         return EMULATE_DONE;
5568
5569                 return handle_emulation_failure(vcpu);
5570         }
5571
5572         if (ctxt->have_exception) {
5573                 r = EMULATE_DONE;
5574                 if (inject_emulated_exception(vcpu))
5575                         return r;
5576         } else if (vcpu->arch.pio.count) {
5577                 if (!vcpu->arch.pio.in) {
5578                         /* FIXME: return into emulator if single-stepping.  */
5579                         vcpu->arch.pio.count = 0;
5580                 } else {
5581                         writeback = false;
5582                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5583                 }
5584                 r = EMULATE_USER_EXIT;
5585         } else if (vcpu->mmio_needed) {
5586                 if (!vcpu->mmio_is_write)
5587                         writeback = false;
5588                 r = EMULATE_USER_EXIT;
5589                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5590         } else if (r == EMULATION_RESTART)
5591                 goto restart;
5592         else
5593                 r = EMULATE_DONE;
5594
5595         if (writeback) {
5596                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5597                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5598                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5599                 if (vcpu->arch.hflags != ctxt->emul_flags)
5600                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5601                 kvm_rip_write(vcpu, ctxt->eip);
5602                 if (r == EMULATE_DONE)
5603                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5604                 if (!ctxt->have_exception ||
5605                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5606                         __kvm_set_rflags(vcpu, ctxt->eflags);
5607
5608                 /*
5609                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5610                  * do nothing, and it will be requested again as soon as
5611                  * the shadow expires.  But we still need to check here,
5612                  * because POPF has no interrupt shadow.
5613                  */
5614                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5615                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5616         } else
5617                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5618
5619         return r;
5620 }
5621 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5622
5623 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5624 {
5625         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5626         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5627                                             size, port, &val, 1);
5628         /* do not return to emulator after return from userspace */
5629         vcpu->arch.pio.count = 0;
5630         return ret;
5631 }
5632 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5633
5634 static int kvmclock_cpu_down_prep(unsigned int cpu)
5635 {
5636         __this_cpu_write(cpu_tsc_khz, 0);
5637         return 0;
5638 }
5639
5640 static void tsc_khz_changed(void *data)
5641 {
5642         struct cpufreq_freqs *freq = data;
5643         unsigned long khz = 0;
5644
5645         if (data)
5646                 khz = freq->new;
5647         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5648                 khz = cpufreq_quick_get(raw_smp_processor_id());
5649         if (!khz)
5650                 khz = tsc_khz;
5651         __this_cpu_write(cpu_tsc_khz, khz);
5652 }
5653
5654 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5655                                      void *data)
5656 {
5657         struct cpufreq_freqs *freq = data;
5658         struct kvm *kvm;
5659         struct kvm_vcpu *vcpu;
5660         int i, send_ipi = 0;
5661
5662         /*
5663          * We allow guests to temporarily run on slowing clocks,
5664          * provided we notify them after, or to run on accelerating
5665          * clocks, provided we notify them before.  Thus time never
5666          * goes backwards.
5667          *
5668          * However, we have a problem.  We can't atomically update
5669          * the frequency of a given CPU from this function; it is
5670          * merely a notifier, which can be called from any CPU.
5671          * Changing the TSC frequency at arbitrary points in time
5672          * requires a recomputation of local variables related to
5673          * the TSC for each VCPU.  We must flag these local variables
5674          * to be updated and be sure the update takes place with the
5675          * new frequency before any guests proceed.
5676          *
5677          * Unfortunately, the combination of hotplug CPU and frequency
5678          * change creates an intractable locking scenario; the order
5679          * of when these callouts happen is undefined with respect to
5680          * CPU hotplug, and they can race with each other.  As such,
5681          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5682          * undefined; you can actually have a CPU frequency change take
5683          * place in between the computation of X and the setting of the
5684          * variable.  To protect against this problem, all updates of
5685          * the per_cpu tsc_khz variable are done in an interrupt
5686          * protected IPI, and all callers wishing to update the value
5687          * must wait for a synchronous IPI to complete (which is trivial
5688          * if the caller is on the CPU already).  This establishes the
5689          * necessary total order on variable updates.
5690          *
5691          * Note that because a guest time update may take place
5692          * anytime after the setting of the VCPU's request bit, the
5693          * correct TSC value must be set before the request.  However,
5694          * to ensure the update actually makes it to any guest which
5695          * starts running in hardware virtualization between the set
5696          * and the acquisition of the spinlock, we must also ping the
5697          * CPU after setting the request bit.
5698          *
5699          */
5700
5701         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5702                 return 0;
5703         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5704                 return 0;
5705
5706         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5707
5708         spin_lock(&kvm_lock);
5709         list_for_each_entry(kvm, &vm_list, vm_list) {
5710                 kvm_for_each_vcpu(i, vcpu, kvm) {
5711                         if (vcpu->cpu != freq->cpu)
5712                                 continue;
5713                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5714                         if (vcpu->cpu != smp_processor_id())
5715                                 send_ipi = 1;
5716                 }
5717         }
5718         spin_unlock(&kvm_lock);
5719
5720         if (freq->old < freq->new && send_ipi) {
5721                 /*
5722                  * We upscale the frequency.  Must make the guest
5723                  * doesn't see old kvmclock values while running with
5724                  * the new frequency, otherwise we risk the guest sees
5725                  * time go backwards.
5726                  *
5727                  * In case we update the frequency for another cpu
5728                  * (which might be in guest context) send an interrupt
5729                  * to kick the cpu out of guest context.  Next time
5730                  * guest context is entered kvmclock will be updated,
5731                  * so the guest will not see stale values.
5732                  */
5733                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5734         }
5735         return 0;
5736 }
5737
5738 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5739         .notifier_call  = kvmclock_cpufreq_notifier
5740 };
5741
5742 static int kvmclock_cpu_online(unsigned int cpu)
5743 {
5744         tsc_khz_changed(NULL);
5745         return 0;
5746 }
5747
5748 static void kvm_timer_init(void)
5749 {
5750         max_tsc_khz = tsc_khz;
5751
5752         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5753 #ifdef CONFIG_CPU_FREQ
5754                 struct cpufreq_policy policy;
5755                 int cpu;
5756
5757                 memset(&policy, 0, sizeof(policy));
5758                 cpu = get_cpu();
5759                 cpufreq_get_policy(&policy, cpu);
5760                 if (policy.cpuinfo.max_freq)
5761                         max_tsc_khz = policy.cpuinfo.max_freq;
5762                 put_cpu();
5763 #endif
5764                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5765                                           CPUFREQ_TRANSITION_NOTIFIER);
5766         }
5767         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5768
5769         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "AP_X86_KVM_CLK_ONLINE",
5770                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5771 }
5772
5773 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5774
5775 int kvm_is_in_guest(void)
5776 {
5777         return __this_cpu_read(current_vcpu) != NULL;
5778 }
5779
5780 static int kvm_is_user_mode(void)
5781 {
5782         int user_mode = 3;
5783
5784         if (__this_cpu_read(current_vcpu))
5785                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5786
5787         return user_mode != 0;
5788 }
5789
5790 static unsigned long kvm_get_guest_ip(void)
5791 {
5792         unsigned long ip = 0;
5793
5794         if (__this_cpu_read(current_vcpu))
5795                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5796
5797         return ip;
5798 }
5799
5800 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5801         .is_in_guest            = kvm_is_in_guest,
5802         .is_user_mode           = kvm_is_user_mode,
5803         .get_guest_ip           = kvm_get_guest_ip,
5804 };
5805
5806 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5807 {
5808         __this_cpu_write(current_vcpu, vcpu);
5809 }
5810 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5811
5812 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5813 {
5814         __this_cpu_write(current_vcpu, NULL);
5815 }
5816 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5817
5818 static void kvm_set_mmio_spte_mask(void)
5819 {
5820         u64 mask;
5821         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5822
5823         /*
5824          * Set the reserved bits and the present bit of an paging-structure
5825          * entry to generate page fault with PFER.RSV = 1.
5826          */
5827          /* Mask the reserved physical address bits. */
5828         mask = rsvd_bits(maxphyaddr, 51);
5829
5830         /* Bit 62 is always reserved for 32bit host. */
5831         mask |= 0x3ull << 62;
5832
5833         /* Set the present bit. */
5834         mask |= 1ull;
5835
5836 #ifdef CONFIG_X86_64
5837         /*
5838          * If reserved bit is not supported, clear the present bit to disable
5839          * mmio page fault.
5840          */
5841         if (maxphyaddr == 52)
5842                 mask &= ~1ull;
5843 #endif
5844
5845         kvm_mmu_set_mmio_spte_mask(mask);
5846 }
5847
5848 #ifdef CONFIG_X86_64
5849 static void pvclock_gtod_update_fn(struct work_struct *work)
5850 {
5851         struct kvm *kvm;
5852
5853         struct kvm_vcpu *vcpu;
5854         int i;
5855
5856         spin_lock(&kvm_lock);
5857         list_for_each_entry(kvm, &vm_list, vm_list)
5858                 kvm_for_each_vcpu(i, vcpu, kvm)
5859                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5860         atomic_set(&kvm_guest_has_master_clock, 0);
5861         spin_unlock(&kvm_lock);
5862 }
5863
5864 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5865
5866 /*
5867  * Notification about pvclock gtod data update.
5868  */
5869 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5870                                void *priv)
5871 {
5872         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5873         struct timekeeper *tk = priv;
5874
5875         update_pvclock_gtod(tk);
5876
5877         /* disable master clock if host does not trust, or does not
5878          * use, TSC clocksource
5879          */
5880         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5881             atomic_read(&kvm_guest_has_master_clock) != 0)
5882                 queue_work(system_long_wq, &pvclock_gtod_work);
5883
5884         return 0;
5885 }
5886
5887 static struct notifier_block pvclock_gtod_notifier = {
5888         .notifier_call = pvclock_gtod_notify,
5889 };
5890 #endif
5891
5892 int kvm_arch_init(void *opaque)
5893 {
5894         int r;
5895         struct kvm_x86_ops *ops = opaque;
5896
5897         if (kvm_x86_ops) {
5898                 printk(KERN_ERR "kvm: already loaded the other module\n");
5899                 r = -EEXIST;
5900                 goto out;
5901         }
5902
5903         if (!ops->cpu_has_kvm_support()) {
5904                 printk(KERN_ERR "kvm: no hardware support\n");
5905                 r = -EOPNOTSUPP;
5906                 goto out;
5907         }
5908         if (ops->disabled_by_bios()) {
5909                 printk(KERN_ERR "kvm: disabled by bios\n");
5910                 r = -EOPNOTSUPP;
5911                 goto out;
5912         }
5913
5914         r = -ENOMEM;
5915         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5916         if (!shared_msrs) {
5917                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5918                 goto out;
5919         }
5920
5921         r = kvm_mmu_module_init();
5922         if (r)
5923                 goto out_free_percpu;
5924
5925         kvm_set_mmio_spte_mask();
5926
5927         kvm_x86_ops = ops;
5928
5929         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5930                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
5931                         PT_PRESENT_MASK);
5932         kvm_timer_init();
5933
5934         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5935
5936         if (boot_cpu_has(X86_FEATURE_XSAVE))
5937                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5938
5939         kvm_lapic_init();
5940 #ifdef CONFIG_X86_64
5941         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5942 #endif
5943
5944         return 0;
5945
5946 out_free_percpu:
5947         free_percpu(shared_msrs);
5948 out:
5949         return r;
5950 }
5951
5952 void kvm_arch_exit(void)
5953 {
5954         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5955
5956         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5957                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5958                                             CPUFREQ_TRANSITION_NOTIFIER);
5959         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
5960 #ifdef CONFIG_X86_64
5961         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5962 #endif
5963         kvm_x86_ops = NULL;
5964         kvm_mmu_module_exit();
5965         free_percpu(shared_msrs);
5966 }
5967
5968 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5969 {
5970         ++vcpu->stat.halt_exits;
5971         if (lapic_in_kernel(vcpu)) {
5972                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5973                 return 1;
5974         } else {
5975                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5976                 return 0;
5977         }
5978 }
5979 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5980
5981 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5982 {
5983         kvm_x86_ops->skip_emulated_instruction(vcpu);
5984         return kvm_vcpu_halt(vcpu);
5985 }
5986 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5987
5988 /*
5989  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5990  *
5991  * @apicid - apicid of vcpu to be kicked.
5992  */
5993 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5994 {
5995         struct kvm_lapic_irq lapic_irq;
5996
5997         lapic_irq.shorthand = 0;
5998         lapic_irq.dest_mode = 0;
5999         lapic_irq.dest_id = apicid;
6000         lapic_irq.msi_redir_hint = false;
6001
6002         lapic_irq.delivery_mode = APIC_DM_REMRD;
6003         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6004 }
6005
6006 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6007 {
6008         vcpu->arch.apicv_active = false;
6009         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6010 }
6011
6012 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6013 {
6014         unsigned long nr, a0, a1, a2, a3, ret;
6015         int op_64_bit, r = 1;
6016
6017         kvm_x86_ops->skip_emulated_instruction(vcpu);
6018
6019         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6020                 return kvm_hv_hypercall(vcpu);
6021
6022         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6023         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6024         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6025         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6026         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6027
6028         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6029
6030         op_64_bit = is_64_bit_mode(vcpu);
6031         if (!op_64_bit) {
6032                 nr &= 0xFFFFFFFF;
6033                 a0 &= 0xFFFFFFFF;
6034                 a1 &= 0xFFFFFFFF;
6035                 a2 &= 0xFFFFFFFF;
6036                 a3 &= 0xFFFFFFFF;
6037         }
6038
6039         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6040                 ret = -KVM_EPERM;
6041                 goto out;
6042         }
6043
6044         switch (nr) {
6045         case KVM_HC_VAPIC_POLL_IRQ:
6046                 ret = 0;
6047                 break;
6048         case KVM_HC_KICK_CPU:
6049                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6050                 ret = 0;
6051                 break;
6052         default:
6053                 ret = -KVM_ENOSYS;
6054                 break;
6055         }
6056 out:
6057         if (!op_64_bit)
6058                 ret = (u32)ret;
6059         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6060         ++vcpu->stat.hypercalls;
6061         return r;
6062 }
6063 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6064
6065 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6066 {
6067         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6068         char instruction[3];
6069         unsigned long rip = kvm_rip_read(vcpu);
6070
6071         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6072
6073         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
6074 }
6075
6076 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6077 {
6078         return vcpu->run->request_interrupt_window &&
6079                 likely(!pic_in_kernel(vcpu->kvm));
6080 }
6081
6082 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6083 {
6084         struct kvm_run *kvm_run = vcpu->run;
6085
6086         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6087         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6088         kvm_run->cr8 = kvm_get_cr8(vcpu);
6089         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6090         kvm_run->ready_for_interrupt_injection =
6091                 pic_in_kernel(vcpu->kvm) ||
6092                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6093 }
6094
6095 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6096 {
6097         int max_irr, tpr;
6098
6099         if (!kvm_x86_ops->update_cr8_intercept)
6100                 return;
6101
6102         if (!lapic_in_kernel(vcpu))
6103                 return;
6104
6105         if (vcpu->arch.apicv_active)
6106                 return;
6107
6108         if (!vcpu->arch.apic->vapic_addr)
6109                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6110         else
6111                 max_irr = -1;
6112
6113         if (max_irr != -1)
6114                 max_irr >>= 4;
6115
6116         tpr = kvm_lapic_get_cr8(vcpu);
6117
6118         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6119 }
6120
6121 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6122 {
6123         int r;
6124
6125         /* try to reinject previous events if any */
6126         if (vcpu->arch.exception.pending) {
6127                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6128                                         vcpu->arch.exception.has_error_code,
6129                                         vcpu->arch.exception.error_code);
6130
6131                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6132                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6133                                              X86_EFLAGS_RF);
6134
6135                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6136                     (vcpu->arch.dr7 & DR7_GD)) {
6137                         vcpu->arch.dr7 &= ~DR7_GD;
6138                         kvm_update_dr7(vcpu);
6139                 }
6140
6141                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6142                                           vcpu->arch.exception.has_error_code,
6143                                           vcpu->arch.exception.error_code,
6144                                           vcpu->arch.exception.reinject);
6145                 return 0;
6146         }
6147
6148         if (vcpu->arch.nmi_injected) {
6149                 kvm_x86_ops->set_nmi(vcpu);
6150                 return 0;
6151         }
6152
6153         if (vcpu->arch.interrupt.pending) {
6154                 kvm_x86_ops->set_irq(vcpu);
6155                 return 0;
6156         }
6157
6158         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6159                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6160                 if (r != 0)
6161                         return r;
6162         }
6163
6164         /* try to inject new event if pending */
6165         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6166                 vcpu->arch.smi_pending = false;
6167                 enter_smm(vcpu);
6168         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6169                 --vcpu->arch.nmi_pending;
6170                 vcpu->arch.nmi_injected = true;
6171                 kvm_x86_ops->set_nmi(vcpu);
6172         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6173                 /*
6174                  * Because interrupts can be injected asynchronously, we are
6175                  * calling check_nested_events again here to avoid a race condition.
6176                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6177                  * proposal and current concerns.  Perhaps we should be setting
6178                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6179                  */
6180                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6181                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6182                         if (r != 0)
6183                                 return r;
6184                 }
6185                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6186                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6187                                             false);
6188                         kvm_x86_ops->set_irq(vcpu);
6189                 }
6190         }
6191
6192         return 0;
6193 }
6194
6195 static void process_nmi(struct kvm_vcpu *vcpu)
6196 {
6197         unsigned limit = 2;
6198
6199         /*
6200          * x86 is limited to one NMI running, and one NMI pending after it.
6201          * If an NMI is already in progress, limit further NMIs to just one.
6202          * Otherwise, allow two (and we'll inject the first one immediately).
6203          */
6204         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6205                 limit = 1;
6206
6207         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6208         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6209         kvm_make_request(KVM_REQ_EVENT, vcpu);
6210 }
6211
6212 #define put_smstate(type, buf, offset, val)                       \
6213         *(type *)((buf) + (offset) - 0x7e00) = val
6214
6215 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6216 {
6217         u32 flags = 0;
6218         flags |= seg->g       << 23;
6219         flags |= seg->db      << 22;
6220         flags |= seg->l       << 21;
6221         flags |= seg->avl     << 20;
6222         flags |= seg->present << 15;
6223         flags |= seg->dpl     << 13;
6224         flags |= seg->s       << 12;
6225         flags |= seg->type    << 8;
6226         return flags;
6227 }
6228
6229 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6230 {
6231         struct kvm_segment seg;
6232         int offset;
6233
6234         kvm_get_segment(vcpu, &seg, n);
6235         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6236
6237         if (n < 3)
6238                 offset = 0x7f84 + n * 12;
6239         else
6240                 offset = 0x7f2c + (n - 3) * 12;
6241
6242         put_smstate(u32, buf, offset + 8, seg.base);
6243         put_smstate(u32, buf, offset + 4, seg.limit);
6244         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6245 }
6246
6247 #ifdef CONFIG_X86_64
6248 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6249 {
6250         struct kvm_segment seg;
6251         int offset;
6252         u16 flags;
6253
6254         kvm_get_segment(vcpu, &seg, n);
6255         offset = 0x7e00 + n * 16;
6256
6257         flags = enter_smm_get_segment_flags(&seg) >> 8;
6258         put_smstate(u16, buf, offset, seg.selector);
6259         put_smstate(u16, buf, offset + 2, flags);
6260         put_smstate(u32, buf, offset + 4, seg.limit);
6261         put_smstate(u64, buf, offset + 8, seg.base);
6262 }
6263 #endif
6264
6265 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6266 {
6267         struct desc_ptr dt;
6268         struct kvm_segment seg;
6269         unsigned long val;
6270         int i;
6271
6272         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6273         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6274         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6275         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6276
6277         for (i = 0; i < 8; i++)
6278                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6279
6280         kvm_get_dr(vcpu, 6, &val);
6281         put_smstate(u32, buf, 0x7fcc, (u32)val);
6282         kvm_get_dr(vcpu, 7, &val);
6283         put_smstate(u32, buf, 0x7fc8, (u32)val);
6284
6285         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6286         put_smstate(u32, buf, 0x7fc4, seg.selector);
6287         put_smstate(u32, buf, 0x7f64, seg.base);
6288         put_smstate(u32, buf, 0x7f60, seg.limit);
6289         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6290
6291         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6292         put_smstate(u32, buf, 0x7fc0, seg.selector);
6293         put_smstate(u32, buf, 0x7f80, seg.base);
6294         put_smstate(u32, buf, 0x7f7c, seg.limit);
6295         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6296
6297         kvm_x86_ops->get_gdt(vcpu, &dt);
6298         put_smstate(u32, buf, 0x7f74, dt.address);
6299         put_smstate(u32, buf, 0x7f70, dt.size);
6300
6301         kvm_x86_ops->get_idt(vcpu, &dt);
6302         put_smstate(u32, buf, 0x7f58, dt.address);
6303         put_smstate(u32, buf, 0x7f54, dt.size);
6304
6305         for (i = 0; i < 6; i++)
6306                 enter_smm_save_seg_32(vcpu, buf, i);
6307
6308         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6309
6310         /* revision id */
6311         put_smstate(u32, buf, 0x7efc, 0x00020000);
6312         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6313 }
6314
6315 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6316 {
6317 #ifdef CONFIG_X86_64
6318         struct desc_ptr dt;
6319         struct kvm_segment seg;
6320         unsigned long val;
6321         int i;
6322
6323         for (i = 0; i < 16; i++)
6324                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6325
6326         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6327         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6328
6329         kvm_get_dr(vcpu, 6, &val);
6330         put_smstate(u64, buf, 0x7f68, val);
6331         kvm_get_dr(vcpu, 7, &val);
6332         put_smstate(u64, buf, 0x7f60, val);
6333
6334         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6335         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6336         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6337
6338         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6339
6340         /* revision id */
6341         put_smstate(u32, buf, 0x7efc, 0x00020064);
6342
6343         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6344
6345         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6346         put_smstate(u16, buf, 0x7e90, seg.selector);
6347         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6348         put_smstate(u32, buf, 0x7e94, seg.limit);
6349         put_smstate(u64, buf, 0x7e98, seg.base);
6350
6351         kvm_x86_ops->get_idt(vcpu, &dt);
6352         put_smstate(u32, buf, 0x7e84, dt.size);
6353         put_smstate(u64, buf, 0x7e88, dt.address);
6354
6355         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6356         put_smstate(u16, buf, 0x7e70, seg.selector);
6357         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6358         put_smstate(u32, buf, 0x7e74, seg.limit);
6359         put_smstate(u64, buf, 0x7e78, seg.base);
6360
6361         kvm_x86_ops->get_gdt(vcpu, &dt);
6362         put_smstate(u32, buf, 0x7e64, dt.size);
6363         put_smstate(u64, buf, 0x7e68, dt.address);
6364
6365         for (i = 0; i < 6; i++)
6366                 enter_smm_save_seg_64(vcpu, buf, i);
6367 #else
6368         WARN_ON_ONCE(1);
6369 #endif
6370 }
6371
6372 static void enter_smm(struct kvm_vcpu *vcpu)
6373 {
6374         struct kvm_segment cs, ds;
6375         struct desc_ptr dt;
6376         char buf[512];
6377         u32 cr0;
6378
6379         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6380         vcpu->arch.hflags |= HF_SMM_MASK;
6381         memset(buf, 0, 512);
6382         if (guest_cpuid_has_longmode(vcpu))
6383                 enter_smm_save_state_64(vcpu, buf);
6384         else
6385                 enter_smm_save_state_32(vcpu, buf);
6386
6387         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6388
6389         if (kvm_x86_ops->get_nmi_mask(vcpu))
6390                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6391         else
6392                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6393
6394         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6395         kvm_rip_write(vcpu, 0x8000);
6396
6397         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6398         kvm_x86_ops->set_cr0(vcpu, cr0);
6399         vcpu->arch.cr0 = cr0;
6400
6401         kvm_x86_ops->set_cr4(vcpu, 0);
6402
6403         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6404         dt.address = dt.size = 0;
6405         kvm_x86_ops->set_idt(vcpu, &dt);
6406
6407         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6408
6409         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6410         cs.base = vcpu->arch.smbase;
6411
6412         ds.selector = 0;
6413         ds.base = 0;
6414
6415         cs.limit    = ds.limit = 0xffffffff;
6416         cs.type     = ds.type = 0x3;
6417         cs.dpl      = ds.dpl = 0;
6418         cs.db       = ds.db = 0;
6419         cs.s        = ds.s = 1;
6420         cs.l        = ds.l = 0;
6421         cs.g        = ds.g = 1;
6422         cs.avl      = ds.avl = 0;
6423         cs.present  = ds.present = 1;
6424         cs.unusable = ds.unusable = 0;
6425         cs.padding  = ds.padding = 0;
6426
6427         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6428         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6429         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6430         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6431         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6432         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6433
6434         if (guest_cpuid_has_longmode(vcpu))
6435                 kvm_x86_ops->set_efer(vcpu, 0);
6436
6437         kvm_update_cpuid(vcpu);
6438         kvm_mmu_reset_context(vcpu);
6439 }
6440
6441 static void process_smi(struct kvm_vcpu *vcpu)
6442 {
6443         vcpu->arch.smi_pending = true;
6444         kvm_make_request(KVM_REQ_EVENT, vcpu);
6445 }
6446
6447 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6448 {
6449         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6450 }
6451
6452 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6453 {
6454         u64 eoi_exit_bitmap[4];
6455
6456         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6457                 return;
6458
6459         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6460
6461         if (irqchip_split(vcpu->kvm))
6462                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6463         else {
6464                 if (vcpu->arch.apicv_active)
6465                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6466                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6467         }
6468         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6469                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6470         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6471 }
6472
6473 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6474 {
6475         ++vcpu->stat.tlb_flush;
6476         kvm_x86_ops->tlb_flush(vcpu);
6477 }
6478
6479 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6480 {
6481         struct page *page = NULL;
6482
6483         if (!lapic_in_kernel(vcpu))
6484                 return;
6485
6486         if (!kvm_x86_ops->set_apic_access_page_addr)
6487                 return;
6488
6489         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6490         if (is_error_page(page))
6491                 return;
6492         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6493
6494         /*
6495          * Do not pin apic access page in memory, the MMU notifier
6496          * will call us again if it is migrated or swapped out.
6497          */
6498         put_page(page);
6499 }
6500 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6501
6502 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6503                                            unsigned long address)
6504 {
6505         /*
6506          * The physical address of apic access page is stored in the VMCS.
6507          * Update it when it becomes invalid.
6508          */
6509         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6510                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6511 }
6512
6513 /*
6514  * Returns 1 to let vcpu_run() continue the guest execution loop without
6515  * exiting to the userspace.  Otherwise, the value will be returned to the
6516  * userspace.
6517  */
6518 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6519 {
6520         int r;
6521         bool req_int_win =
6522                 dm_request_for_irq_injection(vcpu) &&
6523                 kvm_cpu_accept_dm_intr(vcpu);
6524
6525         bool req_immediate_exit = false;
6526
6527         if (vcpu->requests) {
6528                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6529                         kvm_mmu_unload(vcpu);
6530                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6531                         __kvm_migrate_timers(vcpu);
6532                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6533                         kvm_gen_update_masterclock(vcpu->kvm);
6534                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6535                         kvm_gen_kvmclock_update(vcpu);
6536                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6537                         r = kvm_guest_time_update(vcpu);
6538                         if (unlikely(r))
6539                                 goto out;
6540                 }
6541                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6542                         kvm_mmu_sync_roots(vcpu);
6543                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6544                         kvm_vcpu_flush_tlb(vcpu);
6545                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6546                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6547                         r = 0;
6548                         goto out;
6549                 }
6550                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6551                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6552                         r = 0;
6553                         goto out;
6554                 }
6555                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6556                         vcpu->fpu_active = 0;
6557                         kvm_x86_ops->fpu_deactivate(vcpu);
6558                 }
6559                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6560                         /* Page is swapped out. Do synthetic halt */
6561                         vcpu->arch.apf.halted = true;
6562                         r = 1;
6563                         goto out;
6564                 }
6565                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6566                         record_steal_time(vcpu);
6567                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6568                         process_smi(vcpu);
6569                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6570                         process_nmi(vcpu);
6571                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6572                         kvm_pmu_handle_event(vcpu);
6573                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6574                         kvm_pmu_deliver_pmi(vcpu);
6575                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6576                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6577                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6578                                      vcpu->arch.ioapic_handled_vectors)) {
6579                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6580                                 vcpu->run->eoi.vector =
6581                                                 vcpu->arch.pending_ioapic_eoi;
6582                                 r = 0;
6583                                 goto out;
6584                         }
6585                 }
6586                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6587                         vcpu_scan_ioapic(vcpu);
6588                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6589                         kvm_vcpu_reload_apic_access_page(vcpu);
6590                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6591                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6592                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6593                         r = 0;
6594                         goto out;
6595                 }
6596                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6597                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6598                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6599                         r = 0;
6600                         goto out;
6601                 }
6602                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6603                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6604                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6605                         r = 0;
6606                         goto out;
6607                 }
6608
6609                 /*
6610                  * KVM_REQ_HV_STIMER has to be processed after
6611                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6612                  * depend on the guest clock being up-to-date
6613                  */
6614                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6615                         kvm_hv_process_stimers(vcpu);
6616         }
6617
6618         /*
6619          * KVM_REQ_EVENT is not set when posted interrupts are set by
6620          * VT-d hardware, so we have to update RVI unconditionally.
6621          */
6622         if (kvm_lapic_enabled(vcpu)) {
6623                 /*
6624                  * Update architecture specific hints for APIC
6625                  * virtual interrupt delivery.
6626                  */
6627                 if (vcpu->arch.apicv_active)
6628                         kvm_x86_ops->hwapic_irr_update(vcpu,
6629                                 kvm_lapic_find_highest_irr(vcpu));
6630         }
6631
6632         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6633                 kvm_apic_accept_events(vcpu);
6634                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6635                         r = 1;
6636                         goto out;
6637                 }
6638
6639                 if (inject_pending_event(vcpu, req_int_win) != 0)
6640                         req_immediate_exit = true;
6641                 else {
6642                         /* Enable NMI/IRQ window open exits if needed.
6643                          *
6644                          * SMIs have two cases: 1) they can be nested, and
6645                          * then there is nothing to do here because RSM will
6646                          * cause a vmexit anyway; 2) or the SMI can be pending
6647                          * because inject_pending_event has completed the
6648                          * injection of an IRQ or NMI from the previous vmexit,
6649                          * and then we request an immediate exit to inject the SMI.
6650                          */
6651                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6652                                 req_immediate_exit = true;
6653                         if (vcpu->arch.nmi_pending)
6654                                 kvm_x86_ops->enable_nmi_window(vcpu);
6655                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6656                                 kvm_x86_ops->enable_irq_window(vcpu);
6657                 }
6658
6659                 if (kvm_lapic_enabled(vcpu)) {
6660                         update_cr8_intercept(vcpu);
6661                         kvm_lapic_sync_to_vapic(vcpu);
6662                 }
6663         }
6664
6665         r = kvm_mmu_reload(vcpu);
6666         if (unlikely(r)) {
6667                 goto cancel_injection;
6668         }
6669
6670         preempt_disable();
6671
6672         kvm_x86_ops->prepare_guest_switch(vcpu);
6673         if (vcpu->fpu_active)
6674                 kvm_load_guest_fpu(vcpu);
6675         vcpu->mode = IN_GUEST_MODE;
6676
6677         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6678
6679         /*
6680          * We should set ->mode before check ->requests,
6681          * Please see the comment in kvm_make_all_cpus_request.
6682          * This also orders the write to mode from any reads
6683          * to the page tables done while the VCPU is running.
6684          * Please see the comment in kvm_flush_remote_tlbs.
6685          */
6686         smp_mb__after_srcu_read_unlock();
6687
6688         local_irq_disable();
6689
6690         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6691             || need_resched() || signal_pending(current)) {
6692                 vcpu->mode = OUTSIDE_GUEST_MODE;
6693                 smp_wmb();
6694                 local_irq_enable();
6695                 preempt_enable();
6696                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6697                 r = 1;
6698                 goto cancel_injection;
6699         }
6700
6701         kvm_load_guest_xcr0(vcpu);
6702
6703         if (req_immediate_exit) {
6704                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6705                 smp_send_reschedule(vcpu->cpu);
6706         }
6707
6708         trace_kvm_entry(vcpu->vcpu_id);
6709         wait_lapic_expire(vcpu);
6710         guest_enter_irqoff();
6711
6712         if (unlikely(vcpu->arch.switch_db_regs)) {
6713                 set_debugreg(0, 7);
6714                 set_debugreg(vcpu->arch.eff_db[0], 0);
6715                 set_debugreg(vcpu->arch.eff_db[1], 1);
6716                 set_debugreg(vcpu->arch.eff_db[2], 2);
6717                 set_debugreg(vcpu->arch.eff_db[3], 3);
6718                 set_debugreg(vcpu->arch.dr6, 6);
6719                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6720         }
6721
6722         kvm_x86_ops->run(vcpu);
6723
6724         /*
6725          * Do this here before restoring debug registers on the host.  And
6726          * since we do this before handling the vmexit, a DR access vmexit
6727          * can (a) read the correct value of the debug registers, (b) set
6728          * KVM_DEBUGREG_WONT_EXIT again.
6729          */
6730         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6731                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6732                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6733                 kvm_update_dr0123(vcpu);
6734                 kvm_update_dr6(vcpu);
6735                 kvm_update_dr7(vcpu);
6736                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6737         }
6738
6739         /*
6740          * If the guest has used debug registers, at least dr7
6741          * will be disabled while returning to the host.
6742          * If we don't have active breakpoints in the host, we don't
6743          * care about the messed up debug address registers. But if
6744          * we have some of them active, restore the old state.
6745          */
6746         if (hw_breakpoint_active())
6747                 hw_breakpoint_restore();
6748
6749         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6750
6751         vcpu->mode = OUTSIDE_GUEST_MODE;
6752         smp_wmb();
6753
6754         kvm_put_guest_xcr0(vcpu);
6755
6756         kvm_x86_ops->handle_external_intr(vcpu);
6757
6758         ++vcpu->stat.exits;
6759
6760         guest_exit_irqoff();
6761
6762         local_irq_enable();
6763         preempt_enable();
6764
6765         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6766
6767         /*
6768          * Profile KVM exit RIPs:
6769          */
6770         if (unlikely(prof_on == KVM_PROFILING)) {
6771                 unsigned long rip = kvm_rip_read(vcpu);
6772                 profile_hit(KVM_PROFILING, (void *)rip);
6773         }
6774
6775         if (unlikely(vcpu->arch.tsc_always_catchup))
6776                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6777
6778         if (vcpu->arch.apic_attention)
6779                 kvm_lapic_sync_from_vapic(vcpu);
6780
6781         r = kvm_x86_ops->handle_exit(vcpu);
6782         return r;
6783
6784 cancel_injection:
6785         kvm_x86_ops->cancel_injection(vcpu);
6786         if (unlikely(vcpu->arch.apic_attention))
6787                 kvm_lapic_sync_from_vapic(vcpu);
6788 out:
6789         return r;
6790 }
6791
6792 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6793 {
6794         if (!kvm_arch_vcpu_runnable(vcpu) &&
6795             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6796                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6797                 kvm_vcpu_block(vcpu);
6798                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6799
6800                 if (kvm_x86_ops->post_block)
6801                         kvm_x86_ops->post_block(vcpu);
6802
6803                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6804                         return 1;
6805         }
6806
6807         kvm_apic_accept_events(vcpu);
6808         switch(vcpu->arch.mp_state) {
6809         case KVM_MP_STATE_HALTED:
6810                 vcpu->arch.pv.pv_unhalted = false;
6811                 vcpu->arch.mp_state =
6812                         KVM_MP_STATE_RUNNABLE;
6813         case KVM_MP_STATE_RUNNABLE:
6814                 vcpu->arch.apf.halted = false;
6815                 break;
6816         case KVM_MP_STATE_INIT_RECEIVED:
6817                 break;
6818         default:
6819                 return -EINTR;
6820                 break;
6821         }
6822         return 1;
6823 }
6824
6825 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6826 {
6827         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6828                 !vcpu->arch.apf.halted);
6829 }
6830
6831 static int vcpu_run(struct kvm_vcpu *vcpu)
6832 {
6833         int r;
6834         struct kvm *kvm = vcpu->kvm;
6835
6836         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6837
6838         for (;;) {
6839                 if (kvm_vcpu_running(vcpu)) {
6840                         r = vcpu_enter_guest(vcpu);
6841                 } else {
6842                         r = vcpu_block(kvm, vcpu);
6843                 }
6844
6845                 if (r <= 0)
6846                         break;
6847
6848                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6849                 if (kvm_cpu_has_pending_timer(vcpu))
6850                         kvm_inject_pending_timer_irqs(vcpu);
6851
6852                 if (dm_request_for_irq_injection(vcpu) &&
6853                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6854                         r = 0;
6855                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6856                         ++vcpu->stat.request_irq_exits;
6857                         break;
6858                 }
6859
6860                 kvm_check_async_pf_completion(vcpu);
6861
6862                 if (signal_pending(current)) {
6863                         r = -EINTR;
6864                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6865                         ++vcpu->stat.signal_exits;
6866                         break;
6867                 }
6868                 if (need_resched()) {
6869                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6870                         cond_resched();
6871                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6872                 }
6873         }
6874
6875         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6876
6877         return r;
6878 }
6879
6880 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6881 {
6882         int r;
6883         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6884         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6885         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6886         if (r != EMULATE_DONE)
6887                 return 0;
6888         return 1;
6889 }
6890
6891 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6892 {
6893         BUG_ON(!vcpu->arch.pio.count);
6894
6895         return complete_emulated_io(vcpu);
6896 }
6897
6898 /*
6899  * Implements the following, as a state machine:
6900  *
6901  * read:
6902  *   for each fragment
6903  *     for each mmio piece in the fragment
6904  *       write gpa, len
6905  *       exit
6906  *       copy data
6907  *   execute insn
6908  *
6909  * write:
6910  *   for each fragment
6911  *     for each mmio piece in the fragment
6912  *       write gpa, len
6913  *       copy data
6914  *       exit
6915  */
6916 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6917 {
6918         struct kvm_run *run = vcpu->run;
6919         struct kvm_mmio_fragment *frag;
6920         unsigned len;
6921
6922         BUG_ON(!vcpu->mmio_needed);
6923
6924         /* Complete previous fragment */
6925         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6926         len = min(8u, frag->len);
6927         if (!vcpu->mmio_is_write)
6928                 memcpy(frag->data, run->mmio.data, len);
6929
6930         if (frag->len <= 8) {
6931                 /* Switch to the next fragment. */
6932                 frag++;
6933                 vcpu->mmio_cur_fragment++;
6934         } else {
6935                 /* Go forward to the next mmio piece. */
6936                 frag->data += len;
6937                 frag->gpa += len;
6938                 frag->len -= len;
6939         }
6940
6941         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6942                 vcpu->mmio_needed = 0;
6943
6944                 /* FIXME: return into emulator if single-stepping.  */
6945                 if (vcpu->mmio_is_write)
6946                         return 1;
6947                 vcpu->mmio_read_completed = 1;
6948                 return complete_emulated_io(vcpu);
6949         }
6950
6951         run->exit_reason = KVM_EXIT_MMIO;
6952         run->mmio.phys_addr = frag->gpa;
6953         if (vcpu->mmio_is_write)
6954                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6955         run->mmio.len = min(8u, frag->len);
6956         run->mmio.is_write = vcpu->mmio_is_write;
6957         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6958         return 0;
6959 }
6960
6961
6962 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6963 {
6964         struct fpu *fpu = &current->thread.fpu;
6965         int r;
6966         sigset_t sigsaved;
6967
6968         fpu__activate_curr(fpu);
6969
6970         if (vcpu->sigset_active)
6971                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6972
6973         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6974                 kvm_vcpu_block(vcpu);
6975                 kvm_apic_accept_events(vcpu);
6976                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6977                 r = -EAGAIN;
6978                 goto out;
6979         }
6980
6981         /* re-sync apic's tpr */
6982         if (!lapic_in_kernel(vcpu)) {
6983                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6984                         r = -EINVAL;
6985                         goto out;
6986                 }
6987         }
6988
6989         if (unlikely(vcpu->arch.complete_userspace_io)) {
6990                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6991                 vcpu->arch.complete_userspace_io = NULL;
6992                 r = cui(vcpu);
6993                 if (r <= 0)
6994                         goto out;
6995         } else
6996                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6997
6998         r = vcpu_run(vcpu);
6999
7000 out:
7001         post_kvm_run_save(vcpu);
7002         if (vcpu->sigset_active)
7003                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7004
7005         return r;
7006 }
7007
7008 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7009 {
7010         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7011                 /*
7012                  * We are here if userspace calls get_regs() in the middle of
7013                  * instruction emulation. Registers state needs to be copied
7014                  * back from emulation context to vcpu. Userspace shouldn't do
7015                  * that usually, but some bad designed PV devices (vmware
7016                  * backdoor interface) need this to work
7017                  */
7018                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7019                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7020         }
7021         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7022         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7023         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7024         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7025         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7026         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7027         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7028         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7029 #ifdef CONFIG_X86_64
7030         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7031         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7032         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7033         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7034         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7035         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7036         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7037         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7038 #endif
7039
7040         regs->rip = kvm_rip_read(vcpu);
7041         regs->rflags = kvm_get_rflags(vcpu);
7042
7043         return 0;
7044 }
7045
7046 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7047 {
7048         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7049         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7050
7051         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7052         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7053         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7054         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7055         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7056         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7057         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7058         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7059 #ifdef CONFIG_X86_64
7060         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7061         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7062         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7063         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7064         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7065         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7066         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7067         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7068 #endif
7069
7070         kvm_rip_write(vcpu, regs->rip);
7071         kvm_set_rflags(vcpu, regs->rflags);
7072
7073         vcpu->arch.exception.pending = false;
7074
7075         kvm_make_request(KVM_REQ_EVENT, vcpu);
7076
7077         return 0;
7078 }
7079
7080 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7081 {
7082         struct kvm_segment cs;
7083
7084         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7085         *db = cs.db;
7086         *l = cs.l;
7087 }
7088 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7089
7090 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7091                                   struct kvm_sregs *sregs)
7092 {
7093         struct desc_ptr dt;
7094
7095         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7096         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7097         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7098         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7099         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7100         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7101
7102         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7103         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7104
7105         kvm_x86_ops->get_idt(vcpu, &dt);
7106         sregs->idt.limit = dt.size;
7107         sregs->idt.base = dt.address;
7108         kvm_x86_ops->get_gdt(vcpu, &dt);
7109         sregs->gdt.limit = dt.size;
7110         sregs->gdt.base = dt.address;
7111
7112         sregs->cr0 = kvm_read_cr0(vcpu);
7113         sregs->cr2 = vcpu->arch.cr2;
7114         sregs->cr3 = kvm_read_cr3(vcpu);
7115         sregs->cr4 = kvm_read_cr4(vcpu);
7116         sregs->cr8 = kvm_get_cr8(vcpu);
7117         sregs->efer = vcpu->arch.efer;
7118         sregs->apic_base = kvm_get_apic_base(vcpu);
7119
7120         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7121
7122         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7123                 set_bit(vcpu->arch.interrupt.nr,
7124                         (unsigned long *)sregs->interrupt_bitmap);
7125
7126         return 0;
7127 }
7128
7129 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7130                                     struct kvm_mp_state *mp_state)
7131 {
7132         kvm_apic_accept_events(vcpu);
7133         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7134                                         vcpu->arch.pv.pv_unhalted)
7135                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7136         else
7137                 mp_state->mp_state = vcpu->arch.mp_state;
7138
7139         return 0;
7140 }
7141
7142 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7143                                     struct kvm_mp_state *mp_state)
7144 {
7145         if (!lapic_in_kernel(vcpu) &&
7146             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7147                 return -EINVAL;
7148
7149         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7150                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7151                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7152         } else
7153                 vcpu->arch.mp_state = mp_state->mp_state;
7154         kvm_make_request(KVM_REQ_EVENT, vcpu);
7155         return 0;
7156 }
7157
7158 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7159                     int reason, bool has_error_code, u32 error_code)
7160 {
7161         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7162         int ret;
7163
7164         init_emulate_ctxt(vcpu);
7165
7166         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7167                                    has_error_code, error_code);
7168
7169         if (ret)
7170                 return EMULATE_FAIL;
7171
7172         kvm_rip_write(vcpu, ctxt->eip);
7173         kvm_set_rflags(vcpu, ctxt->eflags);
7174         kvm_make_request(KVM_REQ_EVENT, vcpu);
7175         return EMULATE_DONE;
7176 }
7177 EXPORT_SYMBOL_GPL(kvm_task_switch);
7178
7179 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7180                                   struct kvm_sregs *sregs)
7181 {
7182         struct msr_data apic_base_msr;
7183         int mmu_reset_needed = 0;
7184         int pending_vec, max_bits, idx;
7185         struct desc_ptr dt;
7186
7187         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7188                 return -EINVAL;
7189
7190         dt.size = sregs->idt.limit;
7191         dt.address = sregs->idt.base;
7192         kvm_x86_ops->set_idt(vcpu, &dt);
7193         dt.size = sregs->gdt.limit;
7194         dt.address = sregs->gdt.base;
7195         kvm_x86_ops->set_gdt(vcpu, &dt);
7196
7197         vcpu->arch.cr2 = sregs->cr2;
7198         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7199         vcpu->arch.cr3 = sregs->cr3;
7200         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7201
7202         kvm_set_cr8(vcpu, sregs->cr8);
7203
7204         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7205         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7206         apic_base_msr.data = sregs->apic_base;
7207         apic_base_msr.host_initiated = true;
7208         kvm_set_apic_base(vcpu, &apic_base_msr);
7209
7210         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7211         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7212         vcpu->arch.cr0 = sregs->cr0;
7213
7214         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7215         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7216         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7217                 kvm_update_cpuid(vcpu);
7218
7219         idx = srcu_read_lock(&vcpu->kvm->srcu);
7220         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7221                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7222                 mmu_reset_needed = 1;
7223         }
7224         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7225
7226         if (mmu_reset_needed)
7227                 kvm_mmu_reset_context(vcpu);
7228
7229         max_bits = KVM_NR_INTERRUPTS;
7230         pending_vec = find_first_bit(
7231                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7232         if (pending_vec < max_bits) {
7233                 kvm_queue_interrupt(vcpu, pending_vec, false);
7234                 pr_debug("Set back pending irq %d\n", pending_vec);
7235         }
7236
7237         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7238         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7239         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7240         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7241         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7242         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7243
7244         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7245         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7246
7247         update_cr8_intercept(vcpu);
7248
7249         /* Older userspace won't unhalt the vcpu on reset. */
7250         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7251             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7252             !is_protmode(vcpu))
7253                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7254
7255         kvm_make_request(KVM_REQ_EVENT, vcpu);
7256
7257         return 0;
7258 }
7259
7260 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7261                                         struct kvm_guest_debug *dbg)
7262 {
7263         unsigned long rflags;
7264         int i, r;
7265
7266         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7267                 r = -EBUSY;
7268                 if (vcpu->arch.exception.pending)
7269                         goto out;
7270                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7271                         kvm_queue_exception(vcpu, DB_VECTOR);
7272                 else
7273                         kvm_queue_exception(vcpu, BP_VECTOR);
7274         }
7275
7276         /*
7277          * Read rflags as long as potentially injected trace flags are still
7278          * filtered out.
7279          */
7280         rflags = kvm_get_rflags(vcpu);
7281
7282         vcpu->guest_debug = dbg->control;
7283         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7284                 vcpu->guest_debug = 0;
7285
7286         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7287                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7288                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7289                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7290         } else {
7291                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7292                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7293         }
7294         kvm_update_dr7(vcpu);
7295
7296         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7297                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7298                         get_segment_base(vcpu, VCPU_SREG_CS);
7299
7300         /*
7301          * Trigger an rflags update that will inject or remove the trace
7302          * flags.
7303          */
7304         kvm_set_rflags(vcpu, rflags);
7305
7306         kvm_x86_ops->update_bp_intercept(vcpu);
7307
7308         r = 0;
7309
7310 out:
7311
7312         return r;
7313 }
7314
7315 /*
7316  * Translate a guest virtual address to a guest physical address.
7317  */
7318 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7319                                     struct kvm_translation *tr)
7320 {
7321         unsigned long vaddr = tr->linear_address;
7322         gpa_t gpa;
7323         int idx;
7324
7325         idx = srcu_read_lock(&vcpu->kvm->srcu);
7326         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7327         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7328         tr->physical_address = gpa;
7329         tr->valid = gpa != UNMAPPED_GVA;
7330         tr->writeable = 1;
7331         tr->usermode = 0;
7332
7333         return 0;
7334 }
7335
7336 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7337 {
7338         struct fxregs_state *fxsave =
7339                         &vcpu->arch.guest_fpu.state.fxsave;
7340
7341         memcpy(fpu->fpr, fxsave->st_space, 128);
7342         fpu->fcw = fxsave->cwd;
7343         fpu->fsw = fxsave->swd;
7344         fpu->ftwx = fxsave->twd;
7345         fpu->last_opcode = fxsave->fop;
7346         fpu->last_ip = fxsave->rip;
7347         fpu->last_dp = fxsave->rdp;
7348         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7349
7350         return 0;
7351 }
7352
7353 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7354 {
7355         struct fxregs_state *fxsave =
7356                         &vcpu->arch.guest_fpu.state.fxsave;
7357
7358         memcpy(fxsave->st_space, fpu->fpr, 128);
7359         fxsave->cwd = fpu->fcw;
7360         fxsave->swd = fpu->fsw;
7361         fxsave->twd = fpu->ftwx;
7362         fxsave->fop = fpu->last_opcode;
7363         fxsave->rip = fpu->last_ip;
7364         fxsave->rdp = fpu->last_dp;
7365         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7366
7367         return 0;
7368 }
7369
7370 static void fx_init(struct kvm_vcpu *vcpu)
7371 {
7372         fpstate_init(&vcpu->arch.guest_fpu.state);
7373         if (boot_cpu_has(X86_FEATURE_XSAVES))
7374                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7375                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7376
7377         /*
7378          * Ensure guest xcr0 is valid for loading
7379          */
7380         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7381
7382         vcpu->arch.cr0 |= X86_CR0_ET;
7383 }
7384
7385 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7386 {
7387         if (vcpu->guest_fpu_loaded)
7388                 return;
7389
7390         /*
7391          * Restore all possible states in the guest,
7392          * and assume host would use all available bits.
7393          * Guest xcr0 would be loaded later.
7394          */
7395         vcpu->guest_fpu_loaded = 1;
7396         __kernel_fpu_begin();
7397         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7398         trace_kvm_fpu(1);
7399 }
7400
7401 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7402 {
7403         if (!vcpu->guest_fpu_loaded) {
7404                 vcpu->fpu_counter = 0;
7405                 return;
7406         }
7407
7408         vcpu->guest_fpu_loaded = 0;
7409         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7410         __kernel_fpu_end();
7411         ++vcpu->stat.fpu_reload;
7412         /*
7413          * If using eager FPU mode, or if the guest is a frequent user
7414          * of the FPU, just leave the FPU active for next time.
7415          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7416          * the FPU in bursts will revert to loading it on demand.
7417          */
7418         if (!use_eager_fpu()) {
7419                 if (++vcpu->fpu_counter < 5)
7420                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7421         }
7422         trace_kvm_fpu(0);
7423 }
7424
7425 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7426 {
7427         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7428
7429         kvmclock_reset(vcpu);
7430
7431         kvm_x86_ops->vcpu_free(vcpu);
7432         free_cpumask_var(wbinvd_dirty_mask);
7433 }
7434
7435 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7436                                                 unsigned int id)
7437 {
7438         struct kvm_vcpu *vcpu;
7439
7440         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7441                 printk_once(KERN_WARNING
7442                 "kvm: SMP vm created on host with unstable TSC; "
7443                 "guest TSC will not be reliable\n");
7444
7445         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7446
7447         return vcpu;
7448 }
7449
7450 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7451 {
7452         int r;
7453
7454         kvm_vcpu_mtrr_init(vcpu);
7455         r = vcpu_load(vcpu);
7456         if (r)
7457                 return r;
7458         kvm_vcpu_reset(vcpu, false);
7459         kvm_mmu_setup(vcpu);
7460         vcpu_put(vcpu);
7461         return r;
7462 }
7463
7464 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7465 {
7466         struct msr_data msr;
7467         struct kvm *kvm = vcpu->kvm;
7468
7469         if (vcpu_load(vcpu))
7470                 return;
7471         msr.data = 0x0;
7472         msr.index = MSR_IA32_TSC;
7473         msr.host_initiated = true;
7474         kvm_write_tsc(vcpu, &msr);
7475         vcpu_put(vcpu);
7476
7477         if (!kvmclock_periodic_sync)
7478                 return;
7479
7480         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7481                                         KVMCLOCK_SYNC_PERIOD);
7482 }
7483
7484 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7485 {
7486         int r;
7487         vcpu->arch.apf.msr_val = 0;
7488
7489         r = vcpu_load(vcpu);
7490         BUG_ON(r);
7491         kvm_mmu_unload(vcpu);
7492         vcpu_put(vcpu);
7493
7494         kvm_x86_ops->vcpu_free(vcpu);
7495 }
7496
7497 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7498 {
7499         vcpu->arch.hflags = 0;
7500
7501         vcpu->arch.smi_pending = 0;
7502         atomic_set(&vcpu->arch.nmi_queued, 0);
7503         vcpu->arch.nmi_pending = 0;
7504         vcpu->arch.nmi_injected = false;
7505         kvm_clear_interrupt_queue(vcpu);
7506         kvm_clear_exception_queue(vcpu);
7507
7508         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7509         kvm_update_dr0123(vcpu);
7510         vcpu->arch.dr6 = DR6_INIT;
7511         kvm_update_dr6(vcpu);
7512         vcpu->arch.dr7 = DR7_FIXED_1;
7513         kvm_update_dr7(vcpu);
7514
7515         vcpu->arch.cr2 = 0;
7516
7517         kvm_make_request(KVM_REQ_EVENT, vcpu);
7518         vcpu->arch.apf.msr_val = 0;
7519         vcpu->arch.st.msr_val = 0;
7520
7521         kvmclock_reset(vcpu);
7522
7523         kvm_clear_async_pf_completion_queue(vcpu);
7524         kvm_async_pf_hash_reset(vcpu);
7525         vcpu->arch.apf.halted = false;
7526
7527         if (!init_event) {
7528                 kvm_pmu_reset(vcpu);
7529                 vcpu->arch.smbase = 0x30000;
7530         }
7531
7532         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7533         vcpu->arch.regs_avail = ~0;
7534         vcpu->arch.regs_dirty = ~0;
7535
7536         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7537 }
7538
7539 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7540 {
7541         struct kvm_segment cs;
7542
7543         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7544         cs.selector = vector << 8;
7545         cs.base = vector << 12;
7546         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7547         kvm_rip_write(vcpu, 0);
7548 }
7549
7550 int kvm_arch_hardware_enable(void)
7551 {
7552         struct kvm *kvm;
7553         struct kvm_vcpu *vcpu;
7554         int i;
7555         int ret;
7556         u64 local_tsc;
7557         u64 max_tsc = 0;
7558         bool stable, backwards_tsc = false;
7559
7560         kvm_shared_msr_cpu_online();
7561         ret = kvm_x86_ops->hardware_enable();
7562         if (ret != 0)
7563                 return ret;
7564
7565         local_tsc = rdtsc();
7566         stable = !check_tsc_unstable();
7567         list_for_each_entry(kvm, &vm_list, vm_list) {
7568                 kvm_for_each_vcpu(i, vcpu, kvm) {
7569                         if (!stable && vcpu->cpu == smp_processor_id())
7570                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7571                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7572                                 backwards_tsc = true;
7573                                 if (vcpu->arch.last_host_tsc > max_tsc)
7574                                         max_tsc = vcpu->arch.last_host_tsc;
7575                         }
7576                 }
7577         }
7578
7579         /*
7580          * Sometimes, even reliable TSCs go backwards.  This happens on
7581          * platforms that reset TSC during suspend or hibernate actions, but
7582          * maintain synchronization.  We must compensate.  Fortunately, we can
7583          * detect that condition here, which happens early in CPU bringup,
7584          * before any KVM threads can be running.  Unfortunately, we can't
7585          * bring the TSCs fully up to date with real time, as we aren't yet far
7586          * enough into CPU bringup that we know how much real time has actually
7587          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7588          * variables that haven't been updated yet.
7589          *
7590          * So we simply find the maximum observed TSC above, then record the
7591          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7592          * the adjustment will be applied.  Note that we accumulate
7593          * adjustments, in case multiple suspend cycles happen before some VCPU
7594          * gets a chance to run again.  In the event that no KVM threads get a
7595          * chance to run, we will miss the entire elapsed period, as we'll have
7596          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7597          * loose cycle time.  This isn't too big a deal, since the loss will be
7598          * uniform across all VCPUs (not to mention the scenario is extremely
7599          * unlikely). It is possible that a second hibernate recovery happens
7600          * much faster than a first, causing the observed TSC here to be
7601          * smaller; this would require additional padding adjustment, which is
7602          * why we set last_host_tsc to the local tsc observed here.
7603          *
7604          * N.B. - this code below runs only on platforms with reliable TSC,
7605          * as that is the only way backwards_tsc is set above.  Also note
7606          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7607          * have the same delta_cyc adjustment applied if backwards_tsc
7608          * is detected.  Note further, this adjustment is only done once,
7609          * as we reset last_host_tsc on all VCPUs to stop this from being
7610          * called multiple times (one for each physical CPU bringup).
7611          *
7612          * Platforms with unreliable TSCs don't have to deal with this, they
7613          * will be compensated by the logic in vcpu_load, which sets the TSC to
7614          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7615          * guarantee that they stay in perfect synchronization.
7616          */
7617         if (backwards_tsc) {
7618                 u64 delta_cyc = max_tsc - local_tsc;
7619                 backwards_tsc_observed = true;
7620                 list_for_each_entry(kvm, &vm_list, vm_list) {
7621                         kvm_for_each_vcpu(i, vcpu, kvm) {
7622                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7623                                 vcpu->arch.last_host_tsc = local_tsc;
7624                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7625                         }
7626
7627                         /*
7628                          * We have to disable TSC offset matching.. if you were
7629                          * booting a VM while issuing an S4 host suspend....
7630                          * you may have some problem.  Solving this issue is
7631                          * left as an exercise to the reader.
7632                          */
7633                         kvm->arch.last_tsc_nsec = 0;
7634                         kvm->arch.last_tsc_write = 0;
7635                 }
7636
7637         }
7638         return 0;
7639 }
7640
7641 void kvm_arch_hardware_disable(void)
7642 {
7643         kvm_x86_ops->hardware_disable();
7644         drop_user_return_notifiers();
7645 }
7646
7647 int kvm_arch_hardware_setup(void)
7648 {
7649         int r;
7650
7651         r = kvm_x86_ops->hardware_setup();
7652         if (r != 0)
7653                 return r;
7654
7655         if (kvm_has_tsc_control) {
7656                 /*
7657                  * Make sure the user can only configure tsc_khz values that
7658                  * fit into a signed integer.
7659                  * A min value is not calculated needed because it will always
7660                  * be 1 on all machines.
7661                  */
7662                 u64 max = min(0x7fffffffULL,
7663                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7664                 kvm_max_guest_tsc_khz = max;
7665
7666                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7667         }
7668
7669         kvm_init_msr_list();
7670         return 0;
7671 }
7672
7673 void kvm_arch_hardware_unsetup(void)
7674 {
7675         kvm_x86_ops->hardware_unsetup();
7676 }
7677
7678 void kvm_arch_check_processor_compat(void *rtn)
7679 {
7680         kvm_x86_ops->check_processor_compatibility(rtn);
7681 }
7682
7683 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7684 {
7685         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7686 }
7687 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7688
7689 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7690 {
7691         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7692 }
7693
7694 struct static_key kvm_no_apic_vcpu __read_mostly;
7695 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7696
7697 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7698 {
7699         struct page *page;
7700         struct kvm *kvm;
7701         int r;
7702
7703         BUG_ON(vcpu->kvm == NULL);
7704         kvm = vcpu->kvm;
7705
7706         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7707         vcpu->arch.pv.pv_unhalted = false;
7708         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7709         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7710                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7711         else
7712                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7713
7714         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7715         if (!page) {
7716                 r = -ENOMEM;
7717                 goto fail;
7718         }
7719         vcpu->arch.pio_data = page_address(page);
7720
7721         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7722
7723         r = kvm_mmu_create(vcpu);
7724         if (r < 0)
7725                 goto fail_free_pio_data;
7726
7727         if (irqchip_in_kernel(kvm)) {
7728                 r = kvm_create_lapic(vcpu);
7729                 if (r < 0)
7730                         goto fail_mmu_destroy;
7731         } else
7732                 static_key_slow_inc(&kvm_no_apic_vcpu);
7733
7734         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7735                                        GFP_KERNEL);
7736         if (!vcpu->arch.mce_banks) {
7737                 r = -ENOMEM;
7738                 goto fail_free_lapic;
7739         }
7740         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7741
7742         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7743                 r = -ENOMEM;
7744                 goto fail_free_mce_banks;
7745         }
7746
7747         fx_init(vcpu);
7748
7749         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7750         vcpu->arch.pv_time_enabled = false;
7751
7752         vcpu->arch.guest_supported_xcr0 = 0;
7753         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7754
7755         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7756
7757         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7758
7759         kvm_async_pf_hash_reset(vcpu);
7760         kvm_pmu_init(vcpu);
7761
7762         vcpu->arch.pending_external_vector = -1;
7763
7764         kvm_hv_vcpu_init(vcpu);
7765
7766         return 0;
7767
7768 fail_free_mce_banks:
7769         kfree(vcpu->arch.mce_banks);
7770 fail_free_lapic:
7771         kvm_free_lapic(vcpu);
7772 fail_mmu_destroy:
7773         kvm_mmu_destroy(vcpu);
7774 fail_free_pio_data:
7775         free_page((unsigned long)vcpu->arch.pio_data);
7776 fail:
7777         return r;
7778 }
7779
7780 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7781 {
7782         int idx;
7783
7784         kvm_hv_vcpu_uninit(vcpu);
7785         kvm_pmu_destroy(vcpu);
7786         kfree(vcpu->arch.mce_banks);
7787         kvm_free_lapic(vcpu);
7788         idx = srcu_read_lock(&vcpu->kvm->srcu);
7789         kvm_mmu_destroy(vcpu);
7790         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7791         free_page((unsigned long)vcpu->arch.pio_data);
7792         if (!lapic_in_kernel(vcpu))
7793                 static_key_slow_dec(&kvm_no_apic_vcpu);
7794 }
7795
7796 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7797 {
7798         kvm_x86_ops->sched_in(vcpu, cpu);
7799 }
7800
7801 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7802 {
7803         if (type)
7804                 return -EINVAL;
7805
7806         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7807         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7808         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7809         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7810         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7811
7812         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7813         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7814         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7815         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7816                 &kvm->arch.irq_sources_bitmap);
7817
7818         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7819         mutex_init(&kvm->arch.apic_map_lock);
7820         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7821
7822         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
7823         pvclock_update_vm_gtod_copy(kvm);
7824
7825         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7826         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7827
7828         kvm_page_track_init(kvm);
7829         kvm_mmu_init_vm(kvm);
7830
7831         if (kvm_x86_ops->vm_init)
7832                 return kvm_x86_ops->vm_init(kvm);
7833
7834         return 0;
7835 }
7836
7837 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7838 {
7839         int r;
7840         r = vcpu_load(vcpu);
7841         BUG_ON(r);
7842         kvm_mmu_unload(vcpu);
7843         vcpu_put(vcpu);
7844 }
7845
7846 static void kvm_free_vcpus(struct kvm *kvm)
7847 {
7848         unsigned int i;
7849         struct kvm_vcpu *vcpu;
7850
7851         /*
7852          * Unpin any mmu pages first.
7853          */
7854         kvm_for_each_vcpu(i, vcpu, kvm) {
7855                 kvm_clear_async_pf_completion_queue(vcpu);
7856                 kvm_unload_vcpu_mmu(vcpu);
7857         }
7858         kvm_for_each_vcpu(i, vcpu, kvm)
7859                 kvm_arch_vcpu_free(vcpu);
7860
7861         mutex_lock(&kvm->lock);
7862         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7863                 kvm->vcpus[i] = NULL;
7864
7865         atomic_set(&kvm->online_vcpus, 0);
7866         mutex_unlock(&kvm->lock);
7867 }
7868
7869 void kvm_arch_sync_events(struct kvm *kvm)
7870 {
7871         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7872         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7873         kvm_free_all_assigned_devices(kvm);
7874         kvm_free_pit(kvm);
7875 }
7876
7877 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7878 {
7879         int i, r;
7880         unsigned long hva;
7881         struct kvm_memslots *slots = kvm_memslots(kvm);
7882         struct kvm_memory_slot *slot, old;
7883
7884         /* Called with kvm->slots_lock held.  */
7885         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7886                 return -EINVAL;
7887
7888         slot = id_to_memslot(slots, id);
7889         if (size) {
7890                 if (slot->npages)
7891                         return -EEXIST;
7892
7893                 /*
7894                  * MAP_SHARED to prevent internal slot pages from being moved
7895                  * by fork()/COW.
7896                  */
7897                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7898                               MAP_SHARED | MAP_ANONYMOUS, 0);
7899                 if (IS_ERR((void *)hva))
7900                         return PTR_ERR((void *)hva);
7901         } else {
7902                 if (!slot->npages)
7903                         return 0;
7904
7905                 hva = 0;
7906         }
7907
7908         old = *slot;
7909         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7910                 struct kvm_userspace_memory_region m;
7911
7912                 m.slot = id | (i << 16);
7913                 m.flags = 0;
7914                 m.guest_phys_addr = gpa;
7915                 m.userspace_addr = hva;
7916                 m.memory_size = size;
7917                 r = __kvm_set_memory_region(kvm, &m);
7918                 if (r < 0)
7919                         return r;
7920         }
7921
7922         if (!size) {
7923                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7924                 WARN_ON(r < 0);
7925         }
7926
7927         return 0;
7928 }
7929 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7930
7931 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7932 {
7933         int r;
7934
7935         mutex_lock(&kvm->slots_lock);
7936         r = __x86_set_memory_region(kvm, id, gpa, size);
7937         mutex_unlock(&kvm->slots_lock);
7938
7939         return r;
7940 }
7941 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7942
7943 void kvm_arch_destroy_vm(struct kvm *kvm)
7944 {
7945         if (current->mm == kvm->mm) {
7946                 /*
7947                  * Free memory regions allocated on behalf of userspace,
7948                  * unless the the memory map has changed due to process exit
7949                  * or fd copying.
7950                  */
7951                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7952                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7953                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7954         }
7955         if (kvm_x86_ops->vm_destroy)
7956                 kvm_x86_ops->vm_destroy(kvm);
7957         kvm_iommu_unmap_guest(kvm);
7958         kfree(kvm->arch.vpic);
7959         kfree(kvm->arch.vioapic);
7960         kvm_free_vcpus(kvm);
7961         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7962         kvm_mmu_uninit_vm(kvm);
7963 }
7964
7965 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7966                            struct kvm_memory_slot *dont)
7967 {
7968         int i;
7969
7970         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7971                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7972                         kvfree(free->arch.rmap[i]);
7973                         free->arch.rmap[i] = NULL;
7974                 }
7975                 if (i == 0)
7976                         continue;
7977
7978                 if (!dont || free->arch.lpage_info[i - 1] !=
7979                              dont->arch.lpage_info[i - 1]) {
7980                         kvfree(free->arch.lpage_info[i - 1]);
7981                         free->arch.lpage_info[i - 1] = NULL;
7982                 }
7983         }
7984
7985         kvm_page_track_free_memslot(free, dont);
7986 }
7987
7988 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7989                             unsigned long npages)
7990 {
7991         int i;
7992
7993         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7994                 struct kvm_lpage_info *linfo;
7995                 unsigned long ugfn;
7996                 int lpages;
7997                 int level = i + 1;
7998
7999                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8000                                       slot->base_gfn, level) + 1;
8001
8002                 slot->arch.rmap[i] =
8003                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8004                 if (!slot->arch.rmap[i])
8005                         goto out_free;
8006                 if (i == 0)
8007                         continue;
8008
8009                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8010                 if (!linfo)
8011                         goto out_free;
8012
8013                 slot->arch.lpage_info[i - 1] = linfo;
8014
8015                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8016                         linfo[0].disallow_lpage = 1;
8017                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8018                         linfo[lpages - 1].disallow_lpage = 1;
8019                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8020                 /*
8021                  * If the gfn and userspace address are not aligned wrt each
8022                  * other, or if explicitly asked to, disable large page
8023                  * support for this slot
8024                  */
8025                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8026                     !kvm_largepages_enabled()) {
8027                         unsigned long j;
8028
8029                         for (j = 0; j < lpages; ++j)
8030                                 linfo[j].disallow_lpage = 1;
8031                 }
8032         }
8033
8034         if (kvm_page_track_create_memslot(slot, npages))
8035                 goto out_free;
8036
8037         return 0;
8038
8039 out_free:
8040         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8041                 kvfree(slot->arch.rmap[i]);
8042                 slot->arch.rmap[i] = NULL;
8043                 if (i == 0)
8044                         continue;
8045
8046                 kvfree(slot->arch.lpage_info[i - 1]);
8047                 slot->arch.lpage_info[i - 1] = NULL;
8048         }
8049         return -ENOMEM;
8050 }
8051
8052 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8053 {
8054         /*
8055          * memslots->generation has been incremented.
8056          * mmio generation may have reached its maximum value.
8057          */
8058         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8059 }
8060
8061 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8062                                 struct kvm_memory_slot *memslot,
8063                                 const struct kvm_userspace_memory_region *mem,
8064                                 enum kvm_mr_change change)
8065 {
8066         return 0;
8067 }
8068
8069 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8070                                      struct kvm_memory_slot *new)
8071 {
8072         /* Still write protect RO slot */
8073         if (new->flags & KVM_MEM_READONLY) {
8074                 kvm_mmu_slot_remove_write_access(kvm, new);
8075                 return;
8076         }
8077
8078         /*
8079          * Call kvm_x86_ops dirty logging hooks when they are valid.
8080          *
8081          * kvm_x86_ops->slot_disable_log_dirty is called when:
8082          *
8083          *  - KVM_MR_CREATE with dirty logging is disabled
8084          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8085          *
8086          * The reason is, in case of PML, we need to set D-bit for any slots
8087          * with dirty logging disabled in order to eliminate unnecessary GPA
8088          * logging in PML buffer (and potential PML buffer full VMEXT). This
8089          * guarantees leaving PML enabled during guest's lifetime won't have
8090          * any additonal overhead from PML when guest is running with dirty
8091          * logging disabled for memory slots.
8092          *
8093          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8094          * to dirty logging mode.
8095          *
8096          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8097          *
8098          * In case of write protect:
8099          *
8100          * Write protect all pages for dirty logging.
8101          *
8102          * All the sptes including the large sptes which point to this
8103          * slot are set to readonly. We can not create any new large
8104          * spte on this slot until the end of the logging.
8105          *
8106          * See the comments in fast_page_fault().
8107          */
8108         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8109                 if (kvm_x86_ops->slot_enable_log_dirty)
8110                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8111                 else
8112                         kvm_mmu_slot_remove_write_access(kvm, new);
8113         } else {
8114                 if (kvm_x86_ops->slot_disable_log_dirty)
8115                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8116         }
8117 }
8118
8119 void kvm_arch_commit_memory_region(struct kvm *kvm,
8120                                 const struct kvm_userspace_memory_region *mem,
8121                                 const struct kvm_memory_slot *old,
8122                                 const struct kvm_memory_slot *new,
8123                                 enum kvm_mr_change change)
8124 {
8125         int nr_mmu_pages = 0;
8126
8127         if (!kvm->arch.n_requested_mmu_pages)
8128                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8129
8130         if (nr_mmu_pages)
8131                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8132
8133         /*
8134          * Dirty logging tracks sptes in 4k granularity, meaning that large
8135          * sptes have to be split.  If live migration is successful, the guest
8136          * in the source machine will be destroyed and large sptes will be
8137          * created in the destination. However, if the guest continues to run
8138          * in the source machine (for example if live migration fails), small
8139          * sptes will remain around and cause bad performance.
8140          *
8141          * Scan sptes if dirty logging has been stopped, dropping those
8142          * which can be collapsed into a single large-page spte.  Later
8143          * page faults will create the large-page sptes.
8144          */
8145         if ((change != KVM_MR_DELETE) &&
8146                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8147                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8148                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8149
8150         /*
8151          * Set up write protection and/or dirty logging for the new slot.
8152          *
8153          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8154          * been zapped so no dirty logging staff is needed for old slot. For
8155          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8156          * new and it's also covered when dealing with the new slot.
8157          *
8158          * FIXME: const-ify all uses of struct kvm_memory_slot.
8159          */
8160         if (change != KVM_MR_DELETE)
8161                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8162 }
8163
8164 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8165 {
8166         kvm_mmu_invalidate_zap_all_pages(kvm);
8167 }
8168
8169 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8170                                    struct kvm_memory_slot *slot)
8171 {
8172         kvm_mmu_invalidate_zap_all_pages(kvm);
8173 }
8174
8175 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8176 {
8177         if (!list_empty_careful(&vcpu->async_pf.done))
8178                 return true;
8179
8180         if (kvm_apic_has_events(vcpu))
8181                 return true;
8182
8183         if (vcpu->arch.pv.pv_unhalted)
8184                 return true;
8185
8186         if (atomic_read(&vcpu->arch.nmi_queued))
8187                 return true;
8188
8189         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8190                 return true;
8191
8192         if (kvm_arch_interrupt_allowed(vcpu) &&
8193             kvm_cpu_has_interrupt(vcpu))
8194                 return true;
8195
8196         if (kvm_hv_has_stimer_pending(vcpu))
8197                 return true;
8198
8199         return false;
8200 }
8201
8202 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8203 {
8204         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8205                 kvm_x86_ops->check_nested_events(vcpu, false);
8206
8207         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8208 }
8209
8210 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8211 {
8212         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8213 }
8214
8215 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8216 {
8217         return kvm_x86_ops->interrupt_allowed(vcpu);
8218 }
8219
8220 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8221 {
8222         if (is_64_bit_mode(vcpu))
8223                 return kvm_rip_read(vcpu);
8224         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8225                      kvm_rip_read(vcpu));
8226 }
8227 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8228
8229 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8230 {
8231         return kvm_get_linear_rip(vcpu) == linear_rip;
8232 }
8233 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8234
8235 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8236 {
8237         unsigned long rflags;
8238
8239         rflags = kvm_x86_ops->get_rflags(vcpu);
8240         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8241                 rflags &= ~X86_EFLAGS_TF;
8242         return rflags;
8243 }
8244 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8245
8246 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8247 {
8248         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8249             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8250                 rflags |= X86_EFLAGS_TF;
8251         kvm_x86_ops->set_rflags(vcpu, rflags);
8252 }
8253
8254 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8255 {
8256         __kvm_set_rflags(vcpu, rflags);
8257         kvm_make_request(KVM_REQ_EVENT, vcpu);
8258 }
8259 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8260
8261 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8262 {
8263         int r;
8264
8265         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8266               work->wakeup_all)
8267                 return;
8268
8269         r = kvm_mmu_reload(vcpu);
8270         if (unlikely(r))
8271                 return;
8272
8273         if (!vcpu->arch.mmu.direct_map &&
8274               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8275                 return;
8276
8277         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8278 }
8279
8280 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8281 {
8282         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8283 }
8284
8285 static inline u32 kvm_async_pf_next_probe(u32 key)
8286 {
8287         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8288 }
8289
8290 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8291 {
8292         u32 key = kvm_async_pf_hash_fn(gfn);
8293
8294         while (vcpu->arch.apf.gfns[key] != ~0)
8295                 key = kvm_async_pf_next_probe(key);
8296
8297         vcpu->arch.apf.gfns[key] = gfn;
8298 }
8299
8300 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8301 {
8302         int i;
8303         u32 key = kvm_async_pf_hash_fn(gfn);
8304
8305         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8306                      (vcpu->arch.apf.gfns[key] != gfn &&
8307                       vcpu->arch.apf.gfns[key] != ~0); i++)
8308                 key = kvm_async_pf_next_probe(key);
8309
8310         return key;
8311 }
8312
8313 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8314 {
8315         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8316 }
8317
8318 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8319 {
8320         u32 i, j, k;
8321
8322         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8323         while (true) {
8324                 vcpu->arch.apf.gfns[i] = ~0;
8325                 do {
8326                         j = kvm_async_pf_next_probe(j);
8327                         if (vcpu->arch.apf.gfns[j] == ~0)
8328                                 return;
8329                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8330                         /*
8331                          * k lies cyclically in ]i,j]
8332                          * |    i.k.j |
8333                          * |....j i.k.| or  |.k..j i...|
8334                          */
8335                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8336                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8337                 i = j;
8338         }
8339 }
8340
8341 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8342 {
8343
8344         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8345                                       sizeof(val));
8346 }
8347
8348 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8349                                      struct kvm_async_pf *work)
8350 {
8351         struct x86_exception fault;
8352
8353         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8354         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8355
8356         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8357             (vcpu->arch.apf.send_user_only &&
8358              kvm_x86_ops->get_cpl(vcpu) == 0))
8359                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8360         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8361                 fault.vector = PF_VECTOR;
8362                 fault.error_code_valid = true;
8363                 fault.error_code = 0;
8364                 fault.nested_page_fault = false;
8365                 fault.address = work->arch.token;
8366                 kvm_inject_page_fault(vcpu, &fault);
8367         }
8368 }
8369
8370 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8371                                  struct kvm_async_pf *work)
8372 {
8373         struct x86_exception fault;
8374
8375         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8376         if (work->wakeup_all)
8377                 work->arch.token = ~0; /* broadcast wakeup */
8378         else
8379                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8380
8381         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8382             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8383                 fault.vector = PF_VECTOR;
8384                 fault.error_code_valid = true;
8385                 fault.error_code = 0;
8386                 fault.nested_page_fault = false;
8387                 fault.address = work->arch.token;
8388                 kvm_inject_page_fault(vcpu, &fault);
8389         }
8390         vcpu->arch.apf.halted = false;
8391         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8392 }
8393
8394 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8395 {
8396         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8397                 return true;
8398         else
8399                 return !kvm_event_needs_reinjection(vcpu) &&
8400                         kvm_x86_ops->interrupt_allowed(vcpu);
8401 }
8402
8403 void kvm_arch_start_assignment(struct kvm *kvm)
8404 {
8405         atomic_inc(&kvm->arch.assigned_device_count);
8406 }
8407 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8408
8409 void kvm_arch_end_assignment(struct kvm *kvm)
8410 {
8411         atomic_dec(&kvm->arch.assigned_device_count);
8412 }
8413 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8414
8415 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8416 {
8417         return atomic_read(&kvm->arch.assigned_device_count);
8418 }
8419 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8420
8421 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8422 {
8423         atomic_inc(&kvm->arch.noncoherent_dma_count);
8424 }
8425 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8426
8427 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8428 {
8429         atomic_dec(&kvm->arch.noncoherent_dma_count);
8430 }
8431 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8432
8433 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8434 {
8435         return atomic_read(&kvm->arch.noncoherent_dma_count);
8436 }
8437 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8438
8439 bool kvm_arch_has_irq_bypass(void)
8440 {
8441         return kvm_x86_ops->update_pi_irte != NULL;
8442 }
8443
8444 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8445                                       struct irq_bypass_producer *prod)
8446 {
8447         struct kvm_kernel_irqfd *irqfd =
8448                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8449
8450         irqfd->producer = prod;
8451
8452         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8453                                            prod->irq, irqfd->gsi, 1);
8454 }
8455
8456 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8457                                       struct irq_bypass_producer *prod)
8458 {
8459         int ret;
8460         struct kvm_kernel_irqfd *irqfd =
8461                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8462
8463         WARN_ON(irqfd->producer != prod);
8464         irqfd->producer = NULL;
8465
8466         /*
8467          * When producer of consumer is unregistered, we change back to
8468          * remapped mode, so we can re-use the current implementation
8469          * when the irq is masked/disabled or the consumer side (KVM
8470          * int this case doesn't want to receive the interrupts.
8471         */
8472         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8473         if (ret)
8474                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8475                        " fails: %d\n", irqfd->consumer.token, ret);
8476 }
8477
8478 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8479                                    uint32_t guest_irq, bool set)
8480 {
8481         if (!kvm_x86_ops->update_pi_irte)
8482                 return -EINVAL;
8483
8484         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8485 }
8486
8487 bool kvm_vector_hashing_enabled(void)
8488 {
8489         return vector_hashing;
8490 }
8491 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8492
8493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8499 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8500 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8501 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8502 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8503 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8504 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8505 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8506 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8507 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8508 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8509 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8510 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8511 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);