arch/x86/kvm/cpuid.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  * cpuid support routines
   5  *
   6  * derived from arch/x86/kvm/x86.c
   7  *
   8  * Copyright 2011 Red Hat, Inc. and/or its affiliates.
   9  * Copyright IBM Corporation, 2008
  10  */
  11
  12 #include <linux/kvm_host.h>
  13 #include <linux/export.h>
  14 #include <linux/vmalloc.h>
  15 #include <linux/uaccess.h>
  16 #include <linux/sched/stat.h>
  17
  18 #include <asm/processor.h>
  19 #include <asm/user.h>
  20 #include <asm/fpu/xstate.h>
  21 #include "cpuid.h"
  22 #include "lapic.h"
  23 #include "mmu.h"
  24 #include "trace.h"
  25 #include "pmu.h"
  26
  27 /*
  28  * Unlike "struct cpuinfo_x86.x86_capability", kvm_cpu_caps doesn't need to be
  29  * aligned to sizeof(unsigned long) because it's not accessed via bitops.
  30  */
  31 u32 kvm_cpu_caps[NCAPINTS] __read_mostly;
  32 EXPORT_SYMBOL_GPL(kvm_cpu_caps);
  33
  34 static u32 xstate_required_size(u64 xstate_bv, bool compacted)
  35 {
  36         int feature_bit = 0;
  37         u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
  38
  39         xstate_bv &= XFEATURE_MASK_EXTEND;
  40         while (xstate_bv) {
  41                 if (xstate_bv & 0x1) {
  42                         u32 eax, ebx, ecx, edx, offset;
  43                         cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
  44                         offset = compacted ? ret : ebx;
  45                         ret = max(ret, offset + eax);
  46                 }
  47
  48                 xstate_bv >>= 1;
  49                 feature_bit++;
  50         }
  51
  52         return ret;
  53 }
  54
  55 #define F feature_bit
  56
  57 static inline struct kvm_cpuid_entry2 *cpuid_entry2_find(
  58         struct kvm_cpuid_entry2 *entries, int nent, u32 function, u32 index)
  59 {
  60         struct kvm_cpuid_entry2 *e;
  61         int i;
  62
  63         for (i = 0; i < nent; i++) {
  64                 e = &entries[i];
  65
  66                 if (e->function == function && (e->index == index ||
  67                     !(e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX)))
  68                         return e;
  69         }
  70
  71         return NULL;
  72 }
  73
  74 static int kvm_check_cpuid(struct kvm_cpuid_entry2 *entries, int nent)
  75 {
  76         struct kvm_cpuid_entry2 *best;
  77
  78         /*
  79          * The existing code assumes virtual address is 48-bit or 57-bit in the
  80          * canonical address checks; exit if it is ever changed.
  81          */
  82         best = cpuid_entry2_find(entries, nent, 0x80000008, 0);
  83         if (best) {
  84                 int vaddr_bits = (best->eax & 0xff00) >> 8;
  85
  86                 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
  87                         return -EINVAL;
  88         }
  89
  90         return 0;
  91 }
  92
  93 void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
  94 {
  95         struct kvm_cpuid_entry2 *best;
  96
  97         best = kvm_find_cpuid_entry(vcpu, 1, 0);
  98         if (best) {
  99                 /* Update OSXSAVE bit */
 100                 if (boot_cpu_has(X86_FEATURE_XSAVE))
 101                         cpuid_entry_change(best, X86_FEATURE_OSXSAVE,
 102                                    kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE));
 103
 104                 cpuid_entry_change(best, X86_FEATURE_APIC,
 105                            vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
 106         }
 107
 108         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 109         if (best && boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7)
 110                 cpuid_entry_change(best, X86_FEATURE_OSPKE,
 111                                    kvm_read_cr4_bits(vcpu, X86_CR4_PKE));
 112
 113         best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
 114         if (best)
 115                 best->ebx = xstate_required_size(vcpu->arch.xcr0, false);
 116
 117         best = kvm_find_cpuid_entry(vcpu, 0xD, 1);
 118         if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
 119                      cpuid_entry_has(best, X86_FEATURE_XSAVEC)))
 120                 best->ebx = xstate_required_size(vcpu->arch.xcr0, true);
 121
 122         best = kvm_find_cpuid_entry(vcpu, KVM_CPUID_FEATURES, 0);
 123         if (kvm_hlt_in_guest(vcpu->kvm) && best &&
 124                 (best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
 125                 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
 126
 127         /*
 128          * save the feature bitmap to avoid cpuid lookup for every PV
 129          * operation
 130          */
 131         if (best)
 132                 vcpu->arch.pv_cpuid.features = best->eax;
 133
 134         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
 135                 best = kvm_find_cpuid_entry(vcpu, 0x1, 0);
 136                 if (best)
 137                         cpuid_entry_change(best, X86_FEATURE_MWAIT,
 138                                            vcpu->arch.ia32_misc_enable_msr &
 139                                            MSR_IA32_MISC_ENABLE_MWAIT);
 140         }
 141 }
 142
 143 static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
 144 {
 145         struct kvm_lapic *apic = vcpu->arch.apic;
 146         struct kvm_cpuid_entry2 *best;
 147
 148         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 149         if (best && apic) {
 150                 if (cpuid_entry_has(best, X86_FEATURE_TSC_DEADLINE_TIMER))
 151                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 152                 else
 153                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 154
 155                 kvm_apic_set_version(vcpu);
 156         }
 157
 158         best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
 159         if (!best)
 160                 vcpu->arch.guest_supported_xcr0 = 0;
 161         else
 162                 vcpu->arch.guest_supported_xcr0 =
 163                         (best->eax | ((u64)best->edx << 32)) & supported_xcr0;
 164
 165         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
 166         kvm_mmu_reset_context(vcpu);
 167
 168         kvm_pmu_refresh(vcpu);
 169         vcpu->arch.cr4_guest_rsvd_bits =
 170             __cr4_reserved_bits(guest_cpuid_has, vcpu);
 171
 172         /* Invoke the vendor callback only after the above state is updated. */
 173         kvm_x86_ops.vcpu_after_set_cpuid(vcpu);
 174 }
 175
 176 static int is_efer_nx(void)
 177 {
 178         return host_efer & EFER_NX;
 179 }
 180
 181 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
 182 {
 183         int i;
 184         struct kvm_cpuid_entry2 *e, *entry;
 185
 186         entry = NULL;
 187         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
 188                 e = &vcpu->arch.cpuid_entries[i];
 189                 if (e->function == 0x80000001) {
 190                         entry = e;
 191                         break;
 192                 }
 193         }
 194         if (entry && cpuid_entry_has(entry, X86_FEATURE_NX) && !is_efer_nx()) {
 195                 cpuid_entry_clear(entry, X86_FEATURE_NX);
 196                 printk(KERN_INFO "kvm: guest NX capability removed\n");
 197         }
 198 }
 199
 200 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
 201 {
 202         struct kvm_cpuid_entry2 *best;
 203
 204         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
 205         if (!best || best->eax < 0x80000008)
 206                 goto not_found;
 207         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
 208         if (best)
 209                 return best->eax & 0xff;
 210 not_found:
 211         return 36;
 212 }
 213
 214 /* when an old userspace process fills a new kernel module */
 215 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
 216                              struct kvm_cpuid *cpuid,
 217                              struct kvm_cpuid_entry __user *entries)
 218 {
 219         int r, i;
 220         struct kvm_cpuid_entry *e = NULL;
 221         struct kvm_cpuid_entry2 *e2 = NULL;
 222
 223         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
 224                 return -E2BIG;
 225
 226         if (cpuid->nent) {
 227                 e = vmemdup_user(entries, array_size(sizeof(*e), cpuid->nent));
 228                 if (IS_ERR(e))
 229                         return PTR_ERR(e);
 230
 231                 e2 = kvmalloc_array(cpuid->nent, sizeof(*e2), GFP_KERNEL_ACCOUNT);
 232                 if (!e2) {
 233                         r = -ENOMEM;
 234                         goto out_free_cpuid;
 235                 }
 236         }
 237         for (i = 0; i < cpuid->nent; i++) {
 238                 e2[i].function = e[i].function;
 239                 e2[i].eax = e[i].eax;
 240                 e2[i].ebx = e[i].ebx;
 241                 e2[i].ecx = e[i].ecx;
 242                 e2[i].edx = e[i].edx;
 243                 e2[i].index = 0;
 244                 e2[i].flags = 0;
 245                 e2[i].padding[0] = 0;
 246                 e2[i].padding[1] = 0;
 247                 e2[i].padding[2] = 0;
 248         }
 249
 250         r = kvm_check_cpuid(e2, cpuid->nent);
 251         if (r) {
 252                 kvfree(e2);
 253                 goto out_free_cpuid;
 254         }
 255
 256         kvfree(vcpu->arch.cpuid_entries);
 257         vcpu->arch.cpuid_entries = e2;
 258         vcpu->arch.cpuid_nent = cpuid->nent;
 259
 260         cpuid_fix_nx_cap(vcpu);
 261         kvm_update_cpuid_runtime(vcpu);
 262         kvm_vcpu_after_set_cpuid(vcpu);
 263
 264 out_free_cpuid:
 265         kvfree(e);
 266
 267         return r;
 268 }
 269
 270 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
 271                               struct kvm_cpuid2 *cpuid,
 272                               struct kvm_cpuid_entry2 __user *entries)
 273 {
 274         struct kvm_cpuid_entry2 *e2 = NULL;
 275         int r;
 276
 277         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
 278                 return -E2BIG;
 279
 280         if (cpuid->nent) {
 281                 e2 = vmemdup_user(entries, array_size(sizeof(*e2), cpuid->nent));
 282                 if (IS_ERR(e2))
 283                         return PTR_ERR(e2);
 284         }
 285
 286         r = kvm_check_cpuid(e2, cpuid->nent);
 287         if (r) {
 288                 kvfree(e2);
 289                 return r;
 290         }
 291
 292         kvfree(vcpu->arch.cpuid_entries);
 293         vcpu->arch.cpuid_entries = e2;
 294         vcpu->arch.cpuid_nent = cpuid->nent;
 295
 296         kvm_update_cpuid_runtime(vcpu);
 297         kvm_vcpu_after_set_cpuid(vcpu);
 298
 299         return 0;
 300 }
 301
 302 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
 303                               struct kvm_cpuid2 *cpuid,
 304                               struct kvm_cpuid_entry2 __user *entries)
 305 {
 306         int r;
 307
 308         r = -E2BIG;
 309         if (cpuid->nent < vcpu->arch.cpuid_nent)
 310                 goto out;
 311         r = -EFAULT;
 312         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
 313                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
 314                 goto out;
 315         return 0;
 316
 317 out:
 318         cpuid->nent = vcpu->arch.cpuid_nent;
 319         return r;
 320 }
 321
 322 static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
 323 {
 324         const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32);
 325         struct kvm_cpuid_entry2 entry;
 326
 327         reverse_cpuid_check(leaf);
 328         kvm_cpu_caps[leaf] &= mask;
 329
 330         cpuid_count(cpuid.function, cpuid.index,
 331                     &entry.eax, &entry.ebx, &entry.ecx, &entry.edx);
 332
 333         kvm_cpu_caps[leaf] &= *__cpuid_entry_get_reg(&entry, cpuid.reg);
 334 }
 335
 336 void kvm_set_cpu_caps(void)
 337 {
 338         unsigned int f_nx = is_efer_nx() ? F(NX) : 0;
 339 #ifdef CONFIG_X86_64
 340         unsigned int f_gbpages = F(GBPAGES);
 341         unsigned int f_lm = F(LM);
 342 #else
 343         unsigned int f_gbpages = 0;
 344         unsigned int f_lm = 0;
 345 #endif
 346
 347         BUILD_BUG_ON(sizeof(kvm_cpu_caps) >
 348                      sizeof(boot_cpu_data.x86_capability));
 349
 350         memcpy(&kvm_cpu_caps, &boot_cpu_data.x86_capability,
 351                sizeof(kvm_cpu_caps));
 352
 353         kvm_cpu_cap_mask(CPUID_1_ECX,
 354                 /*
 355                  * NOTE: MONITOR (and MWAIT) are emulated as NOP, but *not*
 356                  * advertised to guests via CPUID!
 357                  */
 358                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
 359                 0 /* DS-CPL, VMX, SMX, EST */ |
 360                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
 361                 F(FMA) | F(CX16) | 0 /* xTPR Update */ | F(PDCM) |
 362                 F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
 363                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
 364                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
 365                 F(F16C) | F(RDRAND)
 366         );
 367         /* KVM emulates x2apic in software irrespective of host support. */
 368         kvm_cpu_cap_set(X86_FEATURE_X2APIC);
 369
 370         kvm_cpu_cap_mask(CPUID_1_EDX,
 371                 F(FPU) | F(VME) | F(DE) | F(PSE) |
 372                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
 373                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
 374                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
 375                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
 376                 0 /* Reserved, DS, ACPI */ | F(MMX) |
 377                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
 378                 0 /* HTT, TM, Reserved, PBE */
 379         );
 380
 381         kvm_cpu_cap_mask(CPUID_7_0_EBX,
 382                 F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) |
 383                 F(BMI2) | F(ERMS) | 0 /*INVPCID*/ | F(RTM) | 0 /*MPX*/ | F(RDSEED) |
 384                 F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
 385                 F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
 386                 F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | 0 /*INTEL_PT*/
 387         );
 388
 389         kvm_cpu_cap_mask(CPUID_7_ECX,
 390                 F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
 391                 F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
 392                 F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
 393                 F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/
 394         );
 395         /* Set LA57 based on hardware capability. */
 396         if (cpuid_ecx(7) & F(LA57))
 397                 kvm_cpu_cap_set(X86_FEATURE_LA57);
 398
 399         /*
 400          * PKU not yet implemented for shadow paging and requires OSPKE
 401          * to be set on the host. Clear it if that is not the case
 402          */
 403         if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
 404                 kvm_cpu_cap_clear(X86_FEATURE_PKU);
 405
 406         kvm_cpu_cap_mask(CPUID_7_EDX,
 407                 F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
 408                 F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
 409                 F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
 410                 F(SERIALIZE) | F(TSXLDTRK)
 411         );
 412
 413         /* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
 414         kvm_cpu_cap_set(X86_FEATURE_TSC_ADJUST);
 415         kvm_cpu_cap_set(X86_FEATURE_ARCH_CAPABILITIES);
 416
 417         if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
 418                 kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL);
 419         if (boot_cpu_has(X86_FEATURE_STIBP))
 420                 kvm_cpu_cap_set(X86_FEATURE_INTEL_STIBP);
 421         if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
 422                 kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
 423
 424         kvm_cpu_cap_mask(CPUID_7_1_EAX,
 425                 F(AVX512_BF16)
 426         );
 427
 428         kvm_cpu_cap_mask(CPUID_D_1_EAX,
 429                 F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES)
 430         );
 431
 432         kvm_cpu_cap_mask(CPUID_8000_0001_ECX,
 433                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
 434                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
 435                 F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
 436                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
 437                 F(TOPOEXT) | F(PERFCTR_CORE)
 438         );
 439
 440         kvm_cpu_cap_mask(CPUID_8000_0001_EDX,
 441                 F(FPU) | F(VME) | F(DE) | F(PSE) |
 442                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
 443                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
 444                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
 445                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
 446                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
 447                 F(FXSR) | F(FXSR_OPT) | f_gbpages | F(RDTSCP) |
 448                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW)
 449         );
 450
 451         if (!tdp_enabled && IS_ENABLED(CONFIG_X86_64))
 452                 kvm_cpu_cap_set(X86_FEATURE_GBPAGES);
 453
 454         kvm_cpu_cap_mask(CPUID_8000_0008_EBX,
 455                 F(CLZERO) | F(XSAVEERPTR) |
 456                 F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
 457                 F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON)
 458         );
 459
 460         /*
 461          * AMD has separate bits for each SPEC_CTRL bit.
 462          * arch/x86/kernel/cpu/bugs.c is kind enough to
 463          * record that in cpufeatures so use them.
 464          */
 465         if (boot_cpu_has(X86_FEATURE_IBPB))
 466                 kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB);
 467         if (boot_cpu_has(X86_FEATURE_IBRS))
 468                 kvm_cpu_cap_set(X86_FEATURE_AMD_IBRS);
 469         if (boot_cpu_has(X86_FEATURE_STIBP))
 470                 kvm_cpu_cap_set(X86_FEATURE_AMD_STIBP);
 471         if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
 472                 kvm_cpu_cap_set(X86_FEATURE_AMD_SSBD);
 473         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
 474                 kvm_cpu_cap_set(X86_FEATURE_AMD_SSB_NO);
 475         /*
 476          * The preference is to use SPEC CTRL MSR instead of the
 477          * VIRT_SPEC MSR.
 478          */
 479         if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
 480             !boot_cpu_has(X86_FEATURE_AMD_SSBD))
 481                 kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
 482
 483         /*
 484          * Hide all SVM features by default, SVM will set the cap bits for
 485          * features it emulates and/or exposes for L1.
 486          */
 487         kvm_cpu_cap_mask(CPUID_8000_000A_EDX, 0);
 488
 489         kvm_cpu_cap_mask(CPUID_C000_0001_EDX,
 490                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
 491                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
 492                 F(PMM) | F(PMM_EN)
 493         );
 494 }
 495 EXPORT_SYMBOL_GPL(kvm_set_cpu_caps);
 496
 497 struct kvm_cpuid_array {
 498         struct kvm_cpuid_entry2 *entries;
 499         int maxnent;
 500         int nent;
 501 };
 502
 503 static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array,
 504                                               u32 function, u32 index)
 505 {
 506         struct kvm_cpuid_entry2 *entry;
 507
 508         if (array->nent >= array->maxnent)
 509                 return NULL;
 510
 511         entry = &array->entries[array->nent++];
 512
 513         entry->function = function;
 514         entry->index = index;
 515         entry->flags = 0;
 516
 517         cpuid_count(entry->function, entry->index,
 518                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
 519
 520         switch (function) {
 521         case 4:
 522         case 7:
 523         case 0xb:
 524         case 0xd:
 525         case 0xf:
 526         case 0x10:
 527         case 0x12:
 528         case 0x14:
 529         case 0x17:
 530         case 0x18:
 531         case 0x1f:
 532         case 0x8000001d:
 533                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
 534                 break;
 535         }
 536
 537         return entry;
 538 }
 539
 540 static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func)
 541 {
 542         struct kvm_cpuid_entry2 *entry;
 543
 544         if (array->nent >= array->maxnent)
 545                 return -E2BIG;
 546
 547         entry = &array->entries[array->nent];
 548         entry->function = func;
 549         entry->index = 0;
 550         entry->flags = 0;
 551
 552         switch (func) {
 553         case 0:
 554                 entry->eax = 7;
 555                 ++array->nent;
 556                 break;
 557         case 1:
 558                 entry->ecx = F(MOVBE);
 559                 ++array->nent;
 560                 break;
 561         case 7:
 562                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
 563                 entry->eax = 0;
 564                 entry->ecx = F(RDPID);
 565                 ++array->nent;
 566         default:
 567                 break;
 568         }
 569
 570         return 0;
 571 }
 572
 573 static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
 574 {
 575         struct kvm_cpuid_entry2 *entry;
 576         int r, i, max_idx;
 577
 578         /* all calls to cpuid_count() should be made on the same cpu */
 579         get_cpu();
 580
 581         r = -E2BIG;
 582
 583         entry = do_host_cpuid(array, function, 0);
 584         if (!entry)
 585                 goto out;
 586
 587         switch (function) {
 588         case 0:
 589                 /* Limited to the highest leaf implemented in KVM. */
 590                 entry->eax = min(entry->eax, 0x1fU);
 591                 break;
 592         case 1:
 593                 cpuid_entry_override(entry, CPUID_1_EDX);
 594                 cpuid_entry_override(entry, CPUID_1_ECX);
 595                 break;
 596         case 2:
 597                 /*
 598                  * On ancient CPUs, function 2 entries are STATEFUL.  That is,
 599                  * CPUID(function=2, index=0) may return different results each
 600                  * time, with the least-significant byte in EAX enumerating the
 601                  * number of times software should do CPUID(2, 0).
 602                  *
 603                  * Modern CPUs, i.e. every CPU KVM has *ever* run on are less
 604                  * idiotic.  Intel's SDM states that EAX & 0xff "will always
 605                  * return 01H. Software should ignore this value and not
 606                  * interpret it as an informational descriptor", while AMD's
 607                  * APM states that CPUID(2) is reserved.
 608                  *
 609                  * WARN if a frankenstein CPU that supports virtualization and
 610                  * a stateful CPUID.0x2 is encountered.
 611                  */
 612                 WARN_ON_ONCE((entry->eax & 0xff) > 1);
 613                 break;
 614         /* functions 4 and 0x8000001d have additional index. */
 615         case 4:
 616         case 0x8000001d:
 617                 /*
 618                  * Read entries until the cache type in the previous entry is
 619                  * zero, i.e. indicates an invalid entry.
 620                  */
 621                 for (i = 1; entry->eax & 0x1f; ++i) {
 622                         entry = do_host_cpuid(array, function, i);
 623                         if (!entry)
 624                                 goto out;
 625                 }
 626                 break;
 627         case 6: /* Thermal management */
 628                 entry->eax = 0x4; /* allow ARAT */
 629                 entry->ebx = 0;
 630                 entry->ecx = 0;
 631                 entry->edx = 0;
 632                 break;
 633         /* function 7 has additional index. */
 634         case 7:
 635                 entry->eax = min(entry->eax, 1u);
 636                 cpuid_entry_override(entry, CPUID_7_0_EBX);
 637                 cpuid_entry_override(entry, CPUID_7_ECX);
 638                 cpuid_entry_override(entry, CPUID_7_EDX);
 639
 640                 /* KVM only supports 0x7.0 and 0x7.1, capped above via min(). */
 641                 if (entry->eax == 1) {
 642                         entry = do_host_cpuid(array, function, 1);
 643                         if (!entry)
 644                                 goto out;
 645
 646                         cpuid_entry_override(entry, CPUID_7_1_EAX);
 647                         entry->ebx = 0;
 648                         entry->ecx = 0;
 649                         entry->edx = 0;
 650                 }
 651                 break;
 652         case 9:
 653                 break;
 654         case 0xa: { /* Architectural Performance Monitoring */
 655                 struct x86_pmu_capability cap;
 656                 union cpuid10_eax eax;
 657                 union cpuid10_edx edx;
 658
 659                 perf_get_x86_pmu_capability(&cap);
 660
 661                 /*
 662                  * Only support guest architectural pmu on a host
 663                  * with architectural pmu.
 664                  */
 665                 if (!cap.version)
 666                         memset(&cap, 0, sizeof(cap));
 667
 668                 eax.split.version_id = min(cap.version, 2);
 669                 eax.split.num_counters = cap.num_counters_gp;
 670                 eax.split.bit_width = cap.bit_width_gp;
 671                 eax.split.mask_length = cap.events_mask_len;
 672
 673                 edx.split.num_counters_fixed = min(cap.num_counters_fixed, MAX_FIXED_COUNTERS);
 674                 edx.split.bit_width_fixed = cap.bit_width_fixed;
 675                 edx.split.reserved = 0;
 676
 677                 entry->eax = eax.full;
 678                 entry->ebx = cap.events_mask;
 679                 entry->ecx = 0;
 680                 entry->edx = edx.full;
 681                 break;
 682         }
 683         /*
 684          * Per Intel's SDM, the 0x1f is a superset of 0xb,
 685          * thus they can be handled by common code.
 686          */
 687         case 0x1f:
 688         case 0xb:
 689                 /*
 690                  * Populate entries until the level type (ECX[15:8]) of the
 691                  * previous entry is zero.  Note, CPUID EAX.{0x1f,0xb}.0 is
 692                  * the starting entry, filled by the primary do_host_cpuid().
 693                  */
 694                 for (i = 1; entry->ecx & 0xff00; ++i) {
 695                         entry = do_host_cpuid(array, function, i);
 696                         if (!entry)
 697                                 goto out;
 698                 }
 699                 break;
 700         case 0xd:
 701                 entry->eax &= supported_xcr0;
 702                 entry->ebx = xstate_required_size(supported_xcr0, false);
 703                 entry->ecx = entry->ebx;
 704                 entry->edx &= supported_xcr0 >> 32;
 705                 if (!supported_xcr0)
 706                         break;
 707
 708                 entry = do_host_cpuid(array, function, 1);
 709                 if (!entry)
 710                         goto out;
 711
 712                 cpuid_entry_override(entry, CPUID_D_1_EAX);
 713                 if (entry->eax & (F(XSAVES)|F(XSAVEC)))
 714                         entry->ebx = xstate_required_size(supported_xcr0 | supported_xss,
 715                                                           true);
 716                 else {
 717                         WARN_ON_ONCE(supported_xss != 0);
 718                         entry->ebx = 0;
 719                 }
 720                 entry->ecx &= supported_xss;
 721                 entry->edx &= supported_xss >> 32;
 722
 723                 for (i = 2; i < 64; ++i) {
 724                         bool s_state;
 725                         if (supported_xcr0 & BIT_ULL(i))
 726                                 s_state = false;
 727                         else if (supported_xss & BIT_ULL(i))
 728                                 s_state = true;
 729                         else
 730                                 continue;
 731
 732                         entry = do_host_cpuid(array, function, i);
 733                         if (!entry)
 734                                 goto out;
 735
 736                         /*
 737                          * The supported check above should have filtered out
 738                          * invalid sub-leafs.  Only valid sub-leafs should
 739                          * reach this point, and they should have a non-zero
 740                          * save state size.  Furthermore, check whether the
 741                          * processor agrees with supported_xcr0/supported_xss
 742                          * on whether this is an XCR0- or IA32_XSS-managed area.
 743                          */
 744                         if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {
 745                                 --array->nent;
 746                                 continue;
 747                         }
 748                         entry->edx = 0;
 749                 }
 750                 break;
 751         /* Intel PT */
 752         case 0x14:
 753                 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) {
 754                         entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
 755                         break;
 756                 }
 757
 758                 for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
 759                         if (!do_host_cpuid(array, function, i))
 760                                 goto out;
 761                 }
 762                 break;
 763         case KVM_CPUID_SIGNATURE: {
 764                 static const char signature[12] = "KVMKVMKVM\0\0";
 765                 const u32 *sigptr = (const u32 *)signature;
 766                 entry->eax = KVM_CPUID_FEATURES;
 767                 entry->ebx = sigptr[0];
 768                 entry->ecx = sigptr[1];
 769                 entry->edx = sigptr[2];
 770                 break;
 771         }
 772         case KVM_CPUID_FEATURES:
 773                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
 774                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
 775                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
 776                              (1 << KVM_FEATURE_ASYNC_PF) |
 777                              (1 << KVM_FEATURE_PV_EOI) |
 778                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
 779                              (1 << KVM_FEATURE_PV_UNHALT) |
 780                              (1 << KVM_FEATURE_PV_TLB_FLUSH) |
 781                              (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
 782                              (1 << KVM_FEATURE_PV_SEND_IPI) |
 783                              (1 << KVM_FEATURE_POLL_CONTROL) |
 784                              (1 << KVM_FEATURE_PV_SCHED_YIELD) |
 785                              (1 << KVM_FEATURE_ASYNC_PF_INT);
 786
 787                 if (sched_info_on())
 788                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
 789
 790                 entry->ebx = 0;
 791                 entry->ecx = 0;
 792                 entry->edx = 0;
 793                 break;
 794         case 0x80000000:
 795                 entry->eax = min(entry->eax, 0x8000001f);
 796                 break;
 797         case 0x80000001:
 798                 cpuid_entry_override(entry, CPUID_8000_0001_EDX);
 799                 cpuid_entry_override(entry, CPUID_8000_0001_ECX);
 800                 break;
 801         case 0x80000006:
 802                 /* L2 cache and TLB: pass through host info. */
 803                 break;
 804         case 0x80000007: /* Advanced power management */
 805                 /* invariant TSC is CPUID.80000007H:EDX[8] */
 806                 entry->edx &= (1 << 8);
 807                 /* mask against host */
 808                 entry->edx &= boot_cpu_data.x86_power;
 809                 entry->eax = entry->ebx = entry->ecx = 0;
 810                 break;
 811         case 0x80000008: {
 812                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
 813                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
 814                 unsigned phys_as = entry->eax & 0xff;
 815
 816                 if (!g_phys_as)
 817                         g_phys_as = phys_as;
 818                 entry->eax = g_phys_as | (virt_as << 8);
 819                 entry->edx = 0;
 820                 cpuid_entry_override(entry, CPUID_8000_0008_EBX);
 821                 break;
 822         }
 823         case 0x8000000A:
 824                 if (!kvm_cpu_cap_has(X86_FEATURE_SVM)) {
 825                         entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
 826                         break;
 827                 }
 828                 entry->eax = 1; /* SVM revision 1 */
 829                 entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
 830                                    ASID emulation to nested SVM */
 831                 entry->ecx = 0; /* Reserved */
 832                 cpuid_entry_override(entry, CPUID_8000_000A_EDX);
 833                 break;
 834         case 0x80000019:
 835                 entry->ecx = entry->edx = 0;
 836                 break;
 837         case 0x8000001a:
 838         case 0x8000001e:
 839                 break;
 840         /* Support memory encryption cpuid if host supports it */
 841         case 0x8000001F:
 842                 if (!boot_cpu_has(X86_FEATURE_SEV))
 843                         entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
 844                 break;
 845         /*Add support for Centaur's CPUID instruction*/
 846         case 0xC0000000:
 847                 /*Just support up to 0xC0000004 now*/
 848                 entry->eax = min(entry->eax, 0xC0000004);
 849                 break;
 850         case 0xC0000001:
 851                 cpuid_entry_override(entry, CPUID_C000_0001_EDX);
 852                 break;
 853         case 3: /* Processor serial number */
 854         case 5: /* MONITOR/MWAIT */
 855         case 0xC0000002:
 856         case 0xC0000003:
 857         case 0xC0000004:
 858         default:
 859                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
 860                 break;
 861         }
 862
 863         r = 0;
 864
 865 out:
 866         put_cpu();
 867
 868         return r;
 869 }
 870
 871 static int do_cpuid_func(struct kvm_cpuid_array *array, u32 func,
 872                          unsigned int type)
 873 {
 874         if (type == KVM_GET_EMULATED_CPUID)
 875                 return __do_cpuid_func_emulated(array, func);
 876
 877         return __do_cpuid_func(array, func);
 878 }
 879
 880 #define CENTAUR_CPUID_SIGNATURE 0xC0000000
 881
 882 static int get_cpuid_func(struct kvm_cpuid_array *array, u32 func,
 883                           unsigned int type)
 884 {
 885         u32 limit;
 886         int r;
 887
 888         if (func == CENTAUR_CPUID_SIGNATURE &&
 889             boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR)
 890                 return 0;
 891
 892         r = do_cpuid_func(array, func, type);
 893         if (r)
 894                 return r;
 895
 896         limit = array->entries[array->nent - 1].eax;
 897         for (func = func + 1; func <= limit; ++func) {
 898                 r = do_cpuid_func(array, func, type);
 899                 if (r)
 900                         break;
 901         }
 902
 903         return r;
 904 }
 905
 906 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
 907                                  __u32 num_entries, unsigned int ioctl_type)
 908 {
 909         int i;
 910         __u32 pad[3];
 911
 912         if (ioctl_type != KVM_GET_EMULATED_CPUID)
 913                 return false;
 914
 915         /*
 916          * We want to make sure that ->padding is being passed clean from
 917          * userspace in case we want to use it for something in the future.
 918          *
 919          * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
 920          * have to give ourselves satisfied only with the emulated side. /me
 921          * sheds a tear.
 922          */
 923         for (i = 0; i < num_entries; i++) {
 924                 if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
 925                         return true;
 926
 927                 if (pad[0] || pad[1] || pad[2])
 928                         return true;
 929         }
 930         return false;
 931 }
 932
 933 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
 934                             struct kvm_cpuid_entry2 __user *entries,
 935                             unsigned int type)
 936 {
 937         static const u32 funcs[] = {
 938                 0, 0x80000000, CENTAUR_CPUID_SIGNATURE, KVM_CPUID_SIGNATURE,
 939         };
 940
 941         struct kvm_cpuid_array array = {
 942                 .nent = 0,
 943         };
 944         int r, i;
 945
 946         if (cpuid->nent < 1)
 947                 return -E2BIG;
 948         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
 949                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
 950
 951         if (sanity_check_entries(entries, cpuid->nent, type))
 952                 return -EINVAL;
 953
 954         array.entries = vzalloc(array_size(sizeof(struct kvm_cpuid_entry2),
 955                                            cpuid->nent));
 956         if (!array.entries)
 957                 return -ENOMEM;
 958
 959         array.maxnent = cpuid->nent;
 960
 961         for (i = 0; i < ARRAY_SIZE(funcs); i++) {
 962                 r = get_cpuid_func(&array, funcs[i], type);
 963                 if (r)
 964                         goto out_free;
 965         }
 966         cpuid->nent = array.nent;
 967
 968         if (copy_to_user(entries, array.entries,
 969                          array.nent * sizeof(struct kvm_cpuid_entry2)))
 970                 r = -EFAULT;
 971
 972 out_free:
 973         vfree(array.entries);
 974         return r;
 975 }
 976
 977 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
 978                                               u32 function, u32 index)
 979 {
 980         return cpuid_entry2_find(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent,
 981                                  function, index);
 982 }
 983 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
 984
 985 /*
 986  * Intel CPUID semantics treats any query for an out-of-range leaf as if the
 987  * highest basic leaf (i.e. CPUID.0H:EAX) were requested.  AMD CPUID semantics
 988  * returns all zeroes for any undefined leaf, whether or not the leaf is in
 989  * range.  Centaur/VIA follows Intel semantics.
 990  *
 991  * A leaf is considered out-of-range if its function is higher than the maximum
 992  * supported leaf of its associated class or if its associated class does not
 993  * exist.
 994  *
 995  * There are three primary classes to be considered, with their respective
 996  * ranges described as "<base> - <top>[,<base2> - <top2>] inclusive.  A primary
 997  * class exists if a guest CPUID entry for its <base> leaf exists.  For a given
 998  * class, CPUID.<base>.EAX contains the max supported leaf for the class.
 999  *
1000  *  - Basic:      0x00000000 - 0x3fffffff, 0x50000000 - 0x7fffffff
1001  *  - Hypervisor: 0x40000000 - 0x4fffffff
1002  *  - Extended:   0x80000000 - 0xbfffffff
1003  *  - Centaur:    0xc0000000 - 0xcfffffff
1004  *
1005  * The Hypervisor class is further subdivided into sub-classes that each act as
1006  * their own indepdent class associated with a 0x100 byte range.  E.g. if Qemu
1007  * is advertising support for both HyperV and KVM, the resulting Hypervisor
1008  * CPUID sub-classes are:
1009  *
1010  *  - HyperV:     0x40000000 - 0x400000ff
1011  *  - KVM:        0x40000100 - 0x400001ff
1012  */
1013 static struct kvm_cpuid_entry2 *
1014 get_out_of_range_cpuid_entry(struct kvm_vcpu *vcpu, u32 *fn_ptr, u32 index)
1015 {
1016         struct kvm_cpuid_entry2 *basic, *class;
1017         u32 function = *fn_ptr;
1018
1019         basic = kvm_find_cpuid_entry(vcpu, 0, 0);
1020         if (!basic)
1021                 return NULL;
1022
1023         if (is_guest_vendor_amd(basic->ebx, basic->ecx, basic->edx) ||
1024             is_guest_vendor_hygon(basic->ebx, basic->ecx, basic->edx))
1025                 return NULL;
1026
1027         if (function >= 0x40000000 && function <= 0x4fffffff)
1028                 class = kvm_find_cpuid_entry(vcpu, function & 0xffffff00, 0);
1029         else if (function >= 0xc0000000)
1030                 class = kvm_find_cpuid_entry(vcpu, 0xc0000000, 0);
1031         else
1032                 class = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
1033
1034         if (class && function <= class->eax)
1035                 return NULL;
1036
1037         /*
1038          * Leaf specific adjustments are also applied when redirecting to the
1039          * max basic entry, e.g. if the max basic leaf is 0xb but there is no
1040          * entry for CPUID.0xb.index (see below), then the output value for EDX
1041          * needs to be pulled from CPUID.0xb.1.
1042          */
1043         *fn_ptr = basic->eax;
1044
1045         /*
1046          * The class does not exist or the requested function is out of range;
1047          * the effective CPUID entry is the max basic leaf.  Note, the index of
1048          * the original requested leaf is observed!
1049          */
1050         return kvm_find_cpuid_entry(vcpu, basic->eax, index);
1051 }
1052
1053 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
1054                u32 *ecx, u32 *edx, bool exact_only)
1055 {
1056         u32 orig_function = *eax, function = *eax, index = *ecx;
1057         struct kvm_cpuid_entry2 *entry;
1058         bool exact, used_max_basic = false;
1059
1060         entry = kvm_find_cpuid_entry(vcpu, function, index);
1061         exact = !!entry;
1062
1063         if (!entry && !exact_only) {
1064                 entry = get_out_of_range_cpuid_entry(vcpu, &function, index);
1065                 used_max_basic = !!entry;
1066         }
1067
1068         if (entry) {
1069                 *eax = entry->eax;
1070                 *ebx = entry->ebx;
1071                 *ecx = entry->ecx;
1072                 *edx = entry->edx;
1073                 if (function == 7 && index == 0) {
1074                         u64 data;
1075                         if (!__kvm_get_msr(vcpu, MSR_IA32_TSX_CTRL, &data, true) &&
1076                             (data & TSX_CTRL_CPUID_CLEAR))
1077                                 *ebx &= ~(F(RTM) | F(HLE));
1078                 }
1079         } else {
1080                 *eax = *ebx = *ecx = *edx = 0;
1081                 /*
1082                  * When leaf 0BH or 1FH is defined, CL is pass-through
1083                  * and EDX is always the x2APIC ID, even for undefined
1084                  * subleaves. Index 1 will exist iff the leaf is
1085                  * implemented, so we pass through CL iff leaf 1
1086                  * exists. EDX can be copied from any existing index.
1087                  */
1088                 if (function == 0xb || function == 0x1f) {
1089                         entry = kvm_find_cpuid_entry(vcpu, function, 1);
1090                         if (entry) {
1091                                 *ecx = index & 0xff;
1092                                 *edx = entry->edx;
1093                         }
1094                 }
1095         }
1096         trace_kvm_cpuid(orig_function, index, *eax, *ebx, *ecx, *edx, exact,
1097                         used_max_basic);
1098         return exact;
1099 }
1100 EXPORT_SYMBOL_GPL(kvm_cpuid);
1101
1102 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1103 {
1104         u32 eax, ebx, ecx, edx;
1105
1106         if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
1107                 return 1;
1108
1109         eax = kvm_rax_read(vcpu);
1110         ecx = kvm_rcx_read(vcpu);
1111         kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false);
1112         kvm_rax_write(vcpu, eax);
1113         kvm_rbx_write(vcpu, ebx);
1114         kvm_rcx_write(vcpu, ecx);
1115         kvm_rdx_write(vcpu, edx);
1116         return kvm_skip_emulated_instruction(vcpu);
1117 }
1118 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);