1 // SPDX-License-Identifier: GPL-2.0
3 * Performance event support - Processor Activity Instrumentation Facility
5 * Copyright IBM Corp. 2022
6 * Author(s): Thomas Richter <tmricht@linux.ibm.com>
8 #define KMSG_COMPONENT "pai_crypto"
9 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11 #include <linux/kernel.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/percpu.h>
14 #include <linux/notifier.h>
15 #include <linux/init.h>
16 #include <linux/export.h>
18 #include <linux/perf_event.h>
19 #include <asm/ctlreg.h>
21 #include <asm/debug.h>
23 static debug_info_t *cfm_dbg;
24 static unsigned int paicrypt_cnt; /* Size of the mapped counter sets */
25 /* extracted with QPACI instruction */
27 DEFINE_STATIC_KEY_FALSE(pai_key);
35 unsigned long *page; /* Page for CPU to store counters */
36 struct pai_userdata *save; /* Page to store no-zero counters */
37 unsigned int active_events; /* # of PAI crypto users */
38 refcount_t refcnt; /* Reference count mapped buffers */
39 enum paievt_mode mode; /* Type of event */
40 struct perf_event *event; /* Perf event for sampling */
43 struct paicrypt_mapptr {
44 struct paicrypt_map *mapptr;
47 static struct paicrypt_root { /* Anchor to per CPU data */
48 refcount_t refcnt; /* Overall active events */
49 struct paicrypt_mapptr __percpu *mapptr;
52 /* Free per CPU data when the last event is removed. */
53 static void paicrypt_root_free(void)
55 if (refcount_dec_and_test(&paicrypt_root.refcnt)) {
56 free_percpu(paicrypt_root.mapptr);
57 paicrypt_root.mapptr = NULL;
59 debug_sprintf_event(cfm_dbg, 5, "%s root.refcount %d\n", __func__,
60 refcount_read(&paicrypt_root.refcnt));
64 * On initialization of first event also allocate per CPU data dynamically.
65 * Start with an array of pointers, the array size is the maximum number of
66 * CPUs possible, which might be larger than the number of CPUs currently
69 static int paicrypt_root_alloc(void)
71 if (!refcount_inc_not_zero(&paicrypt_root.refcnt)) {
72 /* The memory is already zeroed. */
73 paicrypt_root.mapptr = alloc_percpu(struct paicrypt_mapptr);
74 if (!paicrypt_root.mapptr)
76 refcount_set(&paicrypt_root.refcnt, 1);
81 /* Release the PMU if event is the last perf event */
82 static DEFINE_MUTEX(pai_reserve_mutex);
84 /* Adjust usage counters and remove allocated memory when all users are
87 static void paicrypt_event_destroy(struct perf_event *event)
89 struct paicrypt_mapptr *mp = per_cpu_ptr(paicrypt_root.mapptr,
91 struct paicrypt_map *cpump = mp->mapptr;
94 static_branch_dec(&pai_key);
95 mutex_lock(&pai_reserve_mutex);
96 debug_sprintf_event(cfm_dbg, 5, "%s event %#llx cpu %d users %d"
97 " mode %d refcnt %u\n", __func__,
98 event->attr.config, event->cpu,
99 cpump->active_events, cpump->mode,
100 refcount_read(&cpump->refcnt));
101 if (refcount_dec_and_test(&cpump->refcnt)) {
102 debug_sprintf_event(cfm_dbg, 4, "%s page %#lx save %p\n",
103 __func__, (unsigned long)cpump->page,
105 free_page((unsigned long)cpump->page);
110 paicrypt_root_free();
111 mutex_unlock(&pai_reserve_mutex);
114 static u64 paicrypt_getctr(unsigned long *page, int nr, bool kernel)
117 nr += PAI_CRYPTO_MAXCTR;
121 /* Read the counter values. Return value from location in CMP. For event
122 * CRYPTO_ALL sum up all events.
124 static u64 paicrypt_getdata(struct perf_event *event, bool kernel)
126 struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
127 struct paicrypt_map *cpump = mp->mapptr;
131 if (event->attr.config != PAI_CRYPTO_BASE) {
132 return paicrypt_getctr(cpump->page,
133 event->attr.config - PAI_CRYPTO_BASE,
137 for (i = 1; i <= paicrypt_cnt; i++) {
138 u64 val = paicrypt_getctr(cpump->page, i, kernel);
147 static u64 paicrypt_getall(struct perf_event *event)
151 if (!event->attr.exclude_kernel)
152 sum += paicrypt_getdata(event, true);
153 if (!event->attr.exclude_user)
154 sum += paicrypt_getdata(event, false);
159 /* Used to avoid races in checking concurrent access of counting and
160 * sampling for crypto events
162 * Only one instance of event pai_crypto/CRYPTO_ALL/ for sampling is
163 * allowed and when this event is running, no counting event is allowed.
164 * Several counting events are allowed in parallel, but no sampling event
165 * is allowed while one (or more) counting events are running.
167 * This function is called in process context and it is save to block.
168 * When the event initialization functions fails, no other call back will
171 * Allocate the memory for the event.
173 static struct paicrypt_map *paicrypt_busy(struct perf_event *event)
175 struct perf_event_attr *a = &event->attr;
176 struct paicrypt_map *cpump = NULL;
177 struct paicrypt_mapptr *mp;
180 mutex_lock(&pai_reserve_mutex);
182 /* Allocate root node */
183 rc = paicrypt_root_alloc();
187 /* Allocate node for this event */
188 mp = per_cpu_ptr(paicrypt_root.mapptr, event->cpu);
190 if (!cpump) { /* Paicrypt_map allocated? */
191 cpump = kzalloc(sizeof(*cpump), GFP_KERNEL);
198 if (a->sample_period) { /* Sampling requested */
199 if (cpump->mode != PAI_MODE_NONE)
200 rc = -EBUSY; /* ... sampling/counting active */
201 } else { /* Counting requested */
202 if (cpump->mode == PAI_MODE_SAMPLING)
203 rc = -EBUSY; /* ... and sampling active */
206 * This error case triggers when there is a conflict:
207 * Either sampling requested and counting already active, or visa
208 * versa. Therefore the struct paicrypto_map for this CPU is
209 * needed or the error could not have occurred. Only adjust root
215 /* Allocate memory for counter page and counter extraction.
216 * Only the first counting event has to allocate a page.
219 refcount_inc(&cpump->refcnt);
224 cpump->page = (unsigned long *)get_zeroed_page(GFP_KERNEL);
226 goto free_paicrypt_map;
227 cpump->save = kvmalloc_array(paicrypt_cnt + 1,
228 sizeof(struct pai_userdata), GFP_KERNEL);
230 free_page((unsigned long)cpump->page);
232 goto free_paicrypt_map;
235 /* Set mode and reference count */
237 refcount_set(&cpump->refcnt, 1);
238 cpump->mode = a->sample_period ? PAI_MODE_SAMPLING : PAI_MODE_COUNTING;
240 debug_sprintf_event(cfm_dbg, 5, "%s sample_period %#llx users %d"
241 " mode %d refcnt %u page %#lx save %p rc %d\n",
242 __func__, a->sample_period, cpump->active_events,
243 cpump->mode, refcount_read(&cpump->refcnt),
244 (unsigned long)cpump->page, cpump->save, rc);
251 paicrypt_root_free();
254 mutex_unlock(&pai_reserve_mutex);
255 return rc ? ERR_PTR(rc) : cpump;
258 /* Might be called on different CPU than the one the event is intended for. */
259 static int paicrypt_event_init(struct perf_event *event)
261 struct perf_event_attr *a = &event->attr;
262 struct paicrypt_map *cpump;
264 /* PAI crypto PMU registered as PERF_TYPE_RAW, check event type */
265 if (a->type != PERF_TYPE_RAW && event->pmu->type != a->type)
267 /* PAI crypto event must be in valid range */
268 if (a->config < PAI_CRYPTO_BASE ||
269 a->config > PAI_CRYPTO_BASE + paicrypt_cnt)
271 /* Allow only CPU wide operation, no process context for now. */
272 if ((event->attach_state & PERF_ATTACH_TASK) || event->cpu == -1)
274 /* Allow only CRYPTO_ALL for sampling. */
275 if (a->sample_period && a->config != PAI_CRYPTO_BASE)
278 cpump = paicrypt_busy(event);
280 return PTR_ERR(cpump);
282 event->destroy = paicrypt_event_destroy;
284 if (a->sample_period) {
285 a->sample_period = 1;
287 /* Register for paicrypt_sched_task() to be called */
288 event->attach_state |= PERF_ATTACH_SCHED_CB;
289 /* Add raw data which contain the memory mapped counters */
290 a->sample_type |= PERF_SAMPLE_RAW;
291 /* Turn off inheritance */
295 static_branch_inc(&pai_key);
299 static void paicrypt_read(struct perf_event *event)
301 u64 prev, new, delta;
303 prev = local64_read(&event->hw.prev_count);
304 new = paicrypt_getall(event);
305 local64_set(&event->hw.prev_count, new);
306 delta = (prev <= new) ? new - prev
307 : (-1ULL - prev) + new + 1; /* overflow */
308 local64_add(delta, &event->count);
311 static void paicrypt_start(struct perf_event *event, int flags)
315 /* Event initialization sets last_tag to 0. When later on the events
316 * are deleted and re-added, do not reset the event count value to zero.
317 * Events are added, deleted and re-added when 2 or more events
318 * are active at the same time.
320 if (!event->attr.sample_period) { /* Counting */
321 if (!event->hw.last_tag) {
322 event->hw.last_tag = 1;
323 sum = paicrypt_getall(event); /* Get current value */
324 local64_set(&event->hw.prev_count, sum);
326 } else { /* Sampling */
327 perf_sched_cb_inc(event->pmu);
331 static int paicrypt_add(struct perf_event *event, int flags)
333 struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
334 struct paicrypt_map *cpump = mp->mapptr;
337 if (++cpump->active_events == 1) {
338 ccd = virt_to_phys(cpump->page) | PAI_CRYPTO_KERNEL_OFFSET;
339 WRITE_ONCE(S390_lowcore.ccd, ccd);
340 local_ctl_set_bit(0, CR0_CRYPTOGRAPHY_COUNTER_BIT);
342 cpump->event = event;
343 if (flags & PERF_EF_START)
344 paicrypt_start(event, PERF_EF_RELOAD);
349 static void paicrypt_stop(struct perf_event *event, int flags)
351 if (!event->attr.sample_period) /* Counting */
352 paicrypt_read(event);
354 perf_sched_cb_dec(event->pmu);
355 event->hw.state = PERF_HES_STOPPED;
358 static void paicrypt_del(struct perf_event *event, int flags)
360 struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
361 struct paicrypt_map *cpump = mp->mapptr;
363 paicrypt_stop(event, PERF_EF_UPDATE);
364 if (--cpump->active_events == 0) {
365 local_ctl_clear_bit(0, CR0_CRYPTOGRAPHY_COUNTER_BIT);
366 WRITE_ONCE(S390_lowcore.ccd, 0);
370 /* Create raw data and save it in buffer. Returns number of bytes copied.
371 * Saves only positive counter entries of the form
372 * 2 bytes: Number of counter
373 * 8 bytes: Value of counter
375 static size_t paicrypt_copy(struct pai_userdata *userdata, unsigned long *page,
376 bool exclude_user, bool exclude_kernel)
380 for (i = 1; i <= paicrypt_cnt; i++) {
384 val += paicrypt_getctr(page, i, true);
386 val += paicrypt_getctr(page, i, false);
388 userdata[outidx].num = i;
389 userdata[outidx].value = val;
393 return outidx * sizeof(struct pai_userdata);
396 static int paicrypt_push_sample(size_t rawsize, struct paicrypt_map *cpump,
397 struct perf_event *event)
399 struct perf_sample_data data;
400 struct perf_raw_record raw;
404 /* Setup perf sample */
405 memset(®s, 0, sizeof(regs));
406 memset(&raw, 0, sizeof(raw));
407 memset(&data, 0, sizeof(data));
408 perf_sample_data_init(&data, 0, event->hw.last_period);
409 if (event->attr.sample_type & PERF_SAMPLE_TID) {
410 data.tid_entry.pid = task_tgid_nr(current);
411 data.tid_entry.tid = task_pid_nr(current);
413 if (event->attr.sample_type & PERF_SAMPLE_TIME)
414 data.time = event->clock();
415 if (event->attr.sample_type & (PERF_SAMPLE_ID | PERF_SAMPLE_IDENTIFIER))
417 if (event->attr.sample_type & PERF_SAMPLE_CPU) {
418 data.cpu_entry.cpu = smp_processor_id();
419 data.cpu_entry.reserved = 0;
421 if (event->attr.sample_type & PERF_SAMPLE_RAW) {
422 raw.frag.size = rawsize;
423 raw.frag.data = cpump->save;
424 perf_sample_save_raw_data(&data, &raw);
427 overflow = perf_event_overflow(event, &data, ®s);
428 perf_event_update_userpage(event);
429 /* Clear lowcore page after read */
430 memset(cpump->page, 0, PAGE_SIZE);
434 /* Check if there is data to be saved on schedule out of a task. */
435 static int paicrypt_have_sample(void)
437 struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
438 struct paicrypt_map *cpump = mp->mapptr;
439 struct perf_event *event = cpump->event;
443 if (!event) /* No event active */
445 rawsize = paicrypt_copy(cpump->save, cpump->page,
446 cpump->event->attr.exclude_user,
447 cpump->event->attr.exclude_kernel);
448 if (rawsize) /* No incremented counters */
449 rc = paicrypt_push_sample(rawsize, cpump, event);
453 /* Called on schedule-in and schedule-out. No access to event structure,
454 * but for sampling only event CRYPTO_ALL is allowed.
456 static void paicrypt_sched_task(struct perf_event_pmu_context *pmu_ctx, bool sched_in)
458 /* We started with a clean page on event installation. So read out
459 * results on schedule_out and if page was dirty, clear values.
462 paicrypt_have_sample();
465 /* Attribute definitions for paicrypt interface. As with other CPU
466 * Measurement Facilities, there is one attribute per mapped counter.
467 * The number of mapped counters may vary per machine generation. Use
468 * the QUERY PROCESSOR ACTIVITY COUNTER INFORMATION (QPACI) instruction
469 * to determine the number of mapped counters. The instructions returns
470 * a positive number, which is the highest number of supported counters.
471 * All counters less than this number are also supported, there are no
472 * holes. A returned number of zero means no support for mapped counters.
474 * The identification of the counter is a unique number. The chosen range
475 * is 0x1000 + offset in mapped kernel page.
476 * All CPU Measurement Facility counters identifiers must be unique and
477 * the numbers from 0 to 496 are already used for the CPU Measurement
478 * Counter facility. Numbers 0xb0000, 0xbc000 and 0xbd000 are already
479 * used for the CPU Measurement Sampling facility.
481 PMU_FORMAT_ATTR(event, "config:0-63");
483 static struct attribute *paicrypt_format_attr[] = {
484 &format_attr_event.attr,
488 static struct attribute_group paicrypt_events_group = {
490 .attrs = NULL /* Filled in attr_event_init() */
493 static struct attribute_group paicrypt_format_group = {
495 .attrs = paicrypt_format_attr,
498 static const struct attribute_group *paicrypt_attr_groups[] = {
499 &paicrypt_events_group,
500 &paicrypt_format_group,
504 /* Performance monitoring unit for mapped counters */
505 static struct pmu paicrypt = {
506 .task_ctx_nr = perf_invalid_context,
507 .event_init = paicrypt_event_init,
510 .start = paicrypt_start,
511 .stop = paicrypt_stop,
512 .read = paicrypt_read,
513 .sched_task = paicrypt_sched_task,
514 .attr_groups = paicrypt_attr_groups
517 /* List of symbolic PAI counter names. */
518 static const char * const paicrypt_ctrnames[] = {
523 [4] = "KM_ENCRYPTED_DEA",
524 [5] = "KM_ENCRYPTED_TDEA_128",
525 [6] = "KM_ENCRYPTED_TDEA_192",
529 [10] = "KM_ENCRYPTED_AES_128",
530 [11] = "KM_ENCRYPTED_AES_192",
531 [12] = "KM_ENCRYPTED_AES_256",
532 [13] = "KM_XTS_AES_128",
533 [14] = "KM_XTS_AES_256",
534 [15] = "KM_XTS_ENCRYPTED_AES_128",
535 [16] = "KM_XTS_ENCRYPTED_AES_256",
537 [18] = "KMC_TDEA_128",
538 [19] = "KMC_TDEA_192",
539 [20] = "KMC_ENCRYPTED_DEA",
540 [21] = "KMC_ENCRYPTED_TDEA_128",
541 [22] = "KMC_ENCRYPTED_TDEA_192",
542 [23] = "KMC_AES_128",
543 [24] = "KMC_AES_192",
544 [25] = "KMC_AES_256",
545 [26] = "KMC_ENCRYPTED_AES_128",
546 [27] = "KMC_ENCRYPTED_AES_192",
547 [28] = "KMC_ENCRYPTED_AES_256",
549 [30] = "KMA_GCM_AES_128",
550 [31] = "KMA_GCM_AES_192",
551 [32] = "KMA_GCM_AES_256",
552 [33] = "KMA_GCM_ENCRYPTED_AES_128",
553 [34] = "KMA_GCM_ENCRYPTED_AES_192",
554 [35] = "KMA_GCM_ENCRYPTED_AES_256",
556 [37] = "KMF_TDEA_128",
557 [38] = "KMF_TDEA_192",
558 [39] = "KMF_ENCRYPTED_DEA",
559 [40] = "KMF_ENCRYPTED_TDEA_128",
560 [41] = "KMF_ENCRYPTED_TDEA_192",
561 [42] = "KMF_AES_128",
562 [43] = "KMF_AES_192",
563 [44] = "KMF_AES_256",
564 [45] = "KMF_ENCRYPTED_AES_128",
565 [46] = "KMF_ENCRYPTED_AES_192",
566 [47] = "KMF_ENCRYPTED_AES_256",
568 [49] = "KMCTR_TDEA_128",
569 [50] = "KMCTR_TDEA_192",
570 [51] = "KMCTR_ENCRYPTED_DEA",
571 [52] = "KMCTR_ENCRYPTED_TDEA_128",
572 [53] = "KMCTR_ENCRYPTED_TDEA_192",
573 [54] = "KMCTR_AES_128",
574 [55] = "KMCTR_AES_192",
575 [56] = "KMCTR_AES_256",
576 [57] = "KMCTR_ENCRYPTED_AES_128",
577 [58] = "KMCTR_ENCRYPTED_AES_192",
578 [59] = "KMCTR_ENCRYPTED_AES_256",
580 [61] = "KMO_TDEA_128",
581 [62] = "KMO_TDEA_192",
582 [63] = "KMO_ENCRYPTED_DEA",
583 [64] = "KMO_ENCRYPTED_TDEA_128",
584 [65] = "KMO_ENCRYPTED_TDEA_192",
585 [66] = "KMO_AES_128",
586 [67] = "KMO_AES_192",
587 [68] = "KMO_AES_256",
588 [69] = "KMO_ENCRYPTED_AES_128",
589 [70] = "KMO_ENCRYPTED_AES_192",
590 [71] = "KMO_ENCRYPTED_AES_256",
592 [73] = "KIMD_SHA_256",
593 [74] = "KIMD_SHA_512",
594 [75] = "KIMD_SHA3_224",
595 [76] = "KIMD_SHA3_256",
596 [77] = "KIMD_SHA3_384",
597 [78] = "KIMD_SHA3_512",
598 [79] = "KIMD_SHAKE_128",
599 [80] = "KIMD_SHAKE_256",
602 [83] = "KLMD_SHA_256",
603 [84] = "KLMD_SHA_512",
604 [85] = "KLMD_SHA3_224",
605 [86] = "KLMD_SHA3_256",
606 [87] = "KLMD_SHA3_384",
607 [88] = "KLMD_SHA3_512",
608 [89] = "KLMD_SHAKE_128",
609 [90] = "KLMD_SHAKE_256",
611 [92] = "KMAC_TDEA_128",
612 [93] = "KMAC_TDEA_192",
613 [94] = "KMAC_ENCRYPTED_DEA",
614 [95] = "KMAC_ENCRYPTED_TDEA_128",
615 [96] = "KMAC_ENCRYPTED_TDEA_192",
616 [97] = "KMAC_AES_128",
617 [98] = "KMAC_AES_192",
618 [99] = "KMAC_AES_256",
619 [100] = "KMAC_ENCRYPTED_AES_128",
620 [101] = "KMAC_ENCRYPTED_AES_192",
621 [102] = "KMAC_ENCRYPTED_AES_256",
622 [103] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_DEA",
623 [104] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_128",
624 [105] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_TDEA_192",
625 [106] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_DEA",
626 [107] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_128",
627 [108] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_TDEA_192",
628 [109] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_128",
629 [110] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_192",
630 [111] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_AES_256",
631 [112] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_128",
632 [113] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_192",
633 [114] = "PCC_COMPUTE_LAST_BLOCK_CMAC_USING_ENCRYPTED_AES_256A",
634 [115] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_128",
635 [116] = "PCC_COMPUTE_XTS_PARAMETER_USING_AES_256",
636 [117] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_128",
637 [118] = "PCC_COMPUTE_XTS_PARAMETER_USING_ENCRYPTED_AES_256",
638 [119] = "PCC_SCALAR_MULTIPLY_P256",
639 [120] = "PCC_SCALAR_MULTIPLY_P384",
640 [121] = "PCC_SCALAR_MULTIPLY_P521",
641 [122] = "PCC_SCALAR_MULTIPLY_ED25519",
642 [123] = "PCC_SCALAR_MULTIPLY_ED448",
643 [124] = "PCC_SCALAR_MULTIPLY_X25519",
644 [125] = "PCC_SCALAR_MULTIPLY_X448",
645 [126] = "PRNO_SHA_512_DRNG",
646 [127] = "PRNO_TRNG_QUERY_RAW_TO_CONDITIONED_RATIO",
648 [129] = "KDSA_ECDSA_VERIFY_P256",
649 [130] = "KDSA_ECDSA_VERIFY_P384",
650 [131] = "KDSA_ECDSA_VERIFY_P521",
651 [132] = "KDSA_ECDSA_SIGN_P256",
652 [133] = "KDSA_ECDSA_SIGN_P384",
653 [134] = "KDSA_ECDSA_SIGN_P521",
654 [135] = "KDSA_ENCRYPTED_ECDSA_SIGN_P256",
655 [136] = "KDSA_ENCRYPTED_ECDSA_SIGN_P384",
656 [137] = "KDSA_ENCRYPTED_ECDSA_SIGN_P521",
657 [138] = "KDSA_EDDSA_VERIFY_ED25519",
658 [139] = "KDSA_EDDSA_VERIFY_ED448",
659 [140] = "KDSA_EDDSA_SIGN_ED25519",
660 [141] = "KDSA_EDDSA_SIGN_ED448",
661 [142] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED25519",
662 [143] = "KDSA_ENCRYPTED_EDDSA_SIGN_ED448",
663 [144] = "PCKMO_ENCRYPT_DEA_KEY",
664 [145] = "PCKMO_ENCRYPT_TDEA_128_KEY",
665 [146] = "PCKMO_ENCRYPT_TDEA_192_KEY",
666 [147] = "PCKMO_ENCRYPT_AES_128_KEY",
667 [148] = "PCKMO_ENCRYPT_AES_192_KEY",
668 [149] = "PCKMO_ENCRYPT_AES_256_KEY",
669 [150] = "PCKMO_ENCRYPT_ECC_P256_KEY",
670 [151] = "PCKMO_ENCRYPT_ECC_P384_KEY",
671 [152] = "PCKMO_ENCRYPT_ECC_P521_KEY",
672 [153] = "PCKMO_ENCRYPT_ECC_ED25519_KEY",
673 [154] = "PCKMO_ENCRYPT_ECC_ED448_KEY",
674 [155] = "IBM_RESERVED_155",
675 [156] = "IBM_RESERVED_156",
678 static void __init attr_event_free(struct attribute **attrs, int num)
680 struct perf_pmu_events_attr *pa;
683 for (i = 0; i < num; i++) {
684 struct device_attribute *dap;
686 dap = container_of(attrs[i], struct device_attribute, attr);
687 pa = container_of(dap, struct perf_pmu_events_attr, attr);
693 static int __init attr_event_init_one(struct attribute **attrs, int num)
695 struct perf_pmu_events_attr *pa;
697 pa = kzalloc(sizeof(*pa), GFP_KERNEL);
701 sysfs_attr_init(&pa->attr.attr);
702 pa->id = PAI_CRYPTO_BASE + num;
703 pa->attr.attr.name = paicrypt_ctrnames[num];
704 pa->attr.attr.mode = 0444;
705 pa->attr.show = cpumf_events_sysfs_show;
706 pa->attr.store = NULL;
707 attrs[num] = &pa->attr.attr;
711 /* Create PMU sysfs event attributes on the fly. */
712 static int __init attr_event_init(void)
714 struct attribute **attrs;
717 attrs = kmalloc_array(ARRAY_SIZE(paicrypt_ctrnames) + 1, sizeof(*attrs),
721 for (i = 0; i < ARRAY_SIZE(paicrypt_ctrnames); i++) {
722 ret = attr_event_init_one(attrs, i);
724 attr_event_free(attrs, i - 1);
729 paicrypt_events_group.attrs = attrs;
733 static int __init paicrypt_init(void)
735 struct qpaci_info_block ib;
738 if (!test_facility(196))
742 paicrypt_cnt = ib.num_cc;
743 if (paicrypt_cnt == 0)
745 if (paicrypt_cnt >= PAI_CRYPTO_MAXCTR)
746 paicrypt_cnt = PAI_CRYPTO_MAXCTR - 1;
748 rc = attr_event_init(); /* Export known PAI crypto events */
750 pr_err("Creation of PMU pai_crypto /sysfs failed\n");
754 /* Setup s390dbf facility */
755 cfm_dbg = debug_register(KMSG_COMPONENT, 2, 256, 128);
757 pr_err("Registration of s390dbf pai_crypto failed\n");
760 debug_register_view(cfm_dbg, &debug_sprintf_view);
762 rc = perf_pmu_register(&paicrypt, "pai_crypto", -1);
764 pr_err("Registering the pai_crypto PMU failed with rc=%i\n",
766 debug_unregister_view(cfm_dbg, &debug_sprintf_view);
767 debug_unregister(cfm_dbg);
773 device_initcall(paicrypt_init);