1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright IBM Corp. 1999
5 * Author(s): Hartmut Penner (hp@de.ibm.com),
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/processor.h"
9 * Copyright (C) 1994, Linus Torvalds
12 #ifndef __ASM_S390_PROCESSOR_H
13 #define __ASM_S390_PROCESSOR_H
15 #include <linux/bits.h>
17 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
18 #define CIF_FPU 3 /* restore FPU registers */
19 #define CIF_ENABLED_WAIT 5 /* in enabled wait state */
20 #define CIF_MCCK_GUEST 6 /* machine check happening in guest */
21 #define CIF_DEDICATED_CPU 7 /* this CPU is dedicated */
23 #define _CIF_NOHZ_DELAY BIT(CIF_NOHZ_DELAY)
24 #define _CIF_FPU BIT(CIF_FPU)
25 #define _CIF_ENABLED_WAIT BIT(CIF_ENABLED_WAIT)
26 #define _CIF_MCCK_GUEST BIT(CIF_MCCK_GUEST)
27 #define _CIF_DEDICATED_CPU BIT(CIF_DEDICATED_CPU)
29 #define RESTART_FLAG_CTLREGS _AC(1 << 0, U)
33 #include <linux/cpumask.h>
34 #include <linux/linkage.h>
35 #include <linux/irqflags.h>
38 #include <asm/ptrace.h>
39 #include <asm/setup.h>
40 #include <asm/runtime_instr.h>
41 #include <asm/fpu/types.h>
42 #include <asm/fpu/internal.h>
43 #include <asm/irqflags.h>
45 typedef long (*sys_call_ptr_t)(struct pt_regs *regs);
47 static inline void set_cpu_flag(int flag)
49 S390_lowcore.cpu_flags |= (1UL << flag);
52 static inline void clear_cpu_flag(int flag)
54 S390_lowcore.cpu_flags &= ~(1UL << flag);
57 static inline int test_cpu_flag(int flag)
59 return !!(S390_lowcore.cpu_flags & (1UL << flag));
63 * Test CIF flag of another CPU. The caller needs to ensure that
64 * CPU hotplug can not happen, e.g. by disabling preemption.
66 static inline int test_cpu_flag_of(int flag, int cpu)
68 struct lowcore *lc = lowcore_ptr[cpu];
69 return !!(lc->cpu_flags & (1UL << flag));
72 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
74 static inline void get_cpu_id(struct cpuid *ptr)
76 asm volatile("stidp %0" : "=Q" (*ptr));
79 void s390_adjust_jiffies(void);
80 void s390_update_cpu_mhz(void);
81 void cpu_detect_mhz_feature(void);
83 extern const struct seq_operations cpuinfo_op;
84 extern void execve_tail(void);
85 extern void __bpon(void);
88 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
91 #define TASK_SIZE (test_thread_flag(TIF_31BIT) ? \
92 _REGION3_SIZE : TASK_SIZE_MAX)
93 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
94 (_REGION3_SIZE >> 1) : (_REGION2_SIZE >> 1))
95 #define TASK_SIZE_MAX (-PAGE_SIZE)
97 #define STACK_TOP (test_thread_flag(TIF_31BIT) ? \
98 _REGION3_SIZE : _REGION2_SIZE)
99 #define STACK_TOP_MAX _REGION2_SIZE
101 #define HAVE_ARCH_PICK_MMAP_LAYOUT
106 struct thread_struct {
107 unsigned int acrs[NUM_ACRS];
108 unsigned long ksp; /* kernel stack pointer */
109 unsigned long user_timer; /* task cputime in user space */
110 unsigned long guest_timer; /* task cputime in kvm guest */
111 unsigned long system_timer; /* task cputime in kernel space */
112 unsigned long hardirq_timer; /* task cputime in hardirq context */
113 unsigned long softirq_timer; /* task cputime in softirq context */
114 const sys_call_ptr_t *sys_call_table; /* system call table address */
115 unsigned long gmap_addr; /* address of last gmap fault. */
116 unsigned int gmap_write_flag; /* gmap fault write indication */
117 unsigned int gmap_int_code; /* int code of last gmap fault */
118 unsigned int gmap_pfault; /* signal of a pending guest pfault */
120 /* Per-thread information related to debugging */
121 struct per_regs per_user; /* User specified PER registers */
122 struct per_event per_event; /* Cause of the last PER trap */
123 unsigned long per_flags; /* Flags to control debug behavior */
124 unsigned int system_call; /* system call number in signal */
125 unsigned long last_break; /* last breaking-event-address. */
126 /* pfault_wait is used to block the process on a pfault event */
127 unsigned long pfault_wait;
128 struct list_head list;
129 /* cpu runtime instrumentation */
130 struct runtime_instr_cb *ri_cb;
131 struct gs_cb *gs_cb; /* Current guarded storage cb */
132 struct gs_cb *gs_bc_cb; /* Broadcast guarded storage cb */
133 struct pgm_tdb trap_tdb; /* Transaction abort diagnose block */
135 * Warning: 'fpu' is dynamically-sized. It *MUST* be at
138 struct fpu fpu; /* FP and VX register save area */
141 /* Flag to disable transactions. */
142 #define PER_FLAG_NO_TE 1UL
143 /* Flag to enable random transaction aborts. */
144 #define PER_FLAG_TE_ABORT_RAND 2UL
145 /* Flag to specify random transaction abort mode:
146 * - abort each transaction at a random instruction before TEND if set.
147 * - abort random transactions at a random instruction if cleared.
149 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
151 typedef struct thread_struct thread_struct;
153 #define ARCH_MIN_TASKALIGN 8
155 #define INIT_THREAD { \
156 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
157 .fpu.regs = (void *) init_task.thread.fpu.fprs, \
162 * Do necessary setup to start up a new thread.
164 #define start_thread(regs, new_psw, new_stackp) do { \
165 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
166 regs->psw.addr = new_psw; \
167 regs->gprs[15] = new_stackp; \
171 #define start_thread31(regs, new_psw, new_stackp) do { \
172 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
173 regs->psw.addr = new_psw; \
174 regs->gprs[15] = new_stackp; \
178 /* Forward declaration, a strange C thing */
184 void show_registers(struct pt_regs *regs);
185 void show_cacheinfo(struct seq_file *m);
187 /* Free all resources held by a thread. */
188 static inline void release_thread(struct task_struct *tsk) { }
190 /* Free guarded storage control block */
191 void guarded_storage_release(struct task_struct *tsk);
192 void gs_load_bc_cb(struct pt_regs *regs);
194 unsigned long __get_wchan(struct task_struct *p);
195 #define task_pt_regs(tsk) ((struct pt_regs *) \
196 (task_stack_page(tsk) + THREAD_SIZE) - 1)
197 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
198 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
200 /* Has task runtime instrumentation enabled ? */
201 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
203 static __always_inline unsigned long current_stack_pointer(void)
207 asm volatile("la %0,0(15)" : "=a" (sp));
211 static __always_inline unsigned short stap(void)
213 unsigned short cpu_address;
215 asm volatile("stap %0" : "=Q" (cpu_address));
219 #define cpu_relax() barrier()
221 #define ECAG_CACHE_ATTRIBUTE 0
222 #define ECAG_CPU_ATTRIBUTE 1
224 static inline unsigned long __ecag(unsigned int asi, unsigned char parm)
228 asm volatile("ecag %0,0,0(%1)" : "=d" (val) : "a" (asi << 8 | parm));
232 static inline void psw_set_key(unsigned int key)
234 asm volatile("spka 0(%0)" : : "d" (key));
238 * Set PSW to specified value.
240 static inline void __load_psw(psw_t psw)
242 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
246 * Set PSW mask to specified value, while leaving the
247 * PSW addr pointing to the next instruction.
249 static __always_inline void __load_psw_mask(unsigned long mask)
261 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc");
265 * Extract current PSW mask
267 static inline unsigned long __extract_psw(void)
269 unsigned int reg1, reg2;
271 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
272 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
275 static inline void local_mcck_enable(void)
277 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
280 static inline void local_mcck_disable(void)
282 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
286 * Rewind PSW instruction address by specified number of bytes.
288 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
292 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
293 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
295 return (psw.addr - ilc) & mask;
299 * Function to drop a processor into disabled wait state
301 static __always_inline void __noreturn disabled_wait(void)
305 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
306 psw.addr = _THIS_IP_;
312 * Basic Program Check Handler.
314 extern void s390_base_pgm_handler(void);
315 extern void (*s390_base_pgm_handler_fn)(struct pt_regs *regs);
317 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
319 extern int memcpy_real(void *, unsigned long, size_t);
320 extern void memcpy_absolute(void *, void *, size_t);
322 #define mem_assign_absolute(dest, val) do { \
323 __typeof__(dest) __tmp = (val); \
325 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
326 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
329 extern int s390_isolate_bp(void);
330 extern int s390_isolate_bp_guest(void);
332 static __always_inline bool regs_irqs_disabled(struct pt_regs *regs)
334 return arch_irqs_disabled_flags(regs->psw.mask);
337 #endif /* __ASSEMBLY__ */
339 #endif /* __ASM_S390_PROCESSOR_H */