2 * This program is used to generate definitions needed by
3 * assembly language modules.
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
16 #define GENERATING_ASM_OFFSETS /* asm/smp.h */
18 #include <linux/compat.h>
19 #include <linux/signal.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/types.h>
25 #include <linux/mman.h>
27 #include <linux/suspend.h>
28 #include <linux/hrtimer.h>
30 #include <linux/time.h>
31 #include <linux/hardirq.h>
33 #include <linux/kbuild.h>
37 #include <asm/pgtable.h>
38 #include <asm/processor.h>
39 #include <asm/cputable.h>
40 #include <asm/thread_info.h>
42 #include <asm/vdso_datapage.h>
43 #include <asm/dbell.h>
46 #include <asm/lppaca.h>
47 #include <asm/cache.h>
49 #include <asm/hvcall.h>
52 #ifdef CONFIG_PPC_POWERNV
55 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
56 #include <linux/kvm_host.h>
58 #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
59 #include <asm/kvm_book3s.h>
60 #include <asm/kvm_ppc.h>
64 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
65 #include "head_booke.h"
69 #if defined(CONFIG_PPC_FSL_BOOK3E)
70 #include "../mm/mmu_decl.h"
74 #include <asm/fixmap.h>
77 #define STACK_PT_REGS_OFFSET(sym, val) \
78 DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
82 OFFSET(THREAD, task_struct, thread);
83 OFFSET(MM, task_struct, mm);
84 #ifdef CONFIG_STACKPROTECTOR
85 OFFSET(TASK_CANARY, task_struct, stack_canary);
87 OFFSET(PACA_CANARY, paca_struct, canary);
90 OFFSET(MMCONTEXTID, mm_struct, context.id);
92 DEFINE(SIGSEGV, SIGSEGV);
93 DEFINE(NMI_MASK, NMI_MASK);
95 OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
96 #ifdef CONFIG_PPC_RTAS
97 OFFSET(RTAS_SP, thread_struct, rtas_sp);
99 #endif /* CONFIG_PPC64 */
100 OFFSET(TASK_STACK, task_struct, stack);
102 OFFSET(TASK_CPU, task_struct, cpu);
105 #ifdef CONFIG_LIVEPATCH
106 OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
109 OFFSET(KSP, thread_struct, ksp);
110 OFFSET(PT_REGS, thread_struct, regs);
112 OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
114 OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
115 OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
116 OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
117 OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
118 OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
119 #ifdef CONFIG_ALTIVEC
120 OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
121 OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
122 OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
123 OFFSET(THREAD_USED_VR, thread_struct, used_vr);
124 OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
125 OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
126 #endif /* CONFIG_ALTIVEC */
128 OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
129 #endif /* CONFIG_VSX */
131 OFFSET(KSP_VSID, thread_struct, ksp_vsid);
132 #else /* CONFIG_PPC64 */
133 OFFSET(PGDIR, thread_struct, pgdir);
135 OFFSET(THREAD_EVR0, thread_struct, evr[0]);
136 OFFSET(THREAD_ACC, thread_struct, acc);
137 OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
138 OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
139 #endif /* CONFIG_SPE */
140 #endif /* CONFIG_PPC64 */
141 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
142 OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
144 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
145 OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
147 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
148 OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
150 #if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
151 OFFSET(KUAP, thread_struct, kuap);
154 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
155 OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
156 OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
157 OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
158 OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
159 OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
160 OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
161 OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
162 OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
163 OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
164 OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
165 OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
166 /* Local pt_regs on stack for Transactional Memory funcs. */
167 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
168 sizeof(struct pt_regs) + 16);
169 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
171 OFFSET(TI_FLAGS, thread_info, flags);
172 OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
173 OFFSET(TI_PREEMPT, thread_info, preempt_count);
176 OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
177 OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
178 OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
179 OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
180 OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
181 OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
183 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
184 OFFSET(PACAPACAINDEX, paca_struct, paca_index);
185 OFFSET(PACAPROCSTART, paca_struct, cpu_start);
186 OFFSET(PACAKSAVE, paca_struct, kstack);
187 OFFSET(PACACURRENT, paca_struct, __current);
188 DEFINE(PACA_THREAD_INFO, offsetof(struct paca_struct, __current) +
189 offsetof(struct task_struct, thread_info));
190 OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
191 OFFSET(PACAR1, paca_struct, saved_r1);
192 OFFSET(PACATOC, paca_struct, kernel_toc);
193 OFFSET(PACAKBASE, paca_struct, kernelbase);
194 OFFSET(PACAKMSR, paca_struct, kernel_msr);
195 OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
196 OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
197 OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
198 #ifdef CONFIG_PPC_BOOK3S
199 OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
200 #ifdef CONFIG_PPC_MM_SLICES
201 OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
202 OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
203 OFFSET(PACA_SLB_ADDR_LIMIT, paca_struct, mm_ctx_slb_addr_limit);
204 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
205 #endif /* CONFIG_PPC_MM_SLICES */
208 #ifdef CONFIG_PPC_BOOK3E
209 OFFSET(PACAPGD, paca_struct, pgd);
210 OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
211 OFFSET(PACA_EXGEN, paca_struct, exgen);
212 OFFSET(PACA_EXTLB, paca_struct, extlb);
213 OFFSET(PACA_EXMC, paca_struct, exmc);
214 OFFSET(PACA_EXCRIT, paca_struct, excrit);
215 OFFSET(PACA_EXDBG, paca_struct, exdbg);
216 OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
217 OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
218 OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
219 OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
221 OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
222 OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
223 OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
224 #endif /* CONFIG_PPC_BOOK3E */
226 #ifdef CONFIG_PPC_BOOK3S_64
227 OFFSET(PACASLBCACHE, paca_struct, slb_cache);
228 OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
229 OFFSET(PACASTABRR, paca_struct, stab_rr);
230 OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
231 #ifdef CONFIG_PPC_MM_SLICES
232 OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
234 OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
235 #endif /* CONFIG_PPC_MM_SLICES */
236 OFFSET(PACA_EXGEN, paca_struct, exgen);
237 OFFSET(PACA_EXMC, paca_struct, exmc);
238 OFFSET(PACA_EXSLB, paca_struct, exslb);
239 OFFSET(PACA_EXNMI, paca_struct, exnmi);
240 #ifdef CONFIG_PPC_PSERIES
241 OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
243 OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
244 OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
245 OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
246 OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
247 OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
248 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
249 OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
251 OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
252 OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
253 OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
254 #endif /* CONFIG_PPC_BOOK3S_64 */
255 OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
256 #ifdef CONFIG_PPC_BOOK3S_64
257 OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
258 OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
259 OFFSET(PACA_IN_MCE, paca_struct, in_mce);
260 OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
261 OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
262 OFFSET(PACA_EXRFI, paca_struct, exrfi);
263 OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
266 OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
267 OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
268 OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
269 OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
270 OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
271 OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
272 OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
273 OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
274 OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
275 #else /* CONFIG_PPC64 */
276 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
277 OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
278 OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
279 OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
280 OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
282 #endif /* CONFIG_PPC64 */
285 OFFSET(RTASBASE, rtas_t, base);
286 OFFSET(RTASENTRY, rtas_t, entry);
288 /* Interrupt register frame */
289 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
290 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
291 STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
292 STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
293 STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
294 STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
295 STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
296 STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
297 STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
298 STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
299 STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
300 STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
301 STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
302 STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
303 STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
304 STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
306 STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
307 #endif /* CONFIG_PPC64 */
309 * Note: these symbols include _ because they overlap with special
312 STACK_PT_REGS_OFFSET(_NIP, nip);
313 STACK_PT_REGS_OFFSET(_MSR, msr);
314 STACK_PT_REGS_OFFSET(_CTR, ctr);
315 STACK_PT_REGS_OFFSET(_LINK, link);
316 STACK_PT_REGS_OFFSET(_CCR, ccr);
317 STACK_PT_REGS_OFFSET(_XER, xer);
318 STACK_PT_REGS_OFFSET(_DAR, dar);
319 STACK_PT_REGS_OFFSET(_DSISR, dsisr);
320 STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
321 STACK_PT_REGS_OFFSET(RESULT, result);
322 STACK_PT_REGS_OFFSET(_TRAP, trap);
325 * The PowerPC 400-class & Book-E processors have neither the DAR
326 * nor the DSISR SPRs. Hence, we overload them to hold the similar
327 * DEAR and ESR SPRs for such processors. For critical interrupts
328 * we use them to hold SRR0 and SRR1.
330 STACK_PT_REGS_OFFSET(_DEAR, dar);
331 STACK_PT_REGS_OFFSET(_ESR, dsisr);
332 #else /* CONFIG_PPC64 */
333 STACK_PT_REGS_OFFSET(SOFTE, softe);
334 STACK_PT_REGS_OFFSET(_PPR, ppr);
335 #endif /* CONFIG_PPC64 */
337 #ifdef CONFIG_PPC_KUAP
338 STACK_PT_REGS_OFFSET(STACK_REGS_KUAP, kuap);
341 #if defined(CONFIG_PPC32)
342 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
343 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
344 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
345 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
346 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
347 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
348 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
349 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
350 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
351 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
352 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
353 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
354 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
355 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
356 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
357 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
358 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
363 OFFSET(MM_PGD, mm_struct, pgd);
364 #endif /* ! CONFIG_PPC64 */
366 /* About the CPU features table */
367 OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
368 OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
369 OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
371 OFFSET(pbe_address, pbe, address);
372 OFFSET(pbe_orig_address, pbe, orig_address);
373 OFFSET(pbe_next, pbe, next);
376 DEFINE(TASK_SIZE, TASK_SIZE);
377 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
378 #endif /* ! CONFIG_PPC64 */
380 /* datapage offsets for use by vdso */
381 OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
382 OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
383 OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
384 OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
385 OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
386 OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
387 OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
388 OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
389 OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
390 OFFSET(STAMP_XTIME, vdso_data, stamp_xtime);
391 OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
392 OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
393 OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
394 OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
395 OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
397 OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
398 OFFSET(TVAL64_TV_SEC, timeval, tv_sec);
399 OFFSET(TVAL64_TV_USEC, timeval, tv_usec);
400 OFFSET(TVAL32_TV_SEC, old_timeval32, tv_sec);
401 OFFSET(TVAL32_TV_USEC, old_timeval32, tv_usec);
402 OFFSET(TSPC64_TV_SEC, timespec, tv_sec);
403 OFFSET(TSPC64_TV_NSEC, timespec, tv_nsec);
404 OFFSET(TSPC32_TV_SEC, old_timespec32, tv_sec);
405 OFFSET(TSPC32_TV_NSEC, old_timespec32, tv_nsec);
407 OFFSET(TVAL32_TV_SEC, timeval, tv_sec);
408 OFFSET(TVAL32_TV_USEC, timeval, tv_usec);
409 OFFSET(TSPC32_TV_SEC, timespec, tv_sec);
410 OFFSET(TSPC32_TV_NSEC, timespec, tv_nsec);
412 /* timeval/timezone offsets for use by vdso */
413 OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
414 OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
416 /* Other bits used by the vdso */
417 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
418 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
419 DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
420 DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
421 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
422 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
425 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
428 #ifdef CONFIG_PPC_BOOK3S_64
429 DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
431 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
433 DEFINE(PTE_SIZE, sizeof(pte_t));
436 OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
437 OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
438 OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
439 OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
440 OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
441 OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
442 #ifdef CONFIG_ALTIVEC
443 OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
445 OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
446 OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
447 OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
448 #ifdef CONFIG_PPC_BOOK3S
449 OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
451 OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
452 OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
453 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
454 OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
455 OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
456 OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
457 OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
458 OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
459 OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
460 OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
462 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
463 OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
464 OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
465 OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
466 OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
467 OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
468 OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
469 OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
470 OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
471 OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
472 OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
473 OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
475 OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
476 OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
477 OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
478 OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
479 OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
480 OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
481 OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
482 OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
483 OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
484 OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
485 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
486 OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
489 OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
490 OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
491 OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
492 OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
493 OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
494 OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
496 OFFSET(VCPU_KVM, kvm_vcpu, kvm);
497 OFFSET(KVM_LPID, kvm, arch.lpid);
500 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
501 OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
502 OFFSET(KVM_SDR1, kvm, arch.sdr1);
503 OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
504 OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
505 OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
506 OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
507 OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
508 OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
509 OFFSET(KVM_RADIX, kvm, arch.radix);
510 OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
511 OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
512 OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
513 OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
514 OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
515 OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
516 OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested);
517 OFFSET(VCPU_CPU, kvm_vcpu, cpu);
518 OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
520 #ifdef CONFIG_PPC_BOOK3S
521 OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
522 OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
523 OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
524 OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
525 OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
526 OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
527 OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
528 OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
529 OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
530 OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
531 OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
532 OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
533 OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
534 OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
535 OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
536 OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
537 OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
538 OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
539 OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
540 OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
541 OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
542 OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
543 OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
544 OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
545 OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
546 OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
547 OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
548 OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
549 OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
550 OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
551 OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
552 OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
553 OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
554 OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
555 OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
556 OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
557 OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
558 OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
559 OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
560 OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
561 OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
562 OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
563 OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
564 OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
565 OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
566 OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
567 OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
568 OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
569 OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
570 OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
571 OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
572 OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
573 OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
574 OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
575 OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
576 OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
577 OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
578 OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
579 OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
580 OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
581 OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
582 OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
583 OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
584 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
585 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
586 OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
587 OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
588 OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
589 OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
590 OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
591 OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
592 OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
593 OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
594 OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
595 OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
596 OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
597 OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
598 OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
599 OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
600 OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
601 OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
604 #ifdef CONFIG_PPC_BOOK3S_64
605 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
606 OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
607 # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
609 # define SVCPU_FIELD(x, f)
611 # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
613 # define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
614 # define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
617 SVCPU_FIELD(SVCPU_CR, cr);
618 SVCPU_FIELD(SVCPU_XER, xer);
619 SVCPU_FIELD(SVCPU_CTR, ctr);
620 SVCPU_FIELD(SVCPU_LR, lr);
621 SVCPU_FIELD(SVCPU_PC, pc);
622 SVCPU_FIELD(SVCPU_R0, gpr[0]);
623 SVCPU_FIELD(SVCPU_R1, gpr[1]);
624 SVCPU_FIELD(SVCPU_R2, gpr[2]);
625 SVCPU_FIELD(SVCPU_R3, gpr[3]);
626 SVCPU_FIELD(SVCPU_R4, gpr[4]);
627 SVCPU_FIELD(SVCPU_R5, gpr[5]);
628 SVCPU_FIELD(SVCPU_R6, gpr[6]);
629 SVCPU_FIELD(SVCPU_R7, gpr[7]);
630 SVCPU_FIELD(SVCPU_R8, gpr[8]);
631 SVCPU_FIELD(SVCPU_R9, gpr[9]);
632 SVCPU_FIELD(SVCPU_R10, gpr[10]);
633 SVCPU_FIELD(SVCPU_R11, gpr[11]);
634 SVCPU_FIELD(SVCPU_R12, gpr[12]);
635 SVCPU_FIELD(SVCPU_R13, gpr[13]);
636 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
637 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
638 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
639 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
640 #ifdef CONFIG_PPC_BOOK3S_32
641 SVCPU_FIELD(SVCPU_SR, sr);
644 SVCPU_FIELD(SVCPU_SLB, slb);
645 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
646 SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
649 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
650 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
651 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
652 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
653 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
654 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
655 HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
656 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
657 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
658 HSTATE_FIELD(HSTATE_NAPPING, napping);
660 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
661 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
662 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
663 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
664 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
665 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
666 HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
667 HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
668 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
669 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
670 HSTATE_FIELD(HSTATE_PTID, ptid);
671 HSTATE_FIELD(HSTATE_TID, tid);
672 HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
673 HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
674 HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
675 HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
676 HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
677 HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
678 HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
679 HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
680 HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
681 HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
682 HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
683 HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
684 HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
685 HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
686 HSTATE_FIELD(HSTATE_PURR, host_purr);
687 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
688 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
689 HSTATE_FIELD(HSTATE_DABR, dabr);
690 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
691 HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
692 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
693 OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
694 OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
695 OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
696 OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
697 OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
698 OFFSET(KVM_SPLIT_DO_SET, kvm_split_mode, do_set);
699 OFFSET(KVM_SPLIT_DO_RESTORE, kvm_split_mode, do_restore);
700 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
702 #ifdef CONFIG_PPC_BOOK3S_64
703 HSTATE_FIELD(HSTATE_CFAR, cfar);
704 HSTATE_FIELD(HSTATE_PPR, ppr);
705 HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
706 #endif /* CONFIG_PPC_BOOK3S_64 */
708 #else /* CONFIG_PPC_BOOK3S */
709 OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
710 OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
711 OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
712 OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
713 OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
714 OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
715 OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
716 OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
717 OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
718 OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
719 #endif /* CONFIG_PPC_BOOK3S */
720 #endif /* CONFIG_KVM */
722 #ifdef CONFIG_KVM_GUEST
723 OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
724 OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
725 OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
726 OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
727 OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
728 OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
729 OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
733 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
734 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
736 #ifdef CONFIG_PPC_FSL_BOOK3E
737 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
738 OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
739 OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
740 OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
741 OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
742 OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
745 #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
746 OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
747 OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
748 OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
749 OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
752 #ifdef CONFIG_KVM_BOOKE_HV
753 OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
754 OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
757 #ifdef CONFIG_KVM_XICS
758 DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
759 arch.xive_saved_state));
760 DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
761 arch.xive_cam_word));
762 DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
763 DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
764 DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
765 DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
768 #ifdef CONFIG_KVM_EXIT_TIMING
769 OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
770 OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
771 OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
772 OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
775 DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
776 DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
778 #ifdef CONFIG_PPC_8xx
779 DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));