arch/powerpc/boot/dts/tqm8541.dts

   1 /*
   2  * TQM 8541 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "tqc,tqm8541";
  16         compatible = "tqc,tqm8541";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8541@0 {
  33                         device_type = "cpu";
  34                         reg = <0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <32768>;
  38                         i-cache-size = <32768>;
  39                         timebase-frequency = <0>;
  40                         bus-frequency = <0>;
  41                         clock-frequency = <0>;
  42                         next-level-cache = <&L2>;
  43                 };
  44         };
  45
  46         memory {
  47                 device_type = "memory";
  48                 reg = <0x00000000 0x10000000>;
  49         };
  50
  51         soc@e0000000 {
  52                 #address-cells = <1>;
  53                 #size-cells = <1>;
  54                 device_type = "soc";
  55                 ranges = <0x0 0xe0000000 0x100000>;
  56                 reg = <0xe0000000 0x200>;
  57                 bus-frequency = <0>;
  58                 compatible = "fsl,mpc8541-immr", "simple-bus";
  59
  60                 ecm-law@0 {
  61                         compatible = "fsl,ecm-law";
  62                         reg = <0x0 0x1000>;
  63                         fsl,num-laws = <8>;
  64                 };
  65
  66                 ecm@1000 {
  67                         compatible = "fsl,mpc8541-ecm", "fsl,ecm";
  68                         reg = <0x1000 0x1000>;
  69                         interrupts = <17 2>;
  70                         interrupt-parent = <&mpic>;
  71                 };
  72
  73                 memory-controller@2000 {
  74                         compatible = "fsl,mpc8540-memory-controller";
  75                         reg = <0x2000 0x1000>;
  76                         interrupt-parent = <&mpic>;
  77                         interrupts = <18 2>;
  78                 };
  79
  80                 L2: l2-cache-controller@20000 {
  81                         compatible = "fsl,mpc8540-l2-cache-controller";
  82                         reg = <0x20000 0x1000>;
  83                         cache-line-size = <32>;
  84                         cache-size = <0x40000>; // L2, 256K
  85                         interrupt-parent = <&mpic>;
  86                         interrupts = <16 2>;
  87                 };
  88
  89                 i2c@3000 {
  90                         #address-cells = <1>;
  91                         #size-cells = <0>;
  92                         cell-index = <0>;
  93                         compatible = "fsl-i2c";
  94                         reg = <0x3000 0x100>;
  95                         interrupts = <43 2>;
  96                         interrupt-parent = <&mpic>;
  97                         dfsrr;
  98
  99                         dtt@48 {
 100                                 compatible = "national,lm75";
 101                                 reg = <0x48>;
 102                         };
 103
 104                         rtc@68 {
 105                                 compatible = "dallas,ds1337";
 106                                 reg = <0x68>;
 107                         };
 108                 };
 109
 110                 dma@21300 {
 111                         #address-cells = <1>;
 112                         #size-cells = <1>;
 113                         compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
 114                         reg = <0x21300 0x4>;
 115                         ranges = <0x0 0x21100 0x200>;
 116                         cell-index = <0>;
 117                         dma-channel@0 {
 118                                 compatible = "fsl,mpc8541-dma-channel",
 119                                                 "fsl,eloplus-dma-channel";
 120                                 reg = <0x0 0x80>;
 121                                 cell-index = <0>;
 122                                 interrupt-parent = <&mpic>;
 123                                 interrupts = <20 2>;
 124                         };
 125                         dma-channel@80 {
 126                                 compatible = "fsl,mpc8541-dma-channel",
 127                                                 "fsl,eloplus-dma-channel";
 128                                 reg = <0x80 0x80>;
 129                                 cell-index = <1>;
 130                                 interrupt-parent = <&mpic>;
 131                                 interrupts = <21 2>;
 132                         };
 133                         dma-channel@100 {
 134                                 compatible = "fsl,mpc8541-dma-channel",
 135                                                 "fsl,eloplus-dma-channel";
 136                                 reg = <0x100 0x80>;
 137                                 cell-index = <2>;
 138                                 interrupt-parent = <&mpic>;
 139                                 interrupts = <22 2>;
 140                         };
 141                         dma-channel@180 {
 142                                 compatible = "fsl,mpc8541-dma-channel",
 143                                                 "fsl,eloplus-dma-channel";
 144                                 reg = <0x180 0x80>;
 145                                 cell-index = <3>;
 146                                 interrupt-parent = <&mpic>;
 147                                 interrupts = <23 2>;
 148                         };
 149                 };
 150
 151                 enet0: ethernet@24000 {
 152                         #address-cells = <1>;
 153                         #size-cells = <1>;
 154                         cell-index = <0>;
 155                         device_type = "network";
 156                         model = "TSEC";
 157                         compatible = "gianfar";
 158                         reg = <0x24000 0x1000>;
 159                         ranges = <0x0 0x24000 0x1000>;
 160                         local-mac-address = [ 00 00 00 00 00 00 ];
 161                         interrupts = <29 2 30 2 34 2>;
 162                         interrupt-parent = <&mpic>;
 163                         tbi-handle = <&tbi0>;
 164                         phy-handle = <&phy2>;
 165
 166                         mdio@520 {
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169                                 compatible = "fsl,gianfar-mdio";
 170                                 reg = <0x520 0x20>;
 171
 172                                 phy1: ethernet-phy@1 {
 173                                         interrupt-parent = <&mpic>;
 174                                         interrupts = <8 1>;
 175                                         reg = <1>;
 176                                         device_type = "ethernet-phy";
 177                                 };
 178                                 phy2: ethernet-phy@2 {
 179                                         interrupt-parent = <&mpic>;
 180                                         interrupts = <8 1>;
 181                                         reg = <2>;
 182                                         device_type = "ethernet-phy";
 183                                 };
 184                                 phy3: ethernet-phy@3 {
 185                                         interrupt-parent = <&mpic>;
 186                                         interrupts = <8 1>;
 187                                         reg = <3>;
 188                                         device_type = "ethernet-phy";
 189                                 };
 190                                 tbi0: tbi-phy@11 {
 191                                         reg = <0x11>;
 192                                         device_type = "tbi-phy";
 193                                 };
 194                         };
 195                 };
 196
 197                 enet1: ethernet@25000 {
 198                         #address-cells = <1>;
 199                         #size-cells = <1>;
 200                         cell-index = <1>;
 201                         device_type = "network";
 202                         model = "TSEC";
 203                         compatible = "gianfar";
 204                         reg = <0x25000 0x1000>;
 205                         ranges = <0x0 0x25000 0x1000>;
 206                         local-mac-address = [ 00 00 00 00 00 00 ];
 207                         interrupts = <35 2 36 2 40 2>;
 208                         interrupt-parent = <&mpic>;
 209                         tbi-handle = <&tbi1>;
 210                         phy-handle = <&phy1>;
 211
 212                         mdio@520 {
 213                                 #address-cells = <1>;
 214                                 #size-cells = <0>;
 215                                 compatible = "fsl,gianfar-tbi";
 216                                 reg = <0x520 0x20>;
 217
 218                                 tbi1: tbi-phy@11 {
 219                                         reg = <0x11>;
 220                                         device_type = "tbi-phy";
 221                                 };
 222                         };
 223                 };
 224
 225                 serial0: serial@4500 {
 226                         cell-index = <0>;
 227                         device_type = "serial";
 228                         compatible = "ns16550";
 229                         reg = <0x4500 0x100>;   // reg base, size
 230                         clock-frequency = <0>;  // should we fill in in uboot?
 231                         interrupts = <42 2>;
 232                         interrupt-parent = <&mpic>;
 233                 };
 234
 235                 serial1: serial@4600 {
 236                         cell-index = <1>;
 237                         device_type = "serial";
 238                         compatible = "ns16550";
 239                         reg = <0x4600 0x100>;   // reg base, size
 240                         clock-frequency = <0>;  // should we fill in in uboot?
 241                         interrupts = <42 2>;
 242                         interrupt-parent = <&mpic>;
 243                 };
 244
 245                 crypto@30000 {
 246                         compatible = "fsl,sec2.0";
 247                         reg = <0x30000 0x10000>;
 248                         interrupts = <45 2>;
 249                         interrupt-parent = <&mpic>;
 250                         fsl,num-channels = <4>;
 251                         fsl,channel-fifo-len = <24>;
 252                         fsl,exec-units-mask = <0x7e>;
 253                         fsl,descriptor-types-mask = <0x01010ebf>;
 254                 };
 255
 256                 mpic: pic@40000 {
 257                         interrupt-controller;
 258                         #address-cells = <0>;
 259                         #interrupt-cells = <2>;
 260                         reg = <0x40000 0x40000>;
 261                         device_type = "open-pic";
 262                         compatible = "chrp,open-pic";
 263                 };
 264
 265                 cpm@919c0 {
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus";
 269                         reg = <0x919c0 0x30>;
 270                         ranges;
 271
 272                         muram@80000 {
 273                                 #address-cells = <1>;
 274                                 #size-cells = <1>;
 275                                 ranges = <0 0x80000 0x10000>;
 276
 277                                 data@0 {
 278                                         compatible = "fsl,cpm-muram-data";
 279                                         reg = <0 0x2000 0x9000 0x1000>;
 280                                 };
 281                         };
 282
 283                         brg@919f0 {
 284                                 compatible = "fsl,mpc8541-brg",
 285                                              "fsl,cpm2-brg",
 286                                              "fsl,cpm-brg";
 287                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 288                                 clock-frequency = <0>;
 289                         };
 290
 291                         cpmpic: pic@90c00 {
 292                                 interrupt-controller;
 293                                 #address-cells = <0>;
 294                                 #interrupt-cells = <2>;
 295                                 interrupts = <46 2>;
 296                                 interrupt-parent = <&mpic>;
 297                                 reg = <0x90c00 0x80>;
 298                                 compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
 299                         };
 300                 };
 301         };
 302
 303         pci0: pci@e0008000 {
 304                 #interrupt-cells = <1>;
 305                 #size-cells = <2>;
 306                 #address-cells = <3>;
 307                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 308                 device_type = "pci";
 309                 reg = <0xe0008000 0x1000>;
 310                 clock-frequency = <66666666>;
 311                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 312                 interrupt-map = <
 313                                 /* IDSEL 28 */
 314                                  0xe000 0 0 1 &mpic 2 1
 315                                  0xe000 0 0 2 &mpic 3 1>;
 316
 317                 interrupt-parent = <&mpic>;
 318                 interrupts = <24 2>;
 319                 bus-range = <0 0>;
 320                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 321                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 322         };
 323 };