2 * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c
3 * Copyright (C) 2000-2001 Toshiba Corporation
5 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
6 * terms of the GNU General Public License version 2. This program is
7 * licensed "as is" without any warranty of any kind, whether express
10 * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/errno.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/spinlock.h>
19 #include <linux/wait.h>
20 #include <asm/tx4938/spi.h>
21 #include <asm/tx4938/tx4938.h>
23 static int (*txx9_spi_cs_func)(int chipid, int on);
24 static DEFINE_SPINLOCK(txx9_spi_lock);
26 extern unsigned int txx9_gbus_clock;
28 #define SPI_FIFO_SIZE 4
30 void __init txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on))
32 txx9_spi_cs_func = cs_func;
33 /* enter config mode */
34 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
37 static DECLARE_WAIT_QUEUE_HEAD(txx9_spi_wait);
39 static void txx9_spi_interrupt(int irq, void *dev_id)
42 tx4938_spiptr->cr0 &= ~TXx9_SPCR0_RBSIE;
43 wake_up(&txx9_spi_wait);
45 static struct irqaction txx9_spi_action = {
46 txx9_spi_interrupt, 0, 0, "spi", NULL, NULL,
49 void __init txx9_spi_irqinit(int irc_irq)
51 setup_irq(irc_irq, &txx9_spi_action);
54 int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
55 unsigned char **inbufs, unsigned int *incounts,
56 unsigned char **outbufs, unsigned int *outcounts,
59 unsigned int incount, outcount;
60 unsigned char *inp, *outp;
64 spin_lock_irqsave(&txx9_spi_lock, flags);
65 if ((tx4938_spiptr->mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE) {
66 spin_unlock_irqrestore(&txx9_spi_lock, flags);
69 /* enter config mode */
70 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
72 (desc->byteorder ? TXx9_SPCR0_SBOS : 0) |
73 (desc->polarity ? TXx9_SPCR0_SPOL : 0) |
74 (desc->phase ? TXx9_SPCR0_SPHA : 0) |
77 (((TXX9_IMCLK + desc->baud) / (2 * desc->baud) - 1) << 8) |
78 0x08 /* 8 bit only */;
79 /* enter active mode */
80 tx4938_spiptr->mcr = TXx9_SPMCR_ACTIVE;
81 spin_unlock_irqrestore(&txx9_spi_lock, flags);
84 if ((ret = txx9_spi_cs_func(chipid, 1)) < 0) {
85 spin_unlock_irqrestore(&txx9_spi_lock, flags);
91 inp = inbufs ? *inbufs : NULL;
92 outp = outbufs ? *outbufs : NULL;
100 incount = incounts ? *incounts++ : 0;
101 inp = (incount && inbufs) ? *inbufs++ : NULL;
104 outcount = outcounts ? *outcounts++ : 0;
105 outp = (outcount && outbufs) ? *outbufs++ : NULL;
109 count = SPI_FIFO_SIZE;
111 count = min(count, incount);
113 count = min(count, outcount);
115 /* now tx must be idle... */
116 while (!(tx4938_spiptr->sr & TXx9_SPSR_SIDLE))
120 (tx4938_spiptr->cr0 & ~TXx9_SPCR0_RXIFL_MASK) |
124 tx4938_spiptr->cr0 |= TXx9_SPCR0_RBSIE;
127 for (i = 0; i < count; i++)
128 tx4938_spiptr->dr = inp ? *inp++ : 0;
129 /* wait all rx data */
131 wait_event(txx9_spi_wait,
132 tx4938_spiptr->sr & TXx9_SPSR_SRRDY);
134 while (!(tx4938_spiptr->sr & TXx9_SPSR_RBSI))
138 for (i = 0; i < count; i++) {
139 data = tx4938_spiptr->dr;
151 txx9_spi_cs_func(chipid, 0);
154 spin_lock_irqsave(&txx9_spi_lock, flags);
155 /* enter config mode */
156 tx4938_spiptr->mcr = TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR;
157 spin_unlock_irqrestore(&txx9_spi_lock, flags);