2 * @file op_model_ppro.h
3 * pentium pro / P6 model-specific MSR operations
5 * @remark Copyright 2002 OProfile authors
6 * @remark Read the file COPYING
9 * @author Philippe Elie
10 * @author Graydon Hoare
13 #include <linux/oprofile.h>
14 #include <asm/ptrace.h>
19 #include "op_x86_model.h"
20 #include "op_counter.h"
22 #define NUM_COUNTERS 2
23 #define NUM_CONTROLS 2
25 #define CTR_IS_RESERVED(msrs,c) (msrs->counters[(c)].addr ? 1 : 0)
26 #define CTR_READ(l,h,msrs,c) do {rdmsr(msrs->counters[(c)].addr, (l), (h));} while (0)
27 #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(u32)(l), -1);} while (0)
28 #define CTR_OVERFLOWED(n) (!((n) & (1U<<31)))
30 #define CTRL_IS_RESERVED(msrs,c) (msrs->controls[(c)].addr ? 1 : 0)
31 #define CTRL_READ(l,h,msrs,c) do {rdmsr((msrs->controls[(c)].addr), (l), (h));} while (0)
32 #define CTRL_WRITE(l,h,msrs,c) do {wrmsr((msrs->controls[(c)].addr), (l), (h));} while (0)
33 #define CTRL_SET_ACTIVE(n) (n |= (1<<22))
34 #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22))
35 #define CTRL_CLEAR(x) (x &= (1<<21))
36 #define CTRL_SET_ENABLE(val) (val |= 1<<20)
37 #define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16))
38 #define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17))
39 #define CTRL_SET_UM(val, m) (val |= (m << 8))
40 #define CTRL_SET_EVENT(val, e) (val |= e)
42 static unsigned long reset_value[NUM_COUNTERS];
44 static void ppro_fill_in_addresses(struct op_msrs * const msrs)
48 for (i=0; i < NUM_COUNTERS; i++) {
49 if (reserve_perfctr_nmi(MSR_P6_PERFCTR0 + i))
50 msrs->counters[i].addr = MSR_P6_PERFCTR0 + i;
52 msrs->counters[i].addr = 0;
55 for (i=0; i < NUM_CONTROLS; i++) {
56 if (reserve_evntsel_nmi(MSR_P6_EVNTSEL0 + i))
57 msrs->controls[i].addr = MSR_P6_EVNTSEL0 + i;
59 msrs->controls[i].addr = 0;
64 static void ppro_setup_ctrs(struct op_msrs const * const msrs)
66 unsigned int low, high;
69 /* clear all counters */
70 for (i = 0 ; i < NUM_CONTROLS; ++i) {
71 if (unlikely(!CTRL_IS_RESERVED(msrs,i)))
73 CTRL_READ(low, high, msrs, i);
75 CTRL_WRITE(low, high, msrs, i);
78 /* avoid a false detection of ctr overflows in NMI handler */
79 for (i = 0; i < NUM_COUNTERS; ++i) {
80 if (unlikely(!CTR_IS_RESERVED(msrs,i)))
82 CTR_WRITE(1, msrs, i);
85 /* enable active counters */
86 for (i = 0; i < NUM_COUNTERS; ++i) {
87 if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs,i))) {
88 reset_value[i] = counter_config[i].count;
90 CTR_WRITE(counter_config[i].count, msrs, i);
92 CTRL_READ(low, high, msrs, i);
95 CTRL_SET_USR(low, counter_config[i].user);
96 CTRL_SET_KERN(low, counter_config[i].kernel);
97 CTRL_SET_UM(low, counter_config[i].unit_mask);
98 CTRL_SET_EVENT(low, counter_config[i].event);
99 CTRL_WRITE(low, high, msrs, i);
107 static int ppro_check_ctrs(struct pt_regs * const regs,
108 struct op_msrs const * const msrs)
110 unsigned int low, high;
113 for (i = 0 ; i < NUM_COUNTERS; ++i) {
116 CTR_READ(low, high, msrs, i);
117 if (CTR_OVERFLOWED(low)) {
118 oprofile_add_sample(regs, i);
119 CTR_WRITE(reset_value[i], msrs, i);
123 /* Only P6 based Pentium M need to re-unmask the apic vector but it
124 * doesn't hurt other P6 variant */
125 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
127 /* We can't work out if we really handled an interrupt. We
128 * might have caught a *second* counter just after overflowing
129 * the interrupt for this counter then arrives
130 * and we don't find a counter that's overflowed, so we
131 * would return 0 and get dazed + confused. Instead we always
132 * assume we found an overflow. This sucks.
138 static void ppro_start(struct op_msrs const * const msrs)
140 unsigned int low,high;
143 for (i = 0; i < NUM_COUNTERS; ++i) {
144 if (reset_value[i]) {
145 CTRL_READ(low, high, msrs, i);
146 CTRL_SET_ACTIVE(low);
147 CTRL_WRITE(low, high, msrs, i);
153 static void ppro_stop(struct op_msrs const * const msrs)
155 unsigned int low,high;
158 for (i = 0; i < NUM_COUNTERS; ++i) {
161 CTRL_READ(low, high, msrs, i);
162 CTRL_SET_INACTIVE(low);
163 CTRL_WRITE(low, high, msrs, i);
167 static void ppro_shutdown(struct op_msrs const * const msrs)
171 for (i = 0 ; i < NUM_COUNTERS ; ++i) {
172 if (CTR_IS_RESERVED(msrs,i))
173 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
175 for (i = 0 ; i < NUM_CONTROLS ; ++i) {
176 if (CTRL_IS_RESERVED(msrs,i))
177 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
182 struct op_x86_model_spec const op_ppro_spec = {
183 .num_counters = NUM_COUNTERS,
184 .num_controls = NUM_CONTROLS,
185 .fill_in_addresses = &ppro_fill_in_addresses,
186 .setup_ctrs = &ppro_setup_ctrs,
187 .check_ctrs = &ppro_check_ctrs,
188 .start = &ppro_start,
190 .shutdown = &ppro_shutdown