Merge branch 'for-6.9/amd-sfh' into for-linus
[sfrench/cifs-2.6.git] / arch / arm64 / mm / dma-mapping.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 ARM Ltd.
4  * Author: Catalin Marinas <catalin.marinas@arm.com>
5  */
6
7 #include <linux/gfp.h>
8 #include <linux/cache.h>
9 #include <linux/dma-map-ops.h>
10 #include <linux/iommu.h>
11 #include <xen/xen.h>
12
13 #include <asm/cacheflush.h>
14 #include <asm/xen/xen-ops.h>
15
16 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
17                               enum dma_data_direction dir)
18 {
19         unsigned long start = (unsigned long)phys_to_virt(paddr);
20
21         dcache_clean_poc(start, start + size);
22 }
23
24 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
25                            enum dma_data_direction dir)
26 {
27         unsigned long start = (unsigned long)phys_to_virt(paddr);
28
29         if (dir == DMA_TO_DEVICE)
30                 return;
31
32         dcache_inval_poc(start, start + size);
33 }
34
35 void arch_dma_prep_coherent(struct page *page, size_t size)
36 {
37         unsigned long start = (unsigned long)page_address(page);
38
39         dcache_clean_poc(start, start + size);
40 }
41
42 #ifdef CONFIG_IOMMU_DMA
43 void arch_teardown_dma_ops(struct device *dev)
44 {
45         dev->dma_ops = NULL;
46 }
47 #endif
48
49 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
50                         bool coherent)
51 {
52         int cls = cache_line_size_of_cpu();
53
54         WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN,
55                    TAINT_CPU_OUT_OF_SPEC,
56                    "%s %s: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
57                    dev_driver_string(dev), dev_name(dev),
58                    ARCH_DMA_MINALIGN, cls);
59
60         dev->dma_coherent = coherent;
61         if (device_iommu_mapped(dev))
62                 iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
63
64         xen_setup_dma_ops(dev);
65 }