1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2020 - Google Inc
4 * Author: Andrew Scull <ascull@google.com>
7 #include <linux/linkage.h>
9 #include <asm/assembler.h>
10 #include <asm/kvm_asm.h>
11 #include <asm/kvm_mmu.h>
15 SYM_FUNC_START(__host_exit)
18 /* Store the host regs x2 and x3 */
19 stp x2, x3, [x0, #CPU_XREG_OFFSET(2)]
21 /* Retrieve the host regs x0-x1 from the stack */
22 ldp x2, x3, [sp], #16 // x0, x1
24 /* Store the host regs x0-x1 and x4-x17 */
25 stp x2, x3, [x0, #CPU_XREG_OFFSET(0)]
26 stp x4, x5, [x0, #CPU_XREG_OFFSET(4)]
27 stp x6, x7, [x0, #CPU_XREG_OFFSET(6)]
28 stp x8, x9, [x0, #CPU_XREG_OFFSET(8)]
29 stp x10, x11, [x0, #CPU_XREG_OFFSET(10)]
30 stp x12, x13, [x0, #CPU_XREG_OFFSET(12)]
31 stp x14, x15, [x0, #CPU_XREG_OFFSET(14)]
32 stp x16, x17, [x0, #CPU_XREG_OFFSET(16)]
34 /* Store the host regs x18-x29, lr */
35 save_callee_saved_regs x0
37 /* Save the host context pointer in x29 across the function call */
41 /* Restore host regs x0-x17 */
42 __host_enter_restore_full:
43 ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)]
44 ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)]
45 ldp x4, x5, [x29, #CPU_XREG_OFFSET(4)]
46 ldp x6, x7, [x29, #CPU_XREG_OFFSET(6)]
48 /* x0-7 are use for panic arguments */
49 __host_enter_for_panic:
50 ldp x8, x9, [x29, #CPU_XREG_OFFSET(8)]
51 ldp x10, x11, [x29, #CPU_XREG_OFFSET(10)]
52 ldp x12, x13, [x29, #CPU_XREG_OFFSET(12)]
53 ldp x14, x15, [x29, #CPU_XREG_OFFSET(14)]
54 ldp x16, x17, [x29, #CPU_XREG_OFFSET(16)]
56 /* Restore host regs x18-x29, lr */
57 restore_callee_saved_regs x29
59 /* Do not touch any register after this! */
60 __host_enter_without_restoring:
63 SYM_FUNC_END(__host_exit)
66 * void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
68 SYM_FUNC_START(__host_enter)
70 b __host_enter_restore_full
71 SYM_FUNC_END(__host_enter)
74 * void __noreturn __hyp_do_panic(bool restore_host, u64 spsr, u64 elr, u64 par);
76 SYM_FUNC_START(__hyp_do_panic)
77 /* Prepare and exit to the host's panic funciton. */
78 mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
85 /* Set the panic format string. Use the, now free, LR as scratch. */
86 ldr lr, =__hyp_panic_string
89 /* Load the format arguments into x1-7. */
96 /* Enter the host, conditionally restoring the host context. */
99 b.eq __host_enter_without_restoring
100 b __host_enter_for_panic
101 SYM_FUNC_END(__hyp_do_panic)
103 .macro host_el1_sync_vect
106 stp x0, x1, [sp, #-16]!
108 lsr x0, x0, #ESR_ELx_EC_SHIFT
109 cmp x0, #ESR_ELx_EC_HVC64
112 ldp x0, x1, [sp] // Don't fixup the stack yet
114 /* Check for a stub HVC call */
115 cmp x0, #HVC_STUB_HCALL_NR
120 * Compute the idmap address of __kvm_handle_stub_hvc and
121 * jump there. Since we use kimage_voffset, do not use the
122 * HYP VA for __kvm_handle_stub_hvc, but the kernel VA instead
123 * (by loading it from the constant pool).
125 * Preserve x0-x4, which may contain stub parameters.
127 ldr x5, =__kvm_handle_stub_hvc
131 .if ((.L__vect_end\@ - .L__vect_start\@) > 0x80)
132 .error "host_el1_sync_vect larger than vector entry"
136 .macro invalid_host_el2_vect
138 /* If a guest is loaded, panic out of it. */
139 stp x0, x1, [sp, #-16]!
140 get_loaded_vcpu x0, x1
141 cbnz x0, __guest_exit_panic
145 * The panic may not be clean if the exception is taken before the host
146 * context has been saved by __host_exit or after the hyp context has
147 * been partially clobbered by __host_enter.
152 .macro invalid_host_el1_vect
154 mov x0, xzr /* restore_host = false */
162 * The host vector does not use an ESB instruction in order to avoid consuming
163 * SErrors that should only be consumed by the host. Guest entry is deferred by
164 * __guest_enter if there are any pending asynchronous exceptions so hyp will
165 * always return to the host without having consumerd host SErrors.
167 * CONFIG_KVM_INDIRECT_VECTORS is not applied to the host vectors because the
168 * host knows about the EL2 vectors already, and there is no point in hiding
172 SYM_CODE_START(__kvm_hyp_host_vector)
173 invalid_host_el2_vect // Synchronous EL2t
174 invalid_host_el2_vect // IRQ EL2t
175 invalid_host_el2_vect // FIQ EL2t
176 invalid_host_el2_vect // Error EL2t
178 invalid_host_el2_vect // Synchronous EL2h
179 invalid_host_el2_vect // IRQ EL2h
180 invalid_host_el2_vect // FIQ EL2h
181 invalid_host_el2_vect // Error EL2h
183 host_el1_sync_vect // Synchronous 64-bit EL1
184 invalid_host_el1_vect // IRQ 64-bit EL1
185 invalid_host_el1_vect // FIQ 64-bit EL1
186 invalid_host_el1_vect // Error 64-bit EL1
188 invalid_host_el1_vect // Synchronous 32-bit EL1
189 invalid_host_el1_vect // IRQ 32-bit EL1
190 invalid_host_el1_vect // FIQ 32-bit EL1
191 invalid_host_el1_vect // Error 32-bit EL1
192 SYM_CODE_END(__kvm_hyp_host_vector)
195 * Forward SMC with arguments in struct kvm_cpu_context, and
196 * store the result into the same struct. Assumes SMCCC 1.2 or older.
198 * x0: struct kvm_cpu_context*
200 SYM_CODE_START(__kvm_hyp_host_forward_smc)
202 * Use x18 to keep the pointer to the host context because
203 * x18 is callee-saved in SMCCC but not in AAPCS64.
207 ldp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
208 ldp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
209 ldp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
210 ldp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
211 ldp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
212 ldp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
213 ldp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
214 ldp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
215 ldp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
219 stp x0, x1, [x18, #CPU_XREG_OFFSET(0)]
220 stp x2, x3, [x18, #CPU_XREG_OFFSET(2)]
221 stp x4, x5, [x18, #CPU_XREG_OFFSET(4)]
222 stp x6, x7, [x18, #CPU_XREG_OFFSET(6)]
223 stp x8, x9, [x18, #CPU_XREG_OFFSET(8)]
224 stp x10, x11, [x18, #CPU_XREG_OFFSET(10)]
225 stp x12, x13, [x18, #CPU_XREG_OFFSET(12)]
226 stp x14, x15, [x18, #CPU_XREG_OFFSET(14)]
227 stp x16, x17, [x18, #CPU_XREG_OFFSET(16)]
230 SYM_CODE_END(__kvm_hyp_host_forward_smc)