1 // SPDX-License-Identifier: GPL-2.0-only
3 * Based on arch/arm/kernel/ptrace.c
6 * edited by Linus Torvalds
7 * ARM modifications Copyright (C) 2000 Russell King
8 * Copyright (C) 2012 ARM Ltd.
11 #include <linux/audit.h>
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/sched/signal.h>
15 #include <linux/sched/task_stack.h>
17 #include <linux/nospec.h>
18 #include <linux/smp.h>
19 #include <linux/ptrace.h>
20 #include <linux/user.h>
21 #include <linux/seccomp.h>
22 #include <linux/security.h>
23 #include <linux/init.h>
24 #include <linux/signal.h>
25 #include <linux/string.h>
26 #include <linux/uaccess.h>
27 #include <linux/perf_event.h>
28 #include <linux/hw_breakpoint.h>
29 #include <linux/regset.h>
30 #include <linux/elf.h>
32 #include <asm/compat.h>
33 #include <asm/cpufeature.h>
34 #include <asm/debug-monitors.h>
35 #include <asm/fpsimd.h>
37 #include <asm/pointer_auth.h>
38 #include <asm/stacktrace.h>
39 #include <asm/syscall.h>
40 #include <asm/traps.h>
41 #include <asm/system_misc.h>
43 #define CREATE_TRACE_POINTS
44 #include <trace/events/syscalls.h>
46 struct pt_regs_offset {
51 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
52 #define REG_OFFSET_END {.name = NULL, .offset = 0}
53 #define GPR_OFFSET_NAME(r) \
54 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
56 static const struct pt_regs_offset regoffset_table[] = {
88 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
91 REG_OFFSET_NAME(pstate),
96 * regs_query_register_offset() - query register offset from its name
97 * @name: the name of a register
99 * regs_query_register_offset() returns the offset of a register in struct
100 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
102 int regs_query_register_offset(const char *name)
104 const struct pt_regs_offset *roff;
106 for (roff = regoffset_table; roff->name != NULL; roff++)
107 if (!strcmp(roff->name, name))
113 * regs_within_kernel_stack() - check the address in the stack
114 * @regs: pt_regs which contains kernel stack pointer.
115 * @addr: address which is checked.
117 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
118 * If @addr is within the kernel stack, it returns true. If not, returns false.
120 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
122 return ((addr & ~(THREAD_SIZE - 1)) ==
123 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
124 on_irq_stack(addr, sizeof(unsigned long), NULL);
128 * regs_get_kernel_stack_nth() - get Nth entry of the stack
129 * @regs: pt_regs which contains kernel stack pointer.
130 * @n: stack entry number.
132 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
133 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
136 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
138 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
141 if (regs_within_kernel_stack(regs, (unsigned long)addr))
148 * TODO: does not yet catch signals sent when the child dies.
149 * in exit.c or in signal.c.
153 * Called by kernel/ptrace.c when detaching..
155 void ptrace_disable(struct task_struct *child)
158 * This would be better off in core code, but PTRACE_DETACH has
159 * grown its fair share of arch-specific worts and changing it
160 * is likely to cause regressions on obscure architectures.
162 user_disable_single_step(child);
165 #ifdef CONFIG_HAVE_HW_BREAKPOINT
167 * Handle hitting a HW-breakpoint.
169 static void ptrace_hbptriggered(struct perf_event *bp,
170 struct perf_sample_data *data,
171 struct pt_regs *regs)
173 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
174 const char *desc = "Hardware breakpoint trap (ptrace)";
177 if (is_compat_task()) {
181 for (i = 0; i < ARM_MAX_BRP; ++i) {
182 if (current->thread.debug.hbp_break[i] == bp) {
183 si_errno = (i << 1) + 1;
188 for (i = 0; i < ARM_MAX_WRP; ++i) {
189 if (current->thread.debug.hbp_watch[i] == bp) {
190 si_errno = -((i << 1) + 1);
194 arm64_force_sig_ptrace_errno_trap(si_errno, bkpt->trigger,
199 arm64_force_sig_fault(SIGTRAP, TRAP_HWBKPT, bkpt->trigger, desc);
203 * Unregister breakpoints from this task and reset the pointers in
206 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
209 struct thread_struct *t = &tsk->thread;
211 for (i = 0; i < ARM_MAX_BRP; i++) {
212 if (t->debug.hbp_break[i]) {
213 unregister_hw_breakpoint(t->debug.hbp_break[i]);
214 t->debug.hbp_break[i] = NULL;
218 for (i = 0; i < ARM_MAX_WRP; i++) {
219 if (t->debug.hbp_watch[i]) {
220 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
221 t->debug.hbp_watch[i] = NULL;
226 void ptrace_hw_copy_thread(struct task_struct *tsk)
228 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
231 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
232 struct task_struct *tsk,
235 struct perf_event *bp = ERR_PTR(-EINVAL);
238 case NT_ARM_HW_BREAK:
239 if (idx >= ARM_MAX_BRP)
241 idx = array_index_nospec(idx, ARM_MAX_BRP);
242 bp = tsk->thread.debug.hbp_break[idx];
244 case NT_ARM_HW_WATCH:
245 if (idx >= ARM_MAX_WRP)
247 idx = array_index_nospec(idx, ARM_MAX_WRP);
248 bp = tsk->thread.debug.hbp_watch[idx];
256 static int ptrace_hbp_set_event(unsigned int note_type,
257 struct task_struct *tsk,
259 struct perf_event *bp)
264 case NT_ARM_HW_BREAK:
265 if (idx >= ARM_MAX_BRP)
267 idx = array_index_nospec(idx, ARM_MAX_BRP);
268 tsk->thread.debug.hbp_break[idx] = bp;
271 case NT_ARM_HW_WATCH:
272 if (idx >= ARM_MAX_WRP)
274 idx = array_index_nospec(idx, ARM_MAX_WRP);
275 tsk->thread.debug.hbp_watch[idx] = bp;
284 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
285 struct task_struct *tsk,
288 struct perf_event *bp;
289 struct perf_event_attr attr;
293 case NT_ARM_HW_BREAK:
294 type = HW_BREAKPOINT_X;
296 case NT_ARM_HW_WATCH:
297 type = HW_BREAKPOINT_RW;
300 return ERR_PTR(-EINVAL);
303 ptrace_breakpoint_init(&attr);
306 * Initialise fields to sane defaults
307 * (i.e. values that will pass validation).
310 attr.bp_len = HW_BREAKPOINT_LEN_4;
314 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
318 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
325 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
326 struct arch_hw_breakpoint_ctrl ctrl,
327 struct perf_event_attr *attr)
329 int err, len, type, offset, disabled = !ctrl.enabled;
331 attr->disabled = disabled;
335 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
340 case NT_ARM_HW_BREAK:
341 if ((type & HW_BREAKPOINT_X) != type)
344 case NT_ARM_HW_WATCH:
345 if ((type & HW_BREAKPOINT_RW) != type)
353 attr->bp_type = type;
354 attr->bp_addr += offset;
359 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
365 case NT_ARM_HW_BREAK:
366 num = hw_breakpoint_slots(TYPE_INST);
368 case NT_ARM_HW_WATCH:
369 num = hw_breakpoint_slots(TYPE_DATA);
375 reg |= debug_monitors_arch();
383 static int ptrace_hbp_get_ctrl(unsigned int note_type,
384 struct task_struct *tsk,
388 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
393 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
397 static int ptrace_hbp_get_addr(unsigned int note_type,
398 struct task_struct *tsk,
402 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
407 *addr = bp ? counter_arch_bp(bp)->address : 0;
411 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
412 struct task_struct *tsk,
415 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
418 bp = ptrace_hbp_create(note_type, tsk, idx);
423 static int ptrace_hbp_set_ctrl(unsigned int note_type,
424 struct task_struct *tsk,
429 struct perf_event *bp;
430 struct perf_event_attr attr;
431 struct arch_hw_breakpoint_ctrl ctrl;
433 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
440 decode_ctrl_reg(uctrl, &ctrl);
441 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
445 return modify_user_hw_breakpoint(bp, &attr);
448 static int ptrace_hbp_set_addr(unsigned int note_type,
449 struct task_struct *tsk,
454 struct perf_event *bp;
455 struct perf_event_attr attr;
457 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
465 err = modify_user_hw_breakpoint(bp, &attr);
469 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
470 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
471 #define PTRACE_HBP_PAD_SZ sizeof(u32)
473 static int hw_break_get(struct task_struct *target,
474 const struct user_regset *regset,
477 unsigned int note_type = regset->core_note_type;
483 ret = ptrace_hbp_get_resource_info(note_type, &info);
487 membuf_write(&to, &info, sizeof(info));
488 membuf_zero(&to, sizeof(u32));
489 /* (address, ctrl) registers */
491 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
494 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
497 membuf_store(&to, addr);
498 membuf_store(&to, ctrl);
499 membuf_zero(&to, sizeof(u32));
505 static int hw_break_set(struct task_struct *target,
506 const struct user_regset *regset,
507 unsigned int pos, unsigned int count,
508 const void *kbuf, const void __user *ubuf)
510 unsigned int note_type = regset->core_note_type;
511 int ret, idx = 0, offset, limit;
515 /* Resource info and pad */
516 offset = offsetof(struct user_hwdebug_state, dbg_regs);
517 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
521 /* (address, ctrl) registers */
522 limit = regset->n * regset->size;
523 while (count && offset < limit) {
524 if (count < PTRACE_HBP_ADDR_SZ)
526 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
527 offset, offset + PTRACE_HBP_ADDR_SZ);
530 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
533 offset += PTRACE_HBP_ADDR_SZ;
537 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
538 offset, offset + PTRACE_HBP_CTRL_SZ);
541 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
544 offset += PTRACE_HBP_CTRL_SZ;
546 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
548 offset + PTRACE_HBP_PAD_SZ);
551 offset += PTRACE_HBP_PAD_SZ;
557 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
559 static int gpr_get(struct task_struct *target,
560 const struct user_regset *regset,
563 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
564 return membuf_write(&to, uregs, sizeof(*uregs));
567 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
568 unsigned int pos, unsigned int count,
569 const void *kbuf, const void __user *ubuf)
572 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
574 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
578 if (!valid_user_regs(&newregs, target))
581 task_pt_regs(target)->user_regs = newregs;
585 static int fpr_active(struct task_struct *target, const struct user_regset *regset)
587 if (!system_supports_fpsimd())
593 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
595 static int __fpr_get(struct task_struct *target,
596 const struct user_regset *regset,
599 struct user_fpsimd_state *uregs;
601 sve_sync_to_fpsimd(target);
603 uregs = &target->thread.uw.fpsimd_state;
605 return membuf_write(&to, uregs, sizeof(*uregs));
608 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
611 if (!system_supports_fpsimd())
614 if (target == current)
615 fpsimd_preserve_current_state();
617 return __fpr_get(target, regset, to);
620 static int __fpr_set(struct task_struct *target,
621 const struct user_regset *regset,
622 unsigned int pos, unsigned int count,
623 const void *kbuf, const void __user *ubuf,
624 unsigned int start_pos)
627 struct user_fpsimd_state newstate;
630 * Ensure target->thread.uw.fpsimd_state is up to date, so that a
631 * short copyin can't resurrect stale data.
633 sve_sync_to_fpsimd(target);
635 newstate = target->thread.uw.fpsimd_state;
637 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
638 start_pos, start_pos + sizeof(newstate));
642 target->thread.uw.fpsimd_state = newstate;
647 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
648 unsigned int pos, unsigned int count,
649 const void *kbuf, const void __user *ubuf)
653 if (!system_supports_fpsimd())
656 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
660 sve_sync_from_fpsimd_zeropad(target);
661 fpsimd_flush_task_state(target);
666 static int tls_get(struct task_struct *target, const struct user_regset *regset,
669 if (target == current)
670 tls_preserve_current_state();
672 return membuf_store(&to, target->thread.uw.tp_value);
675 static int tls_set(struct task_struct *target, const struct user_regset *regset,
676 unsigned int pos, unsigned int count,
677 const void *kbuf, const void __user *ubuf)
680 unsigned long tls = target->thread.uw.tp_value;
682 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
686 target->thread.uw.tp_value = tls;
690 static int system_call_get(struct task_struct *target,
691 const struct user_regset *regset,
694 return membuf_store(&to, task_pt_regs(target)->syscallno);
697 static int system_call_set(struct task_struct *target,
698 const struct user_regset *regset,
699 unsigned int pos, unsigned int count,
700 const void *kbuf, const void __user *ubuf)
702 int syscallno = task_pt_regs(target)->syscallno;
705 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
709 task_pt_regs(target)->syscallno = syscallno;
713 #ifdef CONFIG_ARM64_SVE
715 static void sve_init_header_from_task(struct user_sve_header *header,
716 struct task_struct *target)
720 memset(header, 0, sizeof(*header));
722 header->flags = test_tsk_thread_flag(target, TIF_SVE) ?
723 SVE_PT_REGS_SVE : SVE_PT_REGS_FPSIMD;
724 if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
725 header->flags |= SVE_PT_VL_INHERIT;
727 header->vl = task_get_sve_vl(target);
728 vq = sve_vq_from_vl(header->vl);
730 header->max_vl = sve_max_vl();
731 header->size = SVE_PT_SIZE(vq, header->flags);
732 header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
736 static unsigned int sve_size_from_header(struct user_sve_header const *header)
738 return ALIGN(header->size, SVE_VQ_BYTES);
741 static int sve_get(struct task_struct *target,
742 const struct user_regset *regset,
745 struct user_sve_header header;
747 unsigned long start, end;
749 if (!system_supports_sve())
753 sve_init_header_from_task(&header, target);
754 vq = sve_vq_from_vl(header.vl);
756 membuf_write(&to, &header, sizeof(header));
758 if (target == current)
759 fpsimd_preserve_current_state();
761 /* Registers: FPSIMD-only case */
763 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
764 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD)
765 return __fpr_get(target, regset, to);
767 /* Otherwise: full SVE case */
769 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
770 start = SVE_PT_SVE_OFFSET;
771 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
772 membuf_write(&to, target->thread.sve_state, end - start);
775 end = SVE_PT_SVE_FPSR_OFFSET(vq);
776 membuf_zero(&to, end - start);
779 * Copy fpsr, and fpcr which must follow contiguously in
780 * struct fpsimd_state:
783 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
784 membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr, end - start);
787 end = sve_size_from_header(&header);
788 return membuf_zero(&to, end - start);
791 static int sve_set(struct task_struct *target,
792 const struct user_regset *regset,
793 unsigned int pos, unsigned int count,
794 const void *kbuf, const void __user *ubuf)
797 struct user_sve_header header;
799 unsigned long start, end;
801 if (!system_supports_sve())
805 if (count < sizeof(header))
807 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
813 * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by
814 * vec_set_vector_length(), which will also validate them for us:
816 ret = vec_set_vector_length(target, ARM64_VEC_SVE, header.vl,
817 ((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
821 /* Actual VL set may be less than the user asked for: */
822 vq = sve_vq_from_vl(task_get_sve_vl(target));
824 /* Registers: FPSIMD-only case */
826 BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
827 if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
828 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
829 SVE_PT_FPSIMD_OFFSET);
830 clear_tsk_thread_flag(target, TIF_SVE);
834 /* Otherwise: full SVE case */
837 * If setting a different VL from the requested VL and there is
838 * register data, the data layout will be wrong: don't even
839 * try to set the registers in this case.
841 if (count && vq != sve_vq_from_vl(header.vl)) {
847 if (!target->thread.sve_state) {
849 clear_tsk_thread_flag(target, TIF_SVE);
854 * Ensure target->thread.sve_state is up to date with target's
855 * FPSIMD regs, so that a short copyin leaves trailing registers
858 fpsimd_sync_to_sve(target);
859 set_tsk_thread_flag(target, TIF_SVE);
861 BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
862 start = SVE_PT_SVE_OFFSET;
863 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
864 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
865 target->thread.sve_state,
871 end = SVE_PT_SVE_FPSR_OFFSET(vq);
872 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
878 * Copy fpsr, and fpcr which must follow contiguously in
879 * struct fpsimd_state:
882 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
883 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
884 &target->thread.uw.fpsimd_state.fpsr,
888 fpsimd_flush_task_state(target);
892 #endif /* CONFIG_ARM64_SVE */
894 #ifdef CONFIG_ARM64_PTR_AUTH
895 static int pac_mask_get(struct task_struct *target,
896 const struct user_regset *regset,
900 * The PAC bits can differ across data and instruction pointers
901 * depending on TCR_EL1.TBID*, which we may make use of in future, so
902 * we expose separate masks.
904 unsigned long mask = ptrauth_user_pac_mask();
905 struct user_pac_mask uregs = {
910 if (!system_supports_address_auth())
913 return membuf_write(&to, &uregs, sizeof(uregs));
916 static int pac_enabled_keys_get(struct task_struct *target,
917 const struct user_regset *regset,
920 long enabled_keys = ptrauth_get_enabled_keys(target);
922 if (IS_ERR_VALUE(enabled_keys))
925 return membuf_write(&to, &enabled_keys, sizeof(enabled_keys));
928 static int pac_enabled_keys_set(struct task_struct *target,
929 const struct user_regset *regset,
930 unsigned int pos, unsigned int count,
931 const void *kbuf, const void __user *ubuf)
934 long enabled_keys = ptrauth_get_enabled_keys(target);
936 if (IS_ERR_VALUE(enabled_keys))
939 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &enabled_keys, 0,
944 return ptrauth_set_enabled_keys(target, PR_PAC_ENABLED_KEYS_MASK,
948 #ifdef CONFIG_CHECKPOINT_RESTORE
949 static __uint128_t pac_key_to_user(const struct ptrauth_key *key)
951 return (__uint128_t)key->hi << 64 | key->lo;
954 static struct ptrauth_key pac_key_from_user(__uint128_t ukey)
956 struct ptrauth_key key = {
957 .lo = (unsigned long)ukey,
958 .hi = (unsigned long)(ukey >> 64),
964 static void pac_address_keys_to_user(struct user_pac_address_keys *ukeys,
965 const struct ptrauth_keys_user *keys)
967 ukeys->apiakey = pac_key_to_user(&keys->apia);
968 ukeys->apibkey = pac_key_to_user(&keys->apib);
969 ukeys->apdakey = pac_key_to_user(&keys->apda);
970 ukeys->apdbkey = pac_key_to_user(&keys->apdb);
973 static void pac_address_keys_from_user(struct ptrauth_keys_user *keys,
974 const struct user_pac_address_keys *ukeys)
976 keys->apia = pac_key_from_user(ukeys->apiakey);
977 keys->apib = pac_key_from_user(ukeys->apibkey);
978 keys->apda = pac_key_from_user(ukeys->apdakey);
979 keys->apdb = pac_key_from_user(ukeys->apdbkey);
982 static int pac_address_keys_get(struct task_struct *target,
983 const struct user_regset *regset,
986 struct ptrauth_keys_user *keys = &target->thread.keys_user;
987 struct user_pac_address_keys user_keys;
989 if (!system_supports_address_auth())
992 pac_address_keys_to_user(&user_keys, keys);
994 return membuf_write(&to, &user_keys, sizeof(user_keys));
997 static int pac_address_keys_set(struct task_struct *target,
998 const struct user_regset *regset,
999 unsigned int pos, unsigned int count,
1000 const void *kbuf, const void __user *ubuf)
1002 struct ptrauth_keys_user *keys = &target->thread.keys_user;
1003 struct user_pac_address_keys user_keys;
1006 if (!system_supports_address_auth())
1009 pac_address_keys_to_user(&user_keys, keys);
1010 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1014 pac_address_keys_from_user(keys, &user_keys);
1019 static void pac_generic_keys_to_user(struct user_pac_generic_keys *ukeys,
1020 const struct ptrauth_keys_user *keys)
1022 ukeys->apgakey = pac_key_to_user(&keys->apga);
1025 static void pac_generic_keys_from_user(struct ptrauth_keys_user *keys,
1026 const struct user_pac_generic_keys *ukeys)
1028 keys->apga = pac_key_from_user(ukeys->apgakey);
1031 static int pac_generic_keys_get(struct task_struct *target,
1032 const struct user_regset *regset,
1035 struct ptrauth_keys_user *keys = &target->thread.keys_user;
1036 struct user_pac_generic_keys user_keys;
1038 if (!system_supports_generic_auth())
1041 pac_generic_keys_to_user(&user_keys, keys);
1043 return membuf_write(&to, &user_keys, sizeof(user_keys));
1046 static int pac_generic_keys_set(struct task_struct *target,
1047 const struct user_regset *regset,
1048 unsigned int pos, unsigned int count,
1049 const void *kbuf, const void __user *ubuf)
1051 struct ptrauth_keys_user *keys = &target->thread.keys_user;
1052 struct user_pac_generic_keys user_keys;
1055 if (!system_supports_generic_auth())
1058 pac_generic_keys_to_user(&user_keys, keys);
1059 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1063 pac_generic_keys_from_user(keys, &user_keys);
1067 #endif /* CONFIG_CHECKPOINT_RESTORE */
1068 #endif /* CONFIG_ARM64_PTR_AUTH */
1070 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1071 static int tagged_addr_ctrl_get(struct task_struct *target,
1072 const struct user_regset *regset,
1075 long ctrl = get_tagged_addr_ctrl(target);
1077 if (IS_ERR_VALUE(ctrl))
1080 return membuf_write(&to, &ctrl, sizeof(ctrl));
1083 static int tagged_addr_ctrl_set(struct task_struct *target, const struct
1084 user_regset *regset, unsigned int pos,
1085 unsigned int count, const void *kbuf, const
1091 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
1095 return set_tagged_addr_ctrl(target, ctrl);
1099 enum aarch64_regset {
1103 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1108 #ifdef CONFIG_ARM64_SVE
1111 #ifdef CONFIG_ARM64_PTR_AUTH
1113 REGSET_PAC_ENABLED_KEYS,
1114 #ifdef CONFIG_CHECKPOINT_RESTORE
1119 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1120 REGSET_TAGGED_ADDR_CTRL,
1124 static const struct user_regset aarch64_regsets[] = {
1126 .core_note_type = NT_PRSTATUS,
1127 .n = sizeof(struct user_pt_regs) / sizeof(u64),
1128 .size = sizeof(u64),
1129 .align = sizeof(u64),
1130 .regset_get = gpr_get,
1134 .core_note_type = NT_PRFPREG,
1135 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
1137 * We pretend we have 32-bit registers because the fpsr and
1138 * fpcr are 32-bits wide.
1140 .size = sizeof(u32),
1141 .align = sizeof(u32),
1142 .active = fpr_active,
1143 .regset_get = fpr_get,
1147 .core_note_type = NT_ARM_TLS,
1149 .size = sizeof(void *),
1150 .align = sizeof(void *),
1151 .regset_get = tls_get,
1154 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1155 [REGSET_HW_BREAK] = {
1156 .core_note_type = NT_ARM_HW_BREAK,
1157 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1158 .size = sizeof(u32),
1159 .align = sizeof(u32),
1160 .regset_get = hw_break_get,
1161 .set = hw_break_set,
1163 [REGSET_HW_WATCH] = {
1164 .core_note_type = NT_ARM_HW_WATCH,
1165 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1166 .size = sizeof(u32),
1167 .align = sizeof(u32),
1168 .regset_get = hw_break_get,
1169 .set = hw_break_set,
1172 [REGSET_SYSTEM_CALL] = {
1173 .core_note_type = NT_ARM_SYSTEM_CALL,
1175 .size = sizeof(int),
1176 .align = sizeof(int),
1177 .regset_get = system_call_get,
1178 .set = system_call_set,
1180 #ifdef CONFIG_ARM64_SVE
1181 [REGSET_SVE] = { /* Scalable Vector Extension */
1182 .core_note_type = NT_ARM_SVE,
1183 .n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
1185 .size = SVE_VQ_BYTES,
1186 .align = SVE_VQ_BYTES,
1187 .regset_get = sve_get,
1191 #ifdef CONFIG_ARM64_PTR_AUTH
1192 [REGSET_PAC_MASK] = {
1193 .core_note_type = NT_ARM_PAC_MASK,
1194 .n = sizeof(struct user_pac_mask) / sizeof(u64),
1195 .size = sizeof(u64),
1196 .align = sizeof(u64),
1197 .regset_get = pac_mask_get,
1198 /* this cannot be set dynamically */
1200 [REGSET_PAC_ENABLED_KEYS] = {
1201 .core_note_type = NT_ARM_PAC_ENABLED_KEYS,
1203 .size = sizeof(long),
1204 .align = sizeof(long),
1205 .regset_get = pac_enabled_keys_get,
1206 .set = pac_enabled_keys_set,
1208 #ifdef CONFIG_CHECKPOINT_RESTORE
1209 [REGSET_PACA_KEYS] = {
1210 .core_note_type = NT_ARM_PACA_KEYS,
1211 .n = sizeof(struct user_pac_address_keys) / sizeof(__uint128_t),
1212 .size = sizeof(__uint128_t),
1213 .align = sizeof(__uint128_t),
1214 .regset_get = pac_address_keys_get,
1215 .set = pac_address_keys_set,
1217 [REGSET_PACG_KEYS] = {
1218 .core_note_type = NT_ARM_PACG_KEYS,
1219 .n = sizeof(struct user_pac_generic_keys) / sizeof(__uint128_t),
1220 .size = sizeof(__uint128_t),
1221 .align = sizeof(__uint128_t),
1222 .regset_get = pac_generic_keys_get,
1223 .set = pac_generic_keys_set,
1227 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1228 [REGSET_TAGGED_ADDR_CTRL] = {
1229 .core_note_type = NT_ARM_TAGGED_ADDR_CTRL,
1231 .size = sizeof(long),
1232 .align = sizeof(long),
1233 .regset_get = tagged_addr_ctrl_get,
1234 .set = tagged_addr_ctrl_set,
1239 static const struct user_regset_view user_aarch64_view = {
1240 .name = "aarch64", .e_machine = EM_AARCH64,
1241 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
1244 #ifdef CONFIG_COMPAT
1245 enum compat_regset {
1250 static inline compat_ulong_t compat_get_user_reg(struct task_struct *task, int idx)
1252 struct pt_regs *regs = task_pt_regs(task);
1258 return pstate_to_compat_psr(regs->pstate);
1260 return regs->orig_x0;
1262 return regs->regs[idx];
1266 static int compat_gpr_get(struct task_struct *target,
1267 const struct user_regset *regset,
1273 membuf_store(&to, compat_get_user_reg(target, i++));
1277 static int compat_gpr_set(struct task_struct *target,
1278 const struct user_regset *regset,
1279 unsigned int pos, unsigned int count,
1280 const void *kbuf, const void __user *ubuf)
1282 struct pt_regs newregs;
1284 unsigned int i, start, num_regs;
1286 /* Calculate the number of AArch32 registers contained in count */
1287 num_regs = count / regset->size;
1289 /* Convert pos into an register number */
1290 start = pos / regset->size;
1292 if (start + num_regs > regset->n)
1295 newregs = *task_pt_regs(target);
1297 for (i = 0; i < num_regs; ++i) {
1298 unsigned int idx = start + i;
1302 memcpy(®, kbuf, sizeof(reg));
1303 kbuf += sizeof(reg);
1305 ret = copy_from_user(®, ubuf, sizeof(reg));
1311 ubuf += sizeof(reg);
1319 reg = compat_psr_to_pstate(reg);
1320 newregs.pstate = reg;
1323 newregs.orig_x0 = reg;
1326 newregs.regs[idx] = reg;
1331 if (valid_user_regs(&newregs.user_regs, target))
1332 *task_pt_regs(target) = newregs;
1339 static int compat_vfp_get(struct task_struct *target,
1340 const struct user_regset *regset,
1343 struct user_fpsimd_state *uregs;
1344 compat_ulong_t fpscr;
1346 if (!system_supports_fpsimd())
1349 uregs = &target->thread.uw.fpsimd_state;
1351 if (target == current)
1352 fpsimd_preserve_current_state();
1355 * The VFP registers are packed into the fpsimd_state, so they all sit
1356 * nicely together for us. We just need to create the fpscr separately.
1358 membuf_write(&to, uregs, VFP_STATE_SIZE - sizeof(compat_ulong_t));
1359 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
1360 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
1361 return membuf_store(&to, fpscr);
1364 static int compat_vfp_set(struct task_struct *target,
1365 const struct user_regset *regset,
1366 unsigned int pos, unsigned int count,
1367 const void *kbuf, const void __user *ubuf)
1369 struct user_fpsimd_state *uregs;
1370 compat_ulong_t fpscr;
1371 int ret, vregs_end_pos;
1373 if (!system_supports_fpsimd())
1376 uregs = &target->thread.uw.fpsimd_state;
1378 vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
1379 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
1382 if (count && !ret) {
1383 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpscr,
1384 vregs_end_pos, VFP_STATE_SIZE);
1386 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
1387 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
1391 fpsimd_flush_task_state(target);
1395 static int compat_tls_get(struct task_struct *target,
1396 const struct user_regset *regset,
1399 return membuf_store(&to, (compat_ulong_t)target->thread.uw.tp_value);
1402 static int compat_tls_set(struct task_struct *target,
1403 const struct user_regset *regset, unsigned int pos,
1404 unsigned int count, const void *kbuf,
1405 const void __user *ubuf)
1408 compat_ulong_t tls = target->thread.uw.tp_value;
1410 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
1414 target->thread.uw.tp_value = tls;
1418 static const struct user_regset aarch32_regsets[] = {
1419 [REGSET_COMPAT_GPR] = {
1420 .core_note_type = NT_PRSTATUS,
1421 .n = COMPAT_ELF_NGREG,
1422 .size = sizeof(compat_elf_greg_t),
1423 .align = sizeof(compat_elf_greg_t),
1424 .regset_get = compat_gpr_get,
1425 .set = compat_gpr_set
1427 [REGSET_COMPAT_VFP] = {
1428 .core_note_type = NT_ARM_VFP,
1429 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1430 .size = sizeof(compat_ulong_t),
1431 .align = sizeof(compat_ulong_t),
1432 .active = fpr_active,
1433 .regset_get = compat_vfp_get,
1434 .set = compat_vfp_set
1438 static const struct user_regset_view user_aarch32_view = {
1439 .name = "aarch32", .e_machine = EM_ARM,
1440 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
1443 static const struct user_regset aarch32_ptrace_regsets[] = {
1445 .core_note_type = NT_PRSTATUS,
1446 .n = COMPAT_ELF_NGREG,
1447 .size = sizeof(compat_elf_greg_t),
1448 .align = sizeof(compat_elf_greg_t),
1449 .regset_get = compat_gpr_get,
1450 .set = compat_gpr_set
1453 .core_note_type = NT_ARM_VFP,
1454 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1455 .size = sizeof(compat_ulong_t),
1456 .align = sizeof(compat_ulong_t),
1457 .regset_get = compat_vfp_get,
1458 .set = compat_vfp_set
1461 .core_note_type = NT_ARM_TLS,
1463 .size = sizeof(compat_ulong_t),
1464 .align = sizeof(compat_ulong_t),
1465 .regset_get = compat_tls_get,
1466 .set = compat_tls_set,
1468 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1469 [REGSET_HW_BREAK] = {
1470 .core_note_type = NT_ARM_HW_BREAK,
1471 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1472 .size = sizeof(u32),
1473 .align = sizeof(u32),
1474 .regset_get = hw_break_get,
1475 .set = hw_break_set,
1477 [REGSET_HW_WATCH] = {
1478 .core_note_type = NT_ARM_HW_WATCH,
1479 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1480 .size = sizeof(u32),
1481 .align = sizeof(u32),
1482 .regset_get = hw_break_get,
1483 .set = hw_break_set,
1486 [REGSET_SYSTEM_CALL] = {
1487 .core_note_type = NT_ARM_SYSTEM_CALL,
1489 .size = sizeof(int),
1490 .align = sizeof(int),
1491 .regset_get = system_call_get,
1492 .set = system_call_set,
1496 static const struct user_regset_view user_aarch32_ptrace_view = {
1497 .name = "aarch32", .e_machine = EM_ARM,
1498 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1501 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1502 compat_ulong_t __user *ret)
1509 if (off == COMPAT_PT_TEXT_ADDR)
1510 tmp = tsk->mm->start_code;
1511 else if (off == COMPAT_PT_DATA_ADDR)
1512 tmp = tsk->mm->start_data;
1513 else if (off == COMPAT_PT_TEXT_END_ADDR)
1514 tmp = tsk->mm->end_code;
1515 else if (off < sizeof(compat_elf_gregset_t))
1516 tmp = compat_get_user_reg(tsk, off >> 2);
1517 else if (off >= COMPAT_USER_SZ)
1522 return put_user(tmp, ret);
1525 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1528 struct pt_regs newregs = *task_pt_regs(tsk);
1529 unsigned int idx = off / 4;
1531 if (off & 3 || off >= COMPAT_USER_SZ)
1534 if (off >= sizeof(compat_elf_gregset_t))
1542 newregs.pstate = compat_psr_to_pstate(val);
1545 newregs.orig_x0 = val;
1548 newregs.regs[idx] = val;
1551 if (!valid_user_regs(&newregs.user_regs, tsk))
1554 *task_pt_regs(tsk) = newregs;
1558 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1561 * Convert a virtual register number into an index for a thread_info
1562 * breakpoint array. Breakpoints are identified using positive numbers
1563 * whilst watchpoints are negative. The registers are laid out as pairs
1564 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1565 * Register 0 is reserved for describing resource information.
1567 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1569 return (abs(num) - 1) >> 1;
1572 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1574 u8 num_brps, num_wrps, debug_arch, wp_len;
1577 num_brps = hw_breakpoint_slots(TYPE_INST);
1578 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1580 debug_arch = debug_monitors_arch();
1594 static int compat_ptrace_hbp_get(unsigned int note_type,
1595 struct task_struct *tsk,
1602 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1605 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1608 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1615 static int compat_ptrace_hbp_set(unsigned int note_type,
1616 struct task_struct *tsk,
1623 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1627 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1630 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1636 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1637 compat_ulong_t __user *data)
1644 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1646 } else if (num == 0) {
1647 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1650 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1654 ret = put_user(kdata, data);
1659 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1660 compat_ulong_t __user *data)
1668 ret = get_user(kdata, data);
1673 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1675 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1679 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1681 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1682 compat_ulong_t caddr, compat_ulong_t cdata)
1684 unsigned long addr = caddr;
1685 unsigned long data = cdata;
1686 void __user *datap = compat_ptr(data);
1690 case PTRACE_PEEKUSR:
1691 ret = compat_ptrace_read_user(child, addr, datap);
1694 case PTRACE_POKEUSR:
1695 ret = compat_ptrace_write_user(child, addr, data);
1698 case COMPAT_PTRACE_GETREGS:
1699 ret = copy_regset_to_user(child,
1702 0, sizeof(compat_elf_gregset_t),
1706 case COMPAT_PTRACE_SETREGS:
1707 ret = copy_regset_from_user(child,
1710 0, sizeof(compat_elf_gregset_t),
1714 case COMPAT_PTRACE_GET_THREAD_AREA:
1715 ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
1716 (compat_ulong_t __user *)datap);
1719 case COMPAT_PTRACE_SET_SYSCALL:
1720 task_pt_regs(child)->syscallno = data;
1724 case COMPAT_PTRACE_GETVFPREGS:
1725 ret = copy_regset_to_user(child,
1732 case COMPAT_PTRACE_SETVFPREGS:
1733 ret = copy_regset_from_user(child,
1740 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1741 case COMPAT_PTRACE_GETHBPREGS:
1742 ret = compat_ptrace_gethbpregs(child, addr, datap);
1745 case COMPAT_PTRACE_SETHBPREGS:
1746 ret = compat_ptrace_sethbpregs(child, addr, datap);
1751 ret = compat_ptrace_request(child, request, addr,
1758 #endif /* CONFIG_COMPAT */
1760 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1762 #ifdef CONFIG_COMPAT
1764 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1765 * user_aarch32_view compatible with arm32. Native ptrace requests on
1766 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1767 * access to the TLS register.
1769 if (is_compat_task())
1770 return &user_aarch32_view;
1771 else if (is_compat_thread(task_thread_info(task)))
1772 return &user_aarch32_ptrace_view;
1774 return &user_aarch64_view;
1777 long arch_ptrace(struct task_struct *child, long request,
1778 unsigned long addr, unsigned long data)
1781 case PTRACE_PEEKMTETAGS:
1782 case PTRACE_POKEMTETAGS:
1783 return mte_ptrace_copy_tags(child, request, addr, data);
1786 return ptrace_request(child, request, addr, data);
1789 enum ptrace_syscall_dir {
1790 PTRACE_SYSCALL_ENTER = 0,
1791 PTRACE_SYSCALL_EXIT,
1794 static void report_syscall(struct pt_regs *regs, enum ptrace_syscall_dir dir)
1797 unsigned long saved_reg;
1800 * We have some ABI weirdness here in the way that we handle syscall
1801 * exit stops because we indicate whether or not the stop has been
1802 * signalled from syscall entry or syscall exit by clobbering a general
1803 * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee
1804 * and restoring its old value after the stop. This means that:
1806 * - Any writes by the tracer to this register during the stop are
1807 * ignored/discarded.
1809 * - The actual value of the register is not available during the stop,
1810 * so the tracer cannot save it and restore it later.
1812 * - Syscall stops behave differently to seccomp and pseudo-step traps
1813 * (the latter do not nobble any registers).
1815 regno = (is_compat_task() ? 12 : 7);
1816 saved_reg = regs->regs[regno];
1817 regs->regs[regno] = dir;
1819 if (dir == PTRACE_SYSCALL_ENTER) {
1820 if (ptrace_report_syscall_entry(regs))
1821 forget_syscall(regs);
1822 regs->regs[regno] = saved_reg;
1823 } else if (!test_thread_flag(TIF_SINGLESTEP)) {
1824 ptrace_report_syscall_exit(regs, 0);
1825 regs->regs[regno] = saved_reg;
1827 regs->regs[regno] = saved_reg;
1830 * Signal a pseudo-step exception since we are stepping but
1831 * tracer modifications to the registers may have rewound the
1834 ptrace_report_syscall_exit(regs, 1);
1838 int syscall_trace_enter(struct pt_regs *regs)
1840 unsigned long flags = read_thread_flags();
1842 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {
1843 report_syscall(regs, PTRACE_SYSCALL_ENTER);
1844 if (flags & _TIF_SYSCALL_EMU)
1848 /* Do the secure computing after ptrace; failures should be fast. */
1849 if (secure_computing() == -1)
1852 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1853 trace_sys_enter(regs, regs->syscallno);
1855 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1856 regs->regs[2], regs->regs[3]);
1858 return regs->syscallno;
1861 void syscall_trace_exit(struct pt_regs *regs)
1863 unsigned long flags = read_thread_flags();
1865 audit_syscall_exit(regs);
1867 if (flags & _TIF_SYSCALL_TRACEPOINT)
1868 trace_sys_exit(regs, syscall_get_return_value(current, regs));
1870 if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP))
1871 report_syscall(regs, PTRACE_SYSCALL_EXIT);
1877 * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
1878 * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which is
1879 * not described in ARM DDI 0487D.a.
1880 * We treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may
1881 * be allocated an EL0 meaning in future.
1882 * Userspace cannot use these until they have an architectural meaning.
1883 * Note that this follows the SPSR_ELx format, not the AArch32 PSR format.
1884 * We also reserve IL for the kernel; SS is handled dynamically.
1886 #define SPSR_EL1_AARCH64_RES0_BITS \
1887 (GENMASK_ULL(63, 32) | GENMASK_ULL(27, 26) | GENMASK_ULL(23, 22) | \
1888 GENMASK_ULL(20, 13) | GENMASK_ULL(5, 5))
1889 #define SPSR_EL1_AARCH32_RES0_BITS \
1890 (GENMASK_ULL(63, 32) | GENMASK_ULL(22, 22) | GENMASK_ULL(20, 20))
1892 static int valid_compat_regs(struct user_pt_regs *regs)
1894 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1896 if (!system_supports_mixed_endian_el0()) {
1897 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1898 regs->pstate |= PSR_AA32_E_BIT;
1900 regs->pstate &= ~PSR_AA32_E_BIT;
1903 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1904 (regs->pstate & PSR_AA32_A_BIT) == 0 &&
1905 (regs->pstate & PSR_AA32_I_BIT) == 0 &&
1906 (regs->pstate & PSR_AA32_F_BIT) == 0) {
1911 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1914 regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT |
1915 PSR_AA32_C_BIT | PSR_AA32_V_BIT |
1916 PSR_AA32_Q_BIT | PSR_AA32_IT_MASK |
1917 PSR_AA32_GE_MASK | PSR_AA32_E_BIT |
1919 regs->pstate |= PSR_MODE32_BIT;
1924 static int valid_native_regs(struct user_pt_regs *regs)
1926 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1928 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1929 (regs->pstate & PSR_D_BIT) == 0 &&
1930 (regs->pstate & PSR_A_BIT) == 0 &&
1931 (regs->pstate & PSR_I_BIT) == 0 &&
1932 (regs->pstate & PSR_F_BIT) == 0) {
1936 /* Force PSR to a valid 64-bit EL0t */
1937 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1943 * Are the current registers suitable for user mode? (used to maintain
1944 * security in signal handlers)
1946 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1948 /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
1949 user_regs_reset_single_step(regs, task);
1951 if (is_compat_thread(task_thread_info(task)))
1952 return valid_compat_regs(regs);
1954 return valid_native_regs(regs);