arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) Siemens AG, 2018-2024
   4  *
   5  * Authors:
   6  *   Le Jin <le.jin@siemens.com>
   7  *   Jan Kiszka <jan.kiszka@siemens.com>
   8  *
   9  * Common bits of the IOT2050 Basic and Advanced variants, PG1 and PG2
  10  */
  11
  12 #include <dt-bindings/leds/common.h>
  13 #include <dt-bindings/phy/phy.h>
  14 #include <dt-bindings/net/ti-dp83867.h>
  15
  16 / {
  17         aliases {
  18                 serial0 = &wkup_uart0;
  19                 serial1 = &mcu_uart0;
  20                 serial2 = &main_uart0;
  21                 serial3 = &main_uart1;
  22                 i2c0 = &wkup_i2c0;
  23                 i2c1 = &mcu_i2c0;
  24                 i2c2 = &main_i2c0;
  25                 i2c3 = &main_i2c1;
  26                 i2c4 = &main_i2c2;
  27                 i2c5 = &main_i2c3;
  28                 spi0 = &mcu_spi0;
  29                 mmc0 = &sdhci1;
  30                 mmc1 = &sdhci0;
  31                 ethernet1 = &icssg0_emac0;
  32                 ethernet2 = &icssg0_emac1;
  33         };
  34
  35         chosen {
  36                 stdout-path = "serial3:115200n8";
  37         };
  38
  39         reserved-memory {
  40                 #address-cells = <2>;
  41                 #size-cells = <2>;
  42                 ranges;
  43
  44                 secure_ddr: secure-ddr@9e800000 {
  45                         reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
  46                         alignment = <0x1000>;
  47                         no-map;
  48                 };
  49
  50                 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
  51                         compatible = "shared-dma-pool";
  52                         reg = <0 0xa0000000 0 0x100000>;
  53                         no-map;
  54                 };
  55
  56                 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
  57                         compatible = "shared-dma-pool";
  58                         reg = <0 0xa0100000 0 0xf00000>;
  59                         no-map;
  60                 };
  61
  62                 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
  63                         compatible = "shared-dma-pool";
  64                         reg = <0 0xa1000000 0 0x100000>;
  65                         no-map;
  66                 };
  67
  68                 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
  69                         compatible = "shared-dma-pool";
  70                         reg = <0 0xa1100000 0 0xf00000>;
  71                         no-map;
  72                 };
  73
  74                 rtos_ipc_memory_region: ipc-memories@a2000000 {
  75                         reg = <0x00 0xa2000000 0x00 0x00200000>;
  76                         alignment = <0x1000>;
  77                         no-map;
  78                 };
  79
  80                 /* To reserve the power-on(PON) reason for watchdog reset */
  81                 wdt_reset_memory_region: wdt-memory@a2200000 {
  82                         reg = <0x00 0xa2200000 0x00 0x1000>;
  83                         no-map;
  84                 };
  85         };
  86
  87         leds {
  88                 compatible = "gpio-leds";
  89                 pinctrl-names = "default";
  90                 pinctrl-0 = <&leds_pins_default>;
  91
  92                 led-0 {
  93                         color = <LED_COLOR_ID_RED>;
  94                         function = LED_FUNCTION_STATUS;
  95                         label = "status-led-red";
  96                         gpios = <&wkup_gpio0 32 GPIO_ACTIVE_HIGH>;
  97                         panic-indicator;
  98                 };
  99
 100                 led-1 {
 101                         color = <LED_COLOR_ID_GREEN>;
 102                         function = LED_FUNCTION_STATUS;
 103                         label = "status-led-green";
 104                         gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>;
 105                 };
 106
 107                 led-2 {
 108                         color = <LED_COLOR_ID_RED>;
 109                         function = LED_FUNCTION_INDICATOR;
 110                         label = "user-led1-red";
 111                         gpios = <&pcal9535_3 14 GPIO_ACTIVE_HIGH>;
 112                 };
 113
 114                 led-3 {
 115                         color = <LED_COLOR_ID_GREEN>;
 116                         function = LED_FUNCTION_INDICATOR;
 117                         label = "user-led1-green";
 118                         gpios = <&pcal9535_2 15 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 led-4 {
 122                         color = <LED_COLOR_ID_RED>;
 123                         function = LED_FUNCTION_INDICATOR;
 124                         label = "user-led2-red";
 125                         gpios = <&wkup_gpio0 17 GPIO_ACTIVE_HIGH>;
 126                 };
 127
 128                 led-5 {
 129                         color = <LED_COLOR_ID_RED>;
 130                         function = LED_FUNCTION_INDICATOR;
 131                         label = "user-led2-green";
 132                         gpios = <&wkup_gpio0 22 GPIO_ACTIVE_HIGH>;
 133                 };
 134         };
 135
 136         dp_refclk: clock {
 137                 compatible = "fixed-clock";
 138                 #clock-cells = <0>;
 139                 clock-frequency = <19200000>;
 140         };
 141
 142         /* Dual Ethernet application node on PRU-ICSSG0 */
 143         icssg0_eth: icssg0-eth {
 144                 compatible = "ti,am654-icssg-prueth";
 145                 pinctrl-names = "default";
 146                 pinctrl-0 = <&icssg0_rgmii_pins_default>;
 147                 sram = <&msmc_ram>;
 148
 149                 ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>,
 150                         <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
 151                 firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
 152                                 "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
 153                                 "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
 154                                 "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
 155                                 "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
 156                                 "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
 157
 158                 ti,pruss-gp-mux-sel = <2>,      /* MII mode */
 159                                       <2>,
 160                                       <2>,
 161                                       <2>,      /* MII mode */
 162                                       <2>,
 163                                       <2>;
 164
 165                 ti,mii-g-rt = <&icssg0_mii_g_rt>;
 166                 ti,mii-rt = <&icssg0_mii_rt>;
 167                 ti,iep = <&icssg0_iep0>,  <&icssg0_iep1>;
 168
 169                 interrupt-parent = <&icssg0_intc>;
 170                 interrupts = <24 0 2>, <25 1 3>;
 171                 interrupt-names = "tx_ts0", "tx_ts1";
 172
 173                 dmas = <&main_udmap 0xc100>, /* egress slice 0 */
 174                        <&main_udmap 0xc101>, /* egress slice 0 */
 175                        <&main_udmap 0xc102>, /* egress slice 0 */
 176                        <&main_udmap 0xc103>, /* egress slice 0 */
 177                        <&main_udmap 0xc104>, /* egress slice 1 */
 178                        <&main_udmap 0xc105>, /* egress slice 1 */
 179                        <&main_udmap 0xc106>, /* egress slice 1 */
 180                        <&main_udmap 0xc107>, /* egress slice 1 */
 181                        <&main_udmap 0x4100>, /* ingress slice 0 */
 182                        <&main_udmap 0x4101>; /* ingress slice 1 */
 183                 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
 184                             "tx1-0", "tx1-1", "tx1-2", "tx1-3",
 185                             "rx0", "rx1";
 186
 187                 ethernet-ports {
 188                         #address-cells = <1>;
 189                         #size-cells = <0>;
 190                         icssg0_emac0: port@0 {
 191                                 reg = <0>;
 192                                 phy-handle = <&icssg0_eth0_phy>;
 193                                 phy-mode = "rgmii-id";
 194                                 ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
 195                                 ti,half-duplex-capable;
 196                                 /* Filled in by bootloader */
 197                                 local-mac-address = [00 00 00 00 00 00];
 198                         };
 199
 200                         icssg0_emac1: port@1 {
 201                                 reg = <1>;
 202                                 phy-handle = <&icssg0_eth1_phy>;
 203                                 phy-mode = "rgmii-id";
 204                                 ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
 205                                 ti,half-duplex-capable;
 206                                 /* Filled in by bootloader */
 207                                 local-mac-address = [00 00 00 00 00 00];
 208                         };
 209                 };
 210         };
 211 };
 212
 213 &wkup_pmx0 {
 214         mcu_i2c0_pins_default: mcu-i2c0-default-pins {
 215                 pinctrl-single,pins = <
 216                         /* (AD8) MCU_I2C0_SCL */
 217                         AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT,  0)
 218                         /* (AD7) MCU_I2C0_SDA */
 219                         AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT,  0)
 220                 >;
 221         };
 222
 223         push_button_pins_default: push-button-default-pins {
 224                 pinctrl-single,pins = <
 225                         /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
 226                         AM65X_WKUP_IOPAD(0x0034, PIN_INPUT,  7)
 227                 >;
 228         };
 229
 230         mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
 231                 pinctrl-single,pins = <
 232                         /* (V1) MCU_OSPI0_CLK */
 233                         AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
 234                         /* (U2) MCU_OSPI0_DQS */
 235                         AM65X_WKUP_IOPAD(0x0008, PIN_INPUT,  0)
 236                         /* (U4) MCU_OSPI0_D0 */
 237                         AM65X_WKUP_IOPAD(0x000c, PIN_INPUT,  0)
 238                         /* (U5) MCU_OSPI0_D1 */
 239                         AM65X_WKUP_IOPAD(0x0010, PIN_INPUT,  0)
 240                         /* (R4) MCU_OSPI0_CSn0 */
 241                         AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0)
 242                 >;
 243         };
 244
 245         db9_com_mode_pins_default: db9-com-mode-default-pins {
 246                 pinctrl-single,pins = <
 247                         /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
 248                         AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
 249                         /* (AC3) WKUP_GPIO0_4, used as uart0 mode 1 */
 250                         AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7)
 251                         /* (AC1) WKUP_GPIO0_7, used as uart0 term */
 252                         AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7)
 253                         /* (AC2) WKUP_GPIO0_6, used as uart0 en */
 254                         AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7)
 255                 >;
 256         };
 257
 258         leds_pins_default: leds-default-pins {
 259                 pinctrl-single,pins = <
 260                         /* (T2) WKUP_GPIO0_17, used as user led1 red */
 261                         AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
 262                         /* (R3) WKUP_GPIO0_22, used as user led1 green */
 263                         AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7)
 264                         /* (R5) WKUP_GPIO0_24, used as status led red */
 265                         AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7)
 266                         /* (N2) WKUP_GPIO0_32, used as status led green */
 267                         AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7)
 268                 >;
 269         };
 270
 271         mcu_spi0_pins_default: mcu-spi0-default-pins {
 272                 pinctrl-single,pins = <
 273                         /* (Y1) MCU_SPI0_CLK */
 274                         AM65X_WKUP_IOPAD(0x0090, PIN_INPUT,  0)
 275                         /* (Y3) MCU_SPI0_D0 */
 276                         AM65X_WKUP_IOPAD(0x0094, PIN_INPUT,  0)
 277                         /* (Y2) MCU_SPI0_D1 */
 278                         AM65X_WKUP_IOPAD(0x0098, PIN_INPUT,  0)
 279                         /* (Y4) MCU_SPI0_CS0 */
 280                         AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
 281                 >;
 282         };
 283
 284         minipcie_pins_default: minipcie-default-pins {
 285                 pinctrl-single,pins = <
 286                         /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
 287                         AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
 288                 >;
 289         };
 290 };
 291
 292 &main_pmx0 {
 293         main_pcie_enable_pins_default: main-pcie-enable-default-pins {
 294                 pinctrl-single,pins = <
 295                         AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7)  /* (AH13) GPIO1_17 */
 296                 >;
 297         };
 298
 299         main_uart1_pins_default: main-uart1-default-pins {
 300                 pinctrl-single,pins = <
 301                         AM65X_IOPAD(0x0174, PIN_INPUT,  6)  /* (AE23) UART1_RXD */
 302                         AM65X_IOPAD(0x014c, PIN_OUTPUT, 6)  /* (AD23) UART1_TXD */
 303                         AM65X_IOPAD(0x0178, PIN_INPUT,  6)  /* (AD22) UART1_CTSn */
 304                         AM65X_IOPAD(0x017c, PIN_OUTPUT, 6)  /* (AC21) UART1_RTSn */
 305                 >;
 306         };
 307
 308         main_i2c3_pins_default: main-i2c3-default-pins {
 309                 pinctrl-single,pins = <
 310                         AM65X_IOPAD(0x01c0, PIN_INPUT,  2)  /* (AF13) I2C3_SCL */
 311                         AM65X_IOPAD(0x01d4, PIN_INPUT,  2)  /* (AG12) I2C3_SDA */
 312                 >;
 313         };
 314
 315         main_mmc1_pins_default: main-mmc1-default-pins {
 316                 pinctrl-single,pins = <
 317                         AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0)  /* (C27) MMC1_CLK */
 318                         AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP,   0)  /* (C28) MMC1_CMD */
 319                         AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP,   0)  /* (D28) MMC1_DAT0 */
 320                         AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP,   0)  /* (E27) MMC1_DAT1 */
 321                         AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP,   0)  /* (D26) MMC1_DAT2 */
 322                         AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP,   0)  /* (D27) MMC1_DAT3 */
 323                         AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP,   0)  /* (B24) MMC1_SDCD */
 324                         AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP,   0)  /* (C24) MMC1_SDWP */
 325                 >;
 326         };
 327
 328         usb0_pins_default: usb0-default-pins {
 329                 pinctrl-single,pins = <
 330                         AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0)  /* (AD9) USB0_DRVVBUS */
 331                 >;
 332         };
 333
 334         usb1_pins_default: usb1-default-pins {
 335                 pinctrl-single,pins = <
 336                         AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0)  /* (AC8) USB1_DRVVBUS */
 337                 >;
 338         };
 339
 340         main_i2c2_pins_default: main-i2c2-default-pins {
 341                 pinctrl-single,pins = <
 342                         AM65X_IOPAD(0x0074, PIN_INPUT,  5)  /* (T27) I2C2_SCL */
 343                         AM65X_IOPAD(0x0070, PIN_INPUT,  5)  /* (R25) I2C2_SDA */
 344                 >;
 345         };
 346
 347         icssg0_mdio_pins_default: icssg0-mdio-default-pins {
 348                 pinctrl-single,pins = <
 349                         AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
 350                         AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
 351                 >;
 352         };
 353
 354         icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
 355                 pinctrl-single,pins = <
 356                         AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
 357                         AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
 358                         AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
 359                         AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
 360                         AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
 361                         AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
 362                         AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
 363                         AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
 364                         AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
 365                         AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
 366                         AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
 367                         AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
 368
 369                         AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
 370                         AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
 371                         AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
 372                         AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
 373                         AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
 374                         AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
 375                         AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
 376                         AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
 377                         AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
 378                         AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
 379                         AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
 380                         AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
 381                 >;
 382         };
 383 };
 384
 385 &main_pmx1 {
 386         main_i2c0_pins_default: main-i2c0-default-pins {
 387                 pinctrl-single,pins = <
 388                         AM65X_IOPAD(0x0000, PIN_INPUT,  0)  /* (D20) I2C0_SCL */
 389                         AM65X_IOPAD(0x0004, PIN_INPUT,  0)  /* (C21) I2C0_SDA */
 390                 >;
 391         };
 392
 393         main_i2c1_pins_default: main-i2c1-default-pins {
 394                 pinctrl-single,pins = <
 395                         AM65X_IOPAD(0x0008, PIN_INPUT,  0)  /* (B21) I2C1_SCL */
 396                         AM65X_IOPAD(0x000c, PIN_INPUT,  0)  /* (E21) I2C1_SDA */
 397                 >;
 398         };
 399 };
 400
 401 &wkup_uart0 {
 402         /* Wakeup UART is used by System firmware */
 403         status = "reserved";
 404 };
 405
 406 &main_uart1 {
 407         status = "okay";
 408         pinctrl-names = "default";
 409         pinctrl-0 = <&main_uart1_pins_default>;
 410 };
 411
 412 &main_gpio1 {
 413         pinctrl-names = "default";
 414         pinctrl-0 = <&main_pcie_enable_pins_default>;
 415 };
 416
 417 &mcu_i2c0 {
 418         status = "okay";
 419         pinctrl-names = "default";
 420         pinctrl-0 = <&mcu_i2c0_pins_default>;
 421         clock-frequency = <400000>;
 422
 423         psu: regulator@60 {
 424                 compatible = "ti,tps62363";
 425                 reg = <0x60>;
 426                 regulator-name = "tps62363-vout";
 427                 regulator-min-microvolt = <500000>;
 428                 regulator-max-microvolt = <1500000>;
 429                 regulator-boot-on;
 430                 ti,vsel0-state-high;
 431                 ti,vsel1-state-high;
 432                 ti,enable-vout-discharge;
 433         };
 434 };
 435
 436 &main_i2c0 {
 437         status = "okay";
 438         pinctrl-names = "default";
 439         pinctrl-0 = <&main_i2c0_pins_default>;
 440         clock-frequency = <400000>;
 441
 442         rtc: rtc@51 {
 443                 compatible = "nxp,pcf8563";
 444                 reg = <0x51>;
 445         };
 446
 447         eeprom: eeprom@54 {
 448                 compatible = "atmel,24c08";
 449                 reg = <0x54>;
 450                 pagesize = <16>;
 451         };
 452 };
 453
 454 &main_i2c1 {
 455         status = "okay";
 456         pinctrl-names = "default";
 457         pinctrl-0 = <&main_i2c1_pins_default>;
 458         clock-frequency = <400000>;
 459 };
 460
 461 &main_i2c2 {
 462         status = "okay";
 463         pinctrl-names = "default";
 464         pinctrl-0 = <&main_i2c2_pins_default>;
 465         clock-frequency = <400000>;
 466 };
 467
 468 &main_i2c3 {
 469         status = "okay";
 470         pinctrl-names = "default";
 471         pinctrl-0 = <&main_i2c3_pins_default>;
 472         clock-frequency = <400000>;
 473
 474         #address-cells = <1>;
 475         #size-cells = <0>;
 476 };
 477
 478 &mcu_cpsw {
 479         status = "disabled";
 480 };
 481
 482 &sdhci1 {
 483         status = "okay";
 484         pinctrl-names = "default";
 485         pinctrl-0 = <&main_mmc1_pins_default>;
 486         ti,driver-strength-ohm = <50>;
 487         disable-wp;
 488 };
 489
 490 &usb0 {
 491         pinctrl-names = "default";
 492         pinctrl-0 = <&usb0_pins_default>;
 493         dr_mode = "host";
 494 };
 495
 496 &usb1 {
 497         pinctrl-names = "default";
 498         pinctrl-0 = <&usb1_pins_default>;
 499         dr_mode = "host";
 500 };
 501
 502 &mcu_spi0 {
 503         status = "okay";
 504         #address-cells = <1>;
 505         #size-cells = <0>;
 506         ti,pindir-d0-out-d1-in;
 507 };
 508
 509 &ospi0 {
 510         status = "okay";
 511         pinctrl-names = "default";
 512         pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
 513
 514         flash@0 {
 515                 compatible = "jedec,spi-nor";
 516                 reg = <0x0>;
 517                 spi-tx-bus-width = <1>;
 518                 spi-rx-bus-width = <1>;
 519                 spi-max-frequency = <50000000>;
 520                 cdns,tshsl-ns = <60>;
 521                 cdns,tsd2d-ns = <60>;
 522                 cdns,tchsh-ns = <60>;
 523                 cdns,tslch-ns = <60>;
 524                 cdns,read-delay = <2>;
 525
 526                 partitions {
 527                         compatible = "fixed-partitions";
 528                         #address-cells = <1>;
 529                         #size-cells = <1>;
 530
 531                         seboot@0 {
 532                                 label = "seboot";
 533                                 reg = <0x0 0x180000>; /* 1.5M */
 534                         };
 535
 536                         tispl@180000 {
 537                                 label = "tispl";
 538                                 reg = <0x180000 0x200000>; /* 2M */
 539                         };
 540
 541                         u-boot@380000 {
 542                                 label = "u-boot";
 543                                 reg = <0x380000 0x300000>; /* 3M */
 544                         };
 545
 546                         env@680000 {
 547                                 label = "env";
 548                                 reg = <0x680000 0x20000>; /* 128K */
 549                         };
 550
 551                         env-backup@6a0000 {
 552                                 label = "env.backup";
 553                                 reg = <0x6a0000 0x20000>; /* 128K */
 554                         };
 555
 556                         otpcmd@6c0000 {
 557                                 label = "otpcmd";
 558                                 reg = <0x6c0000 0x10000>; /* 64K */
 559                         };
 560
 561                         unused@6d0000 {
 562                                 label = "unused";
 563                                 reg = <0x6d0000 0x7b0000>; /* 7872K */
 564                         };
 565
 566                         seboot-backup@e80000 {
 567                                 label = "seboot.backup";
 568                                 reg = <0xe80000 0x180000>; /* 1.5M */
 569                         };
 570                 };
 571         };
 572 };
 573
 574 &pcie1_rc {
 575         status = "okay";
 576         pinctrl-names = "default";
 577         pinctrl-0 = <&minipcie_pins_default>;
 578
 579         num-lanes = <1>;
 580         phys = <&serdes1 PHY_TYPE_PCIE 0>;
 581         phy-names = "pcie-phy0";
 582         reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
 583 };
 584
 585 &mailbox0_cluster0 {
 586         status = "okay";
 587         interrupts = <436>;
 588
 589         mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
 590                 ti,mbox-tx = <1 0 0>;
 591                 ti,mbox-rx = <0 0 0>;
 592         };
 593 };
 594
 595 &mailbox0_cluster1 {
 596         status = "okay";
 597         interrupts = <432>;
 598
 599         mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 600                 ti,mbox-tx = <1 0 0>;
 601                 ti,mbox-rx = <0 0 0>;
 602         };
 603 };
 604
 605 &mcu_r5fss0_core0 {
 606         memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 607                         <&mcu_r5fss0_core0_memory_region>;
 608         mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
 609 };
 610
 611 &mcu_r5fss0_core1 {
 612         memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 613                         <&mcu_r5fss0_core1_memory_region>;
 614         mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
 615 };
 616
 617 &mcu_rti1 {
 618         memory-region = <&wdt_reset_memory_region>;
 619 };
 620
 621 &icssg0_mdio {
 622         status = "okay";
 623         pinctrl-names = "default";
 624         pinctrl-0 = <&icssg0_mdio_pins_default>;
 625
 626         icssg0_eth0_phy: ethernet-phy@0 {
 627                 reg = <0>;
 628                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 629                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 630         };
 631
 632         icssg0_eth1_phy: ethernet-phy@1 {
 633                 reg = <1>;
 634                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 635                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 636         };
 637 };