arch/arm64/boot/dts/ti/k3-am642-evm-icssg1-dualemac.dtso

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2 /**
   3  * DT overlay for enabling 2nd ICSSG1 port on AM642 EVM
   4  *
   5  * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
   6  */
   7
   8 /dts-v1/;
   9 /plugin/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include "k3-pinctrl.h"
  13
  14 &{/} {
  15         aliases {
  16                 ethernet1 = "/icssg1-eth/ethernet-ports/port@1";
  17         };
  18
  19         mdio-mux-2 {
  20                 compatible = "mdio-mux-multiplexer";
  21                 mux-controls = <&mdio_mux>;
  22                 mdio-parent-bus = <&icssg1_mdio>;
  23                 #address-cells = <1>;
  24                 #size-cells = <0>;
  25
  26                 mdio@0 {
  27                         reg = <0x0>;
  28                         #address-cells = <1>;
  29                         #size-cells = <0>;
  30
  31                         icssg1_phy2: ethernet-phy@3 {
  32                                 reg = <3>;
  33                                 tx-internal-delay-ps = <250>;
  34                                 rx-internal-delay-ps = <2000>;
  35                         };
  36                 };
  37         };
  38 };
  39
  40 &main_pmx0 {
  41         icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins {
  42                 pinctrl-single,pins = <
  43                         AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
  44                         AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
  45                         AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.RGMII2_RD2 */
  46                         AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.RGMII2_RD3 */
  47                         AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.RGMII2_RXC */
  48                         AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.RGMII2_RX_CTL */
  49                         AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.RGMII2_TD0 */
  50                         AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.RGMII2_TD1 */
  51                         AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.RGMII2_TD2 */
  52                         AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.RGMII2_TD3 */
  53                         AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.RGMII2_TXC */
  54                         AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
  55                 >;
  56         };
  57 };
  58
  59 &cpsw3g {
  60         pinctrl-0 = <&rgmii1_pins_default>;
  61 };
  62
  63 &cpsw_port2 {
  64         status = "disabled";
  65 };
  66
  67 &mdio_mux_1 {
  68         status = "disabled";
  69 };
  70
  71 &icssg1_eth {
  72         pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>;
  73 };
  74
  75 &icssg1_emac1 {
  76         status = "okay";
  77         phy-handle = <&icssg1_phy2>;
  78         phy-mode = "rgmii-id";
  79 };