arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2 /*
   3  * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
   4  * Author: Wadim Egorov <w.egorov@phytec.de>
   5  *
   6  * Product homepage:
   7  * https://www.phytec.com/product/phycore-am62x
   8  */
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/leds/common.h>
  12 #include <dt-bindings/net/ti-dp83867.h>
  13
  14 / {
  15         model = "PHYTEC phyCORE-AM62x";
  16         compatible = "phytec,am62-phycore-som", "ti,am625";
  17
  18         aliases {
  19                 ethernet0 = &cpsw_port1;
  20                 gpio0 = &main_gpio0;
  21                 gpio1 = &main_gpio1;
  22                 i2c0 = &main_i2c0;
  23                 mmc0 = &sdhci0;
  24                 rtc0 = &i2c_som_rtc;
  25                 rtc1 = &wkup_rtc0;
  26                 spi0 = &ospi0;
  27         };
  28
  29         memory@80000000 {
  30                 device_type = "memory";
  31                 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
  32         };
  33
  34         reserved_memory: reserved-memory {
  35                 #address-cells = <2>;
  36                 #size-cells = <2>;
  37                 ranges;
  38
  39                 ramoops@9ca00000 {
  40                         compatible = "ramoops";
  41                         reg = <0x00 0x9ca00000 0x00 0x00100000>;
  42                         record-size = <0x8000>;
  43                         console-size = <0x8000>;
  44                         ftrace-size = <0x00>;
  45                         pmsg-size = <0x8000>;
  46                 };
  47
  48                 secure_tfa_ddr: tfa@9e780000 {
  49                         reg = <0x00 0x9e780000 0x00 0x80000>;
  50                         alignment = <0x1000>;
  51                         no-map;
  52                 };
  53
  54                 secure_ddr: optee@9e800000 {
  55                         reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
  56                         alignment = <0x1000>;
  57                         no-map;
  58                 };
  59
  60                 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
  61                         compatible = "shared-dma-pool";
  62                         reg = <0x00 0x9db00000 0x00 0x00c00000>;
  63                         no-map;
  64                 };
  65         };
  66
  67         vcc_5v0_som: regulator-vcc-5v0-som {
  68                 compatible = "regulator-fixed";
  69                 regulator-name = "VCC_5V0_SOM";
  70                 regulator-min-microvolt = <5000000>;
  71                 regulator-max-microvolt = <5000000>;
  72                 regulator-always-on;
  73                 regulator-boot-on;
  74         };
  75
  76         vdd_1v8: regulator-vdd-1v8 {
  77                 compatible = "regulator-fixed";
  78                 regulator-name = "VDD_1V8";
  79                 regulator-min-microvolt = <1800000>;
  80                 regulator-max-microvolt = <1800000>;
  81                 vin-supply = <&vcc_5v0_som>;
  82                 regulator-always-on;
  83                 regulator-boot-on;
  84         };
  85
  86         leds {
  87                 compatible = "gpio-leds";
  88                 pinctrl-names = "default";
  89                 pinctrl-0 = <&leds_pins_default>;
  90
  91                 led-0 {
  92                         color = <LED_COLOR_ID_GREEN>;
  93                         gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>;
  94                         linux,default-trigger = "heartbeat";
  95                         function = LED_FUNCTION_HEARTBEAT;
  96                 };
  97         };
  98 };
  99
 100 &main_pmx0 {
 101         leds_pins_default: leds-default-pins {
 102                 pinctrl-single,pins = <
 103                         AM62X_IOPAD(0x034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSN2.GPIO0_13 */
 104                 >;
 105         };
 106
 107         main_i2c0_pins_default: main-i2c0-default-pins {
 108                 pinctrl-single,pins = <
 109                         AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
 110                         AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
 111                 >;
 112         };
 113
 114         main_mdio1_pins_default: main-mdio1-default-pins {
 115                 pinctrl-single,pins = <
 116                         AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
 117                         AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
 118                 >;
 119         };
 120
 121         main_mmc0_pins_default: main-mmc0-default-pins {
 122                 pinctrl-single,pins = <
 123                         AM62X_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y3) MMC0_CMD */
 124                         AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */
 125                         AM62X_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA2) MMC0_DAT0 */
 126                         AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
 127                         AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
 128                         AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
 129                         AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
 130                         AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
 131                         AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
 132                         AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
 133                 >;
 134         };
 135
 136         main_rgmii1_pins_default: main-rgmii1-default-pins {
 137                 pinctrl-single,pins = <
 138                         AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
 139                         AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
 140                         AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
 141                         AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
 142                         AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
 143                         AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
 144                         AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
 145                         AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
 146                         AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
 147                         AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
 148                         AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
 149                         AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
 150                 >;
 151         };
 152
 153         ospi0_pins_default: ospi0-default-pins {
 154                 pinctrl-single,pins = <
 155                         AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
 156                         AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
 157                         AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
 158                         AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
 159                         AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
 160                         AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
 161                         AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
 162                         AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
 163                         AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
 164                         AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
 165                         AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
 166                 >;
 167         };
 168
 169         pmic_irq_pins_default: pmic-irq-default-pins {
 170                 pinctrl-single,pins = <
 171                         AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
 172                 >;
 173         };
 174 };
 175
 176 &cpsw3g {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&main_rgmii1_pins_default>;
 179 };
 180
 181 &cpsw_port1 {
 182         phy-mode = "rgmii-rxid";
 183         phy-handle = <&cpsw3g_phy1>;
 184 };
 185
 186 &cpsw3g_mdio {
 187         pinctrl-names = "default";
 188         pinctrl-0 = <&main_mdio1_pins_default>;
 189         status = "okay";
 190
 191         cpsw3g_phy1: ethernet-phy@1 {
 192                 compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
 193                 reg = <1>;
 194                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 195                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 196         };
 197 };
 198
 199 &main_i2c0 {
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&main_i2c0_pins_default>;
 202         clock-frequency = <400000>;
 203         status = "okay";
 204
 205         pmic@30 {
 206                 compatible = "ti,tps65219";
 207                 reg = <0x30>;
 208                 buck1-supply = <&vcc_5v0_som>;
 209                 buck2-supply = <&vcc_5v0_som>;
 210                 buck3-supply = <&vcc_5v0_som>;
 211                 ldo1-supply = <&vdd_3v3>;
 212                 ldo2-supply = <&vdd_1v8>;
 213                 ldo3-supply = <&vcc_5v0_som>;
 214                 ldo4-supply = <&vcc_5v0_som>;
 215
 216                 pinctrl-names = "default";
 217                 pinctrl-0 = <&pmic_irq_pins_default>;
 218                 interrupt-parent = <&gic500>;
 219                 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 220                 interrupt-controller;
 221                 #interrupt-cells = <1>;
 222
 223                 ti,power-button;
 224                 system-power-controller;
 225
 226                 regulators {
 227                         vdd_core: buck1 {
 228                                 regulator-name = "VDD_CORE";
 229                                 regulator-min-microvolt = <750000>;
 230                                 regulator-max-microvolt = <750000>;
 231                                 regulator-boot-on;
 232                                 regulator-always-on;
 233                         };
 234
 235                         vdd_3v3: buck2 {
 236                                 regulator-name = "VDD_3V3";
 237                                 regulator-min-microvolt = <3300000>;
 238                                 regulator-max-microvolt = <3300000>;
 239                                 regulator-boot-on;
 240                                 regulator-always-on;
 241                         };
 242
 243                         vdd_ddr4: buck3 {
 244                                 regulator-name = "VDD_DDR4";
 245                                 regulator-min-microvolt = <1200000>;
 246                                 regulator-max-microvolt = <1200000>;
 247                                 regulator-boot-on;
 248                                 regulator-always-on;
 249                         };
 250
 251                         vddshv5_sdio: ldo1 {
 252                                 regulator-name = "VDDSHV5_SDIO";
 253                                 regulator-min-microvolt = <3300000>;
 254                                 regulator-max-microvolt = <3300000>;
 255                                 regulator-allow-bypass;
 256                                 regulator-boot-on;
 257                                 regulator-always-on;
 258                         };
 259
 260                         vddr_core: ldo2 {
 261                                 regulator-name = "VDDR_CORE";
 262                                 regulator-min-microvolt = <850000>;
 263                                 regulator-max-microvolt = <850000>;
 264                                 regulator-boot-on;
 265                                 regulator-always-on;
 266                         };
 267
 268                         vdda_1v8: ldo3 {
 269                                 regulator-name = "VDDA_1V8";
 270                                 regulator-min-microvolt = <1800000>;
 271                                 regulator-max-microvolt = <1800000>;
 272                                 regulator-boot-on;
 273                                 regulator-always-on;
 274                         };
 275
 276                         vdd_2v5: ldo4 {
 277                                 regulator-name = "VDD_2V5";
 278                                 regulator-min-microvolt = <2500000>;
 279                                 regulator-max-microvolt = <2500000>;
 280                                 regulator-boot-on;
 281                                 regulator-always-on;
 282                         };
 283                 };
 284         };
 285
 286         eeprom@50 {
 287                 compatible = "atmel,24c32";
 288                 pagesize = <32>;
 289                 reg = <0x50>;
 290         };
 291
 292         i2c_som_rtc: rtc@52 {
 293                 compatible = "microcrystal,rv3028";
 294                 reg = <0x52>;
 295         };
 296 };
 297
 298 &ospi0 {
 299         pinctrl-names = "default";
 300         pinctrl-0 = <&ospi0_pins_default>;
 301         status = "okay";
 302
 303         serial_flash: flash@0 {
 304                 compatible = "jedec,spi-nor";
 305                 reg = <0x0>;
 306                 spi-tx-bus-width = <8>;
 307                 spi-rx-bus-width = <8>;
 308                 spi-max-frequency = <25000000>;
 309                 cdns,tshsl-ns = <60>;
 310                 cdns,tsd2d-ns = <60>;
 311                 cdns,tchsh-ns = <60>;
 312                 cdns,tslch-ns = <60>;
 313                 cdns,read-delay = <0>;
 314         };
 315 };
 316
 317 &sdhci0 {
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&main_mmc0_pins_default>;
 320         disable-wp;
 321         non-removable;
 322         status = "okay";
 323 };