arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi

   1 // SPDX-License-Identifier: BSD-3-Clause
   2 /*
   3  * Common Board Device Tree for
   4  * Microsoft Mobile MSM8994 Octagon Platforms
   5  *
   6  * Copyright (c) 2020, Konrad Dybcio
   7  * Copyright (c) 2020, Gustave Monce <gustave.monce@outlook.com>
   8  */
   9
  10 #include "pm8994.dtsi"
  11 #include "pmi8994.dtsi"
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/gpio-keys.h>
  14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  15
  16 /*
  17  * Delete all generic (msm8994.dtsi) reserved
  18  * memory mappings which are different in this device.
  19  */
  20 /delete-node/ &adsp_mem;
  21 /delete-node/ &audio_mem;
  22 /delete-node/ &cont_splash_mem;
  23 /delete-node/ &mba_mem;
  24 /delete-node/ &mpss_mem;
  25 /delete-node/ &peripheral_region;
  26 /delete-node/ &rmtfs_mem;
  27 /delete-node/ &smem_mem;
  28
  29 / {
  30         /*
  31          * Most Lumia 950/XL users use GRUB to load their kernels,
  32          * hence there is no need for msm-id and friends.
  33          */
  34
  35         /*
  36          * This enables graphical output via bootloader-enabled display.
  37          * acpi=no is required due to WP platforms having ACPI support, but
  38          * only for Windows-based OSes.
  39          */
  40         chosen {
  41                 bootargs = "earlycon=efifb console=efifb acpi=no";
  42
  43                 #address-cells = <2>;
  44                 #size-cells = <2>;
  45                 ranges;
  46         };
  47
  48         clocks {
  49                 compatible = "simple-bus";
  50
  51                 divclk4: divclk4 {
  52                         compatible = "fixed-clock";
  53                         #clock-cells = <0>;
  54
  55                         clock-frequency = <32768>;
  56                         clock-output-names = "divclk4";
  57
  58                         pinctrl-names = "default";
  59                         pinctrl-0 = <&divclk4_pin_a>;
  60                 };
  61         };
  62
  63         gpio-keys {
  64                 compatible = "gpio-keys";
  65                 autorepeat;
  66
  67                 volup-key {
  68                         label = "Volume Up";
  69                         gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>;
  70                         linux,input-type = <1>;
  71                         linux,code = <KEY_VOLUMEUP>;
  72                         wakeup-source;
  73                         debounce-interval = <15>;
  74                 };
  75
  76                 camsnap-key {
  77                         label = "Camera Snapshot";
  78                         gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>;
  79                         linux,input-type = <1>;
  80                         linux,code = <KEY_CAMERA>;
  81                         wakeup-source;
  82                         debounce-interval = <15>;
  83                 };
  84
  85                 camfocus-key {
  86                         label = "Camera Focus";
  87                         gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>;
  88                         linux,input-type = <1>;
  89                         linux,code = <KEY_VOLUMEUP>;
  90                         wakeup-source;
  91                         debounce-interval = <15>;
  92                 };
  93         };
  94
  95         gpio-hall-sensor {
  96                 compatible = "gpio-keys";
  97
  98                 pinctrl-names = "default";
  99                 pinctrl-0 = <&hall_front_default &hall_back_default>;
 100
 101                 label = "GPIO Hall Effect Sensor";
 102
 103                 event-hall-front-sensor {
 104                         label = "Hall Effect Front Sensor";
 105                         gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
 106                         linux,input-type = <EV_SW>;
 107                         linux,code = <SW_LID>;
 108                         linux,can-disable;
 109                 };
 110
 111                 event-hall-back-sensor {
 112                         label = "Hall Effect Back Sensor";
 113                         gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>;
 114                         linux,input-type = <EV_SW>;
 115                         linux,code = <SW_MACHINE_COVER>;
 116                         linux,can-disable;
 117                 };
 118         };
 119
 120         reserved-memory {
 121                 /*
 122                  * This device being a WP platform has a very different
 123                  * memory layout than other Android based devices.
 124                  * This memory layout is directly copied from the original
 125                  * device UEFI firmware, and adapted based on observations
 126                  * using JTAG for the Qualcomm Peripheral Image regions.
 127                  */
 128
 129                 uefi_mem: memory@200000 {
 130                         reg = <0 0x200000 0 0x100000>;
 131                         no-map;
 132                 };
 133
 134                 mppark_mem: memory@300000 {
 135                         reg = <0 0x300000 0 0x80000>;
 136                         no-map;
 137                 };
 138
 139                 fbpt_mem: memory@380000 {
 140                         reg = <0 0x380000 0 0x1000>;
 141                         no-map;
 142                 };
 143
 144                 dbg2_mem: memory@381000 {
 145                         reg = <0 0x381000 0 0x4000>;
 146                         no-map;
 147                 };
 148
 149                 capsule_mem: memory@385000 {
 150                         reg = <0 0x385000 0 0x1000>;
 151                         no-map;
 152                 };
 153
 154                 tpmctrl_mem: memory@386000 {
 155                         reg = <0 0x386000 0 0x3000>;
 156                         no-map;
 157                 };
 158
 159                 uefiinfo_mem: memory@389000 {
 160                         reg = <0 0x389000 0 0x1000>;
 161                         no-map;
 162                 };
 163
 164                 reset_mem: memory@389000 {
 165                         reg = <0 0x389000 0 0x1000>;
 166                         no-map;
 167                 };
 168
 169                 resuncached_mem: memory@38e000 {
 170                         reg = <0 0x38e000 0 0x72000>;
 171                         no-map;
 172                 };
 173
 174                 disp_mem: memory@400000 {
 175                         reg = <0 0x400000 0 0x800000>;
 176                         no-map;
 177                 };
 178
 179                 uefistack_mem: memory@c00000 {
 180                         reg = <0 0xc00000 0 0x40000>;
 181                         no-map;
 182                 };
 183
 184                 cpuvect_mem: memory@c40000 {
 185                         reg = <0 0xc40000 0 0x10000>;
 186                         no-map;
 187                 };
 188
 189                 rescached_mem: memory@400000 {
 190                         reg = <0 0xc50000 0 0xb0000>;
 191                         no-map;
 192                 };
 193
 194                 tzapps_mem: memory@6500000 {
 195                         reg = <0 0x6500000 0 0x500000>;
 196                         no-map;
 197                 };
 198
 199                 smem_mem: memory@6a00000 {
 200                         reg = <0 0x6a00000 0 0x200000>;
 201                         no-map;
 202                 };
 203
 204                 hyp_mem: memory@6c00000 {
 205                         reg = <0 0x6c00000 0 0x100000>;
 206                         no-map;
 207                 };
 208
 209                 tz_mem: memory@6d00000 {
 210                         reg = <0 0x6d00000 0 0x160000>;
 211                         no-map;
 212                 };
 213
 214                 rfsa_adsp_mem: memory@6e60000 {
 215                         reg = <0 0x6e60000 0 0x10000>;
 216                         no-map;
 217                 };
 218
 219                 rfsa_mpss_mem: memory@6e70000 {
 220                         compatible = "qcom,rmtfs-mem";
 221                         reg = <0 0x6e70000 0 0x10000>;
 222                         no-map;
 223
 224                         qcom,client-id = <1>;
 225                 };
 226
 227                 /*
 228                  * Value obtained from the device original ACPI DSDT table
 229                  * MPSS_EFS / SBL
 230                  */
 231                 mba_mem: memory@6e80000 {
 232                         reg = <0 0x6e80000 0 0x180000>;
 233                         no-map;
 234                 };
 235
 236                 /*
 237                  * Peripheral Image loader region begin!
 238                  * The region reserved for pil is 0x7000000-0xef00000
 239                  */
 240
 241                 mpss_mem: memory@7000000 {
 242                         reg = <0 0x7000000 0 0x5a00000>;
 243                         no-map;
 244                 };
 245
 246                 adsp_mem: memory@ca00000 {
 247                         reg = <0 0xca00000 0 0x1800000>;
 248                         no-map;
 249                 };
 250
 251                 venus_mem: memory@e200000 {
 252                         reg = <0 0xe200000 0 0x500000>;
 253                         no-map;
 254                 };
 255
 256                 pil_metadata_mem: memory@e700000 {
 257                         reg = <0 0xe700000 0 0x4000>;
 258                         no-map;
 259                 };
 260
 261                 memory@e704000 {
 262                         reg = <0 0xe704000 0 0x7fc000>;
 263                         no-map;
 264                 };
 265                 /* Peripheral Image loader region end */
 266
 267                 cnss_mem: memory@ef00000 {
 268                         reg = <0 0xef00000 0 0x300000>;
 269                         no-map;
 270                 };
 271         };
 272 };
 273
 274 &blsp1_i2c1 {
 275         status = "okay";
 276
 277         rmi4-i2c-dev@4b {
 278                 compatible = "syna,rmi4-i2c";
 279                 reg = <0x4b>;
 280                 #address-cells = <1>;
 281                 #size-cells = <0>;
 282
 283                 interrupt-parent = <&tlmm>;
 284                 interrupts = <77 IRQ_TYPE_EDGE_FALLING>;
 285
 286                 rmi4-f01@1 {
 287                         reg = <0x01>;
 288                         syna,nosleep-mode = <1>;
 289                 };
 290
 291                 rmi4-f12@12 {
 292                         reg = <0x12>;
 293                         syna,sensor-type = <1>;
 294                         syna,clip-x-low = <0>;
 295                         syna,clip-x-high = <1440>;
 296                         syna,clip-y-low = <0>;
 297                         syna,clip-y-high = <2560>;
 298                 };
 299         };
 300 };
 301
 302 &blsp1_i2c2 {
 303         status = "okay";
 304
 305         /*
 306          * This device uses the Texas Instruments TAS2553, however the TAS2552 driver
 307          * seems to work here. In the future a proper driver might need to
 308          * be written for this device.
 309          */
 310         tas2553: tas2553@40 {
 311                 compatible = "ti,tas2552";
 312                 reg = <0x40>;
 313
 314                 vbat-supply = <&vph_pwr>;
 315                 iovdd-supply = <&vreg_s4a_1p8>;
 316                 avdd-supply = <&vreg_s4a_1p8>;
 317
 318                 enable-gpio = <&pm8994_gpios 12 GPIO_ACTIVE_HIGH>;
 319         };
 320 };
 321
 322 &blsp1_i2c5 {
 323         status = "okay";
 324
 325         ak09912: magnetometer@c {
 326                 compatible = "asahi-kasei,ak09912";
 327                 reg = <0xc>;
 328
 329                 interrupt-parent = <&tlmm>;
 330                 interrupts = <26 IRQ_TYPE_EDGE_RISING>;
 331
 332                 vdd-supply = <&vreg_l18a_2p85>;
 333                 vid-supply = <&vreg_lvs2a_1p8>;
 334         };
 335
 336         zpa2326: barometer@5c {
 337                 compatible = "murata,zpa2326";
 338                 reg = <0x5c>;
 339
 340                 interrupt-parent = <&tlmm>;
 341                 interrupts = <74 IRQ_TYPE_EDGE_RISING>;
 342
 343                 vdd-supply = <&vreg_lvs2a_1p8>;
 344         };
 345
 346         mpu6050: accelerometer@68 {
 347                 compatible = "invensense,mpu6500";
 348                 reg = <0x68>;
 349
 350                 interrupt-parent = <&tlmm>;
 351                 interrupts = <64 IRQ_TYPE_EDGE_RISING>;
 352
 353                 vdd-supply = <&vreg_lvs2a_1p8>;
 354                 vddio-supply = <&vreg_lvs2a_1p8>;
 355         };
 356 };
 357
 358 &blsp1_i2c6 {
 359         status = "okay";
 360
 361         pn547: pn547@28 {
 362                 compatible = "nxp,pn544-i2c";
 363
 364                 reg = <0x28>;
 365
 366                 interrupt-parent = <&tlmm>;
 367                 interrupts = <29 IRQ_TYPE_EDGE_RISING>;
 368
 369                 enable-gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
 370                 firmware-gpios = <&tlmm 94 GPIO_ACTIVE_HIGH>;
 371         };
 372 };
 373
 374 &blsp1_uart2 {
 375         status = "okay";
 376 };
 377
 378 &blsp2_i2c1 {
 379         status = "okay";
 380
 381         sideinteraction: ad7147_captouch@2c {
 382                 compatible = "ad,ad7147_captouch";
 383                 reg = <0x2c>;
 384
 385                 pinctrl-names = "default", "sleep";
 386                 pinctrl-0 = <&grip_default>;
 387                 pinctrl-1 = <&grip_sleep>;
 388
 389                 interrupts = <&tlmm 96 IRQ_TYPE_EDGE_FALLING>;
 390
 391                 button_num = <8>;
 392                 touchpad_num = <0>;
 393                 wheel_num = <0>;
 394                 slider_num = <0>;
 395
 396                 vcc-supply = <&vreg_l18a_2p85>;
 397         };
 398
 399         /*
 400          * The QPDS-T900/QPDS-T930 is a customized part built for Nokia
 401          * by Avago. It is very similar to the Avago APDS-9930 with some
 402          * minor differences. In the future a proper driver might need to
 403          * be written for this device. For now this works fine.
 404          */
 405         qpdst900: qpdst900@39 {
 406                 compatible = "avago,apds9930";
 407                 reg = <0x39>;
 408
 409                 interrupt-parent = <&tlmm>;
 410                 interrupts = <40 IRQ_TYPE_EDGE_FALLING>;
 411         };
 412 };
 413
 414 &blsp2_i2c5 {
 415         status = "okay";
 416
 417         fm_radio: si4705@11 {
 418                 compatible = "silabs,si470x";
 419                 reg = <0x11>;
 420
 421                 interrupt-parent = <&tlmm>;
 422                 interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
 423                 reset-gpios = <&tlmm 93 GPIO_ACTIVE_HIGH>;
 424         };
 425
 426         vreg_lpddr_1p1: fan53526a@6c {
 427                 compatible = "fcs,fan53526";
 428                 reg = <0x6c>;
 429
 430                 regulator-min-microvolt = <1100000>;
 431                 regulator-max-microvolt = <1100000>;
 432                 vin-supply = <&vph_pwr>;
 433                 fcs,suspend-voltage-selector = <1>;
 434                 regulator-always-on; /* Turning off DDR power doesn't sound good. */
 435         };
 436
 437         /* ANX7816 HDMI bridge (needs MDSS HDMI) */
 438 };
 439
 440 &blsp2_spi4 {
 441         status = "okay";
 442
 443         /*
 444          * This device is a Lattice UC120 USB-C PD PHY.
 445          * It is actually a Lattice iCE40 FPGA pre-programmed by
 446          * the device firmware with a specific bitstream
 447          * enabling USB Type C PHY functionality.
 448          * Communication is done via a proprietary protocol over SPI.
 449          *
 450          * TODO: Once a proper driver is available, replace this.
 451          */
 452         uc120: ice5lp2k@0 {
 453                 compatible = "lattice,ice40-fpga-mgr";
 454                 reg = <0>;
 455                 spi-max-frequency = <5000000>;
 456                 cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
 457                 reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
 458         };
 459 };
 460
 461 &blsp2_uart2 {
 462         status = "okay";
 463
 464         qca6174_bt: bluetooth {
 465                 compatible = "qcom,qca6174-bt";
 466
 467                 enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
 468                 clocks = <&divclk4>;
 469         };
 470 };
 471
 472 &pm8994_gpios {
 473         bt_en_gpios: bt-en-gpios-state {
 474                 pinconf {
 475                         pins = "gpio19";
 476                         function = PMIC_GPIO_FUNC_NORMAL;
 477                         output-low;
 478                         power-source = <PM8994_GPIO_S4>;
 479                         qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
 480                         bias-pull-down;
 481                 };
 482         };
 483
 484         divclk4_pin_a: divclk4-state {
 485                 pinconf {
 486                         pins = "gpio18";
 487                         function = PMIC_GPIO_FUNC_FUNC2;
 488                         power-source = <PM8994_GPIO_S4>;
 489                         bias-disable;
 490                 };
 491         };
 492 };
 493
 494 &pm8994_pon {
 495         pwrkey {
 496                 compatible = "qcom,pm8941-pwrkey";
 497                 interrupts = <0 8 0 IRQ_TYPE_EDGE_BOTH>;
 498                 debounce = <15625>;
 499                 linux,code = <KEY_POWER>;
 500         };
 501
 502         volwnkey {
 503                 compatible = "qcom,pm8941-resin";
 504                 interrupts = <0 8 1 IRQ_TYPE_EDGE_BOTH>;
 505                 debounce = <15625>;
 506                 linux,code = <KEY_VOLUMEDOWN>;
 507         };
 508 };
 509
 510 &pmi8994_gpios {
 511         pinctrl-0 = <&hd3ss460_pol &hd3ss460_amsel &hd3ss460_en>;
 512         pinctrl-names = "default";
 513
 514         /*
 515          * This device uses a TI HD3SS460 Type-C MUX
 516          * As this device has no driver currently,
 517          * the configuration for USB Face Up is set-up here.
 518          *
 519          * TODO: remove once a driver is available
 520          * TODO: add VBUS GPIO 5
 521          */
 522         hd3ss460_pol: pol-low-state {
 523                 pins = "gpio8";
 524                 function = PMIC_GPIO_FUNC_NORMAL;
 525                 qcom,drive-strength = <3>;
 526                 bias-pull-down;
 527         };
 528
 529         hd3ss460_amsel: amsel-high-state {
 530                 pins = "gpio9";
 531                 function = PMIC_GPIO_FUNC_NORMAL;
 532                 qcom,drive-strength = <1>;
 533                 bias-pull-up;
 534         };
 535
 536         hd3ss460_en: en-high-state {
 537                 pins = "gpio10";
 538                 function = PMIC_GPIO_FUNC_NORMAL;
 539                 qcom,drive-strength = <1>;
 540                 bias-pull-up;
 541         };
 542 };
 543
 544 &pmi8994_spmi_regulators {
 545         vdd_gfx: s2@1700 {
 546                 reg = <0x1700 0x100>;
 547                 regulator-min-microvolt = <980000>;
 548                 regulator-max-microvolt = <980000>;
 549         };
 550 };
 551
 552 &rpm_requests {
 553         /* These values were taken from the original firmware ACPI tables */
 554         pm8994_regulators: pm8994-regulators {
 555                 compatible = "qcom,rpm-pm8994-regulators";
 556
 557                 vdd_s1-supply = <&vph_pwr>;
 558                 vdd_s2-supply = <&vph_pwr>;
 559                 vdd_s3-supply = <&vph_pwr>;
 560                 vdd_s4-supply = <&vph_pwr>;
 561                 vdd_s5-supply = <&vph_pwr>;
 562                 vdd_s6-supply = <&vph_pwr>;
 563                 vdd_s7-supply = <&vph_pwr>;
 564                 vdd_s8-supply = <&vph_pwr>;
 565                 vdd_s9-supply = <&vph_pwr>;
 566                 vdd_s10-supply = <&vph_pwr>;
 567                 vdd_s11-supply = <&vph_pwr>;
 568                 vdd_s12-supply = <&vph_pwr>;
 569                 vdd_l1-supply = <&vreg_s1b_1p0>;
 570                 vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>;
 571                 vdd_l3_l11-supply = <&vreg_s3a_1p3>;
 572                 vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>;
 573                 vdd_l5_l7-supply = <&vreg_s5a_2p15>;
 574                 vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>;
 575                 vdd_l8_l16_l30-supply = <&vph_pwr>;
 576                 vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>;
 577                 vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>;
 578                 vdd_l14_l15-supply = <&vreg_s5a_2p15>;
 579                 vdd_l17_l29-supply = <&vph_pwr_bbyp>;
 580                 vdd_l20_l21-supply = <&vph_pwr_bbyp>;
 581                 vdd_l25-supply = <&vreg_s5a_2p15>;
 582                 vdd_lvs1_2-supply = <&vreg_s4a_1p8>;
 583
 584                 /* S1, S2, S6 and S12 are managed by RPMPD */
 585
 586                 vreg_s3a_1p3: s3 {
 587                         regulator-min-microvolt = <1300000>;
 588                         regulator-max-microvolt = <1300000>;
 589                         regulator-allow-set-load;
 590                         regulator-system-load = <300000>;
 591                 };
 592
 593                 vreg_s4a_1p8: s4 {
 594                         regulator-min-microvolt = <1800000>;
 595                         regulator-max-microvolt = <1800000>;
 596                         regulator-allow-set-load;
 597                         regulator-always-on;
 598                         regulator-system-load = <325000>;
 599                 };
 600
 601                 vreg_s5a_2p15: s5 {
 602                         regulator-min-microvolt = <2150000>;
 603                         regulator-max-microvolt = <2150000>;
 604                         regulator-allow-set-load;
 605                         regulator-system-load = <325000>;
 606                 };
 607
 608                 vreg_s7a_1p0: s7 {
 609                         regulator-min-microvolt = <1000000>;
 610                         regulator-max-microvolt = <1000000>;
 611                 };
 612
 613                 /*
 614                  * S8 - SPMI-managed VDD_APC0
 615                  * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1
 616                  */
 617
 618                 vreg_l1a_1p0: l1 {
 619                         regulator-min-microvolt = <1000000>;
 620                         regulator-max-microvolt = <1000000>;
 621                 };
 622
 623                 vreg_l2a_1p25: l2 {
 624                         regulator-min-microvolt = <1250000>;
 625                         regulator-max-microvolt = <1250000>;
 626                         regulator-allow-set-load;
 627                         regulator-system-load = <4160>;
 628                 };
 629
 630                 vreg_l3a_1p2: l3 {
 631                         regulator-min-microvolt = <1200000>;
 632                         regulator-max-microvolt = <1200000>;
 633                         regulator-always-on;
 634                         regulator-allow-set-load;
 635                         regulator-system-load = <80000>;
 636                 };
 637
 638                 vreg_l4a_1p225: l4 {
 639                         regulator-min-microvolt = <1225000>;
 640                         regulator-max-microvolt = <1225000>;
 641                 };
 642
 643                 /* L5 is inaccessible from RPM */
 644
 645                 vreg_l6a_1p8: l6 {
 646                         regulator-min-microvolt = <1800000>;
 647                         regulator-max-microvolt = <1800000>;
 648                         regulator-allow-set-load;
 649                         regulator-system-load = <1000>;
 650                 };
 651
 652                 /* L7 is inaccessible from RPM */
 653
 654                 vreg_l8a_1p8: l8 {
 655                         regulator-min-microvolt = <1800000>;
 656                         regulator-max-microvolt = <1800000>;
 657                 };
 658
 659                 vreg_l9a_1p8: l9 {
 660                         regulator-min-microvolt = <1800000>;
 661                         regulator-max-microvolt = <1800000>;
 662                 };
 663
 664                 vreg_l10a_1p8: l10 {
 665                         regulator-min-microvolt = <1800000>;
 666                         regulator-max-microvolt = <1800000>;
 667                 };
 668
 669                 vreg_l11a_1p2: l11 {
 670                         regulator-min-microvolt = <1200000>;
 671                         regulator-max-microvolt = <1200000>;
 672                         regulator-always-on;
 673                         regulator-allow-set-load;
 674                         regulator-system-load = <35000>;
 675                 };
 676
 677                 vreg_l12a_1p8: l12 {
 678                         regulator-min-microvolt = <1800000>;
 679                         regulator-max-microvolt = <1800000>;
 680                         regulator-always-on;
 681                         regulator-allow-set-load;
 682                         regulator-system-load = <50000>;
 683                 };
 684
 685                 vreg_l13a_2p95: l13 {
 686                         regulator-min-microvolt = <1850000>;
 687                         regulator-max-microvolt = <2950000>;
 688                         regulator-always-on;
 689                         regulator-allow-set-load;
 690                         regulator-system-load = <22000>;
 691                 };
 692
 693                 vreg_l14a_1p8: l14 {
 694                         regulator-min-microvolt = <1800000>;
 695                         regulator-max-microvolt = <1800000>;
 696                         regulator-always-on;
 697                         regulator-allow-set-load;
 698                         regulator-system-load = <52000>;
 699                 };
 700
 701                 vreg_l15a_1p8: l15 {
 702                         regulator-min-microvolt = <1800000>;
 703                         regulator-max-microvolt = <1800000>;
 704                 };
 705
 706                 vreg_l16a_2p7: l16 {
 707                         regulator-min-microvolt = <2700000>;
 708                         regulator-max-microvolt = <2700000>;
 709                 };
 710
 711                 vreg_l17a_2p7: l17 {
 712                         regulator-min-microvolt = <2800000>;
 713                         regulator-max-microvolt = <2800000>;
 714                         regulator-always-on;
 715                         regulator-allow-set-load;
 716                         regulator-system-load = <300000>;
 717                 };
 718
 719                 vreg_l18a_2p85: l18 {
 720                         regulator-min-microvolt = <2850000>;
 721                         regulator-max-microvolt = <2850000>;
 722                         regulator-always-on;
 723                         regulator-allow-set-load;
 724                         regulator-system-load = <600000>;
 725                 };
 726
 727                 vreg_l19a_3p3: l19 {
 728                         regulator-min-microvolt = <3300000>;
 729                         regulator-max-microvolt = <3300000>;
 730                         regulator-always-on;
 731                         regulator-allow-set-load;
 732                         regulator-system-load = <500000>;
 733                 };
 734
 735                 vreg_l20a_2p95: l20 {
 736                         regulator-min-microvolt = <2950000>;
 737                         regulator-max-microvolt = <2950000>;
 738                         regulator-always-on;
 739                         regulator-boot-on;
 740                         regulator-allow-set-load;
 741                         regulator-system-load = <570000>;
 742                 };
 743
 744                 vreg_l21a_2p95: l21 {
 745                         regulator-min-microvolt = <2950000>;
 746                         regulator-max-microvolt = <2950000>;
 747                         regulator-always-on;
 748                         regulator-allow-set-load;
 749                         regulator-system-load = <800000>;
 750                 };
 751
 752                 vreg_l22a_3p0: l22 {
 753                         regulator-min-microvolt = <3000000>;
 754                         regulator-max-microvolt = <3000000>;
 755                         regulator-always-on;
 756                         regulator-allow-set-load;
 757                         regulator-system-load = <150000>;
 758                 };
 759
 760                 vreg_l23a_2p8: l23 {
 761                         regulator-min-microvolt = <2850000>;
 762                         regulator-max-microvolt = <2850000>;
 763                         regulator-always-on;
 764                         regulator-allow-set-load;
 765                         regulator-system-load = <80000>;
 766                 };
 767
 768                 vreg_l24a_3p075: l24 {
 769                         regulator-min-microvolt = <3075000>;
 770                         regulator-max-microvolt = <3150000>;
 771                         regulator-allow-set-load;
 772                         regulator-system-load = <5800>;
 773                 };
 774
 775                 vreg_l25a_1p1: l25 {
 776                         regulator-min-microvolt = <1150000>;
 777                         regulator-max-microvolt = <1150000>;
 778                         regulator-always-on;
 779                         regulator-allow-set-load;
 780                         regulator-system-load = <80000>;
 781                 };
 782
 783                 vreg_l26a_1p0: l26 {
 784                         regulator-min-microvolt = <1000000>;
 785                         regulator-max-microvolt = <1000000>;
 786                 };
 787
 788                 vreg_l27a_1p05: l27 {
 789                         regulator-min-microvolt = <1000000>;
 790                         regulator-max-microvolt = <1000000>;
 791                         regulator-always-on;
 792                         regulator-allow-set-load;
 793                         regulator-system-load = <500000>;
 794                 };
 795
 796                 vreg_l28a_1p0: l28 {
 797                         regulator-min-microvolt = <1000000>;
 798                         regulator-max-microvolt = <1000000>;
 799                         regulator-always-on;
 800                         regulator-allow-set-load;
 801                         regulator-system-load = <26000>;
 802                 };
 803
 804                 vreg_l29a_2p8: l29 {
 805                         regulator-min-microvolt = <2850000>;
 806                         regulator-max-microvolt = <2850000>;
 807                         regulator-always-on;
 808                         regulator-allow-set-load;
 809                         regulator-system-load = <80000>;
 810                 };
 811
 812                 vreg_l30a_1p8: l30 {
 813                         regulator-min-microvolt = <1800000>;
 814                         regulator-max-microvolt = <1800000>;
 815                         regulator-always-on;
 816                         regulator-allow-set-load;
 817                         regulator-system-load = <2500>;
 818                 };
 819
 820                 vreg_l31a_1p2: l31 {
 821                         regulator-min-microvolt = <1200000>;
 822                         regulator-max-microvolt = <1200000>;
 823                         regulator-always-on;
 824                         regulator-allow-set-load;
 825                         regulator-system-load = <600000>;
 826                 };
 827
 828                 vreg_l32a_1p8: l32 {
 829                         regulator-min-microvolt = <1800000>;
 830                         regulator-max-microvolt = <1800000>;
 831                 };
 832
 833                 vreg_lvs1a_1p8: lvs1 { };
 834
 835                 vreg_lvs2a_1p8: lvs2 { };
 836         };
 837
 838         pmi8994_regulators: pmi8994-regulators {
 839                 compatible = "qcom,rpm-pmi8994-regulators";
 840
 841                 vdd_s1-supply = <&vph_pwr>;
 842                 vdd_bst_byp-supply = <&vph_pwr>;
 843
 844                 vreg_s1b_1p0: s1 {
 845                         regulator-min-microvolt = <1025000>;
 846                         regulator-max-microvolt = <1025000>;
 847                 };
 848
 849                 /* S2 & S3 - VDD_GFX */
 850
 851                 vph_pwr_bbyp: boost-bypass {
 852                         regulator-min-microvolt = <3300000>;
 853                         regulator-max-microvolt = <3300000>;
 854                 };
 855         };
 856 };
 857
 858 &sdhc1 {
 859         status = "okay";
 860
 861         /*
 862          * This device is shipped with HS400 capabable eMMCs
 863          * However various brands have been used in various product batches,
 864          * including a Samsung eMMC (BGND3R) which features a quirk with HS400.
 865          * Set the speed to HS200 as a safety measure.
 866          */
 867         mmc-hs200-1_8v;
 868 };
 869
 870 &sdhc2 {
 871         status = "okay";
 872
 873         pinctrl-names = "default", "sleep";
 874         pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
 875         pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
 876
 877         vmmc-supply = <&vreg_l21a_2p95>;
 878         vqmmc-supply = <&vreg_l13a_2p95>;
 879
 880         cd-gpios = <&pm8994_gpios 8 GPIO_ACTIVE_LOW>;
 881 };
 882
 883 &tlmm {
 884         grip_default: grip-default {
 885                 pins = "gpio39";
 886                 function = "gpio";
 887                 drive-strength = <6>;
 888                 bias-pull-down;
 889         };
 890
 891         grip_sleep: grip-sleep {
 892                 pins = "gpio39";
 893                 function = "gpio";
 894                 drive-strength = <2>;
 895                 bias-pull-down;
 896         };
 897
 898         hall_front_default: hall-front-default {
 899                 pins = "gpio42";
 900                 function = "gpio";
 901                 drive-strength = <2>;
 902                 bias-disable;
 903         };
 904
 905         hall_back_default: hall-back-default {
 906                 pins = "gpio75";
 907                 function = "gpio";
 908                 drive-strength = <2>;
 909                 bias-disable;
 910         };
 911 };