arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Device Tree file for the Kontron SMARC-sAL28 board.
   4  *
   5  * Copyright (C) 2019 Michael Walle <michael@walle.cc>
   6  *
   7  */
   8
   9 /dts-v1/;
  10 #include "fsl-ls1028a.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         model = "Kontron SMARC-sAL28";
  17         compatible = "kontron,sl28", "fsl,ls1028a";
  18
  19         aliases {
  20                 crypto = &crypto;
  21                 serial0 = &duart0;
  22                 serial1 = &duart1;
  23                 serial2 = &lpuart1;
  24                 spi0 = &fspi;
  25                 spi1 = &dspi2;
  26         };
  27
  28         buttons0 {
  29                 compatible = "gpio-keys";
  30
  31                 power-button {
  32                         interrupts-extended = <&sl28cpld_intc
  33                                                4 IRQ_TYPE_EDGE_BOTH>;
  34                         linux,code = <KEY_POWER>;
  35                         label = "Power";
  36                 };
  37
  38                 sleep-button {
  39                         interrupts-extended = <&sl28cpld_intc
  40                                                5 IRQ_TYPE_EDGE_BOTH>;
  41                         linux,code = <KEY_SLEEP>;
  42                         label = "Sleep";
  43                 };
  44         };
  45
  46         buttons1 {
  47                 compatible = "gpio-keys-polled";
  48                 poll-interval = <200>;
  49
  50                 lid-switch {
  51                         linux,input-type = <EV_SW>;
  52                         linux,code = <SW_LID>;
  53                         gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
  54                         label = "Lid";
  55                 };
  56         };
  57
  58         chosen {
  59                 stdout-path = "serial0:115200n8";
  60         };
  61 };
  62
  63 &dspi2 {
  64         status = "okay";
  65 };
  66
  67 &duart0 {
  68         status = "okay";
  69 };
  70
  71 &duart1 {
  72         status = "okay";
  73 };
  74
  75 &enetc_port0 {
  76         phy-handle = <&phy0>;
  77         phy-connection-type = "sgmii";
  78         status = "okay";
  79
  80         mdio {
  81                 #address-cells = <1>;
  82                 #size-cells = <0>;
  83
  84                 phy0: ethernet-phy@5 {
  85                         reg = <0x5>;
  86                         eee-broken-1000t;
  87                         eee-broken-100tx;
  88                 };
  89         };
  90 };
  91
  92 &esdhc {
  93         sd-uhs-sdr104;
  94         sd-uhs-sdr50;
  95         sd-uhs-sdr25;
  96         sd-uhs-sdr12;
  97         status = "okay";
  98 };
  99
 100 &esdhc1 {
 101         mmc-hs200-1_8v;
 102         mmc-hs400-1_8v;
 103         bus-width = <8>;
 104         status = "okay";
 105 };
 106
 107 &fspi {
 108         status = "okay";
 109
 110         flash@0 {
 111                 #address-cells = <1>;
 112                 #size-cells = <1>;
 113                 compatible = "jedec,spi-nor";
 114                 m25p,fast-read;
 115                 spi-max-frequency = <133000000>;
 116                 reg = <0>;
 117                 /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
 118                 spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
 119                 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
 120
 121                 partition@0 {
 122                         reg = <0x000000 0x010000>;
 123                         label = "rcw";
 124                         read-only;
 125                 };
 126
 127                 partition@10000 {
 128                         reg = <0x010000 0x0f0000>;
 129                         label = "failsafe bootloader";
 130                         read-only;
 131                 };
 132
 133                 partition@100000 {
 134                         reg = <0x100000 0x040000>;
 135                         label = "failsafe DP firmware";
 136                         read-only;
 137                 };
 138
 139                 partition@140000 {
 140                         reg = <0x140000 0x0a0000>;
 141                         label = "failsafe trusted firmware";
 142                         read-only;
 143                 };
 144
 145                 partition@1e0000 {
 146                         reg = <0x1e0000 0x020000>;
 147                         label = "reserved";
 148                         read-only;
 149                 };
 150
 151                 partition@200000 {
 152                         reg = <0x200000 0x010000>;
 153                         label = "configuration store";
 154                 };
 155
 156                 partition@210000 {
 157                         reg = <0x210000 0x0f0000>;
 158                         label = "bootloader";
 159                 };
 160
 161                 partition@300000 {
 162                         reg = <0x300000 0x040000>;
 163                         label = "DP firmware";
 164                 };
 165
 166                 partition@340000 {
 167                         reg = <0x340000 0x0a0000>;
 168                         label = "trusted firmware";
 169                 };
 170
 171                 partition@3e0000 {
 172                         reg = <0x3e0000 0x020000>;
 173                         label = "bootloader environment";
 174                 };
 175         };
 176 };
 177
 178 &gpio1 {
 179         gpio-line-names =
 180                 "", "", "", "", "", "", "", "",
 181                 "", "", "", "", "", "", "", "",
 182                 "", "", "", "", "", "", "TDO", "TCK",
 183                 "", "", "", "", "", "", "", "";
 184 };
 185
 186 &gpio2 {
 187         gpio-line-names =
 188                 "", "", "", "", "", "", "TMS", "TDI",
 189                 "", "", "", "", "", "", "", "",
 190                 "", "", "", "", "", "", "", "",
 191                 "", "", "", "", "", "", "", "";
 192 };
 193
 194 &i2c0 {
 195         status = "okay";
 196
 197         rtc@32 {
 198                 compatible = "microcrystal,rv8803";
 199                 reg = <0x32>;
 200         };
 201
 202         sl28cpld@4a {
 203                 compatible = "kontron,sl28cpld";
 204                 reg = <0x4a>;
 205                 #address-cells = <1>;
 206                 #size-cells = <0>;
 207
 208                 watchdog@4 {
 209                         compatible = "kontron,sl28cpld-wdt";
 210                         reg = <0x4>;
 211                         kontron,assert-wdt-timeout-pin;
 212                 };
 213
 214                 hwmon@b {
 215                         compatible = "kontron,sl28cpld-fan";
 216                         reg = <0xb>;
 217                 };
 218
 219                 sl28cpld_pwm0: pwm@c {
 220                         compatible = "kontron,sl28cpld-pwm";
 221                         reg = <0xc>;
 222                         #pwm-cells = <2>;
 223                 };
 224
 225                 sl28cpld_pwm1: pwm@e {
 226                         compatible = "kontron,sl28cpld-pwm";
 227                         reg = <0xe>;
 228                         #pwm-cells = <2>;
 229                 };
 230
 231                 sl28cpld_gpio0: gpio@10 {
 232                         compatible = "kontron,sl28cpld-gpio";
 233                         reg = <0x10>;
 234                         interrupts-extended = <&gpio2 6
 235                                                IRQ_TYPE_EDGE_FALLING>;
 236
 237                         gpio-controller;
 238                         #gpio-cells = <2>;
 239                         gpio-line-names =
 240                                 "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
 241                                 "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
 242                                 "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
 243                                 "GPIO6_TACHIN", "GPIO7";
 244
 245                         interrupt-controller;
 246                         #interrupt-cells = <2>;
 247                 };
 248
 249                 sl28cpld_gpio1: gpio@15 {
 250                         compatible = "kontron,sl28cpld-gpio";
 251                         reg = <0x15>;
 252                         interrupts-extended = <&gpio2 6
 253                                                IRQ_TYPE_EDGE_FALLING>;
 254
 255                         gpio-controller;
 256                         #gpio-cells = <2>;
 257                         gpio-line-names =
 258                                 "GPIO8", "GPIO9", "GPIO10", "GPIO11",
 259                                 "", "", "", "";
 260
 261                         interrupt-controller;
 262                         #interrupt-cells = <2>;
 263                 };
 264
 265                 sl28cpld_gpio2: gpio@1a {
 266                         compatible = "kontron,sl28cpld-gpo";
 267                         reg = <0x1a>;
 268
 269                         gpio-controller;
 270                         #gpio-cells = <2>;
 271                         gpio-line-names =
 272                                 "LCD0 voltage enable",
 273                                 "LCD0 backlight enable",
 274                                 "eMMC reset", "LVDS bridge reset",
 275                                 "LVDS bridge power-down",
 276                                 "SDIO power enable",
 277                                 "", "";
 278                 };
 279
 280                 sl28cpld_gpio3: gpio@1b {
 281                         compatible = "kontron,sl28cpld-gpi";
 282                         reg = <0x1b>;
 283
 284                         gpio-controller;
 285                         #gpio-cells = <2>;
 286                         gpio-line-names =
 287                                 "Power button", "Force recovery", "Sleep",
 288                                 "Battery low", "Lid state", "Charging",
 289                                 "Charger present", "";
 290                 };
 291
 292                 sl28cpld_intc: interrupt-controller@1c {
 293                         compatible = "kontron,sl28cpld-intc";
 294                         reg = <0x1c>;
 295                         interrupts-extended = <&gpio2 6
 296                                                IRQ_TYPE_EDGE_FALLING>;
 297
 298                         interrupt-controller;
 299                         #interrupt-cells = <2>;
 300                 };
 301         };
 302
 303         eeprom@50 {
 304                 compatible = "atmel,24c32";
 305                 reg = <0x50>;
 306                 pagesize = <32>;
 307         };
 308 };
 309
 310 &i2c3 {
 311         status = "okay";
 312 };
 313
 314 &i2c4 {
 315         status = "okay";
 316
 317         eeprom@50 {
 318                 compatible = "atmel,24c32";
 319                 reg = <0x50>;
 320                 pagesize = <32>;
 321         };
 322 };
 323
 324 &lpuart1 {
 325         status = "okay";
 326 };