arch/arm/plat-omap/i2c.c

   1 /*
   2  * linux/arch/arm/plat-omap/i2c.c
   3  *
   4  * Helper module for board specific I2C bus registration
   5  *
   6  * Copyright (C) 2007 Nokia Corporation.
   7  *
   8  * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * version 2 as published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22  * 02110-1301 USA
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/i2c.h>
  29 #include <mach/mux.h>
  30
  31 #define OMAP_I2C_SIZE           0x3f
  32 #define OMAP1_I2C_BASE          0xfffb3800
  33 #define OMAP2_I2C_BASE1         0x48070000
  34 #define OMAP2_I2C_BASE2         0x48072000
  35 #define OMAP2_I2C_BASE3         0x48060000
  36
  37 static const char name[] = "i2c_omap";
  38
  39 #define I2C_RESOURCE_BUILDER(base, irq)                 \
  40         {                                               \
  41                 .start  = (base),                       \
  42                 .end    = (base) + OMAP_I2C_SIZE,       \
  43                 .flags  = IORESOURCE_MEM,               \
  44         },                                              \
  45         {                                               \
  46                 .start  = (irq),                        \
  47                 .flags  = IORESOURCE_IRQ,               \
  48         },
  49
  50 static struct resource i2c_resources[][2] = {
  51         { I2C_RESOURCE_BUILDER(0, 0) },
  52 #if     defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
  53         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
  54 #endif
  55 #if     defined(CONFIG_ARCH_OMAP34XX)
  56         { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
  57 #endif
  58 };
  59
  60 #define I2C_DEV_BUILDER(bus_id, res, data)              \
  61         {                                               \
  62                 .id     = (bus_id),                     \
  63                 .name   = name,                         \
  64                 .num_resources  = ARRAY_SIZE(res),      \
  65                 .resource       = (res),                \
  66                 .dev            = {                     \
  67                         .platform_data  = (data),       \
  68                 },                                      \
  69         }
  70
  71 static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
  72 static struct platform_device omap_i2c_devices[] = {
  73         I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
  74 #if     defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
  75         I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
  76 #endif
  77 #if     defined(CONFIG_ARCH_OMAP34XX)
  78         I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
  79 #endif
  80 };
  81
  82 static void __init omap_i2c_mux_pins(int bus_id)
  83 {
  84         /* TODO: Muxing for OMAP3 */
  85         switch (bus_id) {
  86         case 1:
  87                 if (cpu_class_is_omap1()) {
  88                         omap_cfg_reg(I2C_SCL);
  89                         omap_cfg_reg(I2C_SDA);
  90                 } else if (cpu_is_omap24xx()) {
  91                         omap_cfg_reg(M19_24XX_I2C1_SCL);
  92                         omap_cfg_reg(L15_24XX_I2C1_SDA);
  93                 }
  94                 break;
  95         case 2:
  96                 if (cpu_is_omap24xx()) {
  97                         omap_cfg_reg(J15_24XX_I2C2_SCL);
  98                         omap_cfg_reg(H19_24XX_I2C2_SDA);
  99                 }
 100                 break;
 101         }
 102 }
 103
 104 int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 105                           struct i2c_board_info const *info,
 106                           unsigned len)
 107 {
 108         int ports, err;
 109         struct platform_device *pdev;
 110         struct resource *res;
 111         resource_size_t base, irq;
 112
 113         if (cpu_class_is_omap1())
 114                 ports = 1;
 115         else if (cpu_is_omap24xx())
 116                 ports = 2;
 117         else if (cpu_is_omap34xx())
 118                 ports = 3;
 119
 120         BUG_ON(bus_id < 1 || bus_id > ports);
 121
 122         if (info) {
 123                 err = i2c_register_board_info(bus_id, info, len);
 124                 if (err)
 125                         return err;
 126         }
 127
 128         pdev = &omap_i2c_devices[bus_id - 1];
 129         *(u32 *)pdev->dev.platform_data = clkrate;
 130
 131         if (bus_id == 1) {
 132                 res = pdev->resource;
 133                 if (cpu_class_is_omap1()) {
 134                         base = OMAP1_I2C_BASE;
 135                         irq = INT_I2C;
 136                 } else {
 137                         base = OMAP2_I2C_BASE1;
 138                         irq = INT_24XX_I2C1_IRQ;
 139                 }
 140                 res[0].start = base;
 141                 res[0].end = base + OMAP_I2C_SIZE;
 142                 res[1].start = irq;
 143         }
 144
 145         omap_i2c_mux_pins(bus_id);
 146         return platform_device_register(pdev);
 147 }