arch/arm/boot/dts/omap4-l4.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 &l4_cfg {                                               /* 0x4a000000 */
   3         compatible = "ti,omap4-l4-cfg", "simple-bus";
   4         reg = <0x4a000000 0x800>,
   5               <0x4a000800 0x800>,
   6               <0x4a001000 0x1000>;
   7         reg-names = "ap", "la", "ia0";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x4a000000 0x080000>,      /* segment 0 */
  11                  <0x00080000 0x4a080000 0x080000>,      /* segment 1 */
  12                  <0x00100000 0x4a100000 0x080000>,      /* segment 2 */
  13                  <0x00180000 0x4a180000 0x080000>,      /* segment 3 */
  14                  <0x00200000 0x4a200000 0x080000>,      /* segment 4 */
  15                  <0x00280000 0x4a280000 0x080000>,      /* segment 5 */
  16                  <0x00300000 0x4a300000 0x080000>;      /* segment 6 */
  17
  18         segment@0 {                                     /* 0x4a000000 */
  19                 compatible = "simple-bus";
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  23                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
  24                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
  25                          <0x00002000 0x00002000 0x001000>,      /* ap 3 */
  26                          <0x00003000 0x00003000 0x001000>,      /* ap 4 */
  27                          <0x00004000 0x00004000 0x001000>,      /* ap 5 */
  28                          <0x00005000 0x00005000 0x001000>,      /* ap 6 */
  29                          <0x00056000 0x00056000 0x001000>,      /* ap 7 */
  30                          <0x00057000 0x00057000 0x001000>,      /* ap 8 */
  31                          <0x0005c000 0x0005c000 0x001000>,      /* ap 9 */
  32                          <0x00058000 0x00058000 0x004000>,      /* ap 10 */
  33                          <0x00062000 0x00062000 0x001000>,      /* ap 11 */
  34                          <0x00063000 0x00063000 0x001000>,      /* ap 12 */
  35                          <0x00008000 0x00008000 0x002000>,      /* ap 23 */
  36                          <0x0000a000 0x0000a000 0x001000>,      /* ap 24 */
  37                          <0x00066000 0x00066000 0x001000>,      /* ap 25 */
  38                          <0x00067000 0x00067000 0x001000>,      /* ap 26 */
  39                          <0x0005e000 0x0005e000 0x002000>,      /* ap 80 */
  40                          <0x00060000 0x00060000 0x001000>,      /* ap 81 */
  41                          <0x00064000 0x00064000 0x001000>,      /* ap 86 */
  42                          <0x00065000 0x00065000 0x001000>;      /* ap 87 */
  43
  44                 target-module@2000 {                    /* 0x4a002000, ap 3 06.0 */
  45                         compatible = "ti,sysc-omap4", "ti,sysc";
  46                         ti,hwmods = "ctrl_module_core";
  47                         reg = <0x2000 0x4>,
  48                               <0x2010 0x4>;
  49                         reg-names = "rev", "sysc";
  50                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
  51                                         <SYSC_IDLE_NO>,
  52                                         <SYSC_IDLE_SMART>,
  53                                         <SYSC_IDLE_SMART_WKUP>;
  54                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         ranges = <0x0 0x2000 0x1000>;
  58
  59                         omap4_scm_core: scm@0 {
  60                                 compatible = "ti,omap4-scm-core", "simple-bus";
  61                                 reg = <0x0 0x1000>;
  62                                 #address-cells = <1>;
  63                                 #size-cells = <1>;
  64                                 ranges = <0 0 0x1000>;
  65
  66                                 scm_conf: scm_conf@0 {
  67                                         compatible = "syscon";
  68                                         reg = <0x0 0x800>;
  69                                         #address-cells = <1>;
  70                                         #size-cells = <1>;
  71                                 };
  72
  73                                 omap_control_usb2phy: control-phy@300 {
  74                                         compatible = "ti,control-phy-usb2";
  75                                         reg = <0x300 0x4>;
  76                                         reg-names = "power";
  77                                 };
  78
  79                                 omap_control_usbotg: control-phy@33c {
  80                                         compatible = "ti,control-phy-otghs";
  81                                         reg = <0x33c 0x4>;
  82                                         reg-names = "otghs_control";
  83                                 };
  84                         };
  85                 };
  86
  87                 target-module@4000 {                    /* 0x4a004000, ap 5 02.0 */
  88                         compatible = "ti,sysc-omap4", "ti,sysc";
  89                         reg = <0x4000 0x4>;
  90                         reg-names = "rev";
  91                         #address-cells = <1>;
  92                         #size-cells = <1>;
  93                         ranges = <0x0 0x4000 0x1000>;
  94
  95                         cm1: cm1@0 {
  96                                 compatible = "ti,omap4-cm1", "simple-bus";
  97                                 reg = <0x0 0x2000>;
  98                                 #address-cells = <1>;
  99                                 #size-cells = <1>;
 100                                 ranges = <0 0 0x2000>;
 101
 102                                 cm1_clocks: clocks {
 103                                         #address-cells = <1>;
 104                                         #size-cells = <0>;
 105                                 };
 106
 107                                 cm1_clockdomains: clockdomains {
 108                                 };
 109                         };
 110                 };
 111
 112                 target-module@8000 {                    /* 0x4a008000, ap 23 32.0 */
 113                         compatible = "ti,sysc-omap4", "ti,sysc";
 114                         reg = <0x8000 0x4>;
 115                         reg-names = "rev";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x0 0x8000 0x2000>;
 119
 120                         cm2: cm2@0 {
 121                                 compatible = "ti,omap4-cm2", "simple-bus";
 122                                 reg = <0x0 0x2000>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <1>;
 125                                 ranges = <0 0 0x2000>;
 126
 127                                 cm2_clocks: clocks {
 128                                         #address-cells = <1>;
 129                                         #size-cells = <0>;
 130                                 };
 131
 132                                 cm2_clockdomains: clockdomains {
 133                                 };
 134                         };
 135                 };
 136
 137                 target-module@56000 {                   /* 0x4a056000, ap 7 0a.0 */
 138                         compatible = "ti,sysc-omap2", "ti,sysc";
 139                         ti,hwmods = "dma_system";
 140                         reg = <0x56000 0x4>,
 141                               <0x5602c 0x4>,
 142                               <0x56028 0x4>;
 143                         reg-names = "rev", "sysc", "syss";
 144                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 145                                          SYSC_OMAP2_EMUFREE |
 146                                          SYSC_OMAP2_SOFTRESET |
 147                                          SYSC_OMAP2_AUTOIDLE)>;
 148                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 149                                         <SYSC_IDLE_NO>,
 150                                         <SYSC_IDLE_SMART>;
 151                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 152                                         <SYSC_IDLE_NO>,
 153                                         <SYSC_IDLE_SMART>;
 154                         ti,syss-mask = <1>;
 155                         /* Domains (V, P, C): core, core_pwrdm, l3_dma_clkdm */
 156                         clocks = <&l3_dma_clkctrl OMAP4_DMA_SYSTEM_CLKCTRL 0>;
 157                         clock-names = "fck";
 158                         #address-cells = <1>;
 159                         #size-cells = <1>;
 160                         ranges = <0x0 0x56000 0x1000>;
 161
 162                         sdma: dma-controller@0 {
 163                                 compatible = "ti,omap4430-sdma";
 164                                 reg = <0x0 0x1000>;
 165                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 166                                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 167                                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 168                                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 169                                 #dma-cells = <1>;
 170                                 dma-channels = <32>;
 171                                 dma-requests = <127>;
 172                         };
 173                 };
 174
 175                 target-module@58000 {                   /* 0x4a058000, ap 10 0e.0 */
 176                         compatible = "ti,sysc-omap2", "ti,sysc";
 177                         ti,hwmods = "hsi";
 178                         reg = <0x58000 0x4>,
 179                               <0x58010 0x4>,
 180                               <0x58014 0x4>;
 181                         reg-names = "rev", "sysc", "syss";
 182                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 183                                          SYSC_OMAP2_SOFTRESET |
 184                                          SYSC_OMAP2_AUTOIDLE)>;
 185                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 186                                         <SYSC_IDLE_NO>,
 187                                         <SYSC_IDLE_SMART>,
 188                                         <SYSC_IDLE_SMART_WKUP>;
 189                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 190                                         <SYSC_IDLE_NO>,
 191                                         <SYSC_IDLE_SMART>,
 192                                         <SYSC_IDLE_SMART_WKUP>;
 193                         ti,syss-mask = <1>;
 194                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 195                         clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 196                         clock-names = "fck";
 197                         #address-cells = <1>;
 198                         #size-cells = <1>;
 199                         ranges = <0x0 0x58000 0x5000>;
 200
 201                         hsi: hsi@0 {
 202                                 compatible = "ti,omap4-hsi";
 203                                 reg = <0x0 0x4000>,
 204                                       <0x5000 0x1000>;
 205                                 reg-names = "sys", "gdd";
 206
 207                                 clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
 208                                 clock-names = "hsi_fck";
 209
 210                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 211                                 interrupt-names = "gdd_mpu";
 212
 213                                 #address-cells = <1>;
 214                                 #size-cells = <1>;
 215                                 ranges = <0 0 0x4000>;
 216
 217                                 hsi_port1: hsi-port@2000 {
 218                                         compatible = "ti,omap4-hsi-port";
 219                                         reg = <0x2000 0x800>,
 220                                               <0x2800 0x800>;
 221                                         reg-names = "tx", "rx";
 222                                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 223                                 };
 224
 225                                 hsi_port2: hsi-port@3000 {
 226                                         compatible = "ti,omap4-hsi-port";
 227                                         reg = <0x3000 0x800>,
 228                                               <0x3800 0x800>;
 229                                         reg-names = "tx", "rx";
 230                                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 231                                 };
 232                         };
 233                 };
 234
 235                 target-module@5e000 {                   /* 0x4a05e000, ap 80 68.0 */
 236                         compatible = "ti,sysc";
 237                         status = "disabled";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x0 0x5e000 0x2000>;
 241                 };
 242
 243                 target-module@62000 {                   /* 0x4a062000, ap 11 16.0 */
 244                         compatible = "ti,sysc-omap2", "ti,sysc";
 245                         ti,hwmods = "usb_tll_hs";
 246                         reg = <0x62000 0x4>,
 247                               <0x62010 0x4>,
 248                               <0x62014 0x4>;
 249                         reg-names = "rev", "sysc", "syss";
 250                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 251                                          SYSC_OMAP2_ENAWAKEUP |
 252                                          SYSC_OMAP2_SOFTRESET |
 253                                          SYSC_OMAP2_AUTOIDLE)>;
 254                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 255                                         <SYSC_IDLE_NO>,
 256                                         <SYSC_IDLE_SMART>;
 257                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 258                         clocks = <&l3_init_clkctrl OMAP4_USB_TLL_HS_CLKCTRL 0>;
 259                         clock-names = "fck";
 260                         #address-cells = <1>;
 261                         #size-cells = <1>;
 262                         ranges = <0x0 0x62000 0x1000>;
 263
 264                         usbhstll: usbhstll@0 {
 265                                 compatible = "ti,usbhs-tll";
 266                                 reg = <0x0 0x1000>;
 267                                 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 268                         };
 269                 };
 270
 271                 target-module@64000 {                   /* 0x4a064000, ap 86 1e.0 */
 272                         compatible = "ti,sysc-omap4", "ti,sysc";
 273                         ti,hwmods = "usb_host_hs";
 274                         reg = <0x64000 0x4>,
 275                               <0x64010 0x4>,
 276                               <0x64014 0x4>;
 277                         reg-names = "rev", "sysc", "syss";
 278                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 279                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 280                                         <SYSC_IDLE_NO>,
 281                                         <SYSC_IDLE_SMART>,
 282                                         <SYSC_IDLE_SMART_WKUP>;
 283                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 284                                         <SYSC_IDLE_NO>,
 285                                         <SYSC_IDLE_SMART>,
 286                                         <SYSC_IDLE_SMART_WKUP>;
 287                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 288                         clocks = <&l3_init_clkctrl OMAP4_USB_HOST_HS_CLKCTRL 0>;
 289                         clock-names = "fck";
 290                         #address-cells = <1>;
 291                         #size-cells = <1>;
 292                         ranges = <0x0 0x64000 0x1000>;
 293
 294                         usbhshost: usbhshost@0 {
 295                                 compatible = "ti,usbhs-host";
 296                                 reg = <0x0 0x800>;
 297                                 #address-cells = <1>;
 298                                 #size-cells = <1>;
 299                                 ranges = <0 0 0x1000>;
 300                                 clocks = <&init_60m_fclk>,
 301                                          <&xclk60mhsp1_ck>,
 302                                          <&xclk60mhsp2_ck>;
 303                                 clock-names = "refclk_60m_int",
 304                                               "refclk_60m_ext_p1",
 305                                               "refclk_60m_ext_p2";
 306
 307                                 usbhsohci: ohci@800 {
 308                                         compatible = "ti,ohci-omap3";
 309                                         reg = <0x800 0x400>;
 310                                         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 311                                         remote-wakeup-connected;
 312                                 };
 313
 314                                 usbhsehci: ehci@c00 {
 315                                         compatible = "ti,ehci-omap";
 316                                         reg = <0xc00 0x400>;
 317                                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 318                                 };
 319                         };
 320                 };
 321
 322                 target-module@66000 {                   /* 0x4a066000, ap 25 26.0 */
 323                         compatible = "ti,sysc-omap2", "ti,sysc";
 324                         ti,hwmods = "mmu_dsp";
 325                         reg = <0x66000 0x4>,
 326                               <0x66010 0x4>,
 327                               <0x66014 0x4>;
 328                         reg-names = "rev", "sysc", "syss";
 329                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 330                                          SYSC_OMAP2_SOFTRESET |
 331                                          SYSC_OMAP2_AUTOIDLE)>;
 332                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 333                                         <SYSC_IDLE_NO>,
 334                                         <SYSC_IDLE_SMART>;
 335                         /* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
 336                         clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
 337                         clock-names = "fck";
 338                         #address-cells = <1>;
 339                         #size-cells = <1>;
 340                         ranges = <0x0 0x66000 0x1000>;
 341
 342                         /* mmu_dsp cannot be moved before reset driver */
 343                         status = "disabled";
 344                 };
 345         };
 346
 347         segment@80000 {                                 /* 0x4a080000 */
 348                 compatible = "simple-bus";
 349                 #address-cells = <1>;
 350                 #size-cells = <1>;
 351                 ranges = <0x00059000 0x000d9000 0x001000>,      /* ap 13 */
 352                          <0x0005a000 0x000da000 0x001000>,      /* ap 14 */
 353                          <0x0005b000 0x000db000 0x001000>,      /* ap 15 */
 354                          <0x0005c000 0x000dc000 0x001000>,      /* ap 16 */
 355                          <0x0005d000 0x000dd000 0x001000>,      /* ap 17 */
 356                          <0x0005e000 0x000de000 0x001000>,      /* ap 18 */
 357                          <0x00060000 0x000e0000 0x001000>,      /* ap 19 */
 358                          <0x00061000 0x000e1000 0x001000>,      /* ap 20 */
 359                          <0x00074000 0x000f4000 0x001000>,      /* ap 27 */
 360                          <0x00075000 0x000f5000 0x001000>,      /* ap 28 */
 361                          <0x00076000 0x000f6000 0x001000>,      /* ap 29 */
 362                          <0x00077000 0x000f7000 0x001000>,      /* ap 30 */
 363                          <0x00036000 0x000b6000 0x001000>,      /* ap 69 */
 364                          <0x00037000 0x000b7000 0x001000>,      /* ap 70 */
 365                          <0x0004d000 0x000cd000 0x001000>,      /* ap 78 */
 366                          <0x0004e000 0x000ce000 0x001000>,      /* ap 79 */
 367                          <0x00029000 0x000a9000 0x001000>,      /* ap 82 */
 368                          <0x0002a000 0x000aa000 0x001000>,      /* ap 83 */
 369                          <0x0002b000 0x000ab000 0x001000>,      /* ap 84 */
 370                          <0x0002c000 0x000ac000 0x001000>,      /* ap 85 */
 371                          <0x0002d000 0x000ad000 0x001000>,      /* ap 88 */
 372                          <0x0002e000 0x000ae000 0x001000>;      /* ap 89 */
 373
 374                 target-module@29000 {                   /* 0x4a0a9000, ap 82 04.0 */
 375                         compatible = "ti,sysc";
 376                         status = "disabled";
 377                         #address-cells = <1>;
 378                         #size-cells = <1>;
 379                         ranges = <0x0 0x29000 0x1000>;
 380                 };
 381
 382                 target-module@2b000 {                   /* 0x4a0ab000, ap 84 12.0 */
 383                         compatible = "ti,sysc-omap2", "ti,sysc";
 384                         ti,hwmods = "usb_otg_hs";
 385                         reg = <0x2b400 0x4>,
 386                               <0x2b404 0x4>,
 387                               <0x2b408 0x4>;
 388                         reg-names = "rev", "sysc", "syss";
 389                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 390                                          SYSC_OMAP2_SOFTRESET |
 391                                          SYSC_OMAP2_AUTOIDLE)>;
 392                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 393                                         <SYSC_IDLE_NO>,
 394                                         <SYSC_IDLE_SMART>;
 395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 396                                         <SYSC_IDLE_NO>,
 397                                         <SYSC_IDLE_SMART>,
 398                                         <SYSC_IDLE_SMART_WKUP>;
 399                         ti,syss-mask = <1>;
 400                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 401                         clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
 402                         clock-names = "fck";
 403                         #address-cells = <1>;
 404                         #size-cells = <1>;
 405                         ranges = <0x0 0x2b000 0x1000>;
 406
 407                         usb_otg_hs: usb_otg_hs@0 {
 408                                 compatible = "ti,omap4-musb";
 409                                 reg = <0x0 0x7ff>;
 410                                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 411                                 interrupt-names = "mc", "dma";
 412                                 usb-phy = <&usb2_phy>;
 413                                 phys = <&usb2_phy>;
 414                                 phy-names = "usb2-phy";
 415                                 multipoint = <1>;
 416                                 num-eps = <16>;
 417                                 ram-bits = <12>;
 418                                 ctrl-module = <&omap_control_usbotg>;
 419                         };
 420                 };
 421
 422                 target-module@2d000 {                   /* 0x4a0ad000, ap 88 0c.0 */
 423                         compatible = "ti,sysc-omap2", "ti,sysc";
 424                         ti,hwmods = "ocp2scp_usb_phy";
 425                         reg = <0x2d000 0x4>,
 426                               <0x2d010 0x4>,
 427                               <0x2d014 0x4>;
 428                         reg-names = "rev", "sysc", "syss";
 429                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 430                                          SYSC_OMAP2_AUTOIDLE)>;
 431                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 432                                         <SYSC_IDLE_NO>,
 433                                         <SYSC_IDLE_SMART>;
 434                         ti,syss-mask = <1>;
 435                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
 436                         clocks = <&l3_init_clkctrl OMAP4_OCP2SCP_USB_PHY_CLKCTRL 0>;
 437                         clock-names = "fck";
 438                         #address-cells = <1>;
 439                         #size-cells = <1>;
 440                         ranges = <0x0 0x2d000 0x1000>;
 441
 442                         ocp2scp@0 {
 443                                 compatible = "ti,omap-ocp2scp";
 444                                 reg = <0x0 0x1f>;
 445                                 #address-cells = <1>;
 446                                 #size-cells = <1>;
 447                                 ranges = <0 0 0x1000>;
 448                                 usb2_phy: usb2phy@80 {
 449                                         compatible = "ti,omap-usb2";
 450                                         reg = <0x80 0x58>;
 451                                         ctrl-module = <&omap_control_usb2phy>;
 452                                         clocks = <&usb_phy_cm_clk32k>;
 453                                         clock-names = "wkupclk";
 454                                         #phy-cells = <0>;
 455                                 };
 456                         };
 457                 };
 458
 459                 /* d2d mdm */
 460                 target-module@36000 {                   /* 0x4a0b6000, ap 69 60.0 */
 461                         compatible = "ti,sysc-omap2", "ti,sysc";
 462                         reg = <0x36000 0x4>,
 463                               <0x36010 0x4>,
 464                               <0x36014 0x4>;
 465                         reg-names = "rev", "sysc", "syss";
 466                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 467                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 468                                         <SYSC_IDLE_NO>,
 469                                         <SYSC_IDLE_SMART>,
 470                                         <SYSC_IDLE_SMART_WKUP>;
 471                         ti,syss-mask = <1>;
 472                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 473                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 474                         clock-names = "fck";
 475                         #address-cells = <1>;
 476                         #size-cells = <1>;
 477                         ranges = <0x0 0x36000 0x1000>;
 478                 };
 479
 480                 /* d2d mpu */
 481                 target-module@4d000 {                   /* 0x4a0cd000, ap 78 58.0 */
 482                         compatible = "ti,sysc-omap2", "ti,sysc";
 483                         reg = <0x4d000 0x4>,
 484                               <0x4d010 0x4>,
 485                               <0x4d014 0x4>;
 486                         reg-names = "rev", "sysc", "syss";
 487                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)>;
 488                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 489                                         <SYSC_IDLE_NO>,
 490                                         <SYSC_IDLE_SMART>,
 491                                         <SYSC_IDLE_SMART_WKUP>;
 492                         ti,syss-mask = <1>;
 493                         /* Domains (V, P, C): core, core_pwrdm, d2d_clkdm */
 494                         clocks = <&d2d_clkctrl OMAP4_C2C_CLKCTRL 0>;
 495                         clock-names = "fck";
 496                         #address-cells = <1>;
 497                         #size-cells = <1>;
 498                         ranges = <0x0 0x4d000 0x1000>;
 499                 };
 500
 501                 target-module@59000 {                   /* 0x4a0d9000, ap 13 1a.0 */
 502                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 503                         ti,hwmods = "smartreflex_mpu";
 504                         reg = <0x59038 0x4>;
 505                         reg-names = "sysc";
 506                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 507                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 508                                         <SYSC_IDLE_NO>,
 509                                         <SYSC_IDLE_SMART>,
 510                                         <SYSC_IDLE_SMART_WKUP>;
 511                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 512                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
 513                         clock-names = "fck";
 514                         #address-cells = <1>;
 515                         #size-cells = <1>;
 516                         ranges = <0x0 0x59000 0x1000>;
 517
 518                         smartreflex_mpu: smartreflex@0 {
 519                                 compatible = "ti,omap4-smartreflex-mpu";
 520                                 reg = <0x0 0x80>;
 521                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
 522                         };
 523                 };
 524
 525                 target-module@5b000 {                   /* 0x4a0db000, ap 15 08.0 */
 526                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 527                         ti,hwmods = "smartreflex_iva";
 528                         reg = <0x5b038 0x4>;
 529                         reg-names = "sysc";
 530                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 531                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 532                                         <SYSC_IDLE_NO>,
 533                                         <SYSC_IDLE_SMART>,
 534                                         <SYSC_IDLE_SMART_WKUP>;
 535                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 536                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
 537                         clock-names = "fck";
 538                         #address-cells = <1>;
 539                         #size-cells = <1>;
 540                         ranges = <0x0 0x5b000 0x1000>;
 541
 542                         smartreflex_iva: smartreflex@0 {
 543                                 compatible = "ti,omap4-smartreflex-iva";
 544                                 reg = <0x0 0x80>;
 545                                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 546                         };
 547                 };
 548
 549                 target-module@5d000 {                   /* 0x4a0dd000, ap 17 22.0 */
 550                         compatible = "ti,sysc-omap4-sr", "ti,sysc";
 551                         ti,hwmods = "smartreflex_core";
 552                         reg = <0x5d038 0x4>;
 553                         reg-names = "sysc";
 554                         ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
 555                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 556                                         <SYSC_IDLE_NO>,
 557                                         <SYSC_IDLE_SMART>,
 558                                         <SYSC_IDLE_SMART_WKUP>;
 559                         /* Domains (V, P, C): core, always_on_core_pwrdm, l4_ao_clkdm */
 560                         clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
 561                         clock-names = "fck";
 562                         #address-cells = <1>;
 563                         #size-cells = <1>;
 564                         ranges = <0x0 0x5d000 0x1000>;
 565
 566                         smartreflex_core: smartreflex@0 {
 567                                 compatible = "ti,omap4-smartreflex-core";
 568                                 reg = <0x0 0x80>;
 569                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 570                         };
 571                 };
 572
 573                 target-module@60000 {                   /* 0x4a0e0000, ap 19 1c.0 */
 574                         compatible = "ti,sysc";
 575                         status = "disabled";
 576                         #address-cells = <1>;
 577                         #size-cells = <1>;
 578                         ranges = <0x0 0x60000 0x1000>;
 579                 };
 580
 581                 target-module@74000 {                   /* 0x4a0f4000, ap 27 24.0 */
 582                         compatible = "ti,sysc-omap4", "ti,sysc";
 583                         reg = <0x74000 0x4>,
 584                               <0x74010 0x4>;
 585                         reg-names = "rev", "sysc";
 586                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 587                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 588                                         <SYSC_IDLE_NO>,
 589                                         <SYSC_IDLE_SMART>;
 590                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 591                         clocks = <&l4_cfg_clkctrl OMAP4_MAILBOX_CLKCTRL 0>;
 592                         clock-names = "fck";
 593                         #address-cells = <1>;
 594                         #size-cells = <1>;
 595                         ranges = <0x0 0x74000 0x1000>;
 596
 597                         mailbox: mailbox@0 {
 598                                 compatible = "ti,omap4-mailbox";
 599                                 reg = <0x0 0x200>;
 600                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 601                                 #mbox-cells = <1>;
 602                                 ti,mbox-num-users = <3>;
 603                                 ti,mbox-num-fifos = <8>;
 604                                 mbox_ipu: mbox_ipu {
 605                                         ti,mbox-tx = <0 0 0>;
 606                                         ti,mbox-rx = <1 0 0>;
 607                                 };
 608                                 mbox_dsp: mbox_dsp {
 609                                         ti,mbox-tx = <3 0 0>;
 610                                         ti,mbox-rx = <2 0 0>;
 611                                 };
 612                         };
 613                 };
 614
 615                 target-module@76000 {                   /* 0x4a0f6000, ap 29 3a.0 */
 616                         compatible = "ti,sysc-omap2", "ti,sysc";
 617                         ti,hwmods = "spinlock";
 618                         reg = <0x76000 0x4>,
 619                               <0x76010 0x4>,
 620                               <0x76014 0x4>;
 621                         reg-names = "rev", "sysc", "syss";
 622                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 623                                          SYSC_OMAP2_ENAWAKEUP |
 624                                          SYSC_OMAP2_SOFTRESET |
 625                                          SYSC_OMAP2_AUTOIDLE)>;
 626                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 627                                         <SYSC_IDLE_NO>,
 628                                         <SYSC_IDLE_SMART>;
 629                         ti,syss-mask = <1>;
 630                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 631                         clocks = <&l4_cfg_clkctrl OMAP4_SPINLOCK_CLKCTRL 0>;
 632                         clock-names = "fck";
 633                         #address-cells = <1>;
 634                         #size-cells = <1>;
 635                         ranges = <0x0 0x76000 0x1000>;
 636
 637                         hwspinlock: spinlock@0 {
 638                                 compatible = "ti,omap4-hwspinlock";
 639                                 reg = <0x0 0x1000>;
 640                                 #hwlock-cells = <1>;
 641                         };
 642                 };
 643         };
 644
 645         segment@100000 {                                        /* 0x4a100000 */
 646                 compatible = "simple-bus";
 647                 #address-cells = <1>;
 648                 #size-cells = <1>;
 649                 ranges = <0x00000000 0x00100000 0x001000>,      /* ap 21 */
 650                          <0x00001000 0x00101000 0x001000>,      /* ap 22 */
 651                          <0x00002000 0x00102000 0x001000>,      /* ap 61 */
 652                          <0x00003000 0x00103000 0x001000>,      /* ap 62 */
 653                          <0x00008000 0x00108000 0x001000>,      /* ap 63 */
 654                          <0x00009000 0x00109000 0x001000>,      /* ap 64 */
 655                          <0x0000a000 0x0010a000 0x001000>,      /* ap 65 */
 656                          <0x0000b000 0x0010b000 0x001000>;      /* ap 66 */
 657
 658                 target-module@0 {                       /* 0x4a100000, ap 21 2a.0 */
 659                         compatible = "ti,sysc-omap4", "ti,sysc";
 660                         ti,hwmods = "ctrl_module_pad_core";
 661                         reg = <0x0 0x4>,
 662                               <0x10 0x4>;
 663                         reg-names = "rev", "sysc";
 664                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 665                                         <SYSC_IDLE_NO>,
 666                                         <SYSC_IDLE_SMART>,
 667                                         <SYSC_IDLE_SMART_WKUP>;
 668                         /* Domains (V, P, C): core, core_pwrdm, l4_cfg_clkdm */
 669                         #address-cells = <1>;
 670                         #size-cells = <1>;
 671                         ranges = <0x0 0x0 0x1000>;
 672
 673                         omap4_pmx_core: pinmux@40 {
 674                                 compatible = "ti,omap4-padconf",
 675                                              "pinctrl-single";
 676                                 reg = <0x40 0x0196>;
 677                                 #address-cells = <1>;
 678                                 #size-cells = <0>;
 679                                 #pinctrl-cells = <1>;
 680                                 #interrupt-cells = <1>;
 681                                 interrupt-controller;
 682                                 pinctrl-single,register-width = <16>;
 683                                 pinctrl-single,function-mask = <0x7fff>;
 684                         };
 685
 686                         omap4_padconf_global: omap4_padconf_global@5a0 {
 687                                 compatible = "syscon",
 688                                              "simple-bus";
 689                                 reg = <0x5a0 0x170>;
 690                                 #address-cells = <1>;
 691                                 #size-cells = <1>;
 692                                 ranges = <0 0x5a0 0x170>;
 693
 694                                 pbias_regulator: pbias_regulator@60 {
 695                                         compatible = "ti,pbias-omap4", "ti,pbias-omap";
 696                                         reg = <0x60 0x4>;
 697                                         syscon = <&omap4_padconf_global>;
 698                                         pbias_mmc_reg: pbias_mmc_omap4 {
 699                                                 regulator-name = "pbias_mmc_omap4";
 700                                                 regulator-min-microvolt = <1800000>;
 701                                                 regulator-max-microvolt = <3000000>;
 702                                         };
 703                                 };
 704                         };
 705                 };
 706
 707                 target-module@2000 {                    /* 0x4a102000, ap 61 3c.0 */
 708                         compatible = "ti,sysc";
 709                         status = "disabled";
 710                         #address-cells = <1>;
 711                         #size-cells = <1>;
 712                         ranges = <0x0 0x2000 0x1000>;
 713                 };
 714
 715                 target-module@8000 {                    /* 0x4a108000, ap 63 62.0 */
 716                         compatible = "ti,sysc";
 717                         status = "disabled";
 718                         #address-cells = <1>;
 719                         #size-cells = <1>;
 720                         ranges = <0x0 0x8000 0x1000>;
 721                 };
 722
 723                 target-module@a000 {                    /* 0x4a10a000, ap 65 50.0 */
 724                         compatible = "ti,sysc-omap4", "ti,sysc";
 725                         ti,hwmods = "fdif";
 726                         reg = <0xa000 0x4>,
 727                               <0xa010 0x4>;
 728                         reg-names = "rev", "sysc";
 729                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
 730                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 731                                         <SYSC_IDLE_NO>,
 732                                         <SYSC_IDLE_SMART>;
 733                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 734                                         <SYSC_IDLE_NO>,
 735                                         <SYSC_IDLE_SMART>;
 736                         ti,sysc-delay-us = <2>;
 737                         /* Domains (V, P, C): core, cam_pwrdm, iss_clkdm */
 738                         clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
 739                         clock-names = "fck";
 740                         #address-cells = <1>;
 741                         #size-cells = <1>;
 742                         ranges = <0x0 0xa000 0x1000>;
 743
 744                         /* No child device binding or driver in mainline */
 745                 };
 746         };
 747
 748         segment@180000 {                                        /* 0x4a180000 */
 749                 compatible = "simple-bus";
 750                 #address-cells = <1>;
 751                 #size-cells = <1>;
 752         };
 753
 754         segment@200000 {                                        /* 0x4a200000 */
 755                 compatible = "simple-bus";
 756                 #address-cells = <1>;
 757                 #size-cells = <1>;
 758                 ranges = <0x0001e000 0x0021e000 0x001000>,      /* ap 31 */
 759                          <0x0001f000 0x0021f000 0x001000>,      /* ap 32 */
 760                          <0x0000a000 0x0020a000 0x001000>,      /* ap 33 */
 761                          <0x0000b000 0x0020b000 0x001000>,      /* ap 34 */
 762                          <0x00004000 0x00204000 0x001000>,      /* ap 35 */
 763                          <0x00005000 0x00205000 0x001000>,      /* ap 36 */
 764                          <0x00006000 0x00206000 0x001000>,      /* ap 37 */
 765                          <0x00007000 0x00207000 0x001000>,      /* ap 38 */
 766                          <0x00012000 0x00212000 0x001000>,      /* ap 39 */
 767                          <0x00013000 0x00213000 0x001000>,      /* ap 40 */
 768                          <0x0000c000 0x0020c000 0x001000>,      /* ap 41 */
 769                          <0x0000d000 0x0020d000 0x001000>,      /* ap 42 */
 770                          <0x00010000 0x00210000 0x001000>,      /* ap 43 */
 771                          <0x00011000 0x00211000 0x001000>,      /* ap 44 */
 772                          <0x00016000 0x00216000 0x001000>,      /* ap 45 */
 773                          <0x00017000 0x00217000 0x001000>,      /* ap 46 */
 774                          <0x00014000 0x00214000 0x001000>,      /* ap 47 */
 775                          <0x00015000 0x00215000 0x001000>,      /* ap 48 */
 776                          <0x00018000 0x00218000 0x001000>,      /* ap 49 */
 777                          <0x00019000 0x00219000 0x001000>,      /* ap 50 */
 778                          <0x00020000 0x00220000 0x001000>,      /* ap 51 */
 779                          <0x00021000 0x00221000 0x001000>,      /* ap 52 */
 780                          <0x00026000 0x00226000 0x001000>,      /* ap 53 */
 781                          <0x00027000 0x00227000 0x001000>,      /* ap 54 */
 782                          <0x00028000 0x00228000 0x001000>,      /* ap 55 */
 783                          <0x00029000 0x00229000 0x001000>,      /* ap 56 */
 784                          <0x0002a000 0x0022a000 0x001000>,      /* ap 57 */
 785                          <0x0002b000 0x0022b000 0x001000>,      /* ap 58 */
 786                          <0x0001c000 0x0021c000 0x001000>,      /* ap 59 */
 787                          <0x0001d000 0x0021d000 0x001000>;      /* ap 60 */
 788
 789                 target-module@4000 {                    /* 0x4a204000, ap 35 42.0 */
 790                         compatible = "ti,sysc";
 791                         status = "disabled";
 792                         #address-cells = <1>;
 793                         #size-cells = <1>;
 794                         ranges = <0x0 0x4000 0x1000>;
 795                 };
 796
 797                 target-module@6000 {                    /* 0x4a206000, ap 37 4a.0 */
 798                         compatible = "ti,sysc";
 799                         status = "disabled";
 800                         #address-cells = <1>;
 801                         #size-cells = <1>;
 802                         ranges = <0x0 0x6000 0x1000>;
 803                 };
 804
 805                 target-module@a000 {                    /* 0x4a20a000, ap 33 2c.0 */
 806                         compatible = "ti,sysc";
 807                         status = "disabled";
 808                         #address-cells = <1>;
 809                         #size-cells = <1>;
 810                         ranges = <0x0 0xa000 0x1000>;
 811                 };
 812
 813                 target-module@c000 {                    /* 0x4a20c000, ap 41 20.0 */
 814                         compatible = "ti,sysc";
 815                         status = "disabled";
 816                         #address-cells = <1>;
 817                         #size-cells = <1>;
 818                         ranges = <0x0 0xc000 0x1000>;
 819                 };
 820
 821                 target-module@10000 {                   /* 0x4a210000, ap 43 52.0 */
 822                         compatible = "ti,sysc";
 823                         status = "disabled";
 824                         #address-cells = <1>;
 825                         #size-cells = <1>;
 826                         ranges = <0x0 0x10000 0x1000>;
 827                 };
 828
 829                 target-module@12000 {                   /* 0x4a212000, ap 39 18.0 */
 830                         compatible = "ti,sysc";
 831                         status = "disabled";
 832                         #address-cells = <1>;
 833                         #size-cells = <1>;
 834                         ranges = <0x0 0x12000 0x1000>;
 835                 };
 836
 837                 target-module@14000 {                   /* 0x4a214000, ap 47 30.0 */
 838                         compatible = "ti,sysc";
 839                         status = "disabled";
 840                         #address-cells = <1>;
 841                         #size-cells = <1>;
 842                         ranges = <0x0 0x14000 0x1000>;
 843                 };
 844
 845                 target-module@16000 {                   /* 0x4a216000, ap 45 28.0 */
 846                         compatible = "ti,sysc";
 847                         status = "disabled";
 848                         #address-cells = <1>;
 849                         #size-cells = <1>;
 850                         ranges = <0x0 0x16000 0x1000>;
 851                 };
 852
 853                 target-module@18000 {                   /* 0x4a218000, ap 49 38.0 */
 854                         compatible = "ti,sysc";
 855                         status = "disabled";
 856                         #address-cells = <1>;
 857                         #size-cells = <1>;
 858                         ranges = <0x0 0x18000 0x1000>;
 859                 };
 860
 861                 target-module@1c000 {                   /* 0x4a21c000, ap 59 5a.0 */
 862                         compatible = "ti,sysc";
 863                         status = "disabled";
 864                         #address-cells = <1>;
 865                         #size-cells = <1>;
 866                         ranges = <0x0 0x1c000 0x1000>;
 867                 };
 868
 869                 target-module@1e000 {                   /* 0x4a21e000, ap 31 10.0 */
 870                         compatible = "ti,sysc";
 871                         status = "disabled";
 872                         #address-cells = <1>;
 873                         #size-cells = <1>;
 874                         ranges = <0x0 0x1e000 0x1000>;
 875                 };
 876
 877                 target-module@20000 {                   /* 0x4a220000, ap 51 40.0 */
 878                         compatible = "ti,sysc";
 879                         status = "disabled";
 880                         #address-cells = <1>;
 881                         #size-cells = <1>;
 882                         ranges = <0x0 0x20000 0x1000>;
 883                 };
 884
 885                 target-module@26000 {                   /* 0x4a226000, ap 53 34.0 */
 886                         compatible = "ti,sysc";
 887                         status = "disabled";
 888                         #address-cells = <1>;
 889                         #size-cells = <1>;
 890                         ranges = <0x0 0x26000 0x1000>;
 891                 };
 892
 893                 target-module@28000 {                   /* 0x4a228000, ap 55 2e.0 */
 894                         compatible = "ti,sysc";
 895                         status = "disabled";
 896                         #address-cells = <1>;
 897                         #size-cells = <1>;
 898                         ranges = <0x0 0x28000 0x1000>;
 899                 };
 900
 901                 target-module@2a000 {                   /* 0x4a22a000, ap 57 48.0 */
 902                         compatible = "ti,sysc";
 903                         status = "disabled";
 904                         #address-cells = <1>;
 905                         #size-cells = <1>;
 906                         ranges = <0x0 0x2a000 0x1000>;
 907                 };
 908         };
 909
 910         segment@280000 {                                        /* 0x4a280000 */
 911                 compatible = "simple-bus";
 912                 #address-cells = <1>;
 913                 #size-cells = <1>;
 914         };
 915
 916         l4_cfg_segment_300000: segment@300000 {                 /* 0x4a300000 */
 917                 compatible = "simple-bus";
 918                 #address-cells = <1>;
 919                 #size-cells = <1>;
 920                 ranges = <0x00000000 0x00300000 0x020000>,      /* ap 67 */
 921                          <0x00040000 0x00340000 0x001000>,      /* ap 68 */
 922                          <0x00020000 0x00320000 0x004000>,      /* ap 71 */
 923                          <0x00024000 0x00324000 0x002000>,      /* ap 72 */
 924                          <0x00026000 0x00326000 0x001000>,      /* ap 73 */
 925                          <0x00027000 0x00327000 0x001000>,      /* ap 74 */
 926                          <0x00028000 0x00328000 0x001000>,      /* ap 75 */
 927                          <0x00029000 0x00329000 0x001000>,      /* ap 76 */
 928                          <0x00030000 0x00330000 0x010000>,      /* ap 77 */
 929                          <0x0002a000 0x0032a000 0x002000>,      /* ap 90 */
 930                          <0x0002c000 0x0032c000 0x004000>;      /* ap 91 */
 931
 932                 l4_cfg_target_0: target-module@0 {      /* 0x4a300000, ap 67 14.0 */
 933                         compatible = "ti,sysc";
 934                         status = "disabled";
 935                         #address-cells = <1>;
 936                         #size-cells = <1>;
 937                         ranges = <0x00000000 0x00000000 0x00020000>,
 938                                  <0x00020000 0x00020000 0x00004000>,
 939                                  <0x00024000 0x00024000 0x00002000>,
 940                                  <0x00026000 0x00026000 0x00001000>,
 941                                  <0x00027000 0x00027000 0x00001000>,
 942                                  <0x00028000 0x00028000 0x00001000>,
 943                                  <0x00029000 0x00029000 0x00001000>,
 944                                  <0x0002a000 0x0002a000 0x00002000>,
 945                                  <0x0002c000 0x0002c000 0x00004000>,
 946                                  <0x00030000 0x00030000 0x00010000>;
 947                 };
 948         };
 949 };
 950
 951 &l4_wkup {                                              /* 0x4a300000 */
 952         compatible = "ti,omap4-l4-wkup", "simple-bus";
 953         reg = <0x4a300000 0x800>,
 954               <0x4a300800 0x800>,
 955               <0x4a301000 0x1000>;
 956         reg-names = "ap", "la", "ia0";
 957         #address-cells = <1>;
 958         #size-cells = <1>;
 959         ranges = <0x00000000 0x4a300000 0x010000>,      /* segment 0 */
 960                  <0x00010000 0x4a310000 0x010000>,      /* segment 1 */
 961                  <0x00020000 0x4a320000 0x010000>;      /* segment 2 */
 962
 963         segment@0 {                                     /* 0x4a300000 */
 964                 compatible = "simple-bus";
 965                 #address-cells = <1>;
 966                 #size-cells = <1>;
 967                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 968                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 969                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
 970                          <0x00006000 0x00006000 0x002000>,      /* ap 3 */
 971                          <0x00008000 0x00008000 0x001000>,      /* ap 4 */
 972                          <0x0000a000 0x0000a000 0x001000>,      /* ap 15 */
 973                          <0x0000b000 0x0000b000 0x001000>,      /* ap 16 */
 974                          <0x00004000 0x00004000 0x001000>,      /* ap 17 */
 975                          <0x00005000 0x00005000 0x001000>,      /* ap 18 */
 976                          <0x0000c000 0x0000c000 0x001000>,      /* ap 19 */
 977                          <0x0000d000 0x0000d000 0x001000>;      /* ap 20 */
 978
 979                 target-module@4000 {                    /* 0x4a304000, ap 17 24.0 */
 980                         compatible = "ti,sysc-omap2", "ti,sysc";
 981                         ti,hwmods = "counter_32k";
 982                         reg = <0x4000 0x4>,
 983                               <0x4004 0x4>;
 984                         reg-names = "rev", "sysc";
 985                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 986                                         <SYSC_IDLE_NO>;
 987                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
 988                         clocks = <&l4_wkup_clkctrl OMAP4_COUNTER_32K_CLKCTRL 0>;
 989                         clock-names = "fck";
 990                         #address-cells = <1>;
 991                         #size-cells = <1>;
 992                         ranges = <0x0 0x4000 0x1000>;
 993
 994                         counter32k: counter@0 {
 995                                 compatible = "ti,omap-counter32k";
 996                                 reg = <0x0 0x20>;
 997                         };
 998                 };
 999
1000                 target-module@6000 {                    /* 0x4a306000, ap 3 08.0 */
1001                         compatible = "ti,sysc-omap4", "ti,sysc";
1002                         reg = <0x6000 0x4>;
1003                         reg-names = "rev";
1004                         #address-cells = <1>;
1005                         #size-cells = <1>;
1006                         ranges = <0x0 0x6000 0x2000>;
1007
1008                         prm: prm@0 {
1009                                 compatible = "ti,omap4-prm";
1010                                 reg = <0x0 0x2000>;
1011                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1012                                 #address-cells = <1>;
1013                                 #size-cells = <1>;
1014                                 ranges = <0 0 0x2000>;
1015
1016                                 prm_clocks: clocks {
1017                                         #address-cells = <1>;
1018                                         #size-cells = <0>;
1019                                 };
1020
1021                                 prm_clockdomains: clockdomains {
1022                                 };
1023                         };
1024                 };
1025
1026                 target-module@a000 {                    /* 0x4a30a000, ap 15 34.0 */
1027                         compatible = "ti,sysc-omap4", "ti,sysc";
1028                         reg = <0xa000 0x4>;
1029                         reg-names = "rev";
1030                         #address-cells = <1>;
1031                         #size-cells = <1>;
1032                         ranges = <0x0 0xa000 0x1000>;
1033
1034                         scrm: scrm@0 {
1035                                 compatible = "ti,omap4-scrm";
1036                                 reg = <0x0 0x2000>;
1037
1038                                 scrm_clocks: clocks {
1039                                         #address-cells = <1>;
1040                                         #size-cells = <0>;
1041                                 };
1042
1043                                 scrm_clockdomains: clockdomains {
1044                                 };
1045                         };
1046                 };
1047
1048                 target-module@c000 {                    /* 0x4a30c000, ap 19 2c.0 */
1049                         compatible = "ti,sysc-omap4", "ti,sysc";
1050                         ti,hwmods = "ctrl_module_wkup";
1051                         reg = <0xc000 0x4>,
1052                               <0xc010 0x4>;
1053                         reg-names = "rev", "sysc";
1054                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1055                                         <SYSC_IDLE_NO>,
1056                                         <SYSC_IDLE_SMART>,
1057                                         <SYSC_IDLE_SMART_WKUP>;
1058                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1059                         #address-cells = <1>;
1060                         #size-cells = <1>;
1061                         ranges = <0x0 0xc000 0x1000>;
1062
1063                         omap4_scm_wkup: scm@c000 {
1064                                 compatible = "ti,omap4-scm-wkup";
1065                                 reg = <0xc000 0x1000>;
1066                         };
1067                 };
1068         };
1069
1070         segment@10000 {                                 /* 0x4a310000 */
1071                 compatible = "simple-bus";
1072                 #address-cells = <1>;
1073                 #size-cells = <1>;
1074                 ranges = <0x00000000 0x00010000 0x001000>,      /* ap 5 */
1075                          <0x00001000 0x00011000 0x001000>,      /* ap 6 */
1076                          <0x00004000 0x00014000 0x001000>,      /* ap 7 */
1077                          <0x00005000 0x00015000 0x001000>,      /* ap 8 */
1078                          <0x00008000 0x00018000 0x001000>,      /* ap 9 */
1079                          <0x00009000 0x00019000 0x001000>,      /* ap 10 */
1080                          <0x0000c000 0x0001c000 0x001000>,      /* ap 11 */
1081                          <0x0000d000 0x0001d000 0x001000>,      /* ap 12 */
1082                          <0x0000e000 0x0001e000 0x001000>,      /* ap 21 */
1083                          <0x0000f000 0x0001f000 0x001000>;      /* ap 22 */
1084
1085                 gpio1_target: target-module@0 {                 /* 0x4a310000, ap 5 14.0 */
1086                         compatible = "ti,sysc-omap2", "ti,sysc";
1087                         reg = <0x0 0x4>,
1088                               <0x10 0x4>,
1089                               <0x114 0x4>;
1090                         reg-names = "rev", "sysc", "syss";
1091                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1092                                          SYSC_OMAP2_SOFTRESET |
1093                                          SYSC_OMAP2_AUTOIDLE)>;
1094                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1095                                         <SYSC_IDLE_NO>,
1096                                         <SYSC_IDLE_SMART>,
1097                                         <SYSC_IDLE_SMART_WKUP>;
1098                         ti,syss-mask = <1>;
1099                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1100                         clocks = <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 0>,
1101                                  <&l4_wkup_clkctrl OMAP4_GPIO1_CLKCTRL 8>;
1102                         clock-names = "fck", "dbclk";
1103                         #address-cells = <1>;
1104                         #size-cells = <1>;
1105                         ranges = <0x0 0x0 0x1000>;
1106
1107                         gpio1: gpio@0 {
1108                                 compatible = "ti,omap4-gpio";
1109                                 reg = <0x0 0x200>;
1110                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1111                                 ti,gpio-always-on;
1112                                 gpio-controller;
1113                                 #gpio-cells = <2>;
1114                                 interrupt-controller;
1115                                 #interrupt-cells = <2>;
1116                         };
1117                 };
1118
1119                 target-module@4000 {                    /* 0x4a314000, ap 7 18.0 */
1120                         compatible = "ti,sysc-omap2", "ti,sysc";
1121                         reg = <0x4000 0x4>,
1122                               <0x4010 0x4>,
1123                               <0x4014 0x4>;
1124                         reg-names = "rev", "sysc", "syss";
1125                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
1126                                          SYSC_OMAP2_SOFTRESET)>;
1127                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1128                                         <SYSC_IDLE_NO>,
1129                                         <SYSC_IDLE_SMART>,
1130                                         <SYSC_IDLE_SMART_WKUP>;
1131                         ti,syss-mask = <1>;
1132                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1133                         clocks = <&l4_wkup_clkctrl OMAP4_WD_TIMER2_CLKCTRL 0>;
1134                         clock-names = "fck";
1135                         #address-cells = <1>;
1136                         #size-cells = <1>;
1137                         ranges = <0x0 0x4000 0x1000>;
1138
1139                         wdt2: wdt@0 {
1140                                 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
1141                                 reg = <0x0 0x80>;
1142                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
1143                         };
1144                 };
1145
1146                 target-module@8000 {                    /* 0x4a318000, ap 9 1c.0 */
1147                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1148                         ti,hwmods = "timer1";
1149                         reg = <0x8000 0x4>,
1150                               <0x8010 0x4>,
1151                               <0x8014 0x4>;
1152                         reg-names = "rev", "sysc", "syss";
1153                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1154                                          SYSC_OMAP2_EMUFREE |
1155                                          SYSC_OMAP2_ENAWAKEUP |
1156                                          SYSC_OMAP2_SOFTRESET |
1157                                          SYSC_OMAP2_AUTOIDLE)>;
1158                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1159                                         <SYSC_IDLE_NO>,
1160                                         <SYSC_IDLE_SMART>;
1161                         ti,syss-mask = <1>;
1162                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1163                         clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 0>;
1164                         clock-names = "fck";
1165                         #address-cells = <1>;
1166                         #size-cells = <1>;
1167                         ranges = <0x0 0x8000 0x1000>;
1168
1169                         timer1: timer@0 {
1170                                 compatible = "ti,omap3430-timer";
1171                                 reg = <0x0 0x80>;
1172                                 clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
1173                                 clock-names = "fck";
1174                                 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
1175                                 ti,timer-alwon;
1176                         };
1177                 };
1178
1179                 target-module@c000 {                    /* 0x4a31c000, ap 11 20.0 */
1180                         compatible = "ti,sysc-omap2", "ti,sysc";
1181                         ti,hwmods = "kbd";
1182                         reg = <0xc000 0x4>,
1183                               <0xc010 0x4>,
1184                               <0xc014 0x4>;
1185                         reg-names = "rev", "sysc", "syss";
1186                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1187                                          SYSC_OMAP2_EMUFREE |
1188                                          SYSC_OMAP2_ENAWAKEUP |
1189                                          SYSC_OMAP2_SOFTRESET |
1190                                          SYSC_OMAP2_AUTOIDLE)>;
1191                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1192                                         <SYSC_IDLE_NO>,
1193                                         <SYSC_IDLE_SMART>;
1194                         ti,syss-mask = <1>;
1195                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1196                         clocks = <&l4_wkup_clkctrl OMAP4_KBD_CLKCTRL 0>;
1197                         clock-names = "fck";
1198                         #address-cells = <1>;
1199                         #size-cells = <1>;
1200                         ranges = <0x0 0xc000 0x1000>;
1201
1202                         keypad: keypad@0 {
1203                                 compatible = "ti,omap4-keypad";
1204                                 reg = <0x0 0x80>;
1205                                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1206                                 reg-names = "mpu";
1207                         };
1208                 };
1209
1210                 target-module@e000 {                    /* 0x4a31e000, ap 21 30.0 */
1211                         compatible = "ti,sysc-omap4", "ti,sysc";
1212                         ti,hwmods = "ctrl_module_pad_wkup";
1213                         reg = <0xe000 0x4>,
1214                               <0xe010 0x4>;
1215                         reg-names = "rev", "sysc";
1216                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1217                                         <SYSC_IDLE_NO>,
1218                                         <SYSC_IDLE_SMART>,
1219                                         <SYSC_IDLE_SMART_WKUP>;
1220                         /* Domains (V, P, C): wakeup, wkup_pwrdm, l4_wkup_clkdm */
1221                         #address-cells = <1>;
1222                         #size-cells = <1>;
1223                         ranges = <0x0 0xe000 0x1000>;
1224
1225                         omap4_pmx_wkup: pinmux@40 {
1226                                 compatible = "ti,omap4-padconf",
1227                                              "pinctrl-single";
1228                                 reg = <0x40 0x0038>;
1229                                 #address-cells = <1>;
1230                                 #size-cells = <0>;
1231                                 #pinctrl-cells = <1>;
1232                                 #interrupt-cells = <1>;
1233                                 interrupt-controller;
1234                                 pinctrl-single,register-width = <16>;
1235                                 pinctrl-single,function-mask = <0x7fff>;
1236                         };
1237                 };
1238         };
1239
1240         segment@20000 {                                 /* 0x4a320000 */
1241                 compatible = "simple-bus";
1242                 #address-cells = <1>;
1243                 #size-cells = <1>;
1244                 ranges = <0x00006000 0x00026000 0x001000>,      /* ap 13 */
1245                          <0x0000a000 0x0002a000 0x001000>,      /* ap 14 */
1246                          <0x00000000 0x00020000 0x001000>,      /* ap 23 */
1247                          <0x00001000 0x00021000 0x001000>,      /* ap 24 */
1248                          <0x00002000 0x00022000 0x001000>,      /* ap 25 */
1249                          <0x00003000 0x00023000 0x001000>,      /* ap 26 */
1250                          <0x00004000 0x00024000 0x001000>,      /* ap 27 */
1251                          <0x00005000 0x00025000 0x001000>,      /* ap 28 */
1252                          <0x00007000 0x00027000 0x000400>,      /* ap 29 */
1253                          <0x00008000 0x00028000 0x000800>,      /* ap 30 */
1254                          <0x00009000 0x00029000 0x000400>;      /* ap 31 */
1255
1256                 target-module@0 {                       /* 0x4a320000, ap 23 04.0 */
1257                         compatible = "ti,sysc";
1258                         status = "disabled";
1259                         #address-cells = <1>;
1260                         #size-cells = <1>;
1261                         ranges = <0x0 0x0 0x1000>;
1262                 };
1263
1264                 target-module@2000 {                    /* 0x4a322000, ap 25 0c.0 */
1265                         compatible = "ti,sysc";
1266                         status = "disabled";
1267                         #address-cells = <1>;
1268                         #size-cells = <1>;
1269                         ranges = <0x0 0x2000 0x1000>;
1270                 };
1271
1272                 target-module@4000 {                    /* 0x4a324000, ap 27 10.0 */
1273                         compatible = "ti,sysc";
1274                         status = "disabled";
1275                         #address-cells = <1>;
1276                         #size-cells = <1>;
1277                         ranges = <0x0 0x4000 0x1000>;
1278                 };
1279
1280                 target-module@6000 {                    /* 0x4a326000, ap 13 28.0 */
1281                         compatible = "ti,sysc";
1282                         status = "disabled";
1283                         #address-cells = <1>;
1284                         #size-cells = <1>;
1285                         ranges = <0x00000000 0x00006000 0x00001000>,
1286                                  <0x00001000 0x00007000 0x00000400>,
1287                                  <0x00002000 0x00008000 0x00000800>,
1288                                  <0x00003000 0x00009000 0x00000400>;
1289                 };
1290         };
1291 };
1292
1293 &l4_per {                                               /* 0x48000000 */
1294         compatible = "ti,omap4-l4-per", "simple-bus";
1295         reg = <0x48000000 0x800>,
1296               <0x48000800 0x800>,
1297               <0x48001000 0x400>,
1298               <0x48001400 0x400>,
1299               <0x48001800 0x400>,
1300               <0x48001c00 0x400>;
1301         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
1302         #address-cells = <1>;
1303         #size-cells = <1>;
1304         ranges = <0x00000000 0x48000000 0x200000>,      /* segment 0 */
1305                  <0x00200000 0x48200000 0x200000>;      /* segment 1 */
1306
1307         segment@0 {                                     /* 0x48000000 */
1308                 compatible = "simple-bus";
1309                 #address-cells = <1>;
1310                 #size-cells = <1>;
1311                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
1312                          <0x00001000 0x00001000 0x000400>,      /* ap 1 */
1313                          <0x00000800 0x00000800 0x000800>,      /* ap 2 */
1314                          <0x00020000 0x00020000 0x001000>,      /* ap 3 */
1315                          <0x00021000 0x00021000 0x001000>,      /* ap 4 */
1316                          <0x00032000 0x00032000 0x001000>,      /* ap 5 */
1317                          <0x00033000 0x00033000 0x001000>,      /* ap 6 */
1318                          <0x00034000 0x00034000 0x001000>,      /* ap 7 */
1319                          <0x00035000 0x00035000 0x001000>,      /* ap 8 */
1320                          <0x00036000 0x00036000 0x001000>,      /* ap 9 */
1321                          <0x00037000 0x00037000 0x001000>,      /* ap 10 */
1322                          <0x0003e000 0x0003e000 0x001000>,      /* ap 11 */
1323                          <0x0003f000 0x0003f000 0x001000>,      /* ap 12 */
1324                          <0x00040000 0x00040000 0x010000>,      /* ap 13 */
1325                          <0x00050000 0x00050000 0x001000>,      /* ap 14 */
1326                          <0x00055000 0x00055000 0x001000>,      /* ap 15 */
1327                          <0x00056000 0x00056000 0x001000>,      /* ap 16 */
1328                          <0x00057000 0x00057000 0x001000>,      /* ap 17 */
1329                          <0x00058000 0x00058000 0x001000>,      /* ap 18 */
1330                          <0x00059000 0x00059000 0x001000>,      /* ap 19 */
1331                          <0x0005a000 0x0005a000 0x001000>,      /* ap 20 */
1332                          <0x0005b000 0x0005b000 0x001000>,      /* ap 21 */
1333                          <0x0005c000 0x0005c000 0x001000>,      /* ap 22 */
1334                          <0x0005d000 0x0005d000 0x001000>,      /* ap 23 */
1335                          <0x0005e000 0x0005e000 0x001000>,      /* ap 24 */
1336                          <0x00060000 0x00060000 0x001000>,      /* ap 25 */
1337                          <0x0006a000 0x0006a000 0x001000>,      /* ap 26 */
1338                          <0x0006b000 0x0006b000 0x001000>,      /* ap 27 */
1339                          <0x0006c000 0x0006c000 0x001000>,      /* ap 28 */
1340                          <0x0006d000 0x0006d000 0x001000>,      /* ap 29 */
1341                          <0x0006e000 0x0006e000 0x001000>,      /* ap 30 */
1342                          <0x0006f000 0x0006f000 0x001000>,      /* ap 31 */
1343                          <0x00070000 0x00070000 0x001000>,      /* ap 32 */
1344                          <0x00071000 0x00071000 0x001000>,      /* ap 33 */
1345                          <0x00072000 0x00072000 0x001000>,      /* ap 34 */
1346                          <0x00073000 0x00073000 0x001000>,      /* ap 35 */
1347                          <0x00061000 0x00061000 0x001000>,      /* ap 36 */
1348                          <0x00096000 0x00096000 0x001000>,      /* ap 37 */
1349                          <0x00097000 0x00097000 0x001000>,      /* ap 38 */
1350                          <0x00076000 0x00076000 0x001000>,      /* ap 39 */
1351                          <0x00077000 0x00077000 0x001000>,      /* ap 40 */
1352                          <0x00078000 0x00078000 0x001000>,      /* ap 41 */
1353                          <0x00079000 0x00079000 0x001000>,      /* ap 42 */
1354                          <0x00086000 0x00086000 0x001000>,      /* ap 43 */
1355                          <0x00087000 0x00087000 0x001000>,      /* ap 44 */
1356                          <0x00088000 0x00088000 0x001000>,      /* ap 45 */
1357                          <0x00089000 0x00089000 0x001000>,      /* ap 46 */
1358                          <0x000b0000 0x000b0000 0x001000>,      /* ap 47 */
1359                          <0x000b1000 0x000b1000 0x001000>,      /* ap 48 */
1360                          <0x00098000 0x00098000 0x001000>,      /* ap 49 */
1361                          <0x00099000 0x00099000 0x001000>,      /* ap 50 */
1362                          <0x0009a000 0x0009a000 0x001000>,      /* ap 51 */
1363                          <0x0009b000 0x0009b000 0x001000>,      /* ap 52 */
1364                          <0x0009c000 0x0009c000 0x001000>,      /* ap 53 */
1365                          <0x0009d000 0x0009d000 0x001000>,      /* ap 54 */
1366                          <0x0009e000 0x0009e000 0x001000>,      /* ap 55 */
1367                          <0x0009f000 0x0009f000 0x001000>,      /* ap 56 */
1368                          <0x00090000 0x00090000 0x002000>,      /* ap 57 */
1369                          <0x00092000 0x00092000 0x001000>,      /* ap 58 */
1370                          <0x000a4000 0x000a4000 0x001000>,      /* ap 59 */
1371                          <0x000a6000 0x000a6000 0x001000>,      /* ap 60 */
1372                          <0x000a8000 0x000a8000 0x004000>,      /* ap 61 */
1373                          <0x000ac000 0x000ac000 0x001000>,      /* ap 62 */
1374                          <0x000ad000 0x000ad000 0x001000>,      /* ap 63 */
1375                          <0x000ae000 0x000ae000 0x001000>,      /* ap 64 */
1376                          <0x000b2000 0x000b2000 0x001000>,      /* ap 65 */
1377                          <0x000b3000 0x000b3000 0x001000>,      /* ap 66 */
1378                          <0x000b4000 0x000b4000 0x001000>,      /* ap 67 */
1379                          <0x000b5000 0x000b5000 0x001000>,      /* ap 68 */
1380                          <0x000b8000 0x000b8000 0x001000>,      /* ap 69 */
1381                          <0x000b9000 0x000b9000 0x001000>,      /* ap 70 */
1382                          <0x000ba000 0x000ba000 0x001000>,      /* ap 71 */
1383                          <0x000bb000 0x000bb000 0x001000>,      /* ap 72 */
1384                          <0x000d1000 0x000d1000 0x001000>,      /* ap 73 */
1385                          <0x000d2000 0x000d2000 0x001000>,      /* ap 74 */
1386                          <0x000d5000 0x000d5000 0x001000>,      /* ap 75 */
1387                          <0x000d6000 0x000d6000 0x001000>,      /* ap 76 */
1388                          <0x000a2000 0x000a2000 0x001000>,      /* ap 79 */
1389                          <0x000a3000 0x000a3000 0x001000>,      /* ap 80 */
1390                          <0x00001400 0x00001400 0x000400>,      /* ap 81 */
1391                          <0x00001800 0x00001800 0x000400>,      /* ap 82 */
1392                          <0x00001c00 0x00001c00 0x000400>,      /* ap 83 */
1393                          <0x000a5000 0x000a5000 0x001000>;      /* ap 84 */
1394
1395                 target-module@20000 {                   /* 0x48020000, ap 3 06.0 */
1396                         compatible = "ti,sysc-omap2", "ti,sysc";
1397                         reg = <0x20050 0x4>,
1398                               <0x20054 0x4>,
1399                               <0x20058 0x4>;
1400                         reg-names = "rev", "sysc", "syss";
1401                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1402                                          SYSC_OMAP2_SOFTRESET |
1403                                          SYSC_OMAP2_AUTOIDLE)>;
1404                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1405                                         <SYSC_IDLE_NO>,
1406                                         <SYSC_IDLE_SMART>,
1407                                         <SYSC_IDLE_SMART_WKUP>;
1408                         ti,syss-mask = <1>;
1409                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1410                         clocks = <&l4_per_clkctrl OMAP4_UART3_CLKCTRL 0>;
1411                         clock-names = "fck";
1412                         #address-cells = <1>;
1413                         #size-cells = <1>;
1414                         ranges = <0x0 0x20000 0x1000>;
1415
1416                         uart3: serial@0 {
1417                                 compatible = "ti,omap4-uart";
1418                                 reg = <0x0 0x100>;
1419                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
1420                                 clock-frequency = <48000000>;
1421                         };
1422                 };
1423
1424                 target-module@32000 {                   /* 0x48032000, ap 5 02.0 */
1425                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1426                         ti,hwmods = "timer2";
1427                         reg = <0x32000 0x4>,
1428                               <0x32010 0x4>,
1429                               <0x32014 0x4>;
1430                         reg-names = "rev", "sysc", "syss";
1431                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1432                                          SYSC_OMAP2_EMUFREE |
1433                                          SYSC_OMAP2_ENAWAKEUP |
1434                                          SYSC_OMAP2_SOFTRESET |
1435                                          SYSC_OMAP2_AUTOIDLE)>;
1436                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1437                                         <SYSC_IDLE_NO>,
1438                                         <SYSC_IDLE_SMART>;
1439                         ti,syss-mask = <1>;
1440                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1441                         clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 0>;
1442                         clock-names = "fck";
1443                         #address-cells = <1>;
1444                         #size-cells = <1>;
1445                         ranges = <0x0 0x32000 0x1000>;
1446
1447                         timer2: timer@0 {
1448                                 compatible = "ti,omap3430-timer";
1449                                 reg = <0x0 0x80>;
1450                                 clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>;
1451                                 clock-names = "fck";
1452                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1453                         };
1454                 };
1455
1456                 target-module@34000 {                   /* 0x48034000, ap 7 04.0 */
1457                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1458                         ti,hwmods = "timer3";
1459                         reg = <0x34000 0x4>,
1460                               <0x34010 0x4>;
1461                         reg-names = "rev", "sysc";
1462                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1463                                          SYSC_OMAP4_SOFTRESET)>;
1464                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1465                                         <SYSC_IDLE_NO>,
1466                                         <SYSC_IDLE_SMART>,
1467                                         <SYSC_IDLE_SMART_WKUP>;
1468                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1469                         clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 0>;
1470                         clock-names = "fck";
1471                         #address-cells = <1>;
1472                         #size-cells = <1>;
1473                         ranges = <0x0 0x34000 0x1000>;
1474
1475                         timer3: timer@0 {
1476                                 compatible = "ti,omap4430-timer";
1477                                 reg = <0x0 0x80>;
1478                                 clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>;
1479                                 clock-names = "fck";
1480                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
1481                         };
1482                 };
1483
1484                 target-module@36000 {                   /* 0x48036000, ap 9 0e.0 */
1485                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1486                         ti,hwmods = "timer4";
1487                         reg = <0x36000 0x4>,
1488                               <0x36010 0x4>;
1489                         reg-names = "rev", "sysc";
1490                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1491                                          SYSC_OMAP4_SOFTRESET)>;
1492                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1493                                         <SYSC_IDLE_NO>,
1494                                         <SYSC_IDLE_SMART>,
1495                                         <SYSC_IDLE_SMART_WKUP>;
1496                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1497                         clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 0>;
1498                         clock-names = "fck";
1499                         #address-cells = <1>;
1500                         #size-cells = <1>;
1501                         ranges = <0x0 0x36000 0x1000>;
1502
1503                         timer4: timer@0 {
1504                                 compatible = "ti,omap4430-timer";
1505                                 reg = <0x0 0x80>;
1506                                 clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>;
1507                                 clock-names = "fck";
1508                                 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1509                         };
1510                 };
1511
1512                 target-module@3e000 {                   /* 0x4803e000, ap 11 08.0 */
1513                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1514                         ti,hwmods = "timer9";
1515                         reg = <0x3e000 0x4>,
1516                               <0x3e010 0x4>;
1517                         reg-names = "rev", "sysc";
1518                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1519                                          SYSC_OMAP4_SOFTRESET)>;
1520                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1521                                         <SYSC_IDLE_NO>,
1522                                         <SYSC_IDLE_SMART>,
1523                                         <SYSC_IDLE_SMART_WKUP>;
1524                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1525                         clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 0>;
1526                         clock-names = "fck";
1527                         #address-cells = <1>;
1528                         #size-cells = <1>;
1529                         ranges = <0x0 0x3e000 0x1000>;
1530
1531                         timer9: timer@0 {
1532                                 compatible = "ti,omap4430-timer";
1533                                 reg = <0x0 0x80>;
1534                                 clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
1535                                 clock-names = "fck";
1536                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1537                                 ti,timer-pwm;
1538                         };
1539                 };
1540
1541                 target-module@40000 {                   /* 0x48040000, ap 13 0a.0 */
1542                         compatible = "ti,sysc";
1543                         status = "disabled";
1544                         #address-cells = <1>;
1545                         #size-cells = <1>;
1546                         ranges = <0x0 0x40000 0x10000>;
1547                 };
1548
1549                 target-module@55000 {                   /* 0x48055000, ap 15 0c.0 */
1550                         compatible = "ti,sysc-omap2", "ti,sysc";
1551                         reg = <0x55000 0x4>,
1552                               <0x55010 0x4>,
1553                               <0x55114 0x4>;
1554                         reg-names = "rev", "sysc", "syss";
1555                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1556                                          SYSC_OMAP2_SOFTRESET |
1557                                          SYSC_OMAP2_AUTOIDLE)>;
1558                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1559                                         <SYSC_IDLE_NO>,
1560                                         <SYSC_IDLE_SMART>,
1561                                         <SYSC_IDLE_SMART_WKUP>;
1562                         ti,syss-mask = <1>;
1563                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1564                         clocks = <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 0>,
1565                                  <&l4_per_clkctrl OMAP4_GPIO2_CLKCTRL 8>;
1566                         clock-names = "fck", "dbclk";
1567                         #address-cells = <1>;
1568                         #size-cells = <1>;
1569                         ranges = <0x0 0x55000 0x1000>;
1570
1571                         gpio2: gpio@0 {
1572                                 compatible = "ti,omap4-gpio";
1573                                 reg = <0x0 0x200>;
1574                                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1575                                 gpio-controller;
1576                                 #gpio-cells = <2>;
1577                                 interrupt-controller;
1578                                 #interrupt-cells = <2>;
1579                         };
1580                 };
1581
1582                 target-module@57000 {                   /* 0x48057000, ap 17 16.0 */
1583                         compatible = "ti,sysc-omap2", "ti,sysc";
1584                         reg = <0x57000 0x4>,
1585                               <0x57010 0x4>,
1586                               <0x57114 0x4>;
1587                         reg-names = "rev", "sysc", "syss";
1588                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1589                                          SYSC_OMAP2_SOFTRESET |
1590                                          SYSC_OMAP2_AUTOIDLE)>;
1591                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1592                                         <SYSC_IDLE_NO>,
1593                                         <SYSC_IDLE_SMART>,
1594                                         <SYSC_IDLE_SMART_WKUP>;
1595                         ti,syss-mask = <1>;
1596                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1597                         clocks = <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 0>,
1598                                  <&l4_per_clkctrl OMAP4_GPIO3_CLKCTRL 8>;
1599                         clock-names = "fck", "dbclk";
1600                         #address-cells = <1>;
1601                         #size-cells = <1>;
1602                         ranges = <0x0 0x57000 0x1000>;
1603
1604                         gpio3: gpio@0 {
1605                                 compatible = "ti,omap4-gpio";
1606                                 reg = <0x0 0x200>;
1607                                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
1608                                 gpio-controller;
1609                                 #gpio-cells = <2>;
1610                                 interrupt-controller;
1611                                 #interrupt-cells = <2>;
1612                         };
1613                 };
1614
1615                 target-module@59000 {                   /* 0x48059000, ap 19 10.0 */
1616                         compatible = "ti,sysc-omap2", "ti,sysc";
1617                         reg = <0x59000 0x4>,
1618                               <0x59010 0x4>,
1619                               <0x59114 0x4>;
1620                         reg-names = "rev", "sysc", "syss";
1621                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1622                                          SYSC_OMAP2_SOFTRESET |
1623                                          SYSC_OMAP2_AUTOIDLE)>;
1624                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1625                                         <SYSC_IDLE_NO>,
1626                                         <SYSC_IDLE_SMART>,
1627                                         <SYSC_IDLE_SMART_WKUP>;
1628                         ti,syss-mask = <1>;
1629                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1630                         clocks = <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 0>,
1631                                  <&l4_per_clkctrl OMAP4_GPIO4_CLKCTRL 8>;
1632                         clock-names = "fck", "dbclk";
1633                         #address-cells = <1>;
1634                         #size-cells = <1>;
1635                         ranges = <0x0 0x59000 0x1000>;
1636
1637                         gpio4: gpio@0 {
1638                                 compatible = "ti,omap4-gpio";
1639                                 reg = <0x0 0x200>;
1640                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1641                                 gpio-controller;
1642                                 #gpio-cells = <2>;
1643                                 interrupt-controller;
1644                                 #interrupt-cells = <2>;
1645                         };
1646                 };
1647
1648                 target-module@5b000 {                   /* 0x4805b000, ap 21 12.0 */
1649                         compatible = "ti,sysc-omap2", "ti,sysc";
1650                         reg = <0x5b000 0x4>,
1651                               <0x5b010 0x4>,
1652                               <0x5b114 0x4>;
1653                         reg-names = "rev", "sysc", "syss";
1654                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1655                                          SYSC_OMAP2_SOFTRESET |
1656                                          SYSC_OMAP2_AUTOIDLE)>;
1657                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1658                                         <SYSC_IDLE_NO>,
1659                                         <SYSC_IDLE_SMART>,
1660                                         <SYSC_IDLE_SMART_WKUP>;
1661                         ti,syss-mask = <1>;
1662                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1663                         clocks = <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 0>,
1664                                  <&l4_per_clkctrl OMAP4_GPIO5_CLKCTRL 8>;
1665                         clock-names = "fck", "dbclk";
1666                         #address-cells = <1>;
1667                         #size-cells = <1>;
1668                         ranges = <0x0 0x5b000 0x1000>;
1669
1670                         gpio5: gpio@0 {
1671                                 compatible = "ti,omap4-gpio";
1672                                 reg = <0x0 0x200>;
1673                                 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1674                                 gpio-controller;
1675                                 #gpio-cells = <2>;
1676                                 interrupt-controller;
1677                                 #interrupt-cells = <2>;
1678                         };
1679                 };
1680
1681                 target-module@5d000 {                   /* 0x4805d000, ap 23 14.0 */
1682                         compatible = "ti,sysc-omap2", "ti,sysc";
1683                         reg = <0x5d000 0x4>,
1684                               <0x5d010 0x4>,
1685                               <0x5d114 0x4>;
1686                         reg-names = "rev", "sysc", "syss";
1687                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1688                                          SYSC_OMAP2_SOFTRESET |
1689                                          SYSC_OMAP2_AUTOIDLE)>;
1690                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1691                                         <SYSC_IDLE_NO>,
1692                                         <SYSC_IDLE_SMART>,
1693                                         <SYSC_IDLE_SMART_WKUP>;
1694                         ti,syss-mask = <1>;
1695                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1696                         clocks = <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 0>,
1697                                  <&l4_per_clkctrl OMAP4_GPIO6_CLKCTRL 8>;
1698                         clock-names = "fck", "dbclk";
1699                         #address-cells = <1>;
1700                         #size-cells = <1>;
1701                         ranges = <0x0 0x5d000 0x1000>;
1702
1703                         gpio6: gpio@0 {
1704                                 compatible = "ti,omap4-gpio";
1705                                 reg = <0x0 0x200>;
1706                                 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
1707                                 gpio-controller;
1708                                 #gpio-cells = <2>;
1709                                 interrupt-controller;
1710                                 #interrupt-cells = <2>;
1711                         };
1712                 };
1713
1714                 target-module@60000 {                   /* 0x48060000, ap 25 1e.0 */
1715                         compatible = "ti,sysc-omap2", "ti,sysc";
1716                         reg = <0x60000 0x8>,
1717                               <0x60010 0x8>,
1718                               <0x60090 0x8>;
1719                         reg-names = "rev", "sysc", "syss";
1720                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1721                                          SYSC_OMAP2_ENAWAKEUP |
1722                                          SYSC_OMAP2_SOFTRESET |
1723                                          SYSC_OMAP2_AUTOIDLE)>;
1724                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1725                                         <SYSC_IDLE_NO>,
1726                                         <SYSC_IDLE_SMART>,
1727                                         <SYSC_IDLE_SMART_WKUP>;
1728                         ti,syss-mask = <1>;
1729                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1730                         clocks = <&l4_per_clkctrl OMAP4_I2C3_CLKCTRL 0>;
1731                         clock-names = "fck";
1732                         #address-cells = <1>;
1733                         #size-cells = <1>;
1734                         ranges = <0x0 0x60000 0x1000>;
1735
1736                         i2c3: i2c@0 {
1737                                 compatible = "ti,omap4-i2c";
1738                                 reg = <0x0 0x100>;
1739                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1740                                 #address-cells = <1>;
1741                                 #size-cells = <0>;
1742                         };
1743                 };
1744
1745                 target-module@6a000 {                   /* 0x4806a000, ap 26 18.0 */
1746                         compatible = "ti,sysc-omap2", "ti,sysc";
1747                         reg = <0x6a050 0x4>,
1748                               <0x6a054 0x4>,
1749                               <0x6a058 0x4>;
1750                         reg-names = "rev", "sysc", "syss";
1751                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1752                                          SYSC_OMAP2_SOFTRESET |
1753                                          SYSC_OMAP2_AUTOIDLE)>;
1754                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1755                                         <SYSC_IDLE_NO>,
1756                                         <SYSC_IDLE_SMART>,
1757                                         <SYSC_IDLE_SMART_WKUP>;
1758                         ti,syss-mask = <1>;
1759                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1760                         clocks = <&l4_per_clkctrl OMAP4_UART1_CLKCTRL 0>;
1761                         clock-names = "fck";
1762                         #address-cells = <1>;
1763                         #size-cells = <1>;
1764                         ranges = <0x0 0x6a000 0x1000>;
1765
1766                         uart1: serial@0 {
1767                                 compatible = "ti,omap4-uart";
1768                                 reg = <0x0 0x100>;
1769                                 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
1770                                 clock-frequency = <48000000>;
1771                         };
1772                 };
1773
1774                 target-module@6c000 {                   /* 0x4806c000, ap 28 20.0 */
1775                         compatible = "ti,sysc-omap2", "ti,sysc";
1776                         reg = <0x6c050 0x4>,
1777                               <0x6c054 0x4>,
1778                               <0x6c058 0x4>;
1779                         reg-names = "rev", "sysc", "syss";
1780                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1781                                          SYSC_OMAP2_SOFTRESET |
1782                                          SYSC_OMAP2_AUTOIDLE)>;
1783                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1784                                         <SYSC_IDLE_NO>,
1785                                         <SYSC_IDLE_SMART>,
1786                                         <SYSC_IDLE_SMART_WKUP>;
1787                         ti,syss-mask = <1>;
1788                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1789                         clocks = <&l4_per_clkctrl OMAP4_UART2_CLKCTRL 0>;
1790                         clock-names = "fck";
1791                         #address-cells = <1>;
1792                         #size-cells = <1>;
1793                         ranges = <0x0 0x6c000 0x1000>;
1794
1795                         uart2: serial@0 {
1796                                 compatible = "ti,omap4-uart";
1797                                 reg = <0x0 0x100>;
1798                                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1799                                 clock-frequency = <48000000>;
1800                         };
1801                 };
1802
1803                 target-module@6e000 {                   /* 0x4806e000, ap 30 1c.1 */
1804                         compatible = "ti,sysc-omap2", "ti,sysc";
1805                         reg = <0x6e050 0x4>,
1806                               <0x6e054 0x4>,
1807                               <0x6e058 0x4>;
1808                         reg-names = "rev", "sysc", "syss";
1809                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1810                                          SYSC_OMAP2_SOFTRESET |
1811                                          SYSC_OMAP2_AUTOIDLE)>;
1812                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1813                                         <SYSC_IDLE_NO>,
1814                                         <SYSC_IDLE_SMART>,
1815                                         <SYSC_IDLE_SMART_WKUP>;
1816                         ti,syss-mask = <1>;
1817                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1818                         clocks = <&l4_per_clkctrl OMAP4_UART4_CLKCTRL 0>;
1819                         clock-names = "fck";
1820                         #address-cells = <1>;
1821                         #size-cells = <1>;
1822                         ranges = <0x0 0x6e000 0x1000>;
1823
1824                         uart4: serial@0 {
1825                                 compatible = "ti,omap4-uart";
1826                                 reg = <0x0 0x100>;
1827                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
1828                                 clock-frequency = <48000000>;
1829                         };
1830                 };
1831
1832                 target-module@70000 {                   /* 0x48070000, ap 32 28.0 */
1833                         compatible = "ti,sysc-omap2", "ti,sysc";
1834                         reg = <0x70000 0x8>,
1835                               <0x70010 0x8>,
1836                               <0x70090 0x8>;
1837                         reg-names = "rev", "sysc", "syss";
1838                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1839                                          SYSC_OMAP2_ENAWAKEUP |
1840                                          SYSC_OMAP2_SOFTRESET |
1841                                          SYSC_OMAP2_AUTOIDLE)>;
1842                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1843                                         <SYSC_IDLE_NO>,
1844                                         <SYSC_IDLE_SMART>,
1845                                         <SYSC_IDLE_SMART_WKUP>;
1846                         ti,syss-mask = <1>;
1847                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1848                         clocks = <&l4_per_clkctrl OMAP4_I2C1_CLKCTRL 0>;
1849                         clock-names = "fck";
1850                         #address-cells = <1>;
1851                         #size-cells = <1>;
1852                         ranges = <0x0 0x70000 0x1000>;
1853
1854                         i2c1: i2c@0 {
1855                                 compatible = "ti,omap4-i2c";
1856                                 reg = <0x0 0x100>;
1857                                 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
1858                                 #address-cells = <1>;
1859                                 #size-cells = <0>;
1860                         };
1861                 };
1862
1863                 target-module@72000 {                   /* 0x48072000, ap 34 30.0 */
1864                         compatible = "ti,sysc-omap2", "ti,sysc";
1865                         reg = <0x72000 0x8>,
1866                               <0x72010 0x8>,
1867                               <0x72090 0x8>;
1868                         reg-names = "rev", "sysc", "syss";
1869                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1870                                          SYSC_OMAP2_ENAWAKEUP |
1871                                          SYSC_OMAP2_SOFTRESET |
1872                                          SYSC_OMAP2_AUTOIDLE)>;
1873                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1874                                         <SYSC_IDLE_NO>,
1875                                         <SYSC_IDLE_SMART>,
1876                                         <SYSC_IDLE_SMART_WKUP>;
1877                         ti,syss-mask = <1>;
1878                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1879                         clocks = <&l4_per_clkctrl OMAP4_I2C2_CLKCTRL 0>;
1880                         clock-names = "fck";
1881                         #address-cells = <1>;
1882                         #size-cells = <1>;
1883                         ranges = <0x0 0x72000 0x1000>;
1884
1885                         i2c2: i2c@0 {
1886                                 compatible = "ti,omap4-i2c";
1887                                 reg = <0x0 0x100>;
1888                                 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
1889                                 #address-cells = <1>;
1890                                 #size-cells = <0>;
1891                         };
1892                 };
1893
1894                 target-module@76000 {                   /* 0x48076000, ap 39 38.0 */
1895                         compatible = "ti,sysc-omap4", "ti,sysc";
1896                         ti,hwmods = "slimbus2";
1897                         reg = <0x76000 0x4>,
1898                               <0x76010 0x4>;
1899                         reg-names = "rev", "sysc";
1900                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1901                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1902                                         <SYSC_IDLE_NO>,
1903                                         <SYSC_IDLE_SMART>,
1904                                         <SYSC_IDLE_SMART_WKUP>;
1905                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1906                         clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
1907                         clock-names = "fck";
1908                         #address-cells = <1>;
1909                         #size-cells = <1>;
1910                         ranges = <0x0 0x76000 0x1000>;
1911
1912                         /* No child device binding or driver in mainline */
1913                 };
1914
1915                 target-module@78000 {                   /* 0x48078000, ap 41 1a.0 */
1916                         compatible = "ti,sysc-omap2", "ti,sysc";
1917                         ti,hwmods = "elm";
1918                         reg = <0x78000 0x4>,
1919                               <0x78010 0x4>,
1920                               <0x78014 0x4>;
1921                         reg-names = "rev", "sysc", "syss";
1922                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1923                                          SYSC_OMAP2_SOFTRESET |
1924                                          SYSC_OMAP2_AUTOIDLE)>;
1925                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1926                                         <SYSC_IDLE_NO>,
1927                                         <SYSC_IDLE_SMART>;
1928                         ti,syss-mask = <1>;
1929                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1930                         clocks = <&l4_per_clkctrl OMAP4_ELM_CLKCTRL 0>;
1931                         clock-names = "fck";
1932                         #address-cells = <1>;
1933                         #size-cells = <1>;
1934                         ranges = <0x0 0x78000 0x1000>;
1935
1936                         elm: elm@0 {
1937                                 compatible = "ti,am3352-elm";
1938                                 reg = <0x0 0x2000>;
1939                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1940                                 status = "disabled";
1941                         };
1942                 };
1943
1944                 target-module@86000 {                   /* 0x48086000, ap 43 24.0 */
1945                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
1946                         ti,hwmods = "timer10";
1947                         reg = <0x86000 0x4>,
1948                               <0x86010 0x4>,
1949                               <0x86014 0x4>;
1950                         reg-names = "rev", "sysc", "syss";
1951                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1952                                          SYSC_OMAP2_EMUFREE |
1953                                          SYSC_OMAP2_ENAWAKEUP |
1954                                          SYSC_OMAP2_SOFTRESET |
1955                                          SYSC_OMAP2_AUTOIDLE)>;
1956                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1957                                         <SYSC_IDLE_NO>,
1958                                         <SYSC_IDLE_SMART>;
1959                         ti,syss-mask = <1>;
1960                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1961                         clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 0>;
1962                         clock-names = "fck";
1963                         #address-cells = <1>;
1964                         #size-cells = <1>;
1965                         ranges = <0x0 0x86000 0x1000>;
1966
1967                         timer10: timer@0 {
1968                                 compatible = "ti,omap3430-timer";
1969                                 reg = <0x0 0x80>;
1970                                 clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>;
1971                                 clock-names = "fck";
1972                                 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1973                                 ti,timer-pwm;
1974                         };
1975                 };
1976
1977                 target-module@88000 {                   /* 0x48088000, ap 45 2e.0 */
1978                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1979                         ti,hwmods = "timer11";
1980                         reg = <0x88000 0x4>,
1981                               <0x88010 0x4>;
1982                         reg-names = "rev", "sysc";
1983                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
1984                                          SYSC_OMAP4_SOFTRESET)>;
1985                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1986                                         <SYSC_IDLE_NO>,
1987                                         <SYSC_IDLE_SMART>,
1988                                         <SYSC_IDLE_SMART_WKUP>;
1989                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
1990                         clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 0>;
1991                         clock-names = "fck";
1992                         #address-cells = <1>;
1993                         #size-cells = <1>;
1994                         ranges = <0x0 0x88000 0x1000>;
1995
1996                         timer11: timer@0 {
1997                                 compatible = "ti,omap4430-timer";
1998                                 reg = <0x0 0x80>;
1999                                 clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>;
2000                                 clock-names = "fck";
2001                                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2002                                 ti,timer-pwm;
2003                         };
2004                 };
2005
2006                 target-module@90000 {                   /* 0x48090000, ap 57 2a.0 */
2007                         compatible = "ti,sysc";
2008                         status = "disabled";
2009                         #address-cells = <1>;
2010                         #size-cells = <1>;
2011                         ranges = <0x0 0x90000 0x2000>;
2012                 };
2013
2014                 target-module@96000 {                   /* 0x48096000, ap 37 26.0 */
2015                         compatible = "ti,sysc-omap2", "ti,sysc";
2016                         reg = <0x9608c 0x4>;
2017                         reg-names = "sysc";
2018                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2019                                          SYSC_OMAP2_ENAWAKEUP |
2020                                          SYSC_OMAP2_SOFTRESET)>;
2021                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2022                                         <SYSC_IDLE_NO>,
2023                                         <SYSC_IDLE_SMART>;
2024                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2025                         clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 0>;
2026                         clock-names = "fck";
2027                         #address-cells = <1>;
2028                         #size-cells = <1>;
2029                         ranges = <0x0 0x96000 0x1000>;
2030
2031                         mcbsp4: mcbsp@0 {
2032                                 compatible = "ti,omap4-mcbsp";
2033                                 reg = <0x0 0xff>; /* L4 Interconnect */
2034                                 reg-names = "mpu";
2035                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
2036                                 interrupt-names = "common";
2037                                 ti,buffer-size = <128>;
2038                                 dmas = <&sdma 31>,
2039                                        <&sdma 32>;
2040                                 dma-names = "tx", "rx";
2041                                 status = "disabled";
2042                         };
2043                 };
2044
2045                 target-module@98000 {                   /* 0x48098000, ap 49 22.0 */
2046                         compatible = "ti,sysc-omap4", "ti,sysc";
2047                         reg = <0x98000 0x4>,
2048                               <0x98010 0x4>;
2049                         reg-names = "rev", "sysc";
2050                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2051                                          SYSC_OMAP4_SOFTRESET)>;
2052                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2053                                         <SYSC_IDLE_NO>,
2054                                         <SYSC_IDLE_SMART>,
2055                                         <SYSC_IDLE_SMART_WKUP>;
2056                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2057                         clocks = <&l4_per_clkctrl OMAP4_MCSPI1_CLKCTRL 0>;
2058                         clock-names = "fck";
2059                         #address-cells = <1>;
2060                         #size-cells = <1>;
2061                         ranges = <0x0 0x98000 0x1000>;
2062
2063                         mcspi1: spi@0 {
2064                                 compatible = "ti,omap4-mcspi";
2065                                 reg = <0x0 0x200>;
2066                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
2067                                 #address-cells = <1>;
2068                                 #size-cells = <0>;
2069                                 ti,spi-num-cs = <4>;
2070                                 dmas = <&sdma 35>,
2071                                        <&sdma 36>,
2072                                        <&sdma 37>,
2073                                        <&sdma 38>,
2074                                        <&sdma 39>,
2075                                        <&sdma 40>,
2076                                        <&sdma 41>,
2077                                        <&sdma 42>;
2078                                 dma-names = "tx0", "rx0", "tx1", "rx1",
2079                                             "tx2", "rx2", "tx3", "rx3";
2080                         };
2081                 };
2082
2083                 target-module@9a000 {                   /* 0x4809a000, ap 51 2c.0 */
2084                         compatible = "ti,sysc-omap4", "ti,sysc";
2085                         reg = <0x9a000 0x4>,
2086                               <0x9a010 0x4>;
2087                         reg-names = "rev", "sysc";
2088                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2089                                          SYSC_OMAP4_SOFTRESET)>;
2090                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2091                                         <SYSC_IDLE_NO>,
2092                                         <SYSC_IDLE_SMART>,
2093                                         <SYSC_IDLE_SMART_WKUP>;
2094                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2095                         clocks = <&l4_per_clkctrl OMAP4_MCSPI2_CLKCTRL 0>;
2096                         clock-names = "fck";
2097                         #address-cells = <1>;
2098                         #size-cells = <1>;
2099                         ranges = <0x0 0x9a000 0x1000>;
2100
2101                         mcspi2: spi@0 {
2102                                 compatible = "ti,omap4-mcspi";
2103                                 reg = <0x0 0x200>;
2104                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
2105                                 #address-cells = <1>;
2106                                 #size-cells = <0>;
2107                                 ti,spi-num-cs = <2>;
2108                                 dmas = <&sdma 43>,
2109                                        <&sdma 44>,
2110                                        <&sdma 45>,
2111                                        <&sdma 46>;
2112                                 dma-names = "tx0", "rx0", "tx1", "rx1";
2113                         };
2114                 };
2115
2116                 target-module@9c000 {                   /* 0x4809c000, ap 53 36.0 */
2117                         compatible = "ti,sysc-omap4", "ti,sysc";
2118                         reg = <0x9c000 0x4>,
2119                               <0x9c010 0x4>;
2120                         reg-names = "rev", "sysc";
2121                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2122                                          SYSC_OMAP4_SOFTRESET)>;
2123                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2124                                         <SYSC_IDLE_NO>,
2125                                         <SYSC_IDLE_SMART>,
2126                                         <SYSC_IDLE_SMART_WKUP>;
2127                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2128                                         <SYSC_IDLE_NO>,
2129                                         <SYSC_IDLE_SMART>,
2130                                         <SYSC_IDLE_SMART_WKUP>;
2131                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2132                         clocks = <&l3_init_clkctrl OMAP4_MMC1_CLKCTRL 0>;
2133                         clock-names = "fck";
2134                         #address-cells = <1>;
2135                         #size-cells = <1>;
2136                         ranges = <0x0 0x9c000 0x1000>;
2137
2138                         mmc1: mmc@0 {
2139                                 compatible = "ti,omap4-hsmmc";
2140                                 reg = <0x0 0x400>;
2141                                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2142                                 ti,dual-volt;
2143                                 ti,needs-special-reset;
2144                                 dmas = <&sdma 61>, <&sdma 62>;
2145                                 dma-names = "tx", "rx";
2146                                 pbias-supply = <&pbias_mmc_reg>;
2147                         };
2148                 };
2149
2150                 target-module@9e000 {                   /* 0x4809e000, ap 55 48.0 */
2151                         compatible = "ti,sysc";
2152                         status = "disabled";
2153                         #address-cells = <1>;
2154                         #size-cells = <1>;
2155                         ranges = <0x0 0x9e000 0x1000>;
2156                 };
2157
2158                 target-module@a2000 {                   /* 0x480a2000, ap 79 3a.0 */
2159                         compatible = "ti,sysc";
2160                         status = "disabled";
2161                         #address-cells = <1>;
2162                         #size-cells = <1>;
2163                         ranges = <0x0 0xa2000 0x1000>;
2164                 };
2165
2166                 target-module@a4000 {                   /* 0x480a4000, ap 59 34.0 */
2167                         compatible = "ti,sysc";
2168                         status = "disabled";
2169                         #address-cells = <1>;
2170                         #size-cells = <1>;
2171                         ranges = <0x00000000 0x000a4000 0x00001000>,
2172                                  <0x00001000 0x000a5000 0x00001000>;
2173                 };
2174
2175                 target-module@a8000 {                   /* 0x480a8000, ap 61 3e.0 */
2176                         compatible = "ti,sysc";
2177                         status = "disabled";
2178                         #address-cells = <1>;
2179                         #size-cells = <1>;
2180                         ranges = <0x0 0xa8000 0x4000>;
2181                 };
2182
2183                 target-module@ad000 {                   /* 0x480ad000, ap 63 50.0 */
2184                         compatible = "ti,sysc-omap4", "ti,sysc";
2185                         reg = <0xad000 0x4>,
2186                               <0xad010 0x4>;
2187                         reg-names = "rev", "sysc";
2188                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2189                                          SYSC_OMAP4_SOFTRESET)>;
2190                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2191                                         <SYSC_IDLE_NO>,
2192                                         <SYSC_IDLE_SMART>,
2193                                         <SYSC_IDLE_SMART_WKUP>;
2194                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2195                                         <SYSC_IDLE_NO>,
2196                                         <SYSC_IDLE_SMART>,
2197                                         <SYSC_IDLE_SMART_WKUP>;
2198                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2199                         clocks = <&l4_per_clkctrl OMAP4_MMC3_CLKCTRL 0>;
2200                         clock-names = "fck";
2201                         #address-cells = <1>;
2202                         #size-cells = <1>;
2203                         ranges = <0x0 0xad000 0x1000>;
2204
2205                         mmc3: mmc@0 {
2206                                 compatible = "ti,omap4-hsmmc";
2207                                 reg = <0x0 0x400>;
2208                                 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
2209                                 ti,needs-special-reset;
2210                                 dmas = <&sdma 77>, <&sdma 78>;
2211                                 dma-names = "tx", "rx";
2212                         };
2213                 };
2214
2215                 target-module@b0000 {                   /* 0x480b0000, ap 47 40.0 */
2216                         compatible = "ti,sysc";
2217                         status = "disabled";
2218                         #address-cells = <1>;
2219                         #size-cells = <1>;
2220                         ranges = <0x0 0xb0000 0x1000>;
2221                 };
2222
2223                 target-module@b2000 {                   /* 0x480b2000, ap 65 3c.0 */
2224                         compatible = "ti,sysc-omap2", "ti,sysc";
2225                         reg = <0xb2000 0x4>,
2226                               <0xb2014 0x4>,
2227                               <0xb2018 0x4>;
2228                         reg-names = "rev", "sysc", "syss";
2229                         ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2230                                          SYSC_OMAP2_AUTOIDLE)>;
2231                         ti,syss-mask = <1>;
2232                         ti,no-reset-on-init;
2233                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2234                         clocks = <&l4_per_clkctrl OMAP4_HDQ1W_CLKCTRL 0>;
2235                         clock-names = "fck";
2236                         #address-cells = <1>;
2237                         #size-cells = <1>;
2238                         ranges = <0x0 0xb2000 0x1000>;
2239
2240                         hdqw1w: 1w@0 {
2241                                 compatible = "ti,omap3-1w";
2242                                 reg = <0x0 0x1000>;
2243                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
2244                         };
2245                 };
2246
2247                 target-module@b4000 {                   /* 0x480b4000, ap 67 46.0 */
2248                         compatible = "ti,sysc-omap4", "ti,sysc";
2249                         reg = <0xb4000 0x4>,
2250                               <0xb4010 0x4>;
2251                         reg-names = "rev", "sysc";
2252                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2253                                          SYSC_OMAP4_SOFTRESET)>;
2254                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2255                                         <SYSC_IDLE_NO>,
2256                                         <SYSC_IDLE_SMART>,
2257                                         <SYSC_IDLE_SMART_WKUP>;
2258                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2259                                         <SYSC_IDLE_NO>,
2260                                         <SYSC_IDLE_SMART>,
2261                                         <SYSC_IDLE_SMART_WKUP>;
2262                         /* Domains (V, P, C): core, l3init_pwrdm, l3_init_clkdm */
2263                         clocks = <&l3_init_clkctrl OMAP4_MMC2_CLKCTRL 0>;
2264                         clock-names = "fck";
2265                         #address-cells = <1>;
2266                         #size-cells = <1>;
2267                         ranges = <0x0 0xb4000 0x1000>;
2268
2269                         mmc2: mmc@0 {
2270                                 compatible = "ti,omap4-hsmmc";
2271                                 reg = <0x0 0x400>;
2272                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
2273                                 ti,needs-special-reset;
2274                                 dmas = <&sdma 47>, <&sdma 48>;
2275                                 dma-names = "tx", "rx";
2276                         };
2277                 };
2278
2279                 target-module@b8000 {                   /* 0x480b8000, ap 69 58.0 */
2280                         compatible = "ti,sysc-omap4", "ti,sysc";
2281                         reg = <0xb8000 0x4>,
2282                               <0xb8010 0x4>;
2283                         reg-names = "rev", "sysc";
2284                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2285                                          SYSC_OMAP4_SOFTRESET)>;
2286                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2287                                         <SYSC_IDLE_NO>,
2288                                         <SYSC_IDLE_SMART>,
2289                                         <SYSC_IDLE_SMART_WKUP>;
2290                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2291                         clocks = <&l4_per_clkctrl OMAP4_MCSPI3_CLKCTRL 0>;
2292                         clock-names = "fck";
2293                         #address-cells = <1>;
2294                         #size-cells = <1>;
2295                         ranges = <0x0 0xb8000 0x1000>;
2296
2297                         mcspi3: spi@0 {
2298                                 compatible = "ti,omap4-mcspi";
2299                                 reg = <0x0 0x200>;
2300                                 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
2301                                 #address-cells = <1>;
2302                                 #size-cells = <0>;
2303                                 ti,spi-num-cs = <2>;
2304                                 dmas = <&sdma 15>, <&sdma 16>;
2305                                 dma-names = "tx0", "rx0";
2306                         };
2307                 };
2308
2309                 target-module@ba000 {                   /* 0x480ba000, ap 71 32.0 */
2310                         compatible = "ti,sysc-omap4", "ti,sysc";
2311                         reg = <0xba000 0x4>,
2312                               <0xba010 0x4>;
2313                         reg-names = "rev", "sysc";
2314                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2315                                          SYSC_OMAP4_SOFTRESET)>;
2316                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2317                                         <SYSC_IDLE_NO>,
2318                                         <SYSC_IDLE_SMART>,
2319                                         <SYSC_IDLE_SMART_WKUP>;
2320                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2321                         clocks = <&l4_per_clkctrl OMAP4_MCSPI4_CLKCTRL 0>;
2322                         clock-names = "fck";
2323                         #address-cells = <1>;
2324                         #size-cells = <1>;
2325                         ranges = <0x0 0xba000 0x1000>;
2326
2327                         mcspi4: spi@0 {
2328                                 compatible = "ti,omap4-mcspi";
2329                                 reg = <0x0 0x200>;
2330                                 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2331                                 #address-cells = <1>;
2332                                 #size-cells = <0>;
2333                                 ti,spi-num-cs = <1>;
2334                                 dmas = <&sdma 70>, <&sdma 71>;
2335                                 dma-names = "tx0", "rx0";
2336                         };
2337                 };
2338
2339                 target-module@d1000 {                   /* 0x480d1000, ap 73 44.0 */
2340                         compatible = "ti,sysc-omap4", "ti,sysc";
2341                         reg = <0xd1000 0x4>,
2342                               <0xd1010 0x4>;
2343                         reg-names = "rev", "sysc";
2344                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2345                                          SYSC_OMAP4_SOFTRESET)>;
2346                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2347                                         <SYSC_IDLE_NO>,
2348                                         <SYSC_IDLE_SMART>,
2349                                         <SYSC_IDLE_SMART_WKUP>;
2350                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2351                                         <SYSC_IDLE_NO>,
2352                                         <SYSC_IDLE_SMART>,
2353                                         <SYSC_IDLE_SMART_WKUP>;
2354                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2355                         clocks = <&l4_per_clkctrl OMAP4_MMC4_CLKCTRL 0>;
2356                         clock-names = "fck";
2357                         #address-cells = <1>;
2358                         #size-cells = <1>;
2359                         ranges = <0x0 0xd1000 0x1000>;
2360
2361                         mmc4: mmc@0 {
2362                                 compatible = "ti,omap4-hsmmc";
2363                                 reg = <0x0 0x400>;
2364                                 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
2365                                 ti,needs-special-reset;
2366                                 dmas = <&sdma 57>, <&sdma 58>;
2367                                 dma-names = "tx", "rx";
2368                         };
2369                 };
2370
2371                 target-module@d5000 {                   /* 0x480d5000, ap 75 4e.0 */
2372                         compatible = "ti,sysc-omap4", "ti,sysc";
2373                         reg = <0xd5000 0x4>,
2374                               <0xd5010 0x4>;
2375                         reg-names = "rev", "sysc";
2376                         ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
2377                                          SYSC_OMAP4_SOFTRESET)>;
2378                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2379                                         <SYSC_IDLE_NO>,
2380                                         <SYSC_IDLE_SMART>,
2381                                         <SYSC_IDLE_SMART_WKUP>;
2382                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2383                                         <SYSC_IDLE_NO>,
2384                                         <SYSC_IDLE_SMART>,
2385                                         <SYSC_IDLE_SMART_WKUP>;
2386                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2387                         clocks = <&l4_per_clkctrl OMAP4_MMC5_CLKCTRL 0>;
2388                         clock-names = "fck";
2389                         #address-cells = <1>;
2390                         #size-cells = <1>;
2391                         ranges = <0x0 0xd5000 0x1000>;
2392
2393                         mmc5: mmc@0 {
2394                                 compatible = "ti,omap4-hsmmc";
2395                                 reg = <0x0 0x400>;
2396                                 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
2397                                 ti,needs-special-reset;
2398                                 dmas = <&sdma 59>, <&sdma 60>;
2399                                 dma-names = "tx", "rx";
2400                         };
2401                 };
2402         };
2403
2404         segment@200000 {                                        /* 0x48200000 */
2405                 compatible = "simple-bus";
2406                 #address-cells = <1>;
2407                 #size-cells = <1>;
2408                 ranges = <0x00150000 0x00350000 0x001000>,      /* ap 77 */
2409                          <0x00151000 0x00351000 0x001000>;      /* ap 78 */
2410
2411                 target-module@150000 {                  /* 0x48350000, ap 77 4c.0 */
2412                         compatible = "ti,sysc-omap2", "ti,sysc";
2413                         reg = <0x150000 0x8>,
2414                               <0x150010 0x8>,
2415                               <0x150090 0x8>;
2416                         reg-names = "rev", "sysc", "syss";
2417                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2418                                          SYSC_OMAP2_ENAWAKEUP |
2419                                          SYSC_OMAP2_SOFTRESET |
2420                                          SYSC_OMAP2_AUTOIDLE)>;
2421                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2422                                         <SYSC_IDLE_NO>,
2423                                         <SYSC_IDLE_SMART>,
2424                                         <SYSC_IDLE_SMART_WKUP>;
2425                         ti,syss-mask = <1>;
2426                         /* Domains (V, P, C): core, l4per_pwrdm, l4_per_clkdm */
2427                         clocks = <&l4_per_clkctrl OMAP4_I2C4_CLKCTRL 0>;
2428                         clock-names = "fck";
2429                         #address-cells = <1>;
2430                         #size-cells = <1>;
2431                         ranges = <0x0 0x150000 0x1000>;
2432
2433                         i2c4: i2c@0 {
2434                                 compatible = "ti,omap4-i2c";
2435                                 reg = <0x0 0x100>;
2436                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
2437                                 #address-cells = <1>;
2438                                 #size-cells = <0>;
2439                         };
2440                 };
2441         };
2442 };
2443