arch/arm/boot/dts/am4372.dtsi

   1 /*
   2  * Device Tree Source for AM4372 SoC
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 #include "skeleton.dtsi"
  15
  16 / {
  17         compatible = "ti,am4372", "ti,am43";
  18         interrupt-parent = <&gic>;
  19
  20
  21         aliases {
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 i2c2 = &i2c2;
  25                 serial0 = &uart0;
  26                 ethernet0 = &cpsw_emac0;
  27                 ethernet1 = &cpsw_emac1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33                 cpu@0 {
  34                         compatible = "arm,cortex-a9";
  35                         device_type = "cpu";
  36                         reg = <0>;
  37
  38                         clocks = <&dpll_mpu_ck>;
  39                         clock-names = "cpu";
  40
  41                         clock-latency = <300000>; /* From omap-cpufreq driver */
  42                 };
  43         };
  44
  45         gic: interrupt-controller@48241000 {
  46                 compatible = "arm,cortex-a9-gic";
  47                 interrupt-controller;
  48                 #interrupt-cells = <3>;
  49                 reg = <0x48241000 0x1000>,
  50                       <0x48240100 0x0100>;
  51         };
  52
  53         l2-cache-controller@48242000 {
  54                 compatible = "arm,pl310-cache";
  55                 reg = <0x48242000 0x1000>;
  56                 cache-unified;
  57                 cache-level = <2>;
  58         };
  59
  60         am43xx_pinmux: pinmux@44e10800 {
  61                 compatible = "pinctrl-single";
  62                 reg = <0x44e10800 0x31c>;
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65                 pinctrl-single,register-width = <32>;
  66                 pinctrl-single,function-mask = <0xffffffff>;
  67         };
  68
  69         ocp {
  70                 compatible = "simple-bus";
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 ranges;
  74                 ti,hwmods = "l3_main";
  75
  76                 prcm: prcm@44df0000 {
  77                         compatible = "ti,am4-prcm";
  78                         reg = <0x44df0000 0x11000>;
  79
  80                         prcm_clocks: clocks {
  81                                 #address-cells = <1>;
  82                                 #size-cells = <0>;
  83                         };
  84
  85                         prcm_clockdomains: clockdomains {
  86                         };
  87                 };
  88
  89                 scrm: scrm@44e10000 {
  90                         compatible = "ti,am4-scrm";
  91                         reg = <0x44e10000 0x2000>;
  92
  93                         scrm_clocks: clocks {
  94                                 #address-cells = <1>;
  95                                 #size-cells = <0>;
  96                         };
  97
  98                         scrm_clockdomains: clockdomains {
  99                         };
 100                 };
 101
 102                 edma: edma@49000000 {
 103                         compatible = "ti,edma3";
 104                         ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
 105                         reg =   <0x49000000 0x10000>,
 106                                 <0x44e10f90 0x10>;
 107                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 108                                         <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 109                                         <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 110                         #dma-cells = <1>;
 111                 };
 112
 113                 uart0: serial@44e09000 {
 114                         compatible = "ti,am4372-uart","ti,omap2-uart";
 115                         reg = <0x44e09000 0x2000>;
 116                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 117                         ti,hwmods = "uart1";
 118                 };
 119
 120                 uart1: serial@48022000 {
 121                         compatible = "ti,am4372-uart","ti,omap2-uart";
 122                         reg = <0x48022000 0x2000>;
 123                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 124                         ti,hwmods = "uart2";
 125                         status = "disabled";
 126                 };
 127
 128                 uart2: serial@48024000 {
 129                         compatible = "ti,am4372-uart","ti,omap2-uart";
 130                         reg = <0x48024000 0x2000>;
 131                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 132                         ti,hwmods = "uart3";
 133                         status = "disabled";
 134                 };
 135
 136                 uart3: serial@481a6000 {
 137                         compatible = "ti,am4372-uart","ti,omap2-uart";
 138                         reg = <0x481a6000 0x2000>;
 139                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 140                         ti,hwmods = "uart4";
 141                         status = "disabled";
 142                 };
 143
 144                 uart4: serial@481a8000 {
 145                         compatible = "ti,am4372-uart","ti,omap2-uart";
 146                         reg = <0x481a8000 0x2000>;
 147                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 148                         ti,hwmods = "uart5";
 149                         status = "disabled";
 150                 };
 151
 152                 uart5: serial@481aa000 {
 153                         compatible = "ti,am4372-uart","ti,omap2-uart";
 154                         reg = <0x481aa000 0x2000>;
 155                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 156                         ti,hwmods = "uart6";
 157                         status = "disabled";
 158                 };
 159
 160                 mailbox: mailbox@480C8000 {
 161                         compatible = "ti,omap4-mailbox";
 162                         reg = <0x480C8000 0x200>;
 163                         interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 164                         ti,hwmods = "mailbox";
 165                         ti,mbox-num-users = <4>;
 166                         ti,mbox-num-fifos = <8>;
 167                         ti,mbox-names = "wkup_m3";
 168                         ti,mbox-data = <0 0 0 0>;
 169                         status = "disabled";
 170                 };
 171
 172                 timer1: timer@44e31000 {
 173                         compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
 174                         reg = <0x44e31000 0x400>;
 175                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 176                         ti,timer-alwon;
 177                         ti,hwmods = "timer1";
 178                 };
 179
 180                 timer2: timer@48040000  {
 181                         compatible = "ti,am4372-timer","ti,am335x-timer";
 182                         reg = <0x48040000  0x400>;
 183                         interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 184                         ti,hwmods = "timer2";
 185                 };
 186
 187                 timer3: timer@48042000 {
 188                         compatible = "ti,am4372-timer","ti,am335x-timer";
 189                         reg = <0x48042000 0x400>;
 190                         interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 191                         ti,hwmods = "timer3";
 192                         status = "disabled";
 193                 };
 194
 195                 timer4: timer@48044000 {
 196                         compatible = "ti,am4372-timer","ti,am335x-timer";
 197                         reg = <0x48044000 0x400>;
 198                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 199                         ti,timer-pwm;
 200                         ti,hwmods = "timer4";
 201                         status = "disabled";
 202                 };
 203
 204                 timer5: timer@48046000 {
 205                         compatible = "ti,am4372-timer","ti,am335x-timer";
 206                         reg = <0x48046000 0x400>;
 207                         interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 208                         ti,timer-pwm;
 209                         ti,hwmods = "timer5";
 210                         status = "disabled";
 211                 };
 212
 213                 timer6: timer@48048000 {
 214                         compatible = "ti,am4372-timer","ti,am335x-timer";
 215                         reg = <0x48048000 0x400>;
 216                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 217                         ti,timer-pwm;
 218                         ti,hwmods = "timer6";
 219                         status = "disabled";
 220                 };
 221
 222                 timer7: timer@4804a000 {
 223                         compatible = "ti,am4372-timer","ti,am335x-timer";
 224                         reg = <0x4804a000 0x400>;
 225                         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
 226                         ti,timer-pwm;
 227                         ti,hwmods = "timer7";
 228                         status = "disabled";
 229                 };
 230
 231                 timer8: timer@481c1000 {
 232                         compatible = "ti,am4372-timer","ti,am335x-timer";
 233                         reg = <0x481c1000 0x400>;
 234                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
 235                         ti,hwmods = "timer8";
 236                         status = "disabled";
 237                 };
 238
 239                 timer9: timer@4833d000 {
 240                         compatible = "ti,am4372-timer","ti,am335x-timer";
 241                         reg = <0x4833d000 0x400>;
 242                         interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
 243                         ti,hwmods = "timer9";
 244                         status = "disabled";
 245                 };
 246
 247                 timer10: timer@4833f000 {
 248                         compatible = "ti,am4372-timer","ti,am335x-timer";
 249                         reg = <0x4833f000 0x400>;
 250                         interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 251                         ti,hwmods = "timer10";
 252                         status = "disabled";
 253                 };
 254
 255                 timer11: timer@48341000 {
 256                         compatible = "ti,am4372-timer","ti,am335x-timer";
 257                         reg = <0x48341000 0x400>;
 258                         interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
 259                         ti,hwmods = "timer11";
 260                         status = "disabled";
 261                 };
 262
 263                 counter32k: counter@44e86000 {
 264                         compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 265                         reg = <0x44e86000 0x40>;
 266                         ti,hwmods = "counter_32k";
 267                 };
 268
 269                 rtc@44e3e000 {
 270                         compatible = "ti,am4372-rtc","ti,da830-rtc";
 271                         reg = <0x44e3e000 0x1000>;
 272                         interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
 273                                       GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 274                         ti,hwmods = "rtc";
 275                         status = "disabled";
 276                 };
 277
 278                 wdt@44e35000 {
 279                         compatible = "ti,am4372-wdt","ti,omap3-wdt";
 280                         reg = <0x44e35000 0x1000>;
 281                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 282                         ti,hwmods = "wd_timer2";
 283                 };
 284
 285                 gpio0: gpio@44e07000 {
 286                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 287                         reg = <0x44e07000 0x1000>;
 288                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 289                         gpio-controller;
 290                         #gpio-cells = <2>;
 291                         interrupt-controller;
 292                         #interrupt-cells = <2>;
 293                         ti,hwmods = "gpio1";
 294                         status = "disabled";
 295                 };
 296
 297                 gpio1: gpio@4804c000 {
 298                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 299                         reg = <0x4804c000 0x1000>;
 300                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 301                         gpio-controller;
 302                         #gpio-cells = <2>;
 303                         interrupt-controller;
 304                         #interrupt-cells = <2>;
 305                         ti,hwmods = "gpio2";
 306                         status = "disabled";
 307                 };
 308
 309                 gpio2: gpio@481ac000 {
 310                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 311                         reg = <0x481ac000 0x1000>;
 312                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 313                         gpio-controller;
 314                         #gpio-cells = <2>;
 315                         interrupt-controller;
 316                         #interrupt-cells = <2>;
 317                         ti,hwmods = "gpio3";
 318                         status = "disabled";
 319                 };
 320
 321                 gpio3: gpio@481ae000 {
 322                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 323                         reg = <0x481ae000 0x1000>;
 324                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 325                         gpio-controller;
 326                         #gpio-cells = <2>;
 327                         interrupt-controller;
 328                         #interrupt-cells = <2>;
 329                         ti,hwmods = "gpio4";
 330                         status = "disabled";
 331                 };
 332
 333                 gpio4: gpio@48320000 {
 334                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 335                         reg = <0x48320000 0x1000>;
 336                         interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
 337                         gpio-controller;
 338                         #gpio-cells = <2>;
 339                         interrupt-controller;
 340                         #interrupt-cells = <2>;
 341                         ti,hwmods = "gpio5";
 342                         status = "disabled";
 343                 };
 344
 345                 gpio5: gpio@48322000 {
 346                         compatible = "ti,am4372-gpio","ti,omap4-gpio";
 347                         reg = <0x48322000 0x1000>;
 348                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 349                         gpio-controller;
 350                         #gpio-cells = <2>;
 351                         interrupt-controller;
 352                         #interrupt-cells = <2>;
 353                         ti,hwmods = "gpio6";
 354                         status = "disabled";
 355                 };
 356
 357                 hwspinlock: spinlock@480ca000 {
 358                         compatible = "ti,omap4-hwspinlock";
 359                         reg = <0x480ca000 0x1000>;
 360                         ti,hwmods = "spinlock";
 361                         #hwlock-cells = <1>;
 362                 };
 363
 364                 i2c0: i2c@44e0b000 {
 365                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 366                         reg = <0x44e0b000 0x1000>;
 367                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 368                         ti,hwmods = "i2c1";
 369                         #address-cells = <1>;
 370                         #size-cells = <0>;
 371                         status = "disabled";
 372                 };
 373
 374                 i2c1: i2c@4802a000 {
 375                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 376                         reg = <0x4802a000 0x1000>;
 377                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 378                         ti,hwmods = "i2c2";
 379                         #address-cells = <1>;
 380                         #size-cells = <0>;
 381                         status = "disabled";
 382                 };
 383
 384                 i2c2: i2c@4819c000 {
 385                         compatible = "ti,am4372-i2c","ti,omap4-i2c";
 386                         reg = <0x4819c000 0x1000>;
 387                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 388                         ti,hwmods = "i2c3";
 389                         #address-cells = <1>;
 390                         #size-cells = <0>;
 391                         status = "disabled";
 392                 };
 393
 394                 spi0: spi@48030000 {
 395                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 396                         reg = <0x48030000 0x400>;
 397                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 398                         ti,hwmods = "spi0";
 399                         #address-cells = <1>;
 400                         #size-cells = <0>;
 401                         status = "disabled";
 402                 };
 403
 404                 mmc1: mmc@48060000 {
 405                         compatible = "ti,omap4-hsmmc";
 406                         reg = <0x48060000 0x1000>;
 407                         ti,hwmods = "mmc1";
 408                         ti,dual-volt;
 409                         ti,needs-special-reset;
 410                         dmas = <&edma 24
 411                                 &edma 25>;
 412                         dma-names = "tx", "rx";
 413                         interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
 414                         status = "disabled";
 415                 };
 416
 417                 mmc2: mmc@481d8000 {
 418                         compatible = "ti,omap4-hsmmc";
 419                         reg = <0x481d8000 0x1000>;
 420                         ti,hwmods = "mmc2";
 421                         ti,needs-special-reset;
 422                         dmas = <&edma 2
 423                                 &edma 3>;
 424                         dma-names = "tx", "rx";
 425                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 426                         status = "disabled";
 427                 };
 428
 429                 mmc3: mmc@47810000 {
 430                         compatible = "ti,omap4-hsmmc";
 431                         reg = <0x47810000 0x1000>;
 432                         ti,hwmods = "mmc3";
 433                         ti,needs-special-reset;
 434                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 435                         status = "disabled";
 436                 };
 437
 438                 spi1: spi@481a0000 {
 439                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 440                         reg = <0x481a0000 0x400>;
 441                         interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 442                         ti,hwmods = "spi1";
 443                         #address-cells = <1>;
 444                         #size-cells = <0>;
 445                         status = "disabled";
 446                 };
 447
 448                 spi2: spi@481a2000 {
 449                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 450                         reg = <0x481a2000 0x400>;
 451                         interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 452                         ti,hwmods = "spi2";
 453                         #address-cells = <1>;
 454                         #size-cells = <0>;
 455                         status = "disabled";
 456                 };
 457
 458                 spi3: spi@481a4000 {
 459                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 460                         reg = <0x481a4000 0x400>;
 461                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 462                         ti,hwmods = "spi3";
 463                         #address-cells = <1>;
 464                         #size-cells = <0>;
 465                         status = "disabled";
 466                 };
 467
 468                 spi4: spi@48345000 {
 469                         compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
 470                         reg = <0x48345000 0x400>;
 471                         interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
 472                         ti,hwmods = "spi4";
 473                         #address-cells = <1>;
 474                         #size-cells = <0>;
 475                         status = "disabled";
 476                 };
 477
 478                 mac: ethernet@4a100000 {
 479                         compatible = "ti,am4372-cpsw","ti,cpsw";
 480                         reg = <0x4a100000 0x800
 481                                0x4a101200 0x100>;
 482                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
 483                                       GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
 484                                       GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
 485                                       GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 486                         #address-cells = <1>;
 487                         #size-cells = <1>;
 488                         ti,hwmods = "cpgmac0";
 489                         status = "disabled";
 490                         cpdma_channels = <8>;
 491                         ale_entries = <1024>;
 492                         bd_ram_size = <0x2000>;
 493                         no_bd_ram = <0>;
 494                         rx_descs = <64>;
 495                         mac_control = <0x20>;
 496                         slaves = <2>;
 497                         active_slave = <0>;
 498                         cpts_clock_mult = <0x80000000>;
 499                         cpts_clock_shift = <29>;
 500                         ranges;
 501
 502                         davinci_mdio: mdio@4a101000 {
 503                                 compatible = "ti,am4372-mdio","ti,davinci_mdio";
 504                                 reg = <0x4a101000 0x100>;
 505                                 #address-cells = <1>;
 506                                 #size-cells = <0>;
 507                                 ti,hwmods = "davinci_mdio";
 508                                 bus_freq = <1000000>;
 509                                 status = "disabled";
 510                         };
 511
 512                         cpsw_emac0: slave@4a100200 {
 513                                 /* Filled in by U-Boot */
 514                                 mac-address = [ 00 00 00 00 00 00 ];
 515                         };
 516
 517                         cpsw_emac1: slave@4a100300 {
 518                                 /* Filled in by U-Boot */
 519                                 mac-address = [ 00 00 00 00 00 00 ];
 520                         };
 521                 };
 522
 523                 epwmss0: epwmss@48300000 {
 524                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 525                         reg = <0x48300000 0x10>;
 526                         #address-cells = <1>;
 527                         #size-cells = <1>;
 528                         ranges;
 529                         ti,hwmods = "epwmss0";
 530                         status = "disabled";
 531
 532                         ecap0: ecap@48300100 {
 533                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 534                                 #pwm-cells = <3>;
 535                                 reg = <0x48300100 0x80>;
 536                                 ti,hwmods = "ecap0";
 537                                 status = "disabled";
 538                         };
 539
 540                         ehrpwm0: ehrpwm@48300200 {
 541                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 542                                 #pwm-cells = <3>;
 543                                 reg = <0x48300200 0x80>;
 544                                 ti,hwmods = "ehrpwm0";
 545                                 status = "disabled";
 546                         };
 547                 };
 548
 549                 epwmss1: epwmss@48302000 {
 550                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 551                         reg = <0x48302000 0x10>;
 552                         #address-cells = <1>;
 553                         #size-cells = <1>;
 554                         ranges;
 555                         ti,hwmods = "epwmss1";
 556                         status = "disabled";
 557
 558                         ecap1: ecap@48302100 {
 559                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 560                                 #pwm-cells = <3>;
 561                                 reg = <0x48302100 0x80>;
 562                                 ti,hwmods = "ecap1";
 563                                 status = "disabled";
 564                         };
 565
 566                         ehrpwm1: ehrpwm@48302200 {
 567                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 568                                 #pwm-cells = <3>;
 569                                 reg = <0x48302200 0x80>;
 570                                 ti,hwmods = "ehrpwm1";
 571                                 status = "disabled";
 572                         };
 573                 };
 574
 575                 epwmss2: epwmss@48304000 {
 576                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 577                         reg = <0x48304000 0x10>;
 578                         #address-cells = <1>;
 579                         #size-cells = <1>;
 580                         ranges;
 581                         ti,hwmods = "epwmss2";
 582                         status = "disabled";
 583
 584                         ecap2: ecap@48304100 {
 585                                 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
 586                                 #pwm-cells = <3>;
 587                                 reg = <0x48304100 0x80>;
 588                                 ti,hwmods = "ecap2";
 589                                 status = "disabled";
 590                         };
 591
 592                         ehrpwm2: ehrpwm@48304200 {
 593                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 594                                 #pwm-cells = <3>;
 595                                 reg = <0x48304200 0x80>;
 596                                 ti,hwmods = "ehrpwm2";
 597                                 status = "disabled";
 598                         };
 599                 };
 600
 601                 epwmss3: epwmss@48306000 {
 602                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 603                         reg = <0x48306000 0x10>;
 604                         #address-cells = <1>;
 605                         #size-cells = <1>;
 606                         ranges;
 607                         ti,hwmods = "epwmss3";
 608                         status = "disabled";
 609
 610                         ehrpwm3: ehrpwm@48306200 {
 611                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 612                                 #pwm-cells = <3>;
 613                                 reg = <0x48306200 0x80>;
 614                                 ti,hwmods = "ehrpwm3";
 615                                 status = "disabled";
 616                         };
 617                 };
 618
 619                 epwmss4: epwmss@48308000 {
 620                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 621                         reg = <0x48308000 0x10>;
 622                         #address-cells = <1>;
 623                         #size-cells = <1>;
 624                         ranges;
 625                         ti,hwmods = "epwmss4";
 626                         status = "disabled";
 627
 628                         ehrpwm4: ehrpwm@48308200 {
 629                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 630                                 #pwm-cells = <3>;
 631                                 reg = <0x48308200 0x80>;
 632                                 ti,hwmods = "ehrpwm4";
 633                                 status = "disabled";
 634                         };
 635                 };
 636
 637                 epwmss5: epwmss@4830a000 {
 638                         compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
 639                         reg = <0x4830a000 0x10>;
 640                         #address-cells = <1>;
 641                         #size-cells = <1>;
 642                         ranges;
 643                         ti,hwmods = "epwmss5";
 644                         status = "disabled";
 645
 646                         ehrpwm5: ehrpwm@4830a200 {
 647                                 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
 648                                 #pwm-cells = <3>;
 649                                 reg = <0x4830a200 0x80>;
 650                                 ti,hwmods = "ehrpwm5";
 651                                 status = "disabled";
 652                         };
 653                 };
 654
 655                 sham: sham@53100000 {
 656                         compatible = "ti,omap5-sham";
 657                         ti,hwmods = "sham";
 658                         reg = <0x53100000 0x300>;
 659                         dmas = <&edma 36>;
 660                         dma-names = "rx";
 661                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 662                 };
 663
 664                 aes: aes@53501000 {
 665                         compatible = "ti,omap4-aes";
 666                         ti,hwmods = "aes";
 667                         reg = <0x53501000 0xa0>;
 668                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 669                         dmas = <&edma 6
 670                                 &edma 5>;
 671                         dma-names = "tx", "rx";
 672                 };
 673
 674                 des: des@53701000 {
 675                         compatible = "ti,omap4-des";
 676                         ti,hwmods = "des";
 677                         reg = <0x53701000 0xa0>;
 678                         interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 679                         dmas = <&edma 34
 680                                 &edma 33>;
 681                         dma-names = "tx", "rx";
 682                 };
 683
 684                 mcasp0: mcasp@48038000 {
 685                         compatible = "ti,am33xx-mcasp-audio";
 686                         ti,hwmods = "mcasp0";
 687                         reg = <0x48038000 0x2000>,
 688                               <0x46000000 0x400000>;
 689                         reg-names = "mpu", "dat";
 690                         interrupts = <80>, <81>;
 691                         interrupt-names = "tx", "rx";
 692                         status = "disabled";
 693                         dmas = <&edma 8>,
 694                                <&edma 9>;
 695                         dma-names = "tx", "rx";
 696                 };
 697
 698                 mcasp1: mcasp@4803C000 {
 699                         compatible = "ti,am33xx-mcasp-audio";
 700                         ti,hwmods = "mcasp1";
 701                         reg = <0x4803C000 0x2000>,
 702                               <0x46400000 0x400000>;
 703                         reg-names = "mpu", "dat";
 704                         interrupts = <82>, <83>;
 705                         interrupt-names = "tx", "rx";
 706                         status = "disabled";
 707                         dmas = <&edma 10>,
 708                                <&edma 11>;
 709                         dma-names = "tx", "rx";
 710                 };
 711
 712                 elm: elm@48080000 {
 713                         compatible = "ti,am3352-elm";
 714                         reg = <0x48080000 0x2000>;
 715                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 716                         ti,hwmods = "elm";
 717                         clocks = <&l4ls_gclk>;
 718                         clock-names = "fck";
 719                         status = "disabled";
 720                 };
 721
 722                 gpmc: gpmc@50000000 {
 723                         compatible = "ti,am3352-gpmc";
 724                         ti,hwmods = "gpmc";
 725                         clocks = <&l3s_gclk>;
 726                         clock-names = "fck";
 727                         reg = <0x50000000 0x2000>;
 728                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 729                         gpmc,num-cs = <7>;
 730                         gpmc,num-waitpins = <2>;
 731                         #address-cells = <2>;
 732                         #size-cells = <1>;
 733                         status = "disabled";
 734                 };
 735         };
 736 };
 737
 738 /include/ "am43xx-clocks.dtsi"