2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
15 compatible = "ti,am33xx";
16 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
94 compatible = "simple-bus";
98 ti,hwmods = "l3_main";
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
119 prcm_clocks: clocks {
120 #address-cells = <1>;
124 prcm_clockdomains: clockdomains {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
133 #pinctrl-cells = <1>;
134 ranges = <0 0x210000 0x2000>;
136 am33xx_pinmux: pinmux@800 {
137 compatible = "pinctrl-single";
139 #address-cells = <1>;
141 #pinctrl-cells = <1>;
142 pinctrl-single,register-width = <32>;
143 pinctrl-single,function-mask = <0x7f>;
146 scm_conf: scm_conf@0 {
147 compatible = "syscon";
149 #address-cells = <1>;
153 #address-cells = <1>;
158 wkup_m3_ipc: wkup_m3_ipc@1324 {
159 compatible = "ti,am3352-wkup-m3-ipc";
162 ti,rproc = <&wkup_m3>;
163 mboxes = <&mailbox &mbox_wkupm3>;
166 edma_xbar: dma-router@f90 {
167 compatible = "ti,am335x-edma-crossbar";
171 dma-masters = <&edma>;
174 scm_clockdomains: clockdomains {
179 intc: interrupt-controller@48200000 {
180 compatible = "ti,am33xx-intc";
181 interrupt-controller;
182 #interrupt-cells = <1>;
183 reg = <0x48200000 0x1000>;
186 edma: edma@49000000 {
187 compatible = "ti,edma3-tpcc";
189 reg = <0x49000000 0x10000>;
190 reg-names = "edma3_cc";
191 interrupts = <12 13 14>;
192 interrupt-names = "edma3_ccint", "edma3_mperr",
197 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
200 ti,edma-memcpy-channels = <20 21>;
203 edma_tptc0: tptc@49800000 {
204 compatible = "ti,edma3-tptc";
206 reg = <0x49800000 0x100000>;
208 interrupt-names = "edma3_tcerrint";
211 edma_tptc1: tptc@49900000 {
212 compatible = "ti,edma3-tptc";
214 reg = <0x49900000 0x100000>;
216 interrupt-names = "edma3_tcerrint";
219 edma_tptc2: tptc@49a00000 {
220 compatible = "ti,edma3-tptc";
222 reg = <0x49a00000 0x100000>;
224 interrupt-names = "edma3_tcerrint";
227 gpio0: gpio@44e07000 {
228 compatible = "ti,omap4-gpio";
232 interrupt-controller;
233 #interrupt-cells = <2>;
234 reg = <0x44e07000 0x1000>;
238 gpio1: gpio@4804c000 {
239 compatible = "ti,omap4-gpio";
243 interrupt-controller;
244 #interrupt-cells = <2>;
245 reg = <0x4804c000 0x1000>;
249 gpio2: gpio@481ac000 {
250 compatible = "ti,omap4-gpio";
254 interrupt-controller;
255 #interrupt-cells = <2>;
256 reg = <0x481ac000 0x1000>;
260 gpio3: gpio@481ae000 {
261 compatible = "ti,omap4-gpio";
265 interrupt-controller;
266 #interrupt-cells = <2>;
267 reg = <0x481ae000 0x1000>;
271 uart0: serial@44e09000 {
272 compatible = "ti,am3352-uart", "ti,omap3-uart";
274 clock-frequency = <48000000>;
275 reg = <0x44e09000 0x2000>;
278 dmas = <&edma 26 0>, <&edma 27 0>;
279 dma-names = "tx", "rx";
282 uart1: serial@48022000 {
283 compatible = "ti,am3352-uart", "ti,omap3-uart";
285 clock-frequency = <48000000>;
286 reg = <0x48022000 0x2000>;
289 dmas = <&edma 28 0>, <&edma 29 0>;
290 dma-names = "tx", "rx";
293 uart2: serial@48024000 {
294 compatible = "ti,am3352-uart", "ti,omap3-uart";
296 clock-frequency = <48000000>;
297 reg = <0x48024000 0x2000>;
300 dmas = <&edma 30 0>, <&edma 31 0>;
301 dma-names = "tx", "rx";
304 uart3: serial@481a6000 {
305 compatible = "ti,am3352-uart", "ti,omap3-uart";
307 clock-frequency = <48000000>;
308 reg = <0x481a6000 0x2000>;
313 uart4: serial@481a8000 {
314 compatible = "ti,am3352-uart", "ti,omap3-uart";
316 clock-frequency = <48000000>;
317 reg = <0x481a8000 0x2000>;
322 uart5: serial@481aa000 {
323 compatible = "ti,am3352-uart", "ti,omap3-uart";
325 clock-frequency = <48000000>;
326 reg = <0x481aa000 0x2000>;
332 compatible = "ti,omap4-i2c";
333 #address-cells = <1>;
336 reg = <0x44e0b000 0x1000>;
342 compatible = "ti,omap4-i2c";
343 #address-cells = <1>;
346 reg = <0x4802a000 0x1000>;
352 compatible = "ti,omap4-i2c";
353 #address-cells = <1>;
356 reg = <0x4819c000 0x1000>;
362 compatible = "ti,omap4-hsmmc";
365 ti,needs-special-reset;
366 ti,needs-special-hs-handling;
367 dmas = <&edma_xbar 24 0 0
369 dma-names = "tx", "rx";
371 interrupt-parent = <&intc>;
372 reg = <0x48060000 0x1000>;
377 compatible = "ti,omap4-hsmmc";
379 ti,needs-special-reset;
382 dma-names = "tx", "rx";
384 interrupt-parent = <&intc>;
385 reg = <0x481d8000 0x1000>;
390 compatible = "ti,omap4-hsmmc";
392 ti,needs-special-reset;
394 interrupt-parent = <&intc>;
395 reg = <0x47810000 0x1000>;
399 hwspinlock: spinlock@480ca000 {
400 compatible = "ti,omap4-hwspinlock";
401 reg = <0x480ca000 0x1000>;
402 ti,hwmods = "spinlock";
407 compatible = "ti,omap3-wdt";
408 ti,hwmods = "wd_timer2";
409 reg = <0x44e35000 0x1000>;
413 dcan0: can@481cc000 {
414 compatible = "ti,am3352-d_can";
415 ti,hwmods = "d_can0";
416 reg = <0x481cc000 0x2000>;
417 clocks = <&dcan0_fck>;
419 syscon-raminit = <&scm_conf 0x644 0>;
424 dcan1: can@481d0000 {
425 compatible = "ti,am3352-d_can";
426 ti,hwmods = "d_can1";
427 reg = <0x481d0000 0x2000>;
428 clocks = <&dcan1_fck>;
430 syscon-raminit = <&scm_conf 0x644 1>;
435 mailbox: mailbox@480C8000 {
436 compatible = "ti,omap4-mailbox";
437 reg = <0x480C8000 0x200>;
439 ti,hwmods = "mailbox";
441 ti,mbox-num-users = <4>;
442 ti,mbox-num-fifos = <8>;
443 mbox_wkupm3: wkup_m3 {
445 ti,mbox-tx = <0 0 0>;
446 ti,mbox-rx = <0 0 3>;
450 timer1: timer@44e31000 {
451 compatible = "ti,am335x-timer-1ms";
452 reg = <0x44e31000 0x400>;
454 ti,hwmods = "timer1";
458 timer2: timer@48040000 {
459 compatible = "ti,am335x-timer";
460 reg = <0x48040000 0x400>;
462 ti,hwmods = "timer2";
465 timer3: timer@48042000 {
466 compatible = "ti,am335x-timer";
467 reg = <0x48042000 0x400>;
469 ti,hwmods = "timer3";
472 timer4: timer@48044000 {
473 compatible = "ti,am335x-timer";
474 reg = <0x48044000 0x400>;
476 ti,hwmods = "timer4";
480 timer5: timer@48046000 {
481 compatible = "ti,am335x-timer";
482 reg = <0x48046000 0x400>;
484 ti,hwmods = "timer5";
488 timer6: timer@48048000 {
489 compatible = "ti,am335x-timer";
490 reg = <0x48048000 0x400>;
492 ti,hwmods = "timer6";
496 timer7: timer@4804a000 {
497 compatible = "ti,am335x-timer";
498 reg = <0x4804a000 0x400>;
500 ti,hwmods = "timer7";
505 compatible = "ti,am3352-rtc", "ti,da830-rtc";
506 reg = <0x44e3e000 0x1000>;
510 clocks = <&clkdiv32k_ick>;
511 clock-names = "int-clk";
515 compatible = "ti,omap4-mcspi";
516 #address-cells = <1>;
518 reg = <0x48030000 0x400>;
526 dma-names = "tx0", "rx0", "tx1", "rx1";
531 compatible = "ti,omap4-mcspi";
532 #address-cells = <1>;
534 reg = <0x481a0000 0x400>;
542 dma-names = "tx0", "rx0", "tx1", "rx1";
547 compatible = "ti,am33xx-usb";
548 reg = <0x47400000 0x1000>;
550 #address-cells = <1>;
552 ti,hwmods = "usb_otg_hs";
555 usb_ctrl_mod: control@44e10620 {
556 compatible = "ti,am335x-usb-ctrl-module";
557 reg = <0x44e10620 0x10
559 reg-names = "phy_ctrl", "wakeup";
563 usb0_phy: usb-phy@47401300 {
564 compatible = "ti,am335x-usb-phy";
565 reg = <0x47401300 0x100>;
568 ti,ctrl_mod = <&usb_ctrl_mod>;
572 compatible = "ti,musb-am33xx";
574 reg = <0x47401400 0x400
576 reg-names = "mc", "control";
579 interrupt-names = "mc";
581 mentor,multipoint = <1>;
582 mentor,num-eps = <16>;
583 mentor,ram-bits = <12>;
584 mentor,power = <500>;
587 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
588 &cppi41dma 2 0 &cppi41dma 3 0
589 &cppi41dma 4 0 &cppi41dma 5 0
590 &cppi41dma 6 0 &cppi41dma 7 0
591 &cppi41dma 8 0 &cppi41dma 9 0
592 &cppi41dma 10 0 &cppi41dma 11 0
593 &cppi41dma 12 0 &cppi41dma 13 0
594 &cppi41dma 14 0 &cppi41dma 0 1
595 &cppi41dma 1 1 &cppi41dma 2 1
596 &cppi41dma 3 1 &cppi41dma 4 1
597 &cppi41dma 5 1 &cppi41dma 6 1
598 &cppi41dma 7 1 &cppi41dma 8 1
599 &cppi41dma 9 1 &cppi41dma 10 1
600 &cppi41dma 11 1 &cppi41dma 12 1
601 &cppi41dma 13 1 &cppi41dma 14 1>;
603 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
604 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
606 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
607 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
611 usb1_phy: usb-phy@47401b00 {
612 compatible = "ti,am335x-usb-phy";
613 reg = <0x47401b00 0x100>;
616 ti,ctrl_mod = <&usb_ctrl_mod>;
620 compatible = "ti,musb-am33xx";
622 reg = <0x47401c00 0x400
624 reg-names = "mc", "control";
626 interrupt-names = "mc";
628 mentor,multipoint = <1>;
629 mentor,num-eps = <16>;
630 mentor,ram-bits = <12>;
631 mentor,power = <500>;
634 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
635 &cppi41dma 17 0 &cppi41dma 18 0
636 &cppi41dma 19 0 &cppi41dma 20 0
637 &cppi41dma 21 0 &cppi41dma 22 0
638 &cppi41dma 23 0 &cppi41dma 24 0
639 &cppi41dma 25 0 &cppi41dma 26 0
640 &cppi41dma 27 0 &cppi41dma 28 0
641 &cppi41dma 29 0 &cppi41dma 15 1
642 &cppi41dma 16 1 &cppi41dma 17 1
643 &cppi41dma 18 1 &cppi41dma 19 1
644 &cppi41dma 20 1 &cppi41dma 21 1
645 &cppi41dma 22 1 &cppi41dma 23 1
646 &cppi41dma 24 1 &cppi41dma 25 1
647 &cppi41dma 26 1 &cppi41dma 27 1
648 &cppi41dma 28 1 &cppi41dma 29 1>;
650 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
651 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
653 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
654 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
658 cppi41dma: dma-controller@47402000 {
659 compatible = "ti,am3359-cppi41";
660 reg = <0x47400000 0x1000
664 reg-names = "glue", "controller", "scheduler", "queuemgr";
666 interrupt-names = "glue";
668 #dma-channels = <30>;
669 #dma-requests = <256>;
674 epwmss0: epwmss@48300000 {
675 compatible = "ti,am33xx-pwmss";
676 reg = <0x48300000 0x10>;
677 ti,hwmods = "epwmss0";
678 #address-cells = <1>;
681 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
682 0x48300180 0x48300180 0x80 /* EQEP */
683 0x48300200 0x48300200 0x80>; /* EHRPWM */
685 ecap0: ecap@48300100 {
686 compatible = "ti,am3352-ecap",
689 reg = <0x48300100 0x80>;
690 clocks = <&l4ls_gclk>;
693 interrupt-names = "ecap0";
697 ehrpwm0: pwm@48300200 {
698 compatible = "ti,am3352-ehrpwm",
701 reg = <0x48300200 0x80>;
702 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
703 clock-names = "tbclk", "fck";
708 epwmss1: epwmss@48302000 {
709 compatible = "ti,am33xx-pwmss";
710 reg = <0x48302000 0x10>;
711 ti,hwmods = "epwmss1";
712 #address-cells = <1>;
715 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
716 0x48302180 0x48302180 0x80 /* EQEP */
717 0x48302200 0x48302200 0x80>; /* EHRPWM */
719 ecap1: ecap@48302100 {
720 compatible = "ti,am3352-ecap",
723 reg = <0x48302100 0x80>;
724 clocks = <&l4ls_gclk>;
727 interrupt-names = "ecap1";
731 ehrpwm1: pwm@48302200 {
732 compatible = "ti,am3352-ehrpwm",
735 reg = <0x48302200 0x80>;
736 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
737 clock-names = "tbclk", "fck";
742 epwmss2: epwmss@48304000 {
743 compatible = "ti,am33xx-pwmss";
744 reg = <0x48304000 0x10>;
745 ti,hwmods = "epwmss2";
746 #address-cells = <1>;
749 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
750 0x48304180 0x48304180 0x80 /* EQEP */
751 0x48304200 0x48304200 0x80>; /* EHRPWM */
753 ecap2: ecap@48304100 {
754 compatible = "ti,am3352-ecap",
757 reg = <0x48304100 0x80>;
758 clocks = <&l4ls_gclk>;
761 interrupt-names = "ecap2";
765 ehrpwm2: pwm@48304200 {
766 compatible = "ti,am3352-ehrpwm",
769 reg = <0x48304200 0x80>;
770 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
771 clock-names = "tbclk", "fck";
776 mac: ethernet@4a100000 {
777 compatible = "ti,am335x-cpsw","ti,cpsw";
778 ti,hwmods = "cpgmac0";
779 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
780 clock-names = "fck", "cpts";
781 cpdma_channels = <8>;
782 ale_entries = <1024>;
783 bd_ram_size = <0x2000>;
785 mac_control = <0x20>;
788 cpts_clock_mult = <0x80000000>;
789 cpts_clock_shift = <29>;
790 reg = <0x4a100000 0x800
792 #address-cells = <1>;
794 interrupt-parent = <&intc>;
801 interrupts = <40 41 42 43>;
803 syscon = <&scm_conf>;
806 davinci_mdio: mdio@4a101000 {
807 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
808 #address-cells = <1>;
810 ti,hwmods = "davinci_mdio";
811 bus_freq = <1000000>;
812 reg = <0x4a101000 0x100>;
816 cpsw_emac0: slave@4a100200 {
817 /* Filled in by U-Boot */
818 mac-address = [ 00 00 00 00 00 00 ];
821 cpsw_emac1: slave@4a100300 {
822 /* Filled in by U-Boot */
823 mac-address = [ 00 00 00 00 00 00 ];
826 phy_sel: cpsw-phy-sel@44e10650 {
827 compatible = "ti,am3352-cpsw-phy-sel";
828 reg= <0x44e10650 0x4>;
829 reg-names = "gmii-sel";
833 ocmcram: ocmcram@40300000 {
834 compatible = "mmio-sram";
835 reg = <0x40300000 0x10000>; /* 64k */
839 compatible = "ti,am3352-elm";
840 reg = <0x48080000 0x2000>;
846 lcdc: lcdc@4830e000 {
847 compatible = "ti,am33xx-tilcdc";
848 reg = <0x4830e000 0x1000>;
849 interrupt-parent = <&intc>;
855 tscadc: tscadc@44e0d000 {
856 compatible = "ti,am3359-tscadc";
857 reg = <0x44e0d000 0x1000>;
858 interrupt-parent = <&intc>;
860 ti,hwmods = "adc_tsc";
862 dmas = <&edma 53 0>, <&edma 57 0>;
863 dma-names = "fifo0", "fifo1";
866 compatible = "ti,am3359-tsc";
869 #io-channel-cells = <1>;
870 compatible = "ti,am3359-adc";
874 gpmc: gpmc@50000000 {
875 compatible = "ti,am3352-gpmc";
878 reg = <0x50000000 0x2000>;
883 gpmc,num-waitpins = <2>;
884 #address-cells = <2>;
886 interrupt-controller;
887 #interrupt-cells = <2>;
893 sham: sham@53100000 {
894 compatible = "ti,omap4-sham";
896 reg = <0x53100000 0x200>;
903 compatible = "ti,omap4-aes";
905 reg = <0x53500000 0xa0>;
909 dma-names = "tx", "rx";
912 mcasp0: mcasp@48038000 {
913 compatible = "ti,am33xx-mcasp-audio";
914 ti,hwmods = "mcasp0";
915 reg = <0x48038000 0x2000>,
916 <0x46000000 0x400000>;
917 reg-names = "mpu", "dat";
918 interrupts = <80>, <81>;
919 interrupt-names = "tx", "rx";
923 dma-names = "tx", "rx";
926 mcasp1: mcasp@4803C000 {
927 compatible = "ti,am33xx-mcasp-audio";
928 ti,hwmods = "mcasp1";
929 reg = <0x4803C000 0x2000>,
930 <0x46400000 0x400000>;
931 reg-names = "mpu", "dat";
932 interrupts = <82>, <83>;
933 interrupt-names = "tx", "rx";
937 dma-names = "tx", "rx";
941 compatible = "ti,omap4-rng";
943 reg = <0x48310000 0x2000>;
949 /include/ "am33xx-clocks.dtsi"