fix short copy handling in copy_mc_pipe_to_iter()
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / spi / samsung,spi.yaml
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/samsung,spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Samsung S3C/S5P/Exynos SoC SPI controller
8
9 maintainers:
10   - Krzysztof Kozlowski <krzk@kernel.org>
11
12 description:
13   All the SPI controller nodes should be represented in the aliases node using
14   the following format 'spi{n}' where n is a unique number for the alias.
15
16 properties:
17   compatible:
18     oneOf:
19       - enum:
20           - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
21           - samsung,s3c6410-spi
22           - samsung,s5pv210-spi # for S5PV210 and S5PC110
23           - samsung,exynos5433-spi
24           - tesla,fsd-spi
25       - const: samsung,exynos7-spi
26         deprecated: true
27
28   clocks:
29     minItems: 2
30     maxItems: 3
31
32   clock-names:
33     minItems: 2
34     maxItems: 3
35
36   cs-gpios: true
37
38   dmas:
39     minItems: 2
40     maxItems: 2
41
42   dma-names:
43     items:
44       - const: tx
45       - const: rx
46
47   interrupts:
48     maxItems: 1
49
50   no-cs-readback:
51     description:
52       The CS line is disconnected, therefore the device should not operate
53       based on CS signalling.
54     type: boolean
55
56   num-cs:
57     minimum: 1
58     maximum: 4
59     default: 1
60
61   samsung,spi-src-clk:
62     description:
63       If the spi controller includes a internal clock mux to select the clock
64       source for the spi bus clock, this property can be used to indicate the
65       clock to be used for driving the spi bus clock. If not specified, the
66       clock number 0 is used as default.
67     $ref: /schemas/types.yaml#/definitions/uint32
68     default: 0
69
70   reg:
71     maxItems: 1
72
73 required:
74   - compatible
75   - clocks
76   - clock-names
77   - dmas
78   - dma-names
79   - interrupts
80   - reg
81
82 allOf:
83   - $ref: spi-controller.yaml#
84   - if:
85       properties:
86         compatible:
87           contains:
88             const: samsung,exynos5433-spi
89     then:
90       properties:
91         clocks:
92           minItems: 3
93           maxItems: 3
94         clock-names:
95           items:
96             - const: spi
97             - enum:
98                 - spi_busclk0
99                 - spi_busclk1
100                 - spi_busclk2
101                 - spi_busclk3
102             - const: spi_ioclk
103     else:
104       properties:
105         clocks:
106           minItems: 2
107           maxItems: 2
108         clock-names:
109           items:
110             - const: spi
111             - enum:
112                 - spi_busclk0
113                 - spi_busclk1
114                 - spi_busclk2
115                 - spi_busclk3
116
117 unevaluatedProperties: false
118
119 examples:
120   - |
121     #include <dt-bindings/clock/exynos5433.h>
122     #include <dt-bindings/clock/samsung,s2mps11.h>
123     #include <dt-bindings/interrupt-controller/arm-gic.h>
124     #include <dt-bindings/gpio/gpio.h>
125
126     spi@14d30000 {
127         compatible = "samsung,exynos5433-spi";
128         reg = <0x14d30000 0x100>;
129         interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;
130         dmas = <&pdma0 11>, <&pdma0 10>;
131         dma-names = "tx", "rx";
132         #address-cells = <1>;
133         #size-cells = <0>;
134         clocks = <&cmu_peric CLK_PCLK_SPI1>,
135                  <&cmu_peric CLK_SCLK_SPI1>,
136                  <&cmu_peric CLK_SCLK_IOCLK_SPI1>;
137         clock-names = "spi",
138                       "spi_busclk0",
139                       "spi_ioclk";
140         samsung,spi-src-clk = <0>;
141         pinctrl-names = "default";
142         pinctrl-0 = <&spi1_bus>;
143         num-cs = <1>;
144
145         cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
146
147         audio-codec@0 {
148             compatible = "wlf,wm5110";
149             reg = <0x0>;
150             spi-max-frequency = <20000000>;
151             interrupt-parent = <&gpa0>;
152             interrupts = <4 IRQ_TYPE_NONE>;
153             clocks = <&pmu_system_controller 0>,
154                      <&s2mps13_osc S2MPS11_CLK_BT>;
155             clock-names = "mclk1", "mclk2";
156
157             gpio-controller;
158             #gpio-cells = <2>;
159             interrupt-controller;
160             #interrupt-cells = <2>;
161
162             wlf,micd-detect-debounce = <300>;
163             wlf,micd-bias-start-time = <0x1>;
164             wlf,micd-rate = <0x7>;
165             wlf,micd-dbtime = <0x2>;
166             wlf,micd-force-micbias;
167             wlf,micd-configs = <0x0 1 0>;
168             wlf,hpdet-channel = <1>;
169             wlf,gpsw = <0x1>;
170             wlf,inmode = <2 0 2 0>;
171
172             wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
173             wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
174
175             /* core supplies */
176             AVDD-supply = <&ldo18_reg>;
177             DBVDD1-supply = <&ldo18_reg>;
178             CPVDD-supply = <&ldo18_reg>;
179             DBVDD2-supply = <&ldo18_reg>;
180             DBVDD3-supply = <&ldo18_reg>;
181             SPKVDDL-supply = <&ldo18_reg>;
182             SPKVDDR-supply = <&ldo18_reg>;
183
184             controller-data {
185                 samsung,spi-feedback-delay = <0>;
186             };
187         };
188     };