Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm MSM8974 TLMM pin controller
   8
   9 maintainers:
  10   - Bjorn Andersson <andersson@kernel.org>
  11   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  12
  13 description:
  14   Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
  15
  16 properties:
  17   compatible:
  18     const: qcom,msm8974-pinctrl
  19
  20   reg:
  21     maxItems: 1
  22
  23   interrupts:
  24     maxItems: 1
  25
  26   interrupt-controller: true
  27   "#interrupt-cells": true
  28   gpio-controller: true
  29   "#gpio-cells": true
  30   gpio-ranges: true
  31   wakeup-parent: true
  32
  33   gpio-reserved-ranges:
  34     minItems: 1
  35     maxItems: 73
  36
  37   gpio-line-names:
  38     maxItems: 146
  39
  40 patternProperties:
  41   "-state$":
  42     oneOf:
  43       - $ref: "#/$defs/qcom-msm8974-tlmm-state"
  44       - patternProperties:
  45           "-pins$":
  46             $ref: "#/$defs/qcom-msm8974-tlmm-state"
  47         additionalProperties: false
  48
  49 $defs:
  50   qcom-msm8974-tlmm-state:
  51     type: object
  52     description:
  53       Pinctrl node's client devices use subnodes for desired pin configuration.
  54       Client device subnodes use below standard properties.
  55     $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
  56     unevaluatedProperties: false
  57
  58     properties:
  59       pins:
  60         description:
  61           List of gpio pins affected by the properties specified in this
  62           subnode.
  63         items:
  64           oneOf:
  65             - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
  66             - enum: [ hsic_data, hsic_strobe, sdc1_clk, sdc1_cmd, sdc1_data,
  67                       sdc2_clk, sdc2_cmd, sdc2_data ]
  68         minItems: 1
  69         maxItems: 36
  70
  71       function:
  72         description:
  73           Specify the alternative function to be configured for the specified
  74           pins.
  75
  76         enum: [ gpio, cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,
  77                 blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1, blsp_uim2,
  78                 blsp_uart2, blsp_i2c2, blsp_spi2, blsp_uim3, blsp_uart3,
  79                 blsp_i2c3, blsp_spi3, blsp_uim4, blsp_uart4, blsp_i2c4,
  80                 blsp_spi4, blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,
  81                 blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6, blsp_uim7,
  82                 blsp_uart7, blsp_i2c7, blsp_spi7, blsp_uim8, blsp_uart8,
  83                 blsp_i2c8, blsp_spi8, blsp_uim9, blsp_uart9, blsp_i2c9,
  84                 blsp_spi9, blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,
  85                 blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11, blsp_uim12,
  86                 blsp_uart12, blsp_i2c12, blsp_spi12, blsp_spi1_cs1,
  87                 blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2
  88                 blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,
  89                 sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0,
  90                 cci_timer1, cci_timer2, cci_timer3, cci_async_in0,
  91                 cci_async_in1, cci_async_in2, cam_mckl0, cam_mclk1, cam_mclk2,
  92                 cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, hdmi_hpd, edp_hpd,
  93                 gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, gp_mn,
  94                 tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
  95                 spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]
  96
  97     required:
  98       - pins
  99
 100     allOf:
 101       - if:
 102           properties:
 103             pins:
 104               contains:
 105                 enum:
 106                   - hsic_data
 107                   - hsic_strobe
 108           required:
 109             - pins
 110         then:
 111           properties:
 112             bias-pull-down: false
 113             bias-pull-up: false
 114             bias-disable: false
 115             drive-strength: false
 116             input-enable: false
 117             output-high: false
 118             output-low: false
 119
 120 allOf:
 121   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
 122
 123 required:
 124   - compatible
 125   - reg
 126
 127 additionalProperties: false
 128
 129 examples:
 130   - |
 131     #include <dt-bindings/interrupt-controller/arm-gic.h>
 132     tlmm: pinctrl@fd510000 {
 133         compatible = "qcom,msm8974-pinctrl";
 134         reg = <0xfd510000 0x4000>;
 135         gpio-controller;
 136         gpio-ranges = <&tlmm 0 0 146>;
 137         #gpio-cells = <2>;
 138         interrupt-controller;
 139         #interrupt-cells = <2>;
 140         interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 141
 142         sdc1-off-state {
 143             clk-pins {
 144                 pins = "sdc1_clk";
 145                 bias-disable;
 146                 drive-strength = <2>;
 147             };
 148
 149             cmd-pins {
 150                 pins = "sdc1_cmd";
 151                 bias-pull-up;
 152                 drive-strength = <2>;
 153             };
 154
 155             data-pins {
 156                 pins = "sdc1_data";
 157                 bias-pull-up;
 158                 drive-strength = <2>;
 159             };
 160         };
 161
 162         blsp2-uart1-sleep-state {
 163             pins = "gpio41", "gpio42", "gpio43", "gpio44";
 164             function = "gpio";
 165             drive-strength = <2>;
 166             bias-pull-down;
 167         };
 168
 169         hsic-state {
 170             pins = "hsic_data", "hsic_strobe";
 171         };
 172     };